Systems For Erasing Non-Volatile Memory Using Individual Verification And Additional Erasing of Subsets of Memory Cells
a non-volatile memory and subset technology, applied in static storage, digital storage, instruments, etc., can solve the problems of increasing program and erase times, over-erasure of faster erasing memory cells, and shortening the cycle life of memory cells or nand strings, so as to avoid over-erasing faster erasing of storage elements, efficient and accurate erase the set of elements, and faster erasing
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[0052]FIG. 4 is a block diagram of one embodiment of a flash memory system that can be used to implement one or more embodiments of the present disclosure. Other systems and implementations can be used. Memory cell array 302 is controlled by column control circuit 304, row control circuit 306, c-source control circuit 310 and p-well control circuit 308. Column control circuit 304 is connected to the bit lines of memory cell array 302 for reading data stored in the memory cells, for determining a state of the memory cells during a program operation, and for controlling potential levels of the bit lines to promote or inhibit programming and erasing. Row control circuit 306 is connected to the word lines to select one of the word lines, to apply read voltages, to apply program voltages combined with the bit line potential levels controlled by column control circuit 304, and to apply an erase voltage. C-source control circuit 310 controls a common source line (labeled as “C-source” in F...
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