Customised microchip for generating electrical stimulation pulses

Abstract

A microchip for generating stimulation pulses comprising a power management unit, a demodulation unit, a decoder unit, a control unit, a current generator, a digital to analogue converter, a stimulation unit, and a back telemetry unit, wherein the microchip may be configured to receive a high frequency modulated signal (data signal) from an external part of an implantable auditory prosthesis. The data signal may be demodulated to a primary signal comprising a main signal encoded with a clock signal in order to generating stimulation pulses. The stimulation pulses may be applied to an implantee's cochlear nerves to restore implantee's auditory function.

Description

CUSTOMISED MICROCHIP FOR GENERATING ELECTRICAL STIMULATION PULSESTECHNICAL FIELD

[0001] The present disclosure generally relates to systems and methods by which stimulation pulses are generated, and more particularly to microchips or application-specific integrated circuits (ASICs) which pertain to implantable auditory prostheses and more particularly to cochlear implant prostheses.BACKGROUND

[0002] Implantable auditory prostheses may be one of the most effective apparatuses to restore an implantee’s auditory function. These prostheses may provide a viable solution for patients suffering from severe sensorineural hearing loss, who may not be responsive to conventional hearing aids. Implantable auditory prostheses may help patients by converting external sounds to electrical stimulation pulses which are transmitted to the implantee’s cochlear nerve by way of an array of electrodes that are implanted within the Scala Tympani.

[0003] In order to achieve the most reliable and accurate performance of implantable auditory prostheses, different parts of these prostheses may need to configure such that an optimal fitting and tuning may be enabled corresponding to an individual patient. Implantable auditory prostheses may comprise two distinct part, external and internal parts, wherein each part may contain several units. Among these units, a microchip which is disposed within the internal part of the implantable auditory prosthesis may have a critical role in converting the external sounds and transmitting electrical stimulation pulses to an implantee’s cochlear nerve. Additionally, for a more reliable performance the implantable auditory prosthesis may need to comprise an accurate back telemetry unit which is embedded within the microchip. Therefore, there is need for more fine-grained and individualized sound decoding microchips which arecapable of transmitting electrical stimulation pulses to an implantee’s cochlear nerve and send feedback about electrical stimulation characteristics.SUMMARY

[0004] This summary is intended to provide an overview of the subject matter of one or more exemplary embodiments, and is not intended to identify essential elements or key elements of the subject matter, nor is it intended to be used to determine the scope of the claimed implementations. Its sole purpose is to present some concepts of one or more aspects in a simplified form as a prelude to the more detailed description that is presented later. The proper scope of one or more exemplary embodiments may be ascertained from the claims set forth below in view of the detailed description below and the drawings.

[0005] In one general aspect, the present disclosure may describe an exemplary microchip for generating stimulation pulses. In an exemplary embodiment, an exemplary microchip may comprise an exemplary power management unit which may be configured to receive an exemplary supply voltage level between 2 volts (V) and 3 V and may generate an exemplary output voltage level between 1 V and 2 V.

[0006] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary demodulation unit which may be configured to demodulate an exemplary data signal and may derive an exemplary primary signal. In an exemplary embodiment, an exemplary primary signal may comprise an exemplary main signal which may be encoded with an exemplary clock signal.

[0007] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary decoder unit which may be configured to receive an exemplary output voltage level from an exemplary power management unit, and decode an exemplary primary signal and recover an exemplary main signal and an exemplary clock signal.

[0008] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary control unit which may be configured to receive an exemplary output voltage level from an exemplary power management unit, and determine exemplary stimulation parameters and generate an exemplary stream of data bits based on an exemplary main signal. In an exemplary embodiment, exemplary stimulation parameters may comprise an exemplary address which may be associated with an exemplary electrode. In an exemplary embodiment, an exemplary electrode may be disposed in an exemplary electrode array by way of which an exemplary stimulation pulse may be applied to a tissue or a nerve. In an exemplary embodiment, an exemplary electrode array may comprise 12 distinct electrodes. In an exemplary embodiment, exemplary stimulation parameters may further comprise an exemplary stimulation pulse amplitude, an exemplary stimulation pulse duration, and an exemplary stimulation pulse rate.

[0009] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary current generator which may be configured to receive an exemplary two-bit binary input based on an exemplary stream of data bits which may be received from an exemplary control unit, and generate an exemplary current reference based on an exemplary two-bit binary input at one or more of a plurality of exemplary selectable levels.

[0010] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary digital to analogue converter (DAC) which may be configured to generate an exemplary DAC current and multiply an exemplary DAC current by an exemplary set amount based on an exemplary stream of data bits which may be received from an exemplary control unit and generate an exemplary stimulating current.

[0011] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary stimulation unit which may be configured to receive an exemplary stimulatingcurrent and generate exemplary biphasic current pulses based on an exemplary stream of data bits which may be received from an exemplary control unit, wherein exemplary biphasic current pulses may be sent to an exemplary electrode array.

[0012] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary back telemetry unit. In an exemplary embodiment, a back telemetry unit may comprise a sample and hold circuit which may be configured to sample a voltage of an electrode disposed in an exemplary electrode array. In an exemplary embodiment, a back telemetry unit may further comprise an integrator circuit which may be configured to integrate the voltage with respect to time and calculate an integrated value, wherein the integrated value may be compared with a set voltage based on which an output value is generated. In an exemplary embodiment, a back telemetry unit may further comprise a modulation circuit which may be configured to convert the output value to a time pulse and send the time pulse to an external transceiver.

[0013] In an exemplary embodiment, an exemplary data signal may be 100% modulated and may have an exemplary frequency of 1.2 MHz.

[0014] In an exemplary embodiment, an exemplary power management unit may comprise a voltage regulator circuit which may comprise an error amplifier, and a P-channel MOSFET (PMOS) pass transistor.

[0015] In an exemplary embodiment, an exemplary demodulation unit may comprise an exemplary comparator circuit, an exemplary schmitt trigger circuit, and an exemplary buffer circuit, wherein an exemplary comparator circuit may be in communication with an exemplary envelope detector circuit.

[0016] In an exemplary embodiment, an exemplary decoder unit may comprise an exemplary flip-flop which may be configured to sample an exemplary primary signal havingan exemplary time period (T), an exclusive-OR gate (XOR gate), and at least two exemplary delay elements. In an exemplary embodiment, at least two exemplary delay elements may comprise an exemplary first delay element and an exemplary second delay element wherein an exemplary first delay element may be disposed at an exemplary input of an exemplary XOR gate and may receive an exemplary primary signal, and an exemplary second delay element may be disposed between an exemplary input of an exemplary XOR gate and an exemplary output of an exemplary flip-flop. In an exemplary embodiment, at least two exemplary delay elements may be configured to provide an exemplary time delay between 0.5T and IT.

[0017] In an exemplary embodiment, a plurality of exemplary selectable levels may comprise an exemplary first selectable level which may equal to 0.25 pA and may be generated based on an exemplary two-bit binary input of “00”, an exemplary second selectable level which may equal to 0.50 pA and may be generated based on an exemplary two-bit binary input of “01”, an exemplary third selectable level which may equal to 1 pA and may be generated based on an exemplary two-bit binary input of “10”, and an exemplary fourth selectable level which may equal to 2 pA and may be generated based on an exemplary two-bit binary input of “11”.

[0018] In an exemplary embodiment, an exemplary digital to analogue converter (DAC) may be an exemplary 7 -bit current- mode binary- weighted DAC.

[0019] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary current driver which multiply an exemplary DAC current by six, and may generate an exemplary stimulating current between 1 pA and 2 mA. In an exemplary embodiment, an exemplary current driver which multiply an exemplary DAC current by six, and may generate an exemplary stimulating current between 1.5 pA and 1.5 mA.

[0020] This Summary may introduce a number of concepts in a simplified format; the concepts are further disclosed within the “Detailed Description” section. This Summary is not intended to configure essential / key features of the claimed subject matter, nor is intended to limit the scope of the claimed subject matter.BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The novel features which are believed to be characteristic of the present disclosure, as to its structure, organization, use and method of operation, together with further objectives and advantages thereof, will be better understood from the following drawings in which a presently preferred embodiment of the present disclosure will now be illustrated by way of example. It is expressly understood, however, that the drawings are for the purpose of illustration and description only and are not intended as a definition of the limits of the present disclosure. Embodiments of the present disclosure will now be described by way of example in association with the accompanying drawings in which:

[0022] Fig. 1 illustrates an exemplary configuration of external and internal parts in an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure;

[0023] Fig. 2A illustrates an exemplary configuration of different units of a microchip embedded within an internal part of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure;

[0024] Fig. 2B illustrates an exemplary arrangement of bits in a main signal that is transmitted to a control unit, consistent with one or more embodiments of the present disclosure;

[0025] Fig. 3 illustrates an exemplary circuitry of a power management unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure;

[0026] Fig. 4 illustrates an exemplary configuration of a demodulation unit configured to communicate with an envelope detector which may be embedded within an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure;

[0027] Fig. 5 illustrates an exemplary circuitry of a decoder unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure;

[0028] Fig. 6A illustrates an exemplary circuitry of a switch matrix disposed in a stimulation unit of a microchip for generating biphasic current pulses, consistent with one or more embodiments of the present disclosure;

[0029] Fig. 6B illustrates an exemplary configuration of implementing discharging switches to a reference electrode, consistent with one or more embodiments of the present disclosure; and

[0030] Fig. 7 illustrates an exemplary configuration of a back telemetry unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure.DETAILED DESCRIPTION

[0031] In the following detailed description, numerous specific details are set forth by way of examples to provide a thorough understanding of the relevant teachings related to the exemplary embodiments. However, it should be apparent that the present teachings may be practiced without such details. In other instances, well known methods, procedures,components, and / or circuitry have been described at a relatively high-level, without detail, in order to avoid unnecessarily obscuring aspects of the present teachings.

[0032] The following detailed description is presented to enable a person skilled in the art to make and use the methods and devices disclosed in one or more exemplary embodiments of the present disclosure. For purposes of explanation, specific nomenclature is set forth to provide a thorough understanding of the present disclosure. However, it will be apparent to one skilled in the art that these specific details are not required to practice the disclosed exemplary embodiments. Descriptions of specific exemplary embodiments are provided only as representative examples. Various modifications to the exemplary implementations will be plain to one skilled in the art, and the general principles defined herein may be applied to other implementations and applications without departing from the scope of the present disclosure. The present disclosure is not intended to be limited to the implementations shown, but is to be accorded the widest possible scope consistent with the principles and features disclosed herein.

[0033] Disclosed herein is an exemplary customised microchip (microchip) or application-specific integrated circuit (ASIC) which pertain to implantable auditory prostheses and cochlear implant prostheses. In an exemplary embodiment, an exemplary implantable auditory prosthesis may comprise two exemplary distinct parts, an exemplary external part and an exemplary internal part, through which an exemplary detected sound may be processed and converted to exemplary electrical stimulation pulses.

[0034] In one or more embodiments, an exemplary external part may be disposed behind an implantee’s ear and out of the skull, while an exemplary internal part may be implanted inside an implantee’s ear canal. In one or more embodiments, an exemplary external part may comprise an exemplary microphone for detecting external sounds, an exemplary sound processor for converting detected sounds to high frequency signals, an exemplary transceiverfor transmitting high frequency signals to an exemplary internal part, and an exemplary power supply for providing power requirements. In an exemplary embodiment, an exemplary internal part may comprise an exemplary receiver for receiving high frequency signals, an exemplary microchip for generating electrical stimulation signals based on high frequency signals, and an exemplary electrode array for applying electrical stimulation pulses to an implantee’s nerve or tissue. In an exemplary embodiment, an exemplary external part may communicate with an exemplary internal part by wireless link such as RF link provided by an exemplary coil which may be embedded in an exemplary transceiver, and an exemplary antenna coil which may be embedded in an exemplary receiver of an exemplary internal part.

[0035] In an exemplary embodiment, an exemplary microphone disposed in an exemplary external part may detect external sounds and send exemplary signals representative of external sounds to an exemplary sound processor, wherein an exemplary sound processor may output high frequency signals such as radio frequency (RF) signals. In an embodiment, an exemplary RF signals may be transmitted through an exemplary transceiver and an exemplary RF link to an exemplary receiver of an exemplary internal part. In an embodiment, an exemplary RF signal (data signal) may be delivered to an exemplary microchip of an exemplary internal part, wherein may be converted to an exemplary electrical stimulation signal. In an exemplary embodiment, an exemplary electrical stimulation signal may be transmitted to an implantee’s cochlear nerve through exemplary conductive paths and an exemplary electrode array implanted inside an implantee’s Scala Tympani. In an exemplary embodiment, in order to send feedback signal of an electrode performance during stimulation, an exemplary back telemetry unit may be embedded within an exemplary microchip.

[0036] Referring now to the figures, Fig. 1 illustrates an exemplary configuration of external and internal parts in an implantable auditory prosthesis, consistent with one or moreembodiments of the present disclosure. In an exemplary embodiment, an exemplary implantable auditory prosthesis 100 may comprise an exemplary external part 102 and an exemplary internal part 114. In an exemplary embodiment, an exemplary external part 102 may comprise an exemplary microphone 104 that may detect external sounds, such as human voice and speech, and may output exemplary signals representative of detected external sounds to an exemplary sound processer 108 for extracting speech characteristics and generating high frequency signals such as radio frequency (RF) signals. In an exemplary embodiment, an exemplary RF signal may be transmitted to an exemplary internal part 114 through an exemplary radio frequency (RF) link 112. In an exemplary embodiment, the RF link 112 may be provided by an exemplary coil which may be embedded in an exemplary transceiver 110, and an exemplary antenna coil 116 which may be embedded in an exemplary receiver 118 of an exemplary internal part 114. In an exemplary embodiment, an exemplary external part 102 may further comprise an exemplary power supply 106, such as a battery that may provide power requirements of an exemplary external part 102.

[0037] In an exemplary embodiment, with further reference to Fig. 1, an exemplary internal part 114 may further comprise a microchip 120 for generating electrical stimulation pulses based on an exemplary RF signal which may be delivered by an exemplary receiver 118. In an exemplary embodiment, electrical stimulation pulses may be transmitted to an implantee’s auditory nerve through exemplary conductive paths 122i-122n, respectively connected to exemplary electrodes 124i-124nwhich provide an exemplary electrode array. In an exemplary embodiment, electrical stimulation pulses may be transmitted to an implantee’s auditory nerve through 12 exemplary conductive paths, respectively connected to 12 exemplary electrodes which provide an exemplary electrode array.

[0038] Fig. 2A illustrates an exemplary configuration of different units of a microchip embedded within an internal part of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplary microchip 120 may comprise an exemplary power management unit 204 which may be configured to receive an exemplary supply voltage level 200 and may generate exemplary output voltage levels 204a-204b. In an exemplary embodiment, an exemplary supply voltage level 200 may be between 2 volts (V) and 3 V and each one of exemplary output voltage levels 204a and 204b may be between 1 V and 2 V. In an exemplary embodiment, an exemplary supply voltage level 200 may be 3 V and each one of exemplary output voltage levels 204a and 204b may be 1.8 V.

[0039] In an exemplary embodiment, an exemplary microchip may further comprise an exemplary demodulation unit 206 which may be configured to demodulate an exemplary RF signal (data signal) 202 and may derive an exemplary primary signal 208. In an exemplary embodiment, an exemplary primary signal 208 may comprise an exemplary main signal which may be encoded with an exemplary clock signal.

[0040] In an exemplary embodiment, an exemplary microchip 120 may further comprise an exemplary decoder unit 210 which may be configured to receive an exemplary output voltage level 204a from an exemplary power management unit 204, and decode an exemplary primary signal 208 and recover an exemplary main signal 212 and an exemplary clock signal 214.

[0041] In an exemplary embodiment, an exemplary microchip 120 may further comprise an exemplary control unit 216 which may be configured to receive an exemplary output voltage level 204b from an exemplary power management unit 204, and determine exemplary stimulation parameters and generate an exemplary stream of data bits based on an exemplarymain signal 212 at an exemplary clock signal 214 frequency. In an exemplary embodiment, exemplary stimulation parameters may comprise an exemplary address which may be associated with an exemplary electrode 124i-124n. In an exemplary embodiment, an exemplary electrode 124i-124nmay be disposed in an exemplary electrode array by way of which an exemplary stimulation pulse may be applied to a tissue or a nerve. In an exemplary embodiment, exemplary stimulation parameters may further comprise an exemplary stimulation pulse amplitude, an exemplary stimulation pulse duration, and an exemplary stimulation pulse rate.

[0042] In an exemplary embodiment, an exemplary microchip 120 may further comprise an exemplary current generator 218 and an exemplary digital to analogue converter (DAC) 220. In an exemplary embodiment, an exemplary current generator 218 may be configured to receive an exemplary two-bit binary input based on an exemplary stream of data bits which may be received from an exemplary control unit 216 at an exemplary clock signal 214 frequency, and may generate an exemplary current reference based on an exemplary two-bit binary input. In an exemplary embodiment, an exemplary current reference may be transmitted to an exemplary DAC 220 for generating an exemplary amplified stimulation current which may be applied to an implantee’s nerve through an exemplary electrode array. In an exemplary embodiment, an exemplary current reference may be generated at one or more of a plurality of exemplary selectable levels.

[0043] In an exemplary embodiment, a plurality of exemplary selectable levels may comprise an exemplary first selectable level equal to 0.25 pA, an exemplary second selectable level equal to 0.50 pA, an exemplary third selectable level equal to 1 pA, an exemplary fourth selectable level equal to 2 pA, wherein each of exemplary selectable levels may be generated based on a distinct exemplary two-bit binary input. In an exemplary embodiment, an exemplaryfirst selectable level may be generated based on an exemplary two-bit binary input of “00”, an exemplary second selectable level may be generated based on an exemplary two-bit binary input of “01”, an exemplary third selectable level may be generated based on an exemplary two-bit binary input of “10”, and an exemplary fourth selectable level may be generated based on an exemplary two-bit binary input of “11”.

[0044] In an exemplary embodiment, an exemplary DAC 220 may be configured to generate an exemplary DAC current and multiply an exemplary DAC current by an exemplary set amount based on an exemplary current reference and an exemplary stream of data bits which may be received from an exemplary control unit 216, and generate an exemplary stimulating current. In an exemplary embodiment, an exemplary DAC 220 may be an exemplary 7-bit current-mode binary- weighted DAC. In an exemplary embodiment, an exemplary current driver may be configured to receive and amplify an exemplary DAC current by multiplying an exemplary DAC current by six in order to generate an exemplary stimulating current between 1 pA and 2 mA. In an exemplary embodiment, an exemplary current driver which multiply an exemplary DAC current by six, and may generate an exemplary stimulating current between 1.5 pA and 1.5 mA. Table 1 below shows several ranges of stimulating current based on different two-bit binary inputs that is transmitted to a 7-bit current-mode binary-weighted DAC, consistent with one or more exemplary embodiments of the present disclosure.Table 1: several ranges of stimulating current based on different two-bit binary inputs that is transmitted to a 7-bit current-mode binary-weighted DAC, consistent with one or more exemplary embodiments of the present disclosure.

[0045] In an exemplary embodiment, an exemplary microchip 120 may further comprise an exemplary stimulation unit 222 which may be configured to receive an exemplary stimulating current and generate exemplary bi-directional or biphasic current pulses. In an exemplary embodiment, an exemplary stimulation unit 222 may comprise an exemplary switch matrix through which exemplary biphasic current pulses may be applied to an implantee’s nerve or tissue. In an exemplary embodiment, exemplary biphasic current pulses may be generated based on an exemplary stream of data bits which may be received from an exemplary control unit 216. In an exemplary embodiment, exemplary biphasic current pulses may be generated by changing a direction of an exemplary stimulating current that may be applied to an implantee’s nerve. In an exemplary embodiment, a direction of an exemplary stimulating current may change by using an exemplary switch matrix corresponding to a pair of exemplary electrodes 124i-124n.

[0046] In an exemplary embodiment, with further reference to Fig. 2A, an exemplary microchip 120 may further comprise an exemplary back telemetry unit 224 configured to send feedback signal 226 based on an electrode performance during electrical stimulation.

[0047] Fig. 2B illustrates an exemplary arrangement of bits in a main signal that is transmitted to a control unit, consistent with one or more embodiments of the presentdisclosure. In an exemplary embodiment, an exemplary main signal 212 may comprise an exemplary start bit, exemplary data bits, and an exemplary stop bit that may be followed by a stream of exemplary check bits. In an exemplary embodiment, exemplary data bits may comprise several sets of bits that may make a 14-bit word. In an exemplary embodiment, several sets of bits may comprise an exemplary first set of bits 212a that may be representative of an exemplary current reference, an exemplary second set of bits 212b that may be representative of an exemplary DAC current, an exemplary third set of bits 212c that may be representative of a microchip working modes, and an exemplary fourth set of bits that may be representative of an address associated with an exemplary electrode 124i-124n.

[0048] In an exemplary embodiment, with further reference to Fig. 2B an exemplary first set of bits 212a may be sent to an exemplary current generator at an exemplary clock signal 214 frequency, wherein received by an exemplary two-bit input of an exemplary current generator. In an exemplary embodiment, an exemplary second set of bits 212b may be sent to an exemplary 7-bit DAC at an exemplary clock signal 214 frequency, based on which a DAC current may be generated. In an exemplary embodiment, an exemplary third set of bits 212c may be representative of a microchip working modes. In an exemplary embodiment, an exemplary microchip 120 may have two working modes comprising a stimulation mode and a back telemetry mode. In an exemplary embodiment, electrical stimulation pulses may be applied to implantee’s nerve in a stimulation mode while in a back telemetry mode, feedback signal 226 may also be generated based on an electrode performance during electrical stimulation. In an exemplary embodiment, an exemplary fourth set of bits may generate 16 (2A4=16) distinct values that each value may be representative of an address associated with an exemplary electrode disposed in an exemplary electrode array. In an exemplary embodiment, an exemplary electrode array may comprise 12 electrodes.

[0049] Fig. 3 illustrates an exemplary circuitry of a power management unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplary power management unit 204 which may be configured to receive an exemplary supply voltage level 200 and may generate exemplary output voltage levels 204a-204b. In an exemplary embodiment, an exemplary supply voltage level 200 may be between 2 volts (V) and 3 V and each one of exemplary output voltage levels 204a and 204b may be between 1 V and 2 V. In an exemplary embodiment, an exemplary supply voltage level 200 may be 3 V and each one of exemplary output voltage levels 204a and 204b may be 1.8 V.

[0050] In an exemplary embodiment, with further reference to Fig. 3 an exemplary power management unit 204 may comprise an exemplary voltage regulator circuit 300 and an exemplary power on reset (PoR) 310. In an exemplary embodiment, an exemplary voltage regulator configured to receive an exemplary supply voltage level 200 between 2 volts (V) and 3 V and generate an exemplary output 304 between 1 V and 2 V. In an exemplary embodiment, an exemplary output 304 may be equal to an exemplary output voltage level 204a that may be transmitted to an exemplary decoder unit 210. In an exemplary embodiment, an exemplary supply voltage level 200 may be 3 V and an exemplary output voltage level 204a may be 1.8 V. In an exemplary embodiment, an exemplary PoR 310 may be configured to generate an exemplary output voltage level 204b that may be transmitted to an exemplary control unit 216. In an exemplary embodiment, an exemplary PoR 310 may be configured to ensure that an exemplary control unit 216 starts operating as an exemplary output 304 has reached a regulated set level and before an exemplary output 304 reaches the regulated set level, an exemplary control unit 216 may not start operating.

[0051] In an exemplary embodiment, an exemplary voltage regulator circuit 300 may comprise an exemplary error amplifier 306, wherein an exemplary output 304 may be compared with an exemplary reference voltage (Vrefl ) for detecting any differences. In an exemplary embodiment, any difference between an exemplary output 304 and Vrefl may be compensated by an exemplary error amplifier 306. In an exemplary embodiment, an exempalry Equation (1) may be established between an exemplary output (Vout) and Vrefl. An exemplary Equation (1) may be as follows:Voutwhich R1 and R2 may indicate exemplary resistors. In an exemplary embodiment, an exemplary voltage regulator circuit 300 may further comprise an exemplary P-channel MOSFET (PMOS) pass transistor 308.

[0052] Fig. 4 illustrates an exemplary configuration of demodulation unit 206 configured to communicate with an envelope detector which may be embedded within an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplary demodulation unit 206 may be configured to demodulate an exemplary data signal 202 which may be 100% modulated and may have an exemplary frequency of 1.2 MHz, and derive an exemplary primary signal 208. In an exemplary embodiment, an exemplary demodulation unit 206 may comprise an exemplary comparator circuit 406, an exemplary Schmitt trigger circuit 408, and an exemplary buffer circuit 410, wherein an exemplary comparator circuit 406 may be in communication with an exemplary envelope detector circuit 402. In an exemplary embodiment, an exemplary envelope detector 402 may be disposed outside an exemplary microchip 120. In an exemplary embodiment, power required for an exemplary comparator circuit 406, an exemplary Schmitttrigger circuit 408, and an exemplary buffer circuit 410 may be supplied by VDD (i.e. supply voltage or operating voltage) of microchip 120.

[0053] Fig. 5 illustrates an exemplary circuitry of a decoder unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplary decoder unit 210 may be configured to receive an exemplary primary signal 208 comprising an exemplary main signal 212 encoded with an exemplary clock signal 214 by Manchester encoding technique and output and recover an exemplary main signal 212 and an exemplary clock signal 214.

[0054] In an exemplary embodiment, an exemplary decoder unit 210 may comprise an exemplary flip-flop 504 which may be configured to sample an exemplary primary signal 208 having an exemplary time period (T), an exclusive-OR gate (XOR gate) 502, and at least two exemplary delay elements 500a-500c. In an exemplary embodiment, at least two exemplary delay elements 500a-500c may comprise an exemplary first delay element 500a and an exemplary second delay element 500c, wherein an exemplary first delay element 500a may be disposed at an exemplary input of an exemplary XOR gate 502 and may receive an exemplary primary signal 208, and an exemplary second delay element 500c may be disposed between an exemplary input of an exemplary XOR gate 502 and an exemplary output of an exemplary flipflop 504. In an exemplary embodiment, at least two exemplary delay elements 500a-500c may be configured to provide an exemplary time delay between 0.5T and T. In an exemplary embodiment, at least two exemplary delay elements 500a-500c may be configured to provide an exemplary time delay equal to 0.75T.

[0055] Fig. 6A illustrates an exemplary circuitry of a switch matrix disposed in a stimulation unit of a microchip for generating biphasic current pulses, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplarystimulation unit 222 may comprise an exemplary switch matrix 600 that may be configured to receive an exemplary stimulating current (Istim) and generate exemplary bi-directional or biphasic current pulses. In an exemplary embodiment, exemplary biphasic current pulses may be applied to an implantee’s nerve through an exemplary switch matrix corresponding to a pair of exemplary electrodes 1241 and 1242. In an exemplary embodiment, exemplary biphasic current pulses may be generated based on an exemplary stream of data bits which may be received from an exemplary control unit 216. In an exemplary embodiment, an exemplary switch SI may be disposed in an exemplary switch matrix 600 for changing a direction of stimulating current. In an exemplary embodiment, in order to prevent charge accumulation in an implantee’s nerve or tissue, an exemplary discharging switch S2 may be disposed in an exemplary switch matrix 600. In an exemplary embodiment, an exemplary discharging switch S2 may be correspond to a pair of exemplary electrodes 1241 and 1242, wherein an exemplary electrode 1241 or 1242 may be a reference electrode. In an exemplary embodiment, an exemplary capacitor Cl may be disposed in an exemplary switch matrix 600 to prevent applying a direct stimulating current to an implantee’s nerve or tissue.

[0056] Fig. 6B illustrates an exemplary configuration 602 of implementing discharging switches to a reference electrode, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, an exemplary electrode array comprising 12 exemplary electrodes 124i-124nthat may be in direct contact with implantee’s nerve or tissue (load). In an exemplary embodiment, an exemplary electrode array comprising 12 exemplary electrodes 124i-124nthat may be connected to an exemplary reference electrode 606 through exemplary capacitors and exemplary discharging switches. In an exemplary embodiment, an exemplary electrode 1241 may be connected to a capacitor C2 and a pair of current resources 604a and 604b wherein a pair of current resources 604a and 604b may be connected to Vcc(i.e. supply voltage or operating voltage) and ground of microchip 120, respectively. In an exemplary embodiment, an exemplary electrode 1241 may also be connected to an exemplary discharging switch S2 and an exemplary reference electrode 606. In an exemplary embodiment, an exemplary reference electrode 606 may be connected to a pair of exemplary switches 608 and 610, wherein a pair of exemplary switches 608 and 610 may be connected to Vcc (i.e. supply voltage or operating voltage) and ground of microchip 120, respectively.

[0057] Fig. 7 illustrates an exemplary configuration of a back telemetry unit embedded within a microchip of an implantable auditory prosthesis, consistent with one or more embodiments of the present disclosure. In an exemplary embodiment, a back telemetry unit 224 may comprise a sample and hold circuit 702 which may be configured to sample an exemplary voltage of an electrode 124i-124nduring electrical stimulation. In an exemplary embodiment, a back telemetry unit 224 may further comprise an integrator circuit 704 which may be configured to integrate an exemplary voltage of an electrode 124i-124nwith respect to time of electrical stimulation and calculate an integrated value, wherein the integrated value may be compared with an exemplary set voltage Vref2 for generating an output value. In an exemplary embodiment, a back telemetry unit 224 may further comprise a modulation circuit 706 which may be configured to convert the output value to a time pulse and may transmit the time pulse to an exemplary transceiver 110 of an external part 102.

[0058] While the foregoing has described what are considered to be the best mode and / or other examples, it is understood that various modifications may be made therein and that the subject matter disclosed herein may be implemented in various forms and examples, and that the teachings may be applied in numerous applications, only some of which have been described herein. It is intended by the following claims to claim any and all applications, modifications and variations that fall within the true scope of the present teachings.

[0059] Unless otherwise stated, all measurements, values, ratings, positions, magnitudes, sizes, and other specifications that are set forth in this specification, including in the claims that follow, are approximate, not exact. They are intended to have a reasonable range that is consistent with the functions to which they relate and with what is customary in the art to which they pertain.

[0060] The scope of protection is limited solely by the claims that now follow. That scope is intended and should be interpreted to be as broad as is consistent with the ordinary meaning of the language that is used in the claims when interpreted in light of this specification and the prosecution history that follows and to encompass all structural and functional equivalents. Notwithstanding, none of the claims are intended to embrace subject matter that fails to satisfy the requirement of Sections 101, 102, or 103 of the Patent Act, nor should they be interpreted in such a way. Any unintended embracement of such subject matter is hereby disclaimed.

[0061] Except as stated immediately above, nothing that has been stated or illustrated is intended or should be interpreted to cause a dedication of any component, step, feature, object, benefit, advantage, or equivalent to the public, regardless of whether it is or is not recited in the claims.

[0062] It will be understood that the terms and expressions used herein have the ordinary meaning as is accorded to such terms and expressions with respect to their corresponding respective areas of inquiry and study except where specific meanings have otherwise been set forth herein. Relational terms such as first and second and the like may be used solely to distinguish one entity or action from another without necessarily requiring or implying any actual such relationship or order between such entities or actions. An element proceeded by “a” or “an” does not, without further constraints, preclude the existence of additional identical elements in the process, method, article, or apparatus that comprises the element.

[0063] The Abstract of the Disclosure is provided to allow the reader to quickly ascertain the nature of the technical disclosure. It is submitted with the understanding that it will not be used to interpret or limit the scope or meaning of the claims. In addition, in the foregoing Detailed Description, it may be seen that various features are grouped together in various implementations. This is for purposes of streamlining the disclosure, and is not to be interpreted as reflecting an intention that the claimed implementations require more features than are expressly recited in each claim. Rather, as the following claims reflect, inventive subject matter lies in less than all features of a single disclosed implementation. Thus, the following claims are hereby incorporated into the Detailed Description, with each claim standing on its own as a separately claimed subject matter.

[0064] While various implementations have been described, the description is intended to be exemplary, rather than limiting and it will be apparent to those of ordinary skill in the art that many more implementations and implementations are possible that are within the scope of the implementations. Although many possible combinations of features are shown in the accompanying figures and discussed in this detailed description, many other combinations of the disclosed features are possible. Any feature of any implementation may be used in combination with or substituted for any other feature or element in any other implementation unless specifically restricted. Therefore, it will be understood that any of the features shown and / or discussed in the present disclosure may be implemented together in any suitable combination. Accordingly, the implementations are not to be restricted except in light of the attached claims and their equivalents. Also, various modifications and changes may be made within the scope of the attached claims.

Claims

What is claimed is:

1. A microchip for generating stimulation pulses, the microchip comprising: a power management unit configured to receive a supply voltage level between 2 volts (V) and 3 V and generate an output voltage level between 1 V and 2 V ; a demodulation unit configured to demodulate the data signal and derive a primary signal comprising a main signal encoded with a clock signal; a decoder unit configured to receive the output voltage level and decode the primary signal and recover the main signal and the clock signal; a control unit configured to receive the output voltage level and determine stimulation parameters and generate a stream of data bits based on the main signal, wherein the stimulation parameters comprise: an address associated with an electrode disposed in an electrode array by way of which a stimulation pulse is applied to a tissue or a nerve; a stimulation pulse amplitude; a stimulation pulse duration; and a stimulation pulse rate; a current generator configured to receive a two-bit binary input based on the stream of data bits received from the control unit, and generate a current reference based on the two-bit binary input at one or more of a plurality of selectable levels; a digital to analogue converter (DAC) configured to generate a DAC current and multiply the DAC current by a set amount based on the stream of data bits received from the control unit and generate a stimulating current;a stimulation unit configured to receive the stimulating current and generate biphasic current pulses based on the stream of data bits received from the control unit, wherein the biphasic current pulses are sent to the electrode array; and a back telemetry unit comprising: a sample and hold circuit configured to sample a voltage of an electrode disposed in the electrode array; an integrator circuit configured to integrate the voltage with respect to time and calculate an integrated value, wherein the integrated value is compared with a set voltage based on which an output value is generated; and a modulation circuit configured to convert the output value to a time pulse and send the time pulse to an external transceiver.

2. The microchip of claim 1, wherein the data signal is 100% modulated and has a frequency of 1.2 MHz.

3. The microchip of claim 1, wherein the power management unit comprises a voltage regulator circuit comprising an error amplifier, and a P-channel MOSFET (PMOS) pass transistor.

4. The microchip of claim 1, wherein the demodulation unit comprises a comparator circuit, a Schmitt trigger circuit, and a buffer circuit, wherein the comparator circuit is in communication with an envelope detector circuit.

5. The microchip of claim 1, wherein the decoder unit comprises: a flip-flop configured to sample the primary signal having a time period (T); an exclusive-OR gate (XOR gate); and at least two delay elements comprising a first delay element and a second delay element wherein the first delay element is disposed at an input of the XOR gate and receives the primary signal, and the second delay element is disposed between an input of the XOR gate and an outputof the flip-flop, wherein the at least two delay elements is configured to provide a time delay between 0.5T and IT.

6. The microchip of claim 1, wherein the electrode array may comprise 12 distinct electrodes.

7. The microchip of claim 1, wherein the plurality of selectable levels comprises: a first selectable level equals to 0.25 pA generated based on the two-bit binary input of 00; a second selectable level equals to 0.50 pA generated based on the two-bit binary input of 01; a third selectable level equals to 1 pA generated based on the two-bit binary input of 10; and a fourth selectable level equals to 2 pA generated based on the two-bit binary input of 11.

8. The microchip of claim 1, wherein the digital to analogue converter (DAC) is a 7 -bit currentmode binary- weighted DAC.

9. The microchip of claim 1, further comprising a current driver configured to multiply the DAC current by six, and generates the stimulating current between 1 pA and 2 mA.

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