Wafer, semiconductor package and manufacturing method thereof

By using UV film to bond the adhesive material layer to the insulating adhesive layer in the semiconductor packaging process, and separating the wafer unit by ultraviolet irradiation, the existing packaging process is solved, and simple and low-cost packaging production is achieved.

CN107564950BActive Publication Date: 2025-03-14SUZHOU ASEN SEMICON CO LTD
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Patent Information

Application Number
CN201710774911.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2017-08-31
Publication Date
2025-03-14
Estimated Expiration
2037-08-31

AI Technical Summary

Technical Problem

The existing semiconductor packaging process is complex and costly, especially when insulating adhesive layers with thicknesses greater than 15 um or 20 um are required.

Method used

Using a UV film, including a substrate and an adhesive material layer disposed on the substrate, the adhesive material layer is bonded to the insulating adhesive layer on the back of the wafer, and the adhesion between the adhesive material and the substrate is reduced by ultraviolet irradiation, and the wafer unit is cut and separated.

Benefits of technology

A simple packaging process and low-cost semiconductor package production are realized, reducing packaging costs and improving production efficiency.

✦ Generated by Eureka AI based on patent content.

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Abstract

This invention relates to wafers, wafer cells, semiconductor packages, and methods for manufacturing the same. According to one embodiment, a wafer cell includes: a front side; a back side opposite the front side; an insulating adhesive layer bonded to the back side; and an adhesive material layer bonded to the surface of the insulating adhesive layer opposite the back side. This invention provides reliable product quality through a low-cost, simplified packaging process.
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Description

Technical Field

[0001] The present invention relates to the field of semiconductor packaging, and in particular to a wafer, a semiconductor packaging component and a manufacturing method thereof. Background Art

[0002] In the field of semiconductor packaging, similar chips such as low noise amplifier (LNA) chips and electrostatic discharge (ESD) protection chips require a certain thickness of insulating glue between the chip and the carrier, such as insulating glue with a thickness greater than 15um or greater than 20um. The existing packaging process requires coating insulating glue on the back of the semiconductor wafer and then dispensing or even performing secondary coating. No matter which packaging process is used, it is relatively complicated and requires a high packaging cost.

[0003] Therefore, for the packaging process of a package body that requires an insulating adhesive layer of a certain thickness between the chip and the carrier, there are still many technical problems in the industry that need to be solved urgently. Summary of the invention

[0004] One of the objectives of the present invention is to provide a wafer, a wafer unit, a semiconductor package and a manufacturing method thereof, which can obtain a low-cost and high-quality semiconductor package with a simple process and technology.

[0005] One embodiment of the present invention provides a wafer, which includes: a front side; a back side opposite to the front side; an insulating adhesive layer bonded to the back side; and a UV (Ultraviolet) film, which includes a substrate and a sticky material layer disposed on the substrate, wherein the sticky material layer is bonded to the surface of the insulating adhesive layer opposite to the back side.

[0006] In another embodiment of the present invention, the insulating adhesive layer is cured.

[0007] Another embodiment of the present invention provides a wafer unit, which includes: a front side; a back side opposite to the front side; an insulating adhesive layer bonded to the back side; and an adhesive material layer bonded to a surface of the insulating adhesive layer opposite to the back side.

[0008] Another embodiment of the present invention also provides a method for manufacturing a semiconductor package, which includes: providing a wafer, the wafer having a relative front side and a back side; applying an insulating glue on the back side of the wafer to form an insulating glue layer; fixing the wafer on a UV film, wherein the UV film includes a substrate and an adhesive material layer disposed on the substrate, wherein the UV film is bonded to a surface of the insulating glue layer opposite to the back side through the adhesive material layer; cutting the wafer fixed on the UV film into a plurality of wafer units; and irradiating the wafer with ultraviolet rays to reduce the adhesion between the adhesive material layer and the substrate, and then sucking each wafer unit to separate it from the substrate.

[0009] In another embodiment of the present invention, the wafer fixed on the UV film is cut into a plurality of wafer units with a cutting depth of 55 microns to 65 microns of substrate thickness. In yet another embodiment of the present invention, the plurality of wafer units are further bonded to a lead frame or a package substrate on a heated machine track.

[0010] Another embodiment of the present invention also provides a semiconductor package manufactured by the above-mentioned method for manufacturing the semiconductor package.

[0011] The wafer, wafer unit, semiconductor package and manufacturing method thereof provided by the embodiments of the present invention not only have the advantages of low manufacturing cost, but also have the advantages of simple manufacturing process and high production efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0012] Figure 1 Schematic diagram of a top view of a wafer according to an embodiment of the present invention

[0013] Figure 2 This is a schematic diagram of the longitudinal section of a wafer that has been coated with an insulating adhesive layer.

[0014] Figure 3 This is a schematic diagram of the longitudinal section of a wafer treated with UV film.

[0015] Figure 4 This is a schematic diagram of the longitudinal cross-section of the wafer during dicing.

[0016] Figure 5 A schematic diagram of a longitudinal cross section of a separated wafer unit

[0017] Figure 6 is a schematic longitudinal cross-sectional view of a semiconductor package obtained by a method for manufacturing a semiconductor package according to an embodiment of the present invention DETAILED DESCRIPTION

[0018] In order to better understand the spirit of the present invention, it is further described below in conjunction with some preferred embodiments of the present invention.

[0019] In order to achieve a certain thickness of insulating glue between the chip and the lead frame or the package substrate, in one packaging process, the wafer needs to be thinned to the required thickness first, a layer of insulating glue is applied on the back of the wafer, and after the insulating glue is cured, the wafer is pasted on the blue film and the wafer is cut into single crystals. Then, the insulating glue is applied on the lead frame or the package substrate of the machine track, and a single crystal, that is, a wafer unit, is sucked up with a nozzle, and placed on the lead frame or the package substrate of the machine track. The lead frame or the package substrate is heated to complete the patch. Then, subsequent packaging processes such as wire bonding can be completed. In another packaging process, the wafer is first thinned to the required thickness, a layer of insulating glue is applied on the back of the wafer, and after the insulating glue is cured, a layer of insulating glue needs to be applied on the back of the wafer again and semi-cured. The semi-cured wafer is pasted on the blue film and the wafer is cut into single crystals. Then, a single crystal is sucked up with a nozzle and placed on the lead frame or the package substrate of the machine track, and the lead frame or the package substrate is heated to complete the patch. Similarly, subsequent packaging processes such as wire bonding can be completed.

[0020] Figure 1-6 FIG. 1 is a flow chart of a method for manufacturing a semiconductor package 100 according to an embodiment of the present invention.

[0021] in Figure 1 FIG. 1 is a schematic diagram of a top view of a wafer 10 that has only been thinned according to an embodiment of the present invention. Figure 1 As shown, a wafer 10 thinned to a desired thickness is provided, and the wafer 10 has a front side 101 and a back side 103 opposite to each other.

[0022] An insulating adhesive is applied on the back side 103 of the wafer 10 to form an insulating adhesive layer 105. The insulating adhesive can be an insulating adhesive commonly used in the field of semiconductor packaging manufacturing, and there is no special requirement. Next, the wafer 10 coated with the insulating adhesive layer 105 is cured to obtain Figure 2 Wafer 10 is shown. Figure 2 1 is a schematic longitudinal cross-sectional view of the wafer 10 after being coated with the insulating adhesive layer 105 .

[0023] Figure 3 1 is a schematic longitudinal cross-sectional view of a wafer 10 treated with a UV film 107. Figure 3As shown, the cured wafer 10 is fixed on the UV film 107, wherein the UV film 107 includes a substrate 108 and a viscous material layer 109 disposed on the substrate 108, wherein the UV film 107 is bonded to the surface 106 of the insulating adhesive layer 105 relative to the back side 103 of the wafer 10 through the viscous material layer 109. According to an embodiment of the present invention, the thickness of the viscous material 109 may be about 1 / 16 to about 1 / 4 of the thickness of the substrate 108. For example, the substrate 108 may have a thickness of about 80 microns, and the viscous material 109 may have a thickness of about 5 microns to about 20 microns. Please note that the "UV film" referred to in this application refers to a UV (Ultraviolet) film commonly used in the art, which is a film whose viscosity changes after ultraviolet irradiation. The "blue film" mentioned in the above application is a film commonly used in the art whose viscosity does not change after ultraviolet irradiation, generally blue, hence the name blue film.

[0024] Specifically, Figure 3 The wafer shown includes: a front side 101, a back side 103 opposite to the front side 101, an insulating adhesive layer 105 and a UV film 107. The insulating adhesive layer 105 is bonded to the back side 103 of the wafer 10 and is cured. The material of the insulating adhesive layer 105 can be an insulating adhesive commonly used in the field of semiconductor packaging manufacturing.

[0025] The UV film 107 includes a substrate 108 and an adhesive material layer 109 disposed on the substrate 108, wherein the adhesive material layer 109 is bonded to a surface 106 of the insulating adhesive layer 105 opposite to the back side 103 of the wafer 10. The UV film 107 may be a UV film commonly used in the semiconductor packaging manufacturing field.

[0026] Figure 4 1 is a schematic diagram of a longitudinal cross-section of the wafer 10 during cutting. Figure 4 As shown, the wafer 10 fixed on the UV film 107 is cut into a number of wafer units 20, that is, a single crystal or a single bare chip. When the wafer 10 fixed on the UV film 107 is cut into a number of wafer units 20, the cutting retention depth d on the substrate 108 can be 3 / 4 to 2 / 3 of the thickness of the substrate 108, for example, the cutting retention depth can be 55 microns to 65 microns, that is, 55 microns to 65 microns of the substrate 108 are not cut. On the one hand, this cutting can make the viscous material layer 109 cut through, ensuring that the fragments of the viscous material layer 109 after segmentation are consistent in size with the wafer unit 20. On the other hand, the best cutting effect can be achieved to prevent the UV film 107 from cracking due to the absorption of the wafer unit 20 when the cutting is too deep, or the risk of cracking in the subsequent packaging process when the cutting is too shallow.

[0027] Next, the wafer 10 is irradiated with ultraviolet light to reduce the adhesion between the adhesive material layer 109 and the substrate 108, so that the adhesive material layer 109 can be easily separated from the substrate 108 when each wafer unit 20 is sucked. Figure 5 The separated wafer units 20 are shown. Figure 5 2 is a schematic longitudinal cross-sectional view of a separated wafer unit 20 .

[0028] As mentioned above, since the embodiment of the present invention adopts a packaging process different from the existing one, the adhesive material layer 109 on the UV film 107 can be used to replace the secondary glue coating process or the glue dispensing process in the existing packaging process to obtain the wafer unit 20. Therefore, the wafer unit 20 according to the embodiment of the present invention can be obtained by a packaging process with a simple and low cost.

[0029] Then, the separated wafer units 20 are respectively bonded to the lead frame or the package substrate 30 on the heated machine rail (not shown). The wafer unit 20 is connected to the upper surface of the lead frame or the package substrate 30 by a wire bonding process using a lead 32, so as to realize electrical connection between the two. The lead 32 used for wire bonding can be a gold wire or a copper wire. Then, an insulating shell 34 that shields the above-mentioned device can be formed by injection molding and then subjected to subsequent processing such as trimming to obtain the desired semiconductor package 100, such as Figure 6 shown. Figure 6 FIG. 1 is a schematic longitudinal cross-sectional view of a semiconductor package 100 obtained by a method for manufacturing a semiconductor package according to an embodiment of the present invention.

[0030] The technical content and technical features of the present invention have been disclosed as above, but those skilled in the art may still make various substitutions and modifications based on the teachings and disclosures of the present invention without departing from the spirit of the present invention. Therefore, the protection scope of the present invention should not be limited to the contents disclosed in the embodiments, but should include various substitutions and modifications that do not depart from the present invention, and are covered by the claims of this patent application.

Claims

1. A wafer comprising: front; a back side opposite to the front side; An insulating adhesive layer bonded to the back surface; as well as A UV film, the UV film comprising a substrate and an adhesive material layer disposed on the substrate, wherein the adhesive material layer is bonded to a surface of the insulating adhesive layer opposite to the back surface; The insulating adhesive layer is cured and remains on the wafer to be packaged, and the wafer is cut into wafer units.

2. A wafer unit, comprising: front; a back side opposite to the front side; An insulating adhesive layer bonded to the back surface; as well as an adhesive material layer, the adhesive material layer being bonded to a surface of the insulating adhesive layer opposite to the back surface; The insulating adhesive layer is cured and remains on the wafer unit to be packaged, wherein the wafer unit is formed by cutting the wafer. 3 . The wafer unit according to claim 2 , wherein the adhesive material layer has a thickness of 5 μm to 20 μm.

4. A method for manufacturing a semiconductor package, comprising: Providing a wafer, wherein the wafer has a front side and a back side opposite to each other; Applying insulating glue on the back side of the wafer to form an insulating glue layer; curing the insulating adhesive layer; Fixing the wafer on a UV film, wherein the UV film comprises a substrate and an adhesive material layer disposed on the substrate, wherein the UV film is bonded to a surface of the insulating adhesive layer opposite to the back surface through the adhesive material layer; cutting the wafer fixed on the UV film into a plurality of wafer units; as well as irradiating the wafer with ultraviolet rays to reduce the adhesion between the adhesive material layer and the substrate, and then sucking each wafer unit to separate it from the substrate; The insulating adhesive layer is retained on the wafer to be packaged. 5 . The method according to claim 4 , wherein a cutting retention depth on the substrate when cutting the wafer fixed on the UV film into a plurality of wafer units is 55 μm to 65 μm. 6 . The method according to claim 4 , further comprising bonding the plurality of wafer units to lead frames or package substrates on a heated tool rail, respectively.

7. A semiconductor package manufactured by the method for manufacturing a semiconductor package according to any one of claims 4 to 6.

Citation Information

Patent Citations

  • Semiconductor packaging bonding process

    CN102184872A

  • Wafer and wafer unit

    CN207265062U

  • Method for detaching individual chips from wafer

    KR1020050062886A