Microelectronic device utilizing a modular substrate design with integrated fuses
By employing a modular substrate design in semiconductor packaging and utilizing built-in release fuses for connection and disconnection, the problems of wasted substrate area and increased costs are solved, resulting in better tooling utilization and cost reduction.
Patent Information
- Application Number
- CN201810447299.3
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2017-06-30
- Filing Date
- 2018-05-11
- Publication Date
- 2025-11-25
- Estimated Expiration
- 2038-05-11
AI Technical Summary
Existing semiconductor packaging suffers from wasted substrate area and increased costs, primarily due to unused substrate area and the need to purchase and assemble additional discrete components, such as switches.
A modular substrate design is adopted, which enables modular connections by using bundles that are released during substrate manufacturing as fuses, and disconnects unnecessary connections in the final manufacturing step, thereby reducing BOM costs and substrate shape factor.
This achieves better tooling availability and cost reduction, while maintaining the modularity and connectivity flexibility of the substrate and avoiding a significant increase in the substrate's lateral xy dimensions.
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Figure CN109216318B_ABST
Abstract
Description
TECHNICAL FIELD
[0001] Embodiments of the present invention generally relate to the fabrication of semiconductor devices. In particular, embodiments of the present invention relate to microelectronic devices utilizing a modular substrate design with integrated fuses. BACKGROUND
[0002] One existing approach to semiconductor packages with limited modularity uses discrete components like switches to provide some modularity, or designs a large substrate with separate areas for connecting different components, and then only connects the desired components to the area of interest, which results in wasted substrate area. Both of these approaches have the cost of increased size and cost due to the area of the substrate that is not utilized, and additional discrete components like switches that need to be purchased and assembled. BRIEF DESCRIPTION OF DRAWINGS
[0003] Figure 1 A microelectronic device with a modular substrate integrated fuse and substrate is shown according to one embodiment.
[0004] Figures 2A-2H Different configurations of a modular structure with package ports (e.g., pads) and fuses (e.g., conductive straight members) to enable substrate modularity are shown according to one embodiment.
[0005] Figure 3A A top view of a microelectronic device 300 with a package substrate integrated fuse is shown according to one embodiment.
[0006] Figure 3B A side view of a microelectronic device 300 with a package substrate integrated fuse is shown according to one embodiment.
[0007] Figure 4 Temperature profiles of configurations of a modular structure 400 with package ports (e.g., pads) and fuses (e.g., conductive straight members) and removal of dielectric material near the conductive members are shown according to one embodiment.
[0008] Figure 5 Temperature profiles of configurations of a modular structure 500 with package ports (e.g., pads) and fuses (e.g., conductive meandering members) and removal of dielectric material near the conductive meandering members are shown according to one embodiment.
[0009] Figure 6 A configuration of a modular structure 600 with package ports (e.g., pads) and fuses (e.g., conductive straight members) and removal of dielectric material near the conductive members is shown according to one embodiment.
[0010] Figure 7A construction of a modular structure 700 having package ports (e.g., pads) and fuses (e.g., conductive meandering members) and having dielectric material removed near the conductive members is shown, according to one embodiment.
[0011] Figure 8 A computing device 1000 according to one embodiment is shown. DETAILED DESCRIPTION
[0012] Described herein is a modular substrate with substrate integrated fuses.
[0013] In the following description, various aspects of the illustrative embodiments will be presented to introduce aspects of the illustrative embodiments. These aspects, alone or in combination, can help facilitate an understanding of the illustrative embodiments. It should be noted that the illustrative embodiments can address some, all, or none of the problems discussed above. It should further be noted that the illustrative embodiments can address aspects that include one, some, or all of the problems discussed above. The aspects described herein are presented to provide an overview of the illustrative embodiments.
[0014] Various operations will be introduced that can be performed in various sequences, in parallel, or in an order that can facilitate an understanding of the illustrative embodiments. The order of presentation of the operations should not be construed as a requirement or limitation unless explicitly stated as such. In some instances, further operations can be performed not only between described operations but also in place of the described operations.
[0015] In many of today's semiconductor packages, it is desirable to have a modular substrate, i.e., a modular substrate that can be manufactured according to a well-known design and then customized in a final operation to allow connection of different components and systems. A modular substrate allows the use of the same processes and manufacturing tools to manufacture a large number of substrates for multiple products, which results in better tool utilization and cost reduction. A truly modular substrate does not exist today.
[0016] The present design includes an architecture that enables a modular substrate by generating package integrated fuses. The substrate is manufactured according to a uniform, generic design, with built-in release beams that serve as fuses to form modular connections. Once the bill of materials (BOM) is finalized and the system components to be attached to the substrate are determined, only the connections that enable the desired routing are maintained. The substrate layout is effectively customized in this final post-manufacturing step by sending a large current through all other fuses, blowing them off.
[0017] This design achieves a new level of highly desirable functionality in substrate modularity, a feature absent in current substrates. The fuses required to achieve this functionality are constructed as part of the substrate layer, and therefore the fuses do not add any z-height to the substrate. These fuses are created during substrate construction using existing manufacturing steps, thus eliminating the need to purchase and assemble discrete components, which helps reduce BOM costs and substrate form factor. The required xy area for these fuses can be kept to a minimum (e.g., as shown in the appendix below). Figure 4 and 5 The figure shown is 0.01 mm per fuse. 2 (on the order of magnitude of), which helps to avoid significantly increasing the substrate's lateral xy dimensions. This design creates a packaged integrated fuse to achieve substrate modularity.
[0018] Figure 1 A microelectronic device with a modular substrate integrating a fuse and a substrate is illustrated according to one embodiment. The microelectronic device 100 includes an optional substrate 120 and a modular packaging substrate 150 having a fuse 182 (e.g., conductive elements, traces) with conductive ports 180 and 181 (e.g., pads 180 and traces 181). The packaging substrate 150 includes conductive layers (e.g., 101, 103), connections (e.g., 102), and a dielectric material 105 for the packaging layer (e.g., organic materials, low-temperature co-fired ceramic materials, liquid crystal polymers, etc.). The fuse 182 is formed within a cavity 185.
[0019] Components 122-125 of substrate 120 and IPDs (Integrated Passive Devices) 140 and 142 can be connected to components of substrate 150 via connectors 163-166 and solder balls 159-162. Figure 1 Other components not shown communicate with it. The IPD can include any type of passive component, including inductors, transformers, capacitors, and resistors. In one example, a capacitor on the IPD die can be used for power delivery. In another example, resistors on the same or different IPDs can be used for digital signal equalization. In yet another example, substrate 120 is a printed circuit board.
[0020] A fuse can be created as part of the building layer of substrate 150 during substrate fabrication. The fuse can also be coupled to die 190. In one example, fuse 182 is coupled to ports 180 and 181. Therefore, port 180 and any components coupled to port 180 are also coupled to die 190. In another example, a broken fuse 182 disconnects port 180 from die 190.
[0021] Figures 2A-2H Different configurations of a modular structure having a package port (e.g., a pad) and a fuse for achieving substrate modularity are shown according to one embodiment. Figure 2AA first configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 210-212 for connecting the packaging ports. Figures 2B-2H A configuration is shown in which at least one fuse is selectively broken by applying a high current through the fuse. Figure 2B A second configuration is shown with 3 packaging ports 202, 204, and 206 and broken fuses 220-222 for disconnecting the packaging ports from each other. In this example, all fuses 220-222 have been broken.
[0022] Figure 2C A third configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 223-225 for connecting or disconnecting the packaging ports from each other. In this example, fuses 224-225 have been broken.
[0023] Figure 2D A fourth configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 226-228 for connecting or disconnecting the packaging ports from each other. In this example, fuses 226-227 have been broken.
[0024] Figure 2E A fifth configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 230-232 for connecting or disconnecting the packaging ports from each other. In this example, fuses 230-232 have been broken.
[0025] Figure 2F A sixth configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 235-237 for connecting or disconnecting the packaging ports from each other. In this example, fuse 237 has been broken.
[0026] Figure 2G A seventh configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 240-242 for connecting or disconnecting the packaging ports from each other. In this example, fuse 241 has been broken.
[0027] Figure 2H An eighth configuration is shown with 3 packaging ports 202, 204, and 206 and fuses 245-247 for connecting or disconnecting the packaging ports from each other. In this example, fuse 245 has been broken.
[0028] This design effectively implements 2 N different configurations of packaging ports and fuses (e.g., as Figures 2A-2H shown 2 3= 8 different configurations). Typically, for a port (e.g., pad) connected with N fuses, the number of possible configurations achieved by breaking any combination of these fuses is 2N N This allows a large number of possible connections, and thus increases modularity, even with a relatively small number of fuses, as shown in Table 1.
[0029] Number of fuses Number of possible combinations allowed Increased substrate xy area 3 8 ~0.03mm 2 ]] 10 1024 ~0.1 mm 2 ]] 100 1.27 x 10 30 ]]> ~1 mm 2 ]]
[0030] Table 1 Number of combinations allowed by using different numbers of fuses, and additional substrate area needed
[0031] Figure 3A A top view of a microelectronic device 300 having package substrate integrated fuses is shown, according to one embodiment. The package substrate 350 includes conductive ports 304 and 305 (e.g., pads), cavities 320 formed in an organic dielectric material 302, and conductive fuses 310 (e.g., conductive members). The fuses can be embedded in the organic package substrate 350 and electrically routed with standard conductive layers (e.g., 330) and connections in the package substrate. Figure 3B A side view of a package substrate integrated fuse is shown, according to one embodiment.
[0032] According to one embodiment, the fuses are conductive members (e.g., traces) connected to pads on either side as shown in a package substrate with cavities in Figure 3A and 3B Those traces are released by removing the organic dielectric surrounding them. Many fuses are fabricated between different pads or ports to enable modular connections. After substrate fabrication, the undesired connections are removed by sending a high current through the fuses that form the undesired connections. The applied current causes Joule heating that raises the temperature of a given portion of the trace above a critical threshold (e.g., a melting point or temperature threshold at which the thermal mechanical stress from constrained expansion exceeds the trace strength), causing that portion of the trace to fail or break.
[0033] The conductive traces are not necessarily straight as shown. The conductive traces, including the conductive members, can be any shape (e.g., curved, meandering, etc.), and one or more fuses can be created in different substrate layers (e.g., internal middle layers, external surface layers, etc. of the package substrate).
[0034] Figure 4A temperature profile of a configuration of a modular structure 400 having a package port (e.g., a pad) and a fuse (e.g., a conductive straight member) and having removed dielectric material near the conductive member is shown according to one embodiment. The structure 400 includes a conductive member 410 having a length 411 (e.g., 50-150 microns), a width 412 (e.g., 5-15 microns), and a height 413 (e.g., 10-20 microns). The conductive member 410 is coupled to ports 420 and 421. When formed with copper, the conductive member 410 has a melting point of approximately 1083 degrees Celsius. In one example, a thermal simulation shows that an applied voltage of approximately 0.3 volts between the ports (e.g., pads) causes the conductive member to reach a maximum temperature of approximately 1087 degrees Celsius and thus melt. In contrast, when the organic dielectric surrounding the fuse is maintained, the highest temperature predicted by the thermal simulation is approximately 989 degrees Celsius, which is below the melting temperature of copper. Figure 4
[0035] A process for removing dielectric surrounding a conductive trace having a conductive member includes masking the fuse layer to expose only the fuse itself and the surrounding dielectric to be removed. The process continues by applying an ablation process, such as a reactive ion etch, to remove the dielectric.
[0036] Since the thermal conductivity of air is 1-2 orders of magnitude less than that of dielectric, removing the dielectric surrounding the trace allows more heat from the Joule heating to remain in the trace. When the dielectric is removed, the primary source of heat loss from the trace is becoming radiated, which is much less than the heat loss through conduction through the dielectric if the dielectric is maintained. This results in a significant temperature increase for the case where the dielectric is removed, even when the same current is applied.
[0037] Removing the dielectric surrounding the trace localizes the temperature increase to the fuse itself without damaging the surrounding area. For example, most organic dielectrics begin to thermally decompose above approximately 260 degrees Celsius. If the dielectric surrounding the fuse is not removed, its temperature can rise well above this limit, resulting in outgassing, delamination, etc.
[0038] The temperature increase (above ambient) in the released conductive member to a first order is proportional to I 2 L 2 A 2 where L and A are the length and cross-sectional area of the conductive member, and I is the applied current. Thus, the current required to break the fuse can be reduced by increasing the effective length or reducing the cross-sectional area of the trace. The length can be increased by using a meandering structure as shown in Figure 5
[0039] Figure 5 A temperature profile of a configuration of a modular structure 500 having a package port (e.g., pad) and a fuse (e.g., conductive meander member) and with dielectric material removed near the conductive meander member is shown according to one embodiment. The conductive member 510 has a length 511 (e.g., 100-450 microns), a width 512 (e.g., 5-15 microns), and a height 513 (e.g., 10-20 microns). The conductive member 510 is coupled to ports 520 and 521. When formed with copper, the conductive member 510 has a melting point of approximately 1083 degrees Celsius. In one example, thermal simulation shows that the current used in the straight member in Figure 4 is sufficient to cause the meander member to melt as shown in Figure 5 .
[0040] Note that this meander member 510 (e.g., meander structure) fits in the same xy area as Figure 4 . However, the meander member 510 has an effective length that is approximately 2.5 times the effective length of the straight member 410 in Figure 4 . This allows the current to be reduced by approximately 2.5 times, from approximately 13 amps in Figure 4 to approximately 5 amps in Figure 5 to cause the same temperature rise in the member. Further reductions in current size (e.g., approximately 1 amp or less) can be achieved by allocating more xy area to the fuses to increase the overall member length, and / or using thinner members (e.g., by next generation process tools), and / or by plating the fuse layer to a smaller thickness (e.g., 5-10 microns instead of 15-20 microns). This can help reduce the number of solder balls that must be utilized simultaneously to send the required current through the package substrate.
[0041] Even though the embodiments shown in Figure 4 and 5 show a single trace (e.g., member) connected between two pads, the design can be extended to configurations with more than a single connection. For example, Figure 6 and 7 show two examples of bundled straight and meander traces (e.g., members) connecting a central pad to 4 surrounding pads.
[0042] Figure 6A configuration of a modular structure 600 having package ports (e.g., pads) and fuses (e.g., conductive straight members) and having dielectric material removed near the conductive members is shown, according to one embodiment. Package ports 620-623 are coupled to central package port 624 with members 610-613, respectively. In this example, members 610-613 are straight and provide fuses that can connect or disconnect the package ports from the central package port.
[0043] Figure 7 A configuration of a modular structure 700 having package ports (e.g., pads) and fuses (e.g., conductive meandering members) and having dielectric material removed near the conductive members is shown, according to one embodiment. Package ports 720-723 are coupled to central package port 724 with members 710-713, respectively. In this example, members 710-713 are meandering and provide fuses that can connect or disconnect the package ports from the central package port.
[0044] Other configurations having different connection layouts, different numbers of connections / pads, and / or combining different trace shapes (straight, meandering, curved, etc.) in the same bundle can also be contemplated.
[0045] It should be appreciated that in embodiments of a system-on-a-chip, a die can include a processor, a memory, a communication circuit, etc. Although a single die is shown, there can be none, one, or several dies in the same area of a microelectronic device.
[0046] In one embodiment, a microelectronic device can be a substrate of dielectric material (e.g., organic material, low temperature co-fired ceramic material, liquid crystal polymer, etc.) that includes conductive layers, connections, and a dielectric material (e.g., organic material, low temperature co-fired ceramic material, liquid crystal polymer, etc.) of a package layer. Although several examples of materials that can form the substrate are introduced herein, any material that can be used as a foundation upon which to build a semiconductor device falls within the scope of the present invention.
[0047] One or more contacts can be formed on a surface of the microelectronic device. The contacts can include one or more conductive layers. As an example, the contacts can include a barrier layer, an organic surface protection (OSP) layer, or any combination thereof. The contacts can provide electrical connections to active device circuitry (not shown) within the die. Embodiments of the present invention include one or more solder bumps or pads that are each electrically coupled to a contact. The solder bumps or pads can be electrically coupled to the contacts through one or more redistribution layers and conductive vias.
[0048] Figure 8A computing device 1000 according to one embodiment is shown. The computing device 1000 houses a board 1002. The board (e.g., motherboard, printed circuit board, etc.) can include a number of components, including but not limited to: at least one processor 1004 and at least one communication chip 1006. The at least one processor 1004 is physically and electrically coupled to the board 1002. In some embodiments, the at least one communication chip 1006 is also physically and electrically coupled to the board 1002. In other embodiments, the communication chip 1006 (e.g., a die, a die with a modular structure, etc.) is part of the processor 1004.
[0049] Depending on its applications, the computing device 1000 can include other components that can or can not be physically and electrically coupled to the board 1002. These other components include, but are not limited to: volatile memory (e.g., DRAM 1010, 1011), non-volatile memory (e.g., ROM 1012), flash memory, a graphics processor 1016, a digital signal processor, a crypto processor, a chipset 1014, an antenna, 1020, a display, a touchscreen display 1030, a touchscreen controller 1022, a battery 1032, an audio codec, a video codec, a power amplifier 1015, a global positioning system (GPS) device 1026, a compass 1024, a gyroscope, a speaker, a camera 1050, and a mass storage device (such as diskette, CD, DVD, flash memory, etc.).
[0050] The communication chip 1006 enables wireless communications for the transfer of data to and from the computing device 1000. The term "wireless" and its derivatives can be used to describe circuits, devices, systems, methods, techniques, communications channels, etc., that can communicate data through the use of modulated electromagnetic radiation through a non-solid medium. Despite the use of time or frequency division techniques, a modulation technique, or other techniques, the techniques described herein are therefore intended to be encompassed by the term wireless. The term does not preclude the use of a wire or other form of permanent physical connection in some embodiments. The communication chip 1006 can implement any of a number of wireless standards or protocols, including but not limited to Wi-Fi (IEEE 802.11 family), WiMAX (IEEE 802.16 family), WiGig, IEEE 802.20, long term evolution (LTE), Ev-DO, HSPA+,
[0051] The at least one processor 1004 of the computing device 1000 includes an integrated circuit die packaged within the at least one processor 1004. In some embodiments of the present application, the processor package includes one or more devices, such as a microelectronic device having a modular architecture (e.g., microelectronic devices 100, 300, etc.) whose substrate includes an integrated fuse in accordance with an implementation of an embodiment of the present application. The term "processor" can refer to any device or portion of a device that processes electronic data from registers and / or memory to transform that electronic data into other electronic data that can be stored in registers and / or memory.
[0052] The communication chip 1006 also includes an integrated circuit die packaged within the communication chip 1006. In accordance with another implementation of an embodiment of the present application, the communication chip package includes one or more microelectronic devices having a modular architecture (e.g., microelectronic devices 100, 300, etc.) whose substrate includes an integrated fuse.
[0053] The following examples pertain to further embodiments. Example 1 is a microelectronic device including a plurality of organic dielectric layers, a cavity formed in at least one of the plurality of organic dielectric layers, and a modular structure having first and second ports and a first conductive member formed within the cavity. The first conductive member provides modularity by being able to connect the first and second ports and also being able to disconnect the first and second ports.
[0054] In Example 2, the subject matter of Example 1 can optionally include the cavity formed by removing at least one of the organic dielectric layers in the vicinity of the first conductive member to release the first conductive member.
[0055] In Example 3, the subject matter of any one of Examples 1-2 can optionally include the first conductive member to disconnect the first and second ports when a threshold voltage is applied between the first and second ports to cause the first conductive member to heat to a melting point of the first conductive member.
[0056] In Example 4, the subject matter of any one of Examples 1-3 can optionally include the modular structure further including a third port, a second conductive member, and a third conductive member, the second conductive member coupled to the second and third ports when the third conductive member is coupled to the first and third ports.
[0057] In Example 5, the subject matter of any one of Examples 1-4 can optionally include the second conductive member to provide modularity by being able to connect the second and third ports and also being able to disconnect the second and third ports.
[0058] In Example 6, the subject matter of any one of Examples 1-5 can optionally include the first, second, and third conductive members each including a fuse integrated with the plurality of organic dielectric layers of the package substrate without increasing a height of the package substrate.
[0059] In Example 7, the subject matter of any one of Examples 1-6 can optionally include the second and third conductive members formed within the cavity or one or more additional cavities of the plurality of organic dielectric layers of the package substrate.
[0060] In Example 8, the subject matter of any one of Examples 1-7 can optionally include the first, second, and third conductive members each including a straight member.
[0061] In Example 9, the subject matter of any one of Examples 1-7 can optionally include the first, second, and third conductive members each including a meandering member to increase a length of the member relative to a straight member.
[0062] In Example 10, the subject matter of any one of Examples 1-9 can optionally include the first, second, and third conductive members providing eight different modular configurations for the microelectronic device.
[0063] Example 11 is a modular structure including first and second ports of a package substrate having a plurality of organic dielectric layers and a first conductive member formed within a cavity of the package substrate. The first conductive member provides modularity by being able to connect the first and second ports and also being able to disconnect the first and second ports.
[0064] In Example 12, the subject matter of Example 11 can optionally include the cavity being formed by removing at least one of the organic dielectric layers proximate to the first conductive member to release the first conductive member.
[0065] In Example 13, the subject matter of any one of Examples 11-12 can optionally include the first conductive member to disconnect the first and second ports when a threshold voltage is applied between the first and second ports to cause the first conductive member to heat to a melting point of the first conductive member.
[0066] In Example 14, the subject matter of any one of Examples 11-13 can optionally include the modular structure further including a third port, a second conductive member, and a third conductive member, the second conductive member being coupled to the second and third ports when the third conductive member is coupled to the first and third ports.
[0067] In Example 15, the subject matter of any one of Examples 11-14 can optionally include the second conductive member to provide modularity by being able to connect the second and third ports and also being able to disconnect the second and third ports.
[0068] In Example 16, the subject matter of any one of Examples 11-15 can optionally include the first, second, and third conductive members each including a fuse integrated with the plurality of organic dielectric layers of the package substrate without increasing a height of the package substrate.
[0069] In Example 17, the subject matter of any one of Examples 11-16 can optionally include the second and third conductive members being formed within the cavity or one or more additional cavities of the plurality of organic dielectric layers of the package substrate.
[0070] In Example 18, the subject matter of any one of Examples 11-17 can optionally include the first, second, and third conductive members each including a straight member.
[0071] In Example 19, the subject matter of any one of Examples 11-17 can optionally include the first, second, and third electrically conductive members each including a meandering member to increase a length of the member relative to a straight member.
[0072] In Example 20, the subject matter of any one of Examples 11-19 can optionally include the first, second, and third electrically conductive members to provide eight different modular configurations for the modular structure.
[0073] Example 21 is a computing device including at least one processor for processing data and a communication module or chip coupled to the at least one processor. The communication module or chip includes a substrate having a plurality of organic dielectric layers, a cavity formed in at least one of the plurality of organic dielectric layers, and a modular structure having first and second ports and an electrically conductive member formed within the cavity. The electrically conductive member provides modularity by being able to connect the first and second ports and also being able to disconnect the first and second ports.
[0074] In Example 22, the subject matter of Example 21 can optionally include the cavity being formed by removing at least one of the organic dielectric layers in the vicinity of the electrically conductive member to free the electrically conductive member.
[0075] In Example 23, the subject matter of any one of Examples 21-22 can optionally include the electrically conductive member to disconnect the first and second ports when a threshold voltage is applied between the first and second ports to cause the electrically conductive member to heat to a melting point of the electrically conductive member.
Claims
1. A microelectronic device, comprising: Multiple organic dielectric layers; A cavity is formed in at least one organic dielectric layer of the plurality of organic dielectric layers; as well as A modular structure having a first port and a second port and a first conductive member formed within the cavity, the first conductive member providing modularity by being able to connect the first port and the second port and also being able to disconnect the first port and the second port, wherein an organic dielectric near the first conductive member within the cavity is removed such that the first conductive member within the cavity does not come into contact with the organic dielectric.
2. The microelectronic device of claim 1, wherein the cavity is formed by removing the at least one organic dielectric near the first conductive member to release the first conductive member.
3. The microelectronic device of claim 1, wherein the first conductive member disconnects the first port and the second port when a threshold voltage is applied between the first port and the second port to heat the first conductive member to its melting point.
4. The microelectronic device according to claim 1, wherein the modular structure further includes a third port, a second conductive member, and a third conductive member, wherein the second conductive member is coupled to the second port and the third port when the third conductive member is coupled to the first port and the third port.
5. The microelectronic device of claim 4, wherein the second conductive member provides modularity by being able to connect the second port and the third port and also being able to disconnect the second port and the third port.
6. The microelectronic device of claim 5, wherein the first, second and third conductive members each include a fuse integrated with a plurality of organic dielectric layers of the packaging substrate without increasing the height of the packaging substrate.
7. The microelectronic device of claim 6, wherein the second and third conductive members are formed within the cavity or within one or more additional cavities of the plurality of organic dielectric layers of the packaging substrate.
8. The microelectronic device of claim 6, wherein the first, second and third conductive members each comprise a straight member.
9. The microelectronic device of claim 6, wherein the first, second and third conductive members each include a zigzag member to increase the length of the member relative to a straight member.
10. The microelectronic device of claim 6, wherein the first, second, and third conductive members provide eight different modular configurations for the microelectronic device.
11. A modular structure, comprising: The first and second ports of the packaging substrate, the packaging substrate having multiple organic dielectric layers; as well as A first conductive member is formed within a cavity of the encapsulation substrate. This first conductive member provides modularity by being able to connect the first port and the second port and also to disconnect the first port and the second port. The organic dielectric near the first conductive member within the cavity is removed, such that the first conductive member within the cavity does not come into contact with the organic dielectric.
12. The modular structure of claim 11, wherein the cavity is formed by removing at least one organic dielectric near the first conductive member to release the first conductive member.
13. The modular structure of claim 11, wherein when a threshold voltage is applied between the first port and the second port to heat the first conductive member to its melting point, the first conductive member disconnects the first port and the second port.
14. The modular structure of claim 11, wherein the modular structure further includes a third port, a second conductive member, and a third conductive member, wherein the second conductive member is coupled to the second port and the third port when the third conductive member is coupled to the first port and the third port.
15. The modular structure of claim 14, wherein the second conductive member provides modularity by being able to connect the second port and the third port and also to disconnect the second port and the third port.
16. The modular structure of claim 14, wherein the first, second and third conductive members each include a fuse integrated with a plurality of organic dielectric layers of the encapsulation substrate without increasing the height of the encapsulation substrate.
17. The modular structure of claim 16, wherein the second and third conductive members are formed within the cavity or within one or more additional cavities of the plurality of organic dielectric layers of the encapsulation substrate.
18. The modular structure according to claim 16, wherein the first, second and third conductive members each comprise a straight member.
19. The modular structure of claim 16, wherein each of the first, second and third conductive members includes a zigzag member to increase the length of the member relative to a straight member.
20. The modular structure of claim 16, wherein the first, second, and third conductive members provide eight different modular configurations for the modular structure.
21. A computing device, comprising: At least one processor for processing data; as well as A communication module or chip coupled to the at least one processor, the communication module or chip comprising: The substrate has multiple organic dielectric layers. A cavity formed in at least one organic dielectric layer of the plurality of organic dielectric layers, and A modular structure having a first port and a second port and a conductive member formed within the cavity, the conductive member providing modularity by being able to connect the first port and the second port and also being able to disconnect the first port and the second port, wherein an organic dielectric near the conductive member within the cavity is removed such that the conductive member within the cavity does not come into contact with the organic dielectric.
22. The computing device of claim 21, wherein the cavity is formed by removing at least one organic dielectric near the conductive member to release the conductive member.
23. The computing device of claim 21, wherein the conductive member disconnects the first port and the second port when a threshold voltage is applied between the first port and the second port to heat the conductive member to its melting point.
Citation Information
Patent Citations
Semiconductor device and programming method thereof
US20130037859A1