Micro-enricher chip based on silicon nanowire array and preparation method

Abstract

The present invention provides a micro-enricher chip based on a silicon nanowire array and a preparation method, the preparation comprising: providing a substrate, preparing a groove structure; preparing a plurality of micro-column structures, wherein adjacent micro-column structures are nested based on the opening; preparing a microfluidic port, which is connected to the groove structure; and providing a cover plate, and preparing the cover plate on the side of the substrate where the groove structure is formed, and the cover plate at least covers the groove structure. The present invention can obtain a large surface area by designing a micro-column structure array nested in the cavity formed by the groove structure, and make the flow field uniformly distributed, and extend the gas flow path, thereby improving the uniformity of the adsorbed material and the enrichment rate of the adsorbed gas. In addition, by constructing a layer of high specific area silicon nanowire array on the inner surface of the cavity, the inner surface area in the cavity can be greatly increased, the carrying capacity of the adsorbed material can be increased, and the enrichment rate of the micro-enricher chip based on the silicon nanowire array can be improved.

Description

Technical Field

[0001] The invention belongs to the field of micro-electromechanical systems, and in particular relates to a micro-enricher chip based on a silicon nanowire array and a preparation method thereof. Background Art

[0002] Enrichment is an important analytical technique. The enricher is an important component in gas analysis instruments (such as gas chromatographs, ion mobility spectrometers, and mass spectrometers). It is often installed at the front end of the instrument. Its main function is to adsorb a large amount of the target gas components to be detected, that is, to enrich them, and then desorb the target gas components in a very short time. At this time, the concentration of the target gas components is instantly amplified and sent to the analytical instrument for detection. Generally speaking, the enricher can increase the detection capability of the analytical instrument by 1-3 orders of magnitude. When the concentration of the target gas is relatively low, especially below the detection threshold of the analytical instrument, the enricher is particularly important.

[0003] The traditional enricher is a tubular structure, usually a metal tube or a glass tube, filled with adsorbent material and a heating wire wound outside the tube. The advantage of the traditional enricher is the high enrichment rate, but its dead volume is large, the heat capacity is large, the heating rate is slow, and the power consumption is also large. The silicon-based micro-enricher based on MEMS (Micro-electro-mechanical systems) technology has attracted much attention from researchers due to its small dead volume, small heat capacity, rapid heating, low power consumption, and easy integration. The structure of the silicon-based micro-enricher can be divided into single-channel type and cavity type. The single-channel silicon-based micro-enricher has a simple structure, but due to the long channel length, the pressure difference between the inlet and outlet is large. Since there is no microstructure designed and manufactured in the channel, its surface area is also small, and the existing cavity structure will bring different gas flow field distributions. The uneven gas flow field distribution will limit the further improvement of the enrichment rate.

[0004] Therefore, it is necessary to provide a micro-enricher chip based on silicon nanowire array and a preparation method to solve the above problems in the prior art. Summary of the invention

[0005] In view of the above-mentioned shortcomings of the prior art, the object of the present invention is to provide a micro-enricher chip based on silicon nanowire array and a preparation method thereof, so as to solve the problems of uneven gas flow field distribution and limited enrichment rate in the prior art.

[0006] To achieve the above objectives and other related objectives, the present invention provides a method for preparing a micro-enricher chip based on a silicon nanowire array, the preparation method comprising the following steps:

[0007] Providing a substrate, and preparing a groove structure in the substrate;

[0008] A plurality of micro-column structures are prepared in the substrate, wherein the micro-column structures are located in the groove structure, and the micro-column structures include a first extension portion, a connection portion, and a second extension portion connected in sequence, wherein the first extension portion, the connection portion, and the second extension portion enclose a space region having an opening, and adjacent micro-column structures are nested based on the opening;

[0009] preparing at least two microfluidic ports in the substrate, wherein the microfluidic ports are connected to the groove structure; and

[0010] A cover plate is provided and prepared on a side of the substrate where the groove structure is formed, and the cover plate at least covers the groove structure.

[0011] As an optional solution of the present invention, after preparing the cover plate, the method further includes preparing a heating resistor and a temperature measuring resistor on at least one of a side of the cover plate away from the substrate and a side of the substrate away from the cover plate.

[0012] As an optional scheme of the present invention, the steps of preparing the heating resistor and the temperature measuring resistor include: depositing a metal material layer on the surface of the structure where the heating resistor and the temperature measuring resistor need to be formed, forming a patterned mask layer on the metal material layer, and etching the metal material layer based on the patterned mask layer to form the heating resistor and the temperature measuring resistor.

[0013] As an optional solution of the present invention, the method of preparing the cover plate on the substrate includes anodic bonding, wherein the cover plate includes a glass cover plate, the bonding temperature of the anodic bonding is between 200°C and 450°C, and the bonding voltage is between 600V and 1400V.

[0014] As an optional solution of the present invention, the shape of the groove structure includes any one of an elliptical shape and a structure with a square in the middle and arcs at both ends; the shape of the microcolumn structure includes any one of a U-shape, a V-shape and an irregular shape.

[0015] As an optional solution of the present invention, the shape of the microcolumn structure includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures are arranged relatively to each other, and the nested arrangement of the microcolumn structure is achieved by the interlaced arrangement of the first extension part and the second extension part of adjacent microcolumn structures.

[0016] As an optional solution of the present invention, the preparation method further comprises the step of: preparing a silicon nanowire array at least on the surface of the micro-column structure.

[0017] As an optional solution of the present invention, the silicon nanowire array is prepared after the groove structure, the microcolumn structure and the microfluidic port are prepared, and the silicon nanowire array is formed on the inner surface of the groove structure and the surface of the microcolumn structure.

[0018] As an optional solution of the present invention, the steps of preparing the silicon nanowire array include:

[0019] 1) providing a containing device, adding a hydrofluoric acid solution with a concentration of 39-41% into the containing device, soaking the silicon substrate in the hydrofluoric acid solution for 8-12 minutes and then taking it out;

[0020] 2) providing a containing device, adding 39-41% hydrofluoric acid solution and 0.01-0.03 mol / L silver nitrate solution into the containing device, placing the silicon substrate therein and keeping it for 4-6 minutes before taking it out;

[0021] 3) providing a containing device, adding 39-41% hydrofluoric acid and hydrogen peroxide into the containing device, placing the silicon substrate in the containing device and keeping it for 2-3 minutes before taking it out;

[0022] 4) providing a containing device, adding 65-70% nitric acid solution into the containing device, placing the silicon substrate in the containing device and soaking it for 8-12 minutes, and then taking it out;

[0023] 5) Spin-drying the silicon wafer to obtain a silicon nanowire array on the surface of the silicon substrate.

[0024] As an optional solution of the present invention, the groove structure and the micro-column structure are prepared based on a patterned mask layer formed on the substrate.

[0025] As an optional solution of the present invention, after preparing the silicon nanowire array, the method further includes: preparing an adsorption material layer at least on the surface of the silicon nanowire array.

[0026] As an optional solution of the present invention, the adsorption material layer is prepared after preparing the cover plate, wherein the method of preparing the adsorption material layer includes: installing a capillary at the microfluidic port, and forming the adsorption material layer based on the capillary at least on the surface of the silicon nanowire array.

[0027] As an optional solution of the present invention, the adsorption material layer is prepared before preparing the cover plate, wherein the method of preparing the adsorption material layer includes at least one of evaporation, sputtering, atomic layer deposition and molecular vapor deposition.

[0028] The present invention also provides a micro-enricher chip based on a silicon nanowire array, wherein the micro-enricher chip based on a silicon nanowire array comprises:

[0029] A substrate having a groove structure formed therein;

[0030] A plurality of micro-column structures are formed on the substrate and located in the groove structure, wherein the micro-column structure comprises a first extension portion, a connection portion and a second extension portion which are connected in sequence, wherein the first extension portion, the connection portion and the second extension portion enclose a space region having an opening, and adjacent micro-column structures are nested based on the opening;

[0031] at least two microfluidic ports formed in the substrate and communicating with the groove structure; and

[0032] The cover plate is formed on a side of the substrate where the groove structure is formed, and at least covers the groove structure.

[0033] As an optional solution of the present invention, the micro-enricher chip based on silicon nanowire array also includes a heating resistor and a temperature measuring resistor, wherein the heating resistor and the temperature measuring resistor are located on at least one of a side of the cover plate away from the substrate and a side of the substrate away from the cover plate.

[0034] As an optional solution of the present invention, the shape of the groove structure includes any one of an elliptical shape and a structure with a square in the middle and arcs at both ends; the shape of the microcolumn structure includes any one of a U-shape, a V-shape and an irregular shape.

[0035] As an optional solution of the present invention, the shape of the microcolumn structure includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures are arranged relatively to each other, and the nested arrangement of the microcolumn structure is achieved by the interlaced arrangement of the first extension part and the second extension part of adjacent microcolumn structures.

[0036] As an optional scheme of the present invention, the first extension portion and the second extension portion constitute two side portions of the U-shaped microcolumn structure, and the connecting portion constitutes the bottom of the U-shaped microcolumn structure, wherein the shape of the side portion includes a rectangle, and the shape of the bottom includes a semicircular arc, wherein the outer diameter of the semicircular arc is between 35μm-560μm, and the inner diameter of the semicircular arc is between 25μm-400μm; the width of the rectangle is between 5μm-80μm, and the length of the rectangle is between 80μm-480μm; the spacing between adjacent microcolumn structures is between 5μm-80μm.

[0037] As an optional solution of the present invention, the micro-enricher chip based on silicon nanowire array further comprises a silicon nanowire array, and the silicon nanowire array is at least located on the surface of the micro-column structure.

[0038] As described above, the micro-enricher chip based on silicon nanowire array and the preparation method of the present invention can obtain a large surface area, make the flow field evenly distributed, and extend the gas flow path, thereby improving the uniformity of the adsorption material and the enrichment rate of the adsorbed gas. In addition, by constructing a layer of high specific area silicon nanowire array on the inner surface of the cavity, the inner surface area of ​​the cavity can be greatly increased, thereby further increasing the carrying capacity of the adsorption material and improving the enrichment rate of the micro-enricher chip based on the silicon nanowire array. BRIEF DESCRIPTION OF THE DRAWINGS

[0039] Figure 1 Shown are (a) a schematic diagram of the structure of a silicon-based micro-enricher chip based on silicon nanowire arrays of the present invention; (b) a schematic diagram of the structure of a nested U-shaped micro-column array distributed in the cavity; (c) structural parameters of the nested U-shaped micro-column unit; (d) a schematic diagram of the gas flow distribution.

[0040] Figure 2 – Figure 8 Schematic diagram of the main steps of preparing a silicon-based micro-enricher chip based on a silicon nanowire array in Example 1.

[0041] in, Figure 2 A schematic diagram showing the formation of a patterned mask layer is shown.

[0042] Figure 3 Shown is a schematic diagram of forming a groove structure and a micro-pillar structure.

[0043] Figure 4 Shown is a schematic diagram of forming a silicon nanowire array.

[0044] Figure 5 Shown is a schematic diagram of forming a cover plate.

[0045] Figure 6 Shown is a schematic structural diagram of forming a metal material layer and a patterned mask layer.

[0046] Figure 7 Shown is a schematic diagram of the structure that forms a heating resistor and a temperature measuring resistor.

[0047] Figure 8 It is a top view schematic diagram of the shapes of the heating resistor and the temperature measuring resistor.

[0048] Fig. 9 (a) Scanning electron microscope photograph of a silicon-based micro-enricher chip based on silicon nanowire arrays; (b) Scanning electron microscope photograph of the silicon nanowire array on the inner surface of the silicon-based micro-enricher cavity.

[0049] Figure 10-11Schematic diagram of the main steps of preparing a silicon-based micro-enricher chip based on silicon nanowire arrays according to Example 2,

[0050] in, Fig.10 Shown is a schematic diagram of forming an adsorption material layer.

[0051] Fig.11 Shown is a schematic diagram of forming a cover plate.

[0052] Component number description

[0053] 100 Substrate

[0054] 101 Groove Structure

[0055] 102 Microcolumn structure

[0056] 102a First extension portion

[0057] 102b Connection

[0058] 102c Second extension

[0059] 103 Microfluidic Ports

[0060] 104 Patterned mask layer

[0061] 105 Silicon nanowire array layer

[0062] 106 Cover

[0063] 107 Metal material layer

[0064] 108 Patterned mask layer

[0065] 109 Heating resistor

[0066] 110 Temperature measuring resistor

[0067] 111 Adsorption material layer DETAILED DESCRIPTION

[0068] The following describes the embodiments of the present invention through specific examples, and those skilled in the art can easily understand other advantages and effects of the present invention from the contents disclosed in this specification. The present invention can also be implemented or applied through other different specific embodiments, and the details in this specification can also be modified or changed in various ways based on different viewpoints and applications without departing from the spirit of the present invention.

[0069] See also Figures 1 to 11It should be noted that the illustrations provided in this embodiment are only used to illustrate the basic concept of the present invention in a schematic manner, and the illustrations only show components related to the present invention rather than being drawn according to the number, shape and size of components in actual implementation. In actual implementation, the form, quantity and proportion of each component may be changed arbitrarily, and the component layout may also be more complicated.

[0070] Embodiment 1:

[0071] like Figure 1-8 As shown, the present invention provides a method for preparing a micro-enricher chip based on a silicon nanowire array, the preparation method comprising the following steps:

[0072] A substrate 100 is provided, and a groove structure 101 is prepared in the substrate 100;

[0073] A plurality of micro-column structures 102 are prepared in the substrate 100. The micro-column structures 102 are located in the groove structure 101. The micro-column structures 102 include a first extension portion 102a, a connection portion 102b, and a second extension portion 102c that are sequentially connected. The first extension portion 102a, the connection portion 102b, and the second extension portion 102c form a space region with an opening. Adjacent micro-column structures 102 are nested based on the opening.

[0074] At least two microfluidic ports 103 are prepared in the substrate 100 , and the microfluidic ports 103 are connected to the groove structure 101 ; and

[0075] A cover plate 106 is provided and prepared on a side of the substrate 100 where the groove structure 101 is formed, and the cover plate 106 at least covers the groove structure 101 .

[0076] The preparation of the micro-enricher chip based on silicon nanowire array of the present invention will be described in detail below with reference to the accompanying drawings, wherein the various steps and sequences in the above preparation method can be combined or interchanged according to the actual process.

[0077] First, in an example, a substrate 100 is provided, wherein the substrate 100 is used to form a subsequent chip structure based thereon, and may be a silicon substrate 100 or the like. In this example, the silicon substrate 100 is selected, but the invention is not limited thereto.

[0078] Next, the groove structure 101, the micro-column structure 102 and the microfluidic port 103 are prepared on the substrate 100, wherein the three structures can be formed by etching / corrosion based on the same mask layer in the same process, or can be formed by etching separately or in pairs. In one example, the three structures are selected to be etched simultaneously.

[0079] As an example, the etching process includes: forming a patterned mask layer 104 on the substrate 100, the patterned mask layer can be photoresist, silicon oxide, silicon nitride, etc. (silicon nitride is preferred), a required pattern is formed thereon, and the groove structure 101, the micro-column structure 102 and the microfluidic port 103 are formed based on the patterned mask layer 104. Among them, the number of the microfluidic ports 103 can be selected according to actual needs. In one example, two are selected, which are respectively arranged at opposite ends of the groove structure 101, and the capillary column can be sealed to provide a gas passage with the outside.

[0080] Specifically, the microcolumn structure 102 includes a first extension portion 102a, a connection portion 102b and a second extension portion 102c which are connected in sequence. The first extension portion 102a, the connection portion 102b and the second extension portion 102c enclose a space region with an opening. Adjacent microcolumn structures 102 are nested based on the opening. The nested setting means that adjacent microcolumn structures 102 are nested with each other, and can be interspersed in an interpolation manner. For example, taking a certain reference microcolumn structure 102 as an example, the second extension portion 102c of the microcolumn structure 102 on its left side can be inserted from the opening of the reference microcolumn structure 102 into the space region of the reference microcolumn structure 102, and the first extension portion 102a of the microcolumn structure 102 on its right side can be inserted from the opening of the reference microcolumn structure 102 into the space region of the reference microcolumn structure 102, so as to achieve a nested setting.

[0081] As an example, the shape of the groove structure 101 includes any one of an elliptical shape and a structure with a square in the middle and arcs at both ends;

[0082] As an example, the shape of the micro-column structure 102 includes any one of a U-shape, a V-shape and an irregular shape.

[0083] Specifically, the groove structure 101 and the cover plate 106 covering it form a cavity, which constitutes the cavity of the silicon-based micro-enricher, wherein, in one example, from a top view, the middle of the cavity is a rectangle, and the two ends are two arcs, preferably two semicircles. In addition, the cavity can also be designed as an ellipse as needed. This circular or elliptical structure ensures that the cavity structure is streamlined, which is conducive to the uniform distribution of the flow field. In addition, the shape of the micro-column structure 102 from a top view angle includes any one of a U-shape, a V-shape and an irregular shape. For example, a U-shaped cavity constitutes the space region. Of course, the first extension portion 102a, the connecting portion 102b and the second extension portion 102c may all be irregular structures, thereby forming the space region with the opening.

[0084] As an example, the shape of the microcolumn structure 102 includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures 102 are relatively arranged, and the nested arrangement of the microcolumn structure 102 is achieved by the interlaced arrangement of the first extension portion 102a and the second extension portion 102c of adjacent microcolumn structures 102.

[0085] As an example, the first extension portion 102a and the second extension portion 102c constitute two sides of the U-shaped microcolumn structure 102, and the connecting portion 102b constitutes the bottom of the U-shaped microcolumn structure 102, wherein the shape of the side portion includes a rectangle, and the shape of the bottom includes a semicircular arc, wherein the outer diameter of the semicircular arc is between 35μm-560μm, and the inner diameter of the semicircular arc is between 25μm-400μm; the width of the rectangle is between 5μm-80μm, and the length of the rectangle is between 80μm-480μm; the spacing between adjacent microcolumn structures 102 is between 5μm-80μm. The spacing between adjacent microcolumn structures 102 refers to the distance between opposite sides of two interlaced microcolumn structures 102, such as the distance between the first extension portion 102a of a microcolumn structure 102 and the opposite surfaces of the second extension portion 102c of the adjacent microcolumn structure 102.

[0086] Specifically, in one example, the micro-column structure 102 is arranged in a U-shape, and the cross section (top view) of the U-shaped micro-column structure is as follows: Figure 1 (c) It is composed of a semicircle and two connected rectangles. The outer diameter of the semicircle is 280 μm, the inner diameter is 200 μm, and the rectangle is 40 μm wide and 280 μm long. The U-shaped micropillars are nested with each other ( Figure 1 (b)-(c)) are arranged in a regular array, with the distance between adjacent U-shaped micropillars being 40 microns; the above structural dimensions can be scaled up or down as needed. On the one hand, this nested U-shaped micropillar array allows the gas to flow evenly in the gaps between the U-shaped micropillars because the micropillars are evenly distributed (gas flow path such as Figure 1 (d)) increases the length of the gas flow path, thereby increasing the probability of contact between the gas and the enriched material on the surface of the microcolumn. The above factors will further improve the enrichment rate of the chip.

[0087] As an example, the method of preparing the cover plate 106 on the substrate 100 includes anodic bonding, wherein the cover plate 106 includes a glass cover plate 106, the bonding temperature of the anodic bonding is between 200° C. and 450° C., and the bonding voltage is between 600V and 1400V.

[0088] Specifically, the cover plate 106 is also formed in the preparation of the micro-enricher chip based on the silicon nanowire array of the present invention. The cover plate 106 includes a glass cover plate 106. In one example, a double-polished glass sheet is selected. Further, the cover plate 106 is prepared on the substrate 100 by bonding or other methods well known in the art. In one example, an anodic bonding method is selected, and the bonding temperature of the anodic bonding is selected to be 300°C, and the bonding voltage is selected to be 1000V. In addition, the cover plate 106 at least covers the groove structure 101 to form the cavity of the enricher. In one example, the cover plate 106 also covers the microfluidic port 103, and can further cover the entire substrate 100.

[0089] As an example, after preparing the cover plate 106 , the method further includes preparing a heating resistor 109 and a temperature measuring resistor 110 on at least one of a side of the cover plate 106 away from the substrate 100 and a side of the substrate 100 away from the cover plate 106 .

[0090] As an example, the steps of preparing the heating resistor 109 and the temperature measuring resistor 110 include: depositing a metal material layer 107 on the surface of the structure where the heating resistor 109 and the temperature measuring resistor 110 need to be formed, and forming a patterned mask layer 108 on the metal material layer 107, and etching the metal material layer 107 based on the patterned mask layer 108 to form the heating resistor 109 and the temperature measuring resistor 110.

[0091] Specifically, in the enricher structure of the present invention, it can be heated by an externally provided heating device, so that the enriched gas can be released. In one example, the above-mentioned heating can be performed by providing the heating resistor 109. In a further optional example, a temperature measuring resistor 110 can be provided while providing the heating resistor 109 to effectively release the gas. The temperature measuring resistor 110 is preferably provided on the same side of the heating resistor 109. In one example, the heating resistor 109 is provided on the periphery of the temperature measuring resistor 110, that is, the heating resistor 109 is provided around the temperature measuring resistor 110.

[0092] In one example, the heating resistor 109 and the temperature measuring resistor 110 are arranged on the side of the cover plate 106 away from the substrate 100, and the heating resistor 109 and the temperature measuring resistor 110 are also arranged on the side of the substrate 100 away from the cover plate 106. In one example, they can be formed by depositing a metal material layer 107 (such as Ti / Pt, etc.) on the substrate 100 and the cover plate 106, spin coating a mask layer (such as photoresist) and patterning it, and etching / corroding the metal layer to obtain the heating resistor 109 and the temperature measuring resistor 110.

[0093] In addition, in one example, slicing may be performed after forming the heating resistor 109 and the temperature measuring resistor 110 to obtain a silicon-based micro-enricher chip based on a silicon nanowire array.

[0094] As an example, the preparation method further comprises the step of: preparing a silicon nanowire array layer 105 at least on the surface of the micro-column structure 102 .

[0095] Specifically, in one example, it also includes the step of preparing a nanowire array layer 105 on at least the surface of the microcolumn structure 102, which may be a silicon nanowire array. In an optional example, the silicon nanowire array layer 105 is formed on the inner surface of the groove structure 101 and the surface of the microcolumn structure 102. Based on the silicon nanowire array construction technology, a thin layer of silicon nanowire array with high specific surface area is prepared on the inner surface of the silicon-based micro-enricher cavity. Finally, the adsorption material is coated on the silicon nanowire array. Compared with the original silicon surface, the silicon nanowire array can carry more adsorption material.

[0096] As an example, the silicon nanowire array layer 105 is prepared after the groove structure 101 , the micro-pillar structure 102 and the microfluidic port 103 are prepared.

[0097] Specifically, in one example, the silicon nanowire array layer 105 is prepared after the groove structure 101, the microcolumn structure 102 and the microfluidic port 103 are prepared. In one example, the above structure is formed based on the patterned mask layer. After the above structure is prepared, the remaining patterned mask layer is included to protect the bonding surface in subsequent processes.

[0098] As an example, the steps of preparing the silicon nanowire array layer 105 include:

[0099] 1) providing a containing device, and adding a hydrofluoric acid solution with a concentration of 40% into the containing device, and soaking the substrate 100 formed with the micro-column structure 102 in the hydrofluoric acid solution for 10 minutes and then taking it out.

[0100] In fact, in the embodiment of the present invention, the concentration of the hydrofluoric acid solution can be varied between 39% and 41%, and the immersion time can be varied between 8 and 12 minutes.

[0101] 2) providing a containing device, adding 40% hydrofluoric acid solution and 0.02 mol / L silver nitrate solution into the containing device, placing the substrate 100 therein and keeping it for 5 minutes before taking it out.

[0102] In fact, the concentration of the silver nitrate solution in the embodiment of the present invention can be varied between 0.01-0.03 mol / L, and the soaking time can be varied between 4-6 min.

[0103] 3) Providing a containing device, adding 40% hydrofluoric acid and hydrogen peroxide into the containing device, placing the substrate 100 therein and keeping it for 2.5 minutes before taking it out.

[0104] In fact, the holding time in the embodiment of the present invention can be fluctuated between 2 and 3 minutes.

[0105] 4) Providing a containing device, adding 68% nitric acid solution into the containing device, placing the substrate 100 therein and soaking it for 10 minutes, and then taking it out.

[0106] In fact, the concentration of the nitric acid solution in the embodiment of the present invention can be varied between 65% and 70%, and the soaking time can be varied between 8 and 12 minutes.

[0107] 5) Spin-drying the substrate 100 to prepare the silicon nanowire array 105 at least on the surface of the micro-column structure 102. As an example, the groove structure 101 and the micro-column structure 10 are prepared based on a patterned mask layer formed on the substrate 100.

[0108] Specifically, the containing device can be a beaker. In one example, a silicon nanowire array layer 105 is constructed inside the microchannel by using a metal-assisted chemical etching (MACE) method on a silicon substrate 100 on which a microcavity and a microfluidic port 103 have been made. The process is as follows: (a) 100 mL of a 40% hydrofluoric acid solution is added to a 500 mL beaker, and the substrate 100 formed with the microcolumn structure 102 is placed in the hydrofluoric acid solution and soaked for 10 minutes before being taken out; (b) 20 mL of a 40% hydrofluoric acid solution and 8 mL of a 0.02 mol / L silver nitrate solution are added to a 500 mL beaker, and the substrate 100 is placed therein and kept for 5 minutes before being taken out for deposition of Ag nanoparticles as a catalyst. (c) adding 20 mL of 40% hydrofluoric acid and 2 mL of hydrogen peroxide into a 500 mL beaker, placing the substrate 100 therein for 2.5 min and then taking it out. This process is used to etch silicon nanoparticles; (d) adding 100 mL of 68% nitric acid solution into a 500 mL beaker, placing the substrate 100 therein for soaking for 10 min and then taking it out. This process is used to remove the Ag nanoparticles remaining on the surface of the substrate 100; (e) drying the substrate 100 to prepare the silicon nanowire array 105 at least on the surface of the microcolumn structure 102.

[0109] As an example, after the silicon nanowire array layer 105 is prepared, the method further includes: preparing an adsorption material layer 111 at least on the surface of the silicon nanowire array layer 105 .

[0110] Specifically, in one example, after preparing the silicon nanowire array layer 105, the step of preparing an adsorption material layer 111 at least on the surface of the silicon nanowire array layer 105 is further included. In one example, the adsorption material layer 111 can be formed on the silicon nanowire array layer 105 on the inner surface of the groove structure 101, and also formed on the surface of the silicon nanowire array layer 105 on the surface of the micro-pillar structure 102.

[0111] As an example, the adsorption material layer 111 is prepared after preparing the cover plate 106 , wherein the method of preparing the adsorption material layer 111 includes: installing a capillary at the microfluidic port 103 , and forming the adsorption material layer 111 at least on the surface of the silicon nanowire array layer 105 based on the capillary.

[0112] Specifically, in this example, after preparing the cover plate 106, in another optional example, after preparing the heating electrode and the temperature measuring resistor 110 and slicing to obtain a silicon-based micro-enricher chip based on a silicon nanowire array, a capillary is installed in the microfluidic port 103, and the port is sealed with glue, and finally an adsorption material (such as Tenax-TA, etc.) is coated into the cavity of the silicon-based micro-enricher chip based on a silicon nanowire array through the installed capillary.

[0113] In addition, if Figure 1 As shown, see Figure 2-9 The present invention also provides a micro-enricher chip based on a silicon nanowire array, wherein the micro-enricher chip based on a silicon nanowire array comprises:

[0114] A substrate 100, wherein a groove structure 101 is formed in the substrate 100;

[0115] A plurality of micro-column structures 102 are formed on the substrate 100 and located in the groove structure 101. The micro-column structure 102 includes a first extension portion 102a, a connection portion 102b, and a second extension portion 102c that are sequentially connected. The first extension portion 102a, the connection portion 102b, and the second extension portion 102c enclose a space region with an opening, and adjacent micro-column structures 102 are nested based on the opening.

[0116] at least two microfluidic ports 103 formed in the substrate 100 and connected to the groove structure 101; and

[0117] The cover plate 106 is formed on one side of the substrate 100 where the groove structure 101 is formed, and at least covers the groove structure 101 .

[0118] Specifically, the substrate 100 is used to form a subsequent chip structure based thereon, and can be a silicon substrate 100, etc. In this example, the silicon substrate 100 is selected, but it is not limited thereto. The number of the microfluidic ports 103 can be selected according to actual needs. In one example, two are selected, which are respectively arranged at opposite ends of the groove structure 101, and can seal the capillary column to provide a gas passage with the outside.

[0119] Specifically, the microcolumn structure 102 includes a first extension portion 102a, a connection portion 102b and a second extension portion 102c which are connected in sequence. The first extension portion 102a, the connection portion 102b and the second extension portion 102c enclose a space region with an opening. Adjacent microcolumn structures 102 are nested based on the opening. The nested setting means that adjacent microcolumn structures 102 are nested with each other, and can be interspersed in an interpolation manner. For example, taking a certain reference microcolumn structure 102 as an example, the second extension portion 102c of the microcolumn structure 102 on its left side can be inserted from the opening of the reference microcolumn structure 102 into the space region of the reference microcolumn structure 102, and the first extension portion 102a of the microcolumn structure 102 on its right side can be inserted from the opening of the reference microcolumn structure 102 into the space region of the reference microcolumn structure 102, so as to achieve a nested setting.

[0120] As an example, the shape of the groove structure 101 includes any one of an elliptical shape and a structure with a square in the middle and arcs at both ends;

[0121] As an example, the shape of the micro-column structure 102 includes any one of a U-shape, a V-shape and an irregular shape.

[0122] Specifically, the groove structure 101 and the cover plate 106 covering it form a cavity, which constitutes the cavity of the silicon-based micro-enricher, wherein, in one example, from a top view, the middle of the cavity is a rectangle, and the two ends are two arcs, preferably two semicircles. In addition, the cavity can also be designed as an ellipse as needed. This circular or elliptical structure ensures that the cavity structure is streamlined, which is conducive to the uniform distribution of the flow field. In addition, the shape of the micro-column structure 102 from a top view angle includes any one of a U-shape, a V-shape and an irregular shape. For example, a U-shaped cavity constitutes the space region. Of course, the first extension portion 102a, the connecting portion 102b and the second extension portion 102c may all be irregular structures, thereby forming the space region with the opening.

[0123] As an example, the shape of the microcolumn structure 102 includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures 102 are relatively arranged, and the nested arrangement of the microcolumn structure 102 is achieved by the interlaced arrangement of the first extension portion 102a and the second extension portion 102c of adjacent microcolumn structures 102.

[0124] As an example, the first extension portion 102a and the second extension portion 102c constitute two sides of the U-shaped microcolumn structure 102, and the connecting portion 102b constitutes the bottom of the U-shaped microcolumn structure 102, wherein the shape of the side portion includes a rectangle, and the shape of the bottom includes a semicircular arc, wherein the outer diameter of the semicircular arc is between 35μm-560μm, and the inner diameter of the semicircular arc is between 25μm-400μm; the width of the rectangle is between 5μm-80μm, and the length of the rectangle is between 80μm-480μm; the spacing between adjacent microcolumn structures 102 is between 5μm-80μm. The spacing between adjacent microcolumn structures 102 refers to the distance between opposite sides of two interlaced microcolumn structures 102, such as the distance between the first extension portion 102a of a microcolumn structure 102 and the opposite surfaces of the second extension portion 102c of the adjacent microcolumn structure 102.

[0125] Specifically, in one example, the micro-column structure 102 is arranged in a U-shape, and the cross section (top view) of the U-shaped micro-column 11 is as follows: Figure 1 (c) It is composed of a semicircle and two connected rectangles. The outer diameter of the semicircle is 280 μm, the inner diameter is 200 μm, and the rectangle is 40 μm wide and 280 μm long. The U-shaped micropillars are nested with each other ( Figure 1 (b)-(c)) are arranged in a regular array, with the distance between adjacent U-shaped micropillars being 40 microns; the above structural dimensions can be scaled up or down as needed. On the one hand, this nested U-shaped micropillar array allows the gas to flow evenly in the gaps between the U-shaped micropillars because the micropillars are evenly distributed ( Figure 1 (d)), which can improve the uniformity of adsorption material coating and the uniform adsorption of gas in the entire cavity; on the other hand, compared with other micro-pillar structures 102, the nested U-shaped micro-pillars increase the surface area and thus increase the bearing area of ​​the adsorption material, and the gas flow path zigzags back and forth along the gaps of the U-shaped micro-pillar array ( Figure 1 (d)) increases the length of the gas flow path, thereby increasing the probability of contact between the gas and the enriched material on the surface of the microcolumn. The above factors will further improve the enrichment rate of the chip.

[0126] Specifically, the cover plate 106 is also formed in the preparation of the micro-enricher chip based on the silicon nanowire array of the present invention. The cover plate 106 includes a glass cover plate 106. In one example, a double-polished glass sheet is selected. In addition, the cover plate 106 at least covers the groove structure 101 to form the cavity of the enricher. In one example, the cover plate 106 also covers the microfluidic port 103 and can further cover the entire substrate 100.

[0127] As an example, the silicon nanowire array-based micro-enricher chip also includes a heating resistor 109 and a temperature measuring resistor 110, wherein the heating resistor 109 and the temperature measuring resistor 110 are located on at least one of a side of the cover plate 106 away from the substrate 100 and a side of the substrate 100 away from the cover plate 106.

[0128] Specifically, in the enricher structure of the present invention, the enricher can be heated by an externally provided heating device, so that the enriched gas can be released. In one example, the heating can be performed by providing the heating resistor 109. In a further optional example, a temperature measuring resistor 110 can be provided while providing the heating resistor 109 to effectively release the gas. The temperature measuring resistor 110 is preferably provided on the same side of the heating resistor 109. In one example, the heating resistor 109 is provided at the periphery of the temperature measuring resistor 110, that is, the heating resistor 109 is provided around the temperature measuring resistor 110. In one example, the heating resistor 109 and the temperature measuring resistor 110 are provided on the side of the cover plate 106 away from the substrate 100, and the heating resistor 109 and the temperature measuring resistor 110 are also provided on the side of the substrate 100 away from the cover plate 106. In one example, the heating resistor 109 and the temperature measuring resistor 110 can be made of metal materials, such as Ti / Pt.

[0129] As an example, the silicon nanowire array-based micro-enricher chip further includes a silicon nanowire array layer 105 , and the silicon nanowire array layer 105 is at least located on the surface of the micro-column structure 102 .

[0130] Specifically, in an optional example, the silicon nanowire array layer 105 is formed on the inner surface of the groove structure 101 and the surface of the microcolumn structure 102. Based on the silicon nanowire array construction technology, a thin layer of high specific surface area silicon nanowire array is prepared on the inner surface of the silicon-based micro-enricher cavity. Finally, the adsorption material is coated on the silicon nanowire array. Compared with the original silicon surface, the silicon nanowire array can carry more adsorption material.

[0131] Embodiment 2:

[0132] In addition, if Figure 10-11 As shown, see Figure 1-9 The present invention also provides another method for preparing a micro-enricher chip based on a silicon nanowire array, which is different from the first embodiment in that the order and method of forming the adsorption material layer 111 are different. In this embodiment, the adsorption material layer 111 is prepared before preparing the cover plate 106, wherein the method of preparing the adsorption material layer 111 includes at least one of evaporation, sputtering, atomic layer deposition and molecular vapor deposition, that is, after forming the silicon nanowire array layer 105, the adsorption material layer 111 (such as aluminum oxide, etc.) is deposited (such as by evaporation, sputtering, atomic layer deposition, molecular vapor deposition). In one example, when a structure such as a micro-column structure 102 is formed based on a patterned mask layer, the patterned mask layer is removed after the adsorption material layer 111 is formed. Next, the side of the silicon substrate 100 with the microcavity and the glass cover plate 106 (double-polished glass sheet) are anodic bonded at a bonding temperature of 200-450°C and a bonding voltage of 600-1400V;) a metal layer (such as Ti / Pt, etc.) is deposited on the silicon substrate 100 and the glass substrate 100, and a mask layer (such as photoresist) is spin-coated and patterned; the metal layer is etched / corroded to obtain a heating resistor 109 and a temperature measuring resistor 110, and a silicon-based micro-enricher chip based on a silicon nanowire array is obtained by slicing, a capillary is installed in the microfluidic port 103, and the port is sealed with glue to complete the production of a silicon-based micro-enricher chip based on a silicon nanowire array. For other processes and structures, refer to Example 1.

[0133] In summary, the present invention provides a micro-enricher chip based on a silicon nanowire array and a preparation method, the preparation comprising: providing a substrate, and preparing a groove structure in the substrate; preparing a plurality of micro-column structures in the substrate, the micro-column structure being located in the groove structure, the micro-column structure comprising a first extension portion, a connecting portion and a second extension portion connected in sequence, the first extension portion, the connecting portion and the second extension portion enclosing a space region with an opening, and adjacent micro-column structures are nested based on the opening; preparing at least two microfluidic ports in the substrate, the microfluidic ports being connected to the groove structure; and providing a cover plate, and preparing the cover plate on a side of the substrate where the groove structure is formed, and the cover plate at least covers the groove structure. The micro-enricher chip based on silicon nanowire array and the preparation method of the present invention can obtain a large surface area by designing a micro-column structure array nested in the cavity formed by the groove structure, and make the flow field uniformly distributed and extend the gas flow path, thereby improving the uniformity of the adsorbent material and the enrichment rate of the adsorbed gas. In addition, by constructing a layer of silicon nanowire array with a high specific area on the inner surface of the cavity, the inner surface area of ​​the cavity can be greatly increased, thereby further improving the carrying rate of the adsorbent material and the enrichment rate of the micro-enricher chip based on the silicon nanowire array. Therefore, the present invention effectively overcomes various shortcomings in the prior art and has a high industrial utilization value.

[0134] The above embodiments are merely illustrative of the principles and effects of the present invention, and are not intended to limit the present invention. Anyone familiar with the art may modify or alter the above embodiments without departing from the spirit and scope of the present invention. Therefore, all equivalent modifications or alterations made by a person of ordinary skill in the art without departing from the spirit and technical concept disclosed by the present invention shall still be covered by the claims of the present invention.

Claims

1. A method for preparing a micro-enricher chip based on a silicon nanowire array, characterized in that: The preparation method comprises the following steps: A substrate is provided, and a groove structure is prepared in the substrate; the shape of the groove structure includes any one of an elliptical shape and a structure that is square in the middle and arc-shaped at both ends; A plurality of micro-column structures are prepared in the substrate, the micro-column structures are located in the groove structure, the micro-column structures include a first extension portion, a connection portion and a second extension portion connected in sequence, the first extension portion, the connection portion and the second extension portion enclose a space region with an opening, and adjacent micro-column structures are nested based on the opening; there are gaps between the micro-column structures; the shape of the micro-column structure includes a U-shape; the first extension portion and the second extension portion constitute two sides of the U-shaped micro-column structure, and the connection portion constitutes the bottom of the U-shaped micro-column structure; At least two microfluidic ports are prepared in the substrate, and the microfluidic ports are connected to the groove structure; and a cover plate is provided, and the cover plate is prepared on the side of the substrate where the groove structure is formed, and the cover plate at least covers the groove structure; Preparing a heating resistor and a temperature measuring resistor on at least one of a side of the cover plate away from the substrate and a side of the substrate away from the cover plate; Preparing a silicon nanowire array at least on the surface of the micro-pillar structure; An adsorption material layer is prepared at least on the surface of the silicon nanowire array.

2. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The steps of preparing the heating resistor and the temperature measuring resistor include: depositing a metal material layer on the surface of the structure where the heating resistor and the temperature measuring resistor need to be formed, forming a patterned mask layer on the metal material layer, and etching the metal material layer based on the patterned mask layer to form the heating resistor and the temperature measuring resistor.

3. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The method of preparing the cover plate on the substrate comprises anodic bonding, wherein the cover plate comprises a glass cover plate, the bonding temperature of the anodic bonding is between 200° C. and 450° C., and the bonding voltage is between 600V and 1400V.

4. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The shape of the microcolumn structure includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures are arranged relatively to each other, and the nested arrangement of the microcolumn structure is achieved by the interlaced arrangement of the first extension part and the second extension part of adjacent microcolumn structures.

5. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The silicon nanowire array is prepared after the groove structure, the micro-column structure and the microfluidic port are prepared, and the silicon nanowire array layer is formed on the inner surface of the groove structure and the surface of the micro-column structure.

6. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The steps of preparing the silicon nanowire array layer include: 1) providing a containing device, adding a hydrofluoric acid solution with a concentration of 39-41% into the containing device, soaking the silicon substrate in the hydrofluoric acid solution for 8-12 minutes and then taking it out; 2) providing a containing device, adding 39-41% hydrofluoric acid solution and 0.01-0.03 mol / L silver nitrate solution into the containing device, placing the silicon substrate in the containing device and keeping it for 4-6 minutes before taking it out; 3) providing a containing device, adding 39-41% hydrofluoric acid and hydrogen peroxide into the containing device, placing the silicon substrate in the containing device and keeping it for 2-3 minutes before taking it out; 4) Provide a containing device, add 65-70% nitric acid solution into the containing device, put the silicon substrate into it and soak it for 8-12 minutes, then take it out; 5) Spin the silicon wafer and dry it to obtain a silicon nanowire array on the surface of the silicon substrate.

7. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 6, characterized in that: The groove structure and the micro-column structure are prepared based on a patterned mask layer formed on the substrate.

8. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The adsorption material layer is prepared after preparing the cover plate, wherein the method of preparing the adsorption material layer includes: installing a capillary at the microfluidic port, and forming the adsorption material layer at least on the surface of the silicon nanowire array based on the capillary.

9. The method for preparing a micro-enricher chip based on a silicon nanowire array according to claim 1, characterized in that: The adsorption material layer is prepared before preparing the cover plate, wherein the method of preparing the adsorption material layer includes at least one of evaporation, sputtering, atomic layer deposition and molecular vapor deposition.

10. A micro-enricher chip based on silicon nanowire array, characterized in that: The micro-enricher chip based on silicon nanowire array comprises: A substrate having a groove structure formed therein; A plurality of micro-column structures are formed on the substrate and located in the groove structure, wherein the micro-column structure comprises a first extension portion, a connection portion and a second extension portion which are connected in sequence, wherein the first extension portion, the connection portion and the second extension portion enclose a space region having an opening, and adjacent micro-column structures are nested based on the opening; there are gaps between the micro-column structures; the shape of the micro-column structure comprises a U-shape; the first extension portion and the second extension portion constitute two sides of the U-shaped micro-column structure, and the connection portion constitutes the bottom of the U-shaped micro-column structure; At least two microfluidic ports are formed in the substrate and communicated with the groove structure; and a cover plate is formed on a side of the substrate where the groove structure is formed and at least covers the groove structure; the shape of the groove structure includes an elliptical shape, and a structure that is square in the middle and arc-shaped at both ends; A heating resistor and a temperature measuring resistor, wherein the heating resistor and the temperature measuring resistor are located on at least one of a side of the cover plate away from the substrate and a side of the substrate away from the cover plate; A silicon nanowire array, wherein the silicon nanowire array is at least located on the surface of the microcolumn structure; An adsorption material layer, wherein the adsorption material layer is at least located on the surface of the silicon nanowire array.

11. The micro-enricher chip based on silicon nanowire array according to claim 10, characterized in that: The shape of the microcolumn structure includes a U-shape, the opening of the U-shape constitutes the opening of the space area, and the openings of adjacent microcolumn structures are arranged relatively to each other, and the nested arrangement of the microcolumn structure is achieved by the interlaced arrangement of the first extension part and the second extension part of adjacent microcolumn structures.

12. The micro-enricher chip based on silicon nanowire array according to claim 10, characterized in that: in, The shape of the side portion includes a rectangle, and the shape of the bottom portion includes a semicircular arc, wherein the outer diameter of the semicircular arc is between 35μm-560μm, and the inner diameter of the semicircular arc is between 25μm-400μm; the width of the rectangle is between 5μm-80μm, and the length of the rectangle is between 80μm-480μm; the spacing between adjacent microcolumn structures is between 5μm-80μm.

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