Method for manufacturing package-on-package device and package-on-package bonding apparatus

Abstract

A method for manufacturing a stacked package device and a stacked package bonding device are provided. The method for manufacturing a stacked package device includes: a bonding step implemented by a bonding device including a pressing member and a light source that generates a laser beam. A bottom package including a lower substrate, lower solder balls along the edge of the lower substrate, and a lower chip located on the center of the lower substrate is provided, the bottom package is bonded to a built-in substrate having upper solder balls aligned with the lower solder balls, and a top package having an upper substrate and an upper chip located on the upper substrate is bonded to the built-in substrate. When the built-in substrate is arranged on the bottom package, the pressing member presses the built-in substrate against the bottom package, and the laser beam adheres the lower solder balls to the upper solder balls.

Description

[0001] Priority declaration

[0002] This application claims the benefit of Korean Patent Application No. 10-2018-0025772 filed on March 5, 2018 in the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] The present inventive concept relates to a package-on-package device and more particularly to a method of manufacturing a package-on-package device and a bonding apparatus for bonding a plurality of stacked semiconductor packages. Background Art

[0004] The demand for higher performance, higher speed and more compact electronic products is increasing. In order to develop electronic devices that meet these demands, many semiconductor device technologies have been considered to form package-on-package (POP) devices, such as stacking multiple semiconductor chips on a single package substrate or stacking one package on another. However, these technologies all bring certain challenges in the design and manufacturing process. Summary of the invention

[0005] According to the inventive concept, a method for manufacturing a stacked package device is provided, the method comprising: providing a bottom semiconductor package, the bottom semiconductor package comprising a lower substrate, lower solder balls located on a peripheral portion of a top surface of the lower substrate, and a lower chip located on a central portion of the top surface of the lower substrate; bonding a built-in substrate having upper solder balls to the bottom semiconductor package; and bonding a top semiconductor package to the built-in substrate. The top semiconductor package comprises an upper substrate and an upper chip located on the upper substrate. Bonding the built-in substrate to the bottom semiconductor package comprises: placing the built-in substrate on the bottom semiconductor package so that the upper solder balls of the built-in substrate are aligned with the lower solder balls of the bottom semiconductor package; pressing the built-in substrate against the bottom semiconductor package; and irradiating the built-in substrate with a laser beam to adhere the lower solder balls to the upper solder balls.

[0006] According to the inventive concept, a method for manufacturing a stacked package device is also provided, the method comprising: providing a bottom semiconductor package, the bottom semiconductor package comprising: a lower substrate having a top surface and a bottom surface, first solder balls or first solder bumps spaced apart from each other along a peripheral portion of the top surface of the lower substrate, and a lower chip located on a central portion of the top surface of the lower substrate; providing an embedded component, the embedded component having an intermediate substrate having a top surface and a bottom surface, second solder balls or second solder bumps spaced apart from each other along a peripheral portion of the bottom surface of the intermediate substrate, a conductive pad arranged on the top surface of the intermediate substrate, and a path extending in the intermediate substrate and connecting the conductive pad to the second solder ball or the second solder bump; placing the embedded component on the bottom semiconductor package; On the top, the bottom surface of the intermediate substrate is made to face the top surface of the lower substrate, and the second solder ball or the second solder bump is arranged corresponding to the first solder ball or the first solder bump; then the built-in component is pressed toward the bottom semiconductor package to a position where the first solder ball or the first solder bump contacts the second solder ball or the second solder bump, respectively; while the second solder ball or the second solder bump contacts the first solder ball or the first solder bump, respectively, the second solder ball or the second solder bump is adhered to the first solder ball or the first solder bump, respectively, by melting the second solder ball or the second solder bump; and a top semiconductor package is joined to the built-in component, the top semiconductor package comprising an upper substrate and an upper chip located on the upper substrate.

[0007] According to the inventive concept, there is also provided a stacked package bonding device, the stacked package bonding device comprising: a platform for accommodating a semiconductor package and a built-in substrate located on the semiconductor package, the semiconductor package comprising a semiconductor chip; an optical system located above the platform and providing a laser beam to the built-in substrate; and a pressing member located between the built-in substrate and the optical system and pressing the built-in substrate against the semiconductor package. The pressing member blocks the laser beam from traveling toward the semiconductor chip to selectively provide the laser beam to a portion of the semiconductor package. BRIEF DESCRIPTION OF THE DRAWINGS

[0008] Figure 1 is a flowchart illustrating an example of a method of manufacturing a package-on-package device according to the inventive concept.

[0009] Figure 2 It shows Figure 1 A flow chart of an example of a routine of step S10 of the method is shown.

[0010] Figure 3 , Figure 4 and Figure 5 is Figure 2 The illustrated example is a cross-sectional view of a package during the routine of step S10 .

[0011] Figure 6 It shows Figure 1 A flow chart of an example of a routine of step S20 of the method is shown.

[0012] Figure 7 is Figure 6 The illustrated example is a cross-sectional view of the package structure during the routine of step S22 .

[0013] Figure 8 is a cross-sectional view of the same package structure to illustrate the warpage of the built-in substrate of this structure.

[0014] Fig. 9 is a schematic diagram of an example of a bonding device configured to bond a built-up substrate to a bottom semiconductor package according to the inventive concept.

[0015] Fig.10 yes Figure 7 is a cross-sectional view of the package structure shown in FIG. 1 in a state where the upper solder balls have melted and adhered to the lower solder balls.

[0016] Fig.11 is a cross-sectional view of an example of a package-on-package device according to the inventive concept. DETAILED DESCRIPTION

[0017] Figure 1 A method of manufacturing a package-on-package device according to the inventive concept is shown. Figure 2 Shows Figure 1 An example of step S10 of the method is shown.

[0018] Reference Figure 1 , a method for manufacturing a stacked package device according to the present invention may include: step S10, preparing a bottom semiconductor package; step S20, bonding a built-in substrate to the bottom semiconductor package; and step S30, bonding a top semiconductor package to the built-in substrate. The bottom semiconductor package may include a logic circuit that performs data calculation and / or data processing in response to an external input signal. The top semiconductor package may include a memory device that stores input / output data of the logic circuit. The built-in substrate may reroute signals between the bottom semiconductor package and the top semiconductor package, and / or connect the bottom semiconductor package and the top semiconductor package.

[0019] Reference Figure 2, step S10 of preparing a bottom semiconductor package may include: step S12, mounting a lower semiconductor chip on a lower substrate; step S14, forming a lower molding layer on the lower substrate on which the lower semiconductor chip is mounted; and step S16, forming lower solder balls.

[0020] Figures 3 to 5 is Figure 2 FIG. 1 is a cross-sectional view of the bottom package during the process of step S10 .

[0021] Reference Figure 2 and Figure 3 , a lower semiconductor chip 10 may be mounted on a lower substrate 1 (S12). The lower substrate 1 may be a printed circuit board or may include a printed circuit board. For example, the lower substrate 1 may have a plate-like substrate body, a first lower pad 2, and a second lower pad 4. The first lower pad 2 may be formed on the top surface of the body of the lower substrate 1. The second lower pad 4 may be formed on the bottom surface of the body of the lower substrate 1. Although not shown, the first lower pad 2 may be electrically connected to the second lower pad 4 within the body of the lower substrate 1.

[0022] The lower semiconductor chip 10 may be mounted on the center of the lower substrate 1. The lower semiconductor chip 10 may be mounted in a flip chip bonding manner. The lower semiconductor chip 10 may be connected to the first lower pad 2 via a first bump 5. The lower semiconductor chip 10 may be an application processor chip or may include an application processor chip. Alternatively, the lower semiconductor chip 10 may include various devices such as a central processing unit (CPU), a graphics processor unit (GPU), or a universal serial bus (USB).

[0023] Reference Figure 2 and Figure 4 , a lower mold layer 12 may be formed on the lower substrate 1 on which the lower semiconductor chip 10 has been mounted (S14). The lower mold layer 12 may surround the sidewalls (sides) of the lower semiconductor chip 10 and expose the top surface of the lower semiconductor chip 10. The lower mold layer 12 may include an epoxy molding compound (EMC). The lower mold layer 12 may have one or more contact holes 14. The contact holes 14 may be formed on the peripheral edge region of the lower substrate 1. Each of the first lower pads 2 may be exposed by the contact holes 14, and the exposed first lower pads 2 may be positioned along the peripheral edge region of the top surface of the lower substrate 1.

[0024] Reference Figure 2 and Figure 5, a lower solder ball 16 can be formed on the first lower pad 2 exposed by the contact hole 14 (S14). The lower solder ball 16 can be electrically connected to the second lower pad 4 or the lower semiconductor chip 10 through the lower substrate 1. The lower solder ball 16 may include a conductive material such as tin, lead, silver or any alloy thereof. Alternatively, that is, instead of the lower solder ball 16, a solder paste may be formed in the contact hole 14 on the first lower pad 2 exposed by the contact hole 14. Therefore, the lower solder ball 16 may be referred to as a first solder ball or a first solder bump. Through the processes discussed above, a bottom semiconductor package 101 may be prepared.

[0025] Figure 6 Shows Figure 1 1 , in which an embedded component (which may be referred to as an “embedded substrate” in this document) is bonded to the bottom semiconductor package 101 . Figure 7 Shows Figure 6 In the example of step S22 , the built-in substrate is bonded to the bottom semiconductor package 101 .

[0026] Reference Figure 1 , Figure 6 and Figure 7 , the built-in substrate 60 may be bonded to the bottom semiconductor package 101 (S20). For example, the step S20 of bonding the built-in substrate 60 to the bottom semiconductor package 101 may include: step S22, disposing the built-in substrate 60 on the bottom semiconductor package 101; step S24, disposing a pressing member on the built-in substrate 60; and step S26, projecting a laser beam at an edge of the built-in substrate 60.

[0027] Reference Figure 7, a built-in substrate 60 may be provided on the bottom semiconductor package 101 (S22). A picker (not shown) may be used to provide the built-in substrate 60 on the bottom semiconductor package 101. The built-in substrate 60 may include a substrate body 66 (which will form an intermediate substrate of the stacked package), a lower insulating member 50a, a first solder pad 62, a second solder pad 64, a via 68, and an upper solder ball 69 (which may be referred to as a second solder ball or a second solder bump). However, in the semiconductor device packaging technology, as in the case of the built-in component, the built-in substrate 60 itself does not include any chip. The substrate body 66 may include a plastic or ceramic sheet having a size that is the same or similar to that of the lower substrate 1. The lower insulating member 50a may be formed below the center of the substrate body 66. The lower insulating member 50a may be aligned with the lower semiconductor chip 10. The lower insulating member 50a may include a solder resist. The first solder pad 62 may be formed along the peripheral edge of the top surface of the substrate body 66. The second solder pad 64 may be formed along the peripheral edge of the bottom surface of the substrate body 66. A via 68 connecting the first pad 62 to the second pad 64 may be formed in the substrate body 66. An upper solder ball 69 may be formed below the second pad 64. The upper solder ball 69 may be thicker than the lower insulating member 50a. The upper solder ball 69 may be aligned with the lower solder ball 16. When the substrate body 66 is flat or straight, the upper solder ball 69 may be connected to the lower solder ball 16.

[0028] Figure 8 Shows Figure 7 The warping of the built-in substrate 60 is reduced.

[0029] Reference Figure 8 , the built-in substrate 60 may have a curved substrate body 66a. The total weight of the first pad 62, the second pad 64, the via 68, and the upper solder ball 69 formed on the edge of the built-in substrate 60 may be greater than the weight of the lower insulating member 50a formed on the center of the built-in substrate 60, and thus the curved substrate body 66a may generally have an upwardly convex shape. However, in some cases, the curved substrate body 66a of the built-in substrate 60 may have a downwardly convex shape.

[0030] In the illustrated case, due to the warping of the built-in substrate 60, there is an increased gap H between the central portion of the built-in substrate 60 and the bottom semiconductor package 101. As a result, one or more upper solder balls 69 are separated from their corresponding lower solder balls 16. If the upper solder balls 69 are separated from the corresponding lower solder balls 16, a bonding failure may occur between the built-in substrate 60 and the bottom semiconductor package 101. That is, the warping of the built-in substrate 60 may cause a bonding failure between the built-in substrate 60 and the bottom semiconductor package 101.

[0031] Fig. 9An example of a bonding device 70 that bonds the intermediate substrate 60 to the bottom semiconductor package 101 is shown.

[0032] Reference Figures 6 to 9 The bonding device 70 bonds the built-in substrate 60 to the bottom semiconductor package 101 so that bonding failure does not occur due to any inherent curvature of the substrate body 66a. For example, the bonding device 70 can be a laser reflow tool. In some examples, the bonding device 70 includes a platform 72, an optical system 74, and a pressing member 76. The pressing member 76 can include a pressing plate 75 and a pressing block 77.

[0033] The platform 72 may accommodate the bottom semiconductor package 101 and the built-in substrate 60 . The built-in substrate 60 may be disposed on the platform 72 independently of the bottom semiconductor package 101 , or the built-in substrate 60 may be disposed on the platform 72 together with the bottom semiconductor package 101 .

[0034] The pressing member 76 can press the built-in substrate 60 against the bottom semiconductor package 101 (S24). The pressing member 76 can be positioned on the built-in substrate 60 using a robot arm (not shown). The pressing member 76 can be a clamping member. The pressing member 76 can press the built-in substrate 60 against the bottom semiconductor package 101 so that the upper solder ball 69 contacts the lower solder ball 16. The minimum weight of the pressing member 76 can be proportional to the gap H of the structure including the built-in substrate 60 and the bottom semiconductor package 101 and generated due to the curved substrate body 66a. For example, when the gap H is equal to or less than about 50μm, the weight of the pressing member 76 can be at least about 5 grams. When the gap H is equal to or less than about 100μm, the weight of the pressing member 76 can be at least about 20 grams.

[0035] The pressing plate 75 may cover the built-in substrate 60. The pressing plate 75 may flatten the built-in substrate 60 against the bottom semiconductor package 101. The pressing plate 75 may be made of transparent quartz. Compared to transparent glass, transparent quartz has high tolerance to heat generated by the laser beam 79 (which will be discussed below), and therefore, the life of the pressing plate 75 may be longer than that of general plate glass.

[0036] The pressing plate 75 may have a cavity 78. The cavity 78 may be formed in an upper portion of the center of the pressing plate 75. The cavity 78 may be aligned with the lower semiconductor chip 10.

[0037] The pressing block 77 may be smaller than the pressing plate 75. The pressing block 77 may be disposed on the pressing plate 75. Thus, for example, the pressing block 77 may be disposed above the center (central area) of the substrate body 66, the center (central area) of the substrate body 66 being defined by the area containing the upper solder ball 69. The pressing block 77 may be used as a weight for pressing the pressing plate 75 against the built-in substrate 60. The cavity 78 may accommodate the pressing block 77. The cavity 78 may hold the pressing block 77 horizontally in place. The pressing block 77 may be fixed to the bottom plate of the cavity 78 using an adhesive (not shown). The pressing block 77 may be aligned with the lower semiconductor chip 10. The density of the pressing block 77 may be greater than the density of the pressing plate 75. For example, the pressing block 77 may include a metal, such as iron, SUS, tungsten, copper, lead, or any alloy thereof.

[0038] Alternatively, the pressing member 76 does not include the pressing plate 75 , and the pressing block 77 is placed directly on the curved substrate body 66 a , so that the pressing block 77 alone flattens the built-in substrate 60 against the bottom semiconductor package 101 .

[0039] In another example (not shown), the pressing member 76 does not include the pressing block 77. In this case, the thickness T of the pressing plate 75 may be proportional to the gap H. That is, the larger the gap H generated by the curved substrate body 66a, the larger the thickness T of the pressing plate 75.

[0040] The optical system 74 may be arranged on the pressing member 76. The optical system 74 may emit a laser beam 79 that propagates to the pressing member 76 and the edge of the built-in substrate 60, so that the upper solder ball 69 melts and adheres to the lower solder ball 16 (S26). To this end, the optical system 74 may include a light source 71 that generates the laser beam 79 and an objective lens 73 that focuses the laser beam 79 onto the pressing plate 75 and the pressing block 77. The objective lens 73 may be arranged below the light source 71. The objective lens 73 may include a Fig. 9 The biconcave lens shown.

[0041] The laser beam 79 may propagate to the upper solder ball 69 and the lower solder ball 16 after passing through the edge of the pressing plate 75. The objective lens 73 may cause the laser beam 79 emitted by the light source 71 to diverge toward the upper solder ball 69. The larger the distance between the objective lens 73 and the built-in substrate 60 relative to the thickness T of the pressing plate 75, the less energy of the laser beam 79 is absorbed by the upper solder ball 69. With this in mind, it should also be noted that the absorption efficiency of the pressing block 77 may be improved by minimizing the distance between the objective lens 73 and the built-in substrate 60. Because the density of the pressing block 77 is greater than that of the pressing plate 75, the pressing block 77 may help minimize the thickness T of the pressing plate 75, which otherwise would have to be relatively large due to the gap H between the substrate body 66 and the bottom semiconductor package 101.

[0042] The pressing block 77 may absorb the laser beam 79 traveling toward the center of the built-in substrate 60, and thus may block the laser beam 79 from propagating to the lower semiconductor chip 10. Therefore, the pressing block 77 may cause the laser beam 79 to selectively irradiate the region of the built-in substrate 60 including the upper solder balls 69. More specifically, the laser beam 79 may be selectively provided to the upper solder balls 69 and the lower solder balls 16 after passing through the pressing plate 75 surrounding the pressing block 77. The lower solder balls 16 and the upper solder balls 69 may be irradiated by the laser beam for a period of about 10 milliseconds to about 5 seconds.

[0043] Although not shown, a plurality of bottom semiconductor packages 101 and a plurality of built-in substrates 60 may be disposed on the platform 72. In this case, the bonding device 70 may have a plurality of pressing plates 75 and a plurality of pressing blocks 77. The pressing plates 75 may be loaded in a fixture, and the pressing blocks 77 may be respectively disposed on the pressing plates 75. The laser beam 79 may be projected toward the pairs of pressing plates 75 and pressing blocks 77 independently and / or sequentially.

[0044] Fig.10 Shows Figure 7 The solder structure 80 shown in FIG. 8 is a solder structure in which the upper solder ball 69 and the lower solder ball 16 have melted and adhered to each other.

[0045] Reference Fig.10 , the lower solder ball 16 and the upper solder ball 69 can absorb the energy of the laser beam 79, thereby forming a solder structure 80. For example, when the laser beam 79 heats the upper solder ball 69 to a temperature equal to or higher than about 245° C., the upper solder ball 69 can melt and adhere to the lower solder ball 16.

[0046] Although not shown, an underfill layer may be formed between the built-up substrate 60 and the lower mold layer 12. The lower mold layer 12 and the underfill layer may electrically insulate the solder structures 80 from each other.

[0047] Reference Figure 1 and Fig.11 , the top semiconductor package 102 is bonded to the built-in substrate 60 (S30). For example, the top semiconductor package 102 can be bonded to the built-in substrate 60 in the form of a flip chip. The top semiconductor package 102 can be bonded to the built-in substrate 60 by Figure 3 and Figure 4 In some examples, the top semiconductor package 102 includes an upper substrate 30 , a first upper semiconductor chip 40 a , a second upper semiconductor chip 40 b , bonding wires 32 , an upper molding layer 36 , an upper insulating member 50 b , and second bumps 39 .

[0048] The upper substrate 30 may be or may include a printed circuit board. For example, the upper substrate 30 may include a first upper pad 31 and a second upper pad 33. The first upper pad 31 may be formed on the top surface of the upper substrate 30. The second upper pad 33 may be formed on the bottom surface of the upper substrate 30. The first upper pad 31 and the second upper pad 33 may be electrically connected within the upper substrate 30 by wiring (e.g., wiring layer and via).

[0049] The first upper semiconductor chip 40a and the second upper semiconductor chip 40b may be sequentially stacked on the upper substrate 30. At least one of the first upper semiconductor chip 40a and the second upper semiconductor chip 40b may be a memory chip.

[0050] The bonding wires 32 may connect the first upper semiconductor chip 40a and the second upper semiconductor chip 40b to the first upper pads 31. The bonding wires 32 may be bonded to the first upper semiconductor chip 40a and the second upper semiconductor chip 40b and to the first upper pads 31 using a wire bonder (not shown). Alternatively, at least one of the first upper semiconductor chip 40a and the second upper semiconductor chip 40b may be mounted on the upper substrate 30 in a flip chip manner.

[0051] The upper mold layer 36 may be formed to cover the first upper pad 31, the first and second upper semiconductor chips 40a and 40b, and the bonding wires 32. The upper mold layer 36 may include an epoxy molding compound (EMC).

[0052] The upper insulating member 50b may be formed below the center of the upper substrate 30. The upper insulating member 50b may insulate the upper substrate 30 and the built-in substrate 60 from each other. The upper insulating member 50b may include a solder resist.

[0053] The second bump 39 may be formed along the outer peripheral edge of the bottom surface of the upper substrate 30. The second bump 39 may connect the second upper pad 33 to the first pad 62 of the built-in substrate 60. Therefore, the second bump 39 may be disposed between the second upper pad 33 and the first pad 62 of the built-in substrate 60.

[0054] Although not shown, after the top semiconductor package 102 is bonded to the bottom semiconductor package 101 via the built-up substrate 60 , solder bumps may be formed on the second lower pads 4 of the bottom semiconductor package 101 .

[0055] According to an aspect of the inventive concept, a method of manufacturing a stacked package device uses a pressing member configured to press a bent built-in substrate against a bottom semiconductor package. Therefore, a bonding failure between the built-in substrate and the bottom semiconductor package can be prevented.

[0056] Finally, examples of the inventive concept have been described in detail above. However, the inventive concept can be put into practice in many different ways and should not be interpreted as being limited to the above examples. On the contrary, these examples are described to make this disclosure thorough and complete, and to fully convey the inventive concept to those skilled in the art. Therefore, the true spirit and scope of the inventive concept are not limited by the above embodiments, but by the appended claims.

Claims

1. A method for manufacturing a package-on-package device, the method comprising: providing a bottom semiconductor package including a lower substrate, lower solder balls located on a peripheral portion of a top surface of the lower substrate, and a lower chip located on a central portion of the top surface of the lower substrate; bonding a built-up substrate including upper solder balls to the bottom semiconductor package; as well as bonding a top semiconductor package to the built-up substrate, the top semiconductor package comprising an upper substrate and an upper chip located on the upper substrate, Wherein, bonding the built-in substrate to the bottom semiconductor package comprises: placing the built-in substrate on the bottom semiconductor package so that the upper solder balls of the built-in substrate are aligned with the lower solder balls of the bottom semiconductor package; pressing the built-in substrate against the bottom semiconductor package by pressing the built-in substrate with a pressing member, wherein the pressing member includes a pressing plate covering the built-in substrate and a pressing block disposed on the pressing plate, the pressing block being aligned with the lower chip; and The upper solder balls are selectively heated by irradiating the built-up substrate with a laser beam through the pressing plate and blocking the laser beam from traveling toward the lower chip with the pressing block to adhere the lower solder balls to the upper solder balls.

2. The method according to claim 1, wherein: The pressing plate includes quartz that is transparent to the laser beam.

3. The method according to claim 1, wherein: The pressing block is smaller than the pressing plate and is disposed on a central area of ​​the built-in substrate.

4. The method according to claim 3, wherein: The density of the pressing block is greater than the density of the pressing plate.

5. The method according to claim 3, wherein: The pressing plate includes a cavity in which the pressing block is fixed.

6. The method according to claim 3, wherein: The pressing block includes metal.

7. The method according to claim 1, wherein: When the built-in substrate is disposed on the bottom semiconductor package, a substrate body of the built-in substrate protrudes upward.

8. The method according to claim 1, wherein: The built-up substrate further includes an insulating member located in a region between respective ones of the upper solder balls, and The upper solder ball is thicker than the insulating member.

9. A method for manufacturing a package-on-package device, the method comprising: Providing a bottom semiconductor package, the bottom semiconductor package comprising: a lower substrate having a top surface and a bottom surface, first solder balls or first solder bumps spaced apart from each other along a peripheral portion of the top surface of the lower substrate, and a lower chip located on a central portion of the top surface of the lower substrate; Providing a built-in component, the built-in component comprising: an intermediate substrate having a top surface and a bottom surface, second solder balls or second solder bumps spaced apart from each other along a peripheral portion of the bottom surface of the intermediate substrate, a conductive pad arranged on the top surface of the intermediate substrate, and a via extending in the intermediate substrate and connecting the conductive pad to the second solder ball or the second solder bump; placing the built-in component on top of the bottom semiconductor package with the bottom surface of the intermediate substrate facing the top surface of the lower substrate and the second solder balls or the second solder bumps arranged corresponding to the first solder balls or the first solder bumps; subsequently pressing the built-in component toward the bottom semiconductor package to a position where the first solder ball or the first solder bump contacts the second solder ball or the second solder bump, respectively, by pressing the built-in component with a pressing member, wherein the pressing member includes a plate covering the built-in component and a block disposed on the plate, the block being aligned with the lower chip; while the second solder ball or the second solder bump contacts the first solder ball or the first solder bump, respectively, by causing a laser beam to penetrate the board and irradiate the built-in component and blocking the laser beam from traveling toward the lower chip with the block to melt the second solder ball or the second solder bump, thereby adhering the second solder ball or the second solder bump, respectively, to the first solder ball or the first solder bump, respectively; and A top semiconductor package is bonded to the inner component, the top semiconductor package including an upper substrate and an upper chip on the upper substrate.

10. The method according to claim 9, wherein: A region of the built-in component including the second solder ball or the second solder bump is irradiated with the laser beam.

11. The method according to claim 9, wherein: When the built-in component is placed on top of the bottom semiconductor package, the intermediate substrate of the built-in component protrudes upward, The block is placed over a central portion of the interposer and a central portion of the bottom semiconductor package.

12. The method according to claim 11, wherein: The central portion of the built-in component is an area defined by an area of ​​the built-in component including the second solder ball or the second solder bump, and The block covers only the central portion of the insert.

13. The method according to claim 9, wherein: Pressing the interposer toward the bottom semiconductor package includes covering the interposer with the plate.

14. The method according to claim 13, wherein: The plate is light-transmissive.

15. The method according to claim 14, wherein: The plates are of quartz.

16. The method according to claim 14, wherein: Pressing the insert toward the bottom semiconductor package further comprises placing the block of material having a density greater than that of the plate only over a central portion of the insert and a central portion of the bottom semiconductor package, wherein the block absorbs the laser beam incident on the block.

17. The method according to claim 16, wherein: Pressing the inner component toward the bottom semiconductor package includes flattening the inner component under the combined weight of the block and the plate.

18. A package-on-package bonding device, comprising: a platform for accommodating a semiconductor package and a built-in substrate located on the semiconductor package, wherein the semiconductor package includes a semiconductor chip; an optical system, the optical system being located above the platform and providing a laser beam to the built-in substrate; as well as A pressing member is located between the built-in substrate and the optical system and presses the built-in substrate against the semiconductor package. The pressing member includes: a pressing plate, the pressing plate covers the built-in substrate and allows the laser beam to pass through; and a pressing block, the pressing block is disposed on the pressing plate and aligned with the semiconductor chip, and The pressing member blocks the laser beam from traveling toward the semiconductor chip by using the pressing block, so as to selectively provide the laser beam to a portion of the semiconductor package.

19. The package-on-package bonding device according to claim 18, wherein: The optical system comprises: a light source for generating the laser beam; and an objective lens, the objective lens being located below the light source and providing the laser beam to the built-in substrate, Wherein, the pressing member is arranged between the objective lens and the built-in substrate.

20. The package-on-package bonding device according to claim 19, wherein: The objective lens includes a concave lens.

21. The package-on-package bonding device according to claim 18, wherein: The pressing plate includes transparent quartz.

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