Electronic devices including electronic chips

Abstract

Embodiments of the present disclosure relate to electronic devices including electronic chips. A main carrier wafer includes a first integrated electrical connection network between a front face and a back face. A first electronic chip is mounted to the front face of the main carrier wafer and is connected to the electrical connection network of the main carrier wafer. A secondary carrier wafer includes a platform extending over the first chip and a base protruding backward relative to the platform to a back face facing the main wafer. A second integrated electrical connection network is provided within the secondary carrier wafer. A second electronic chip is mounted on top of the platform and is connected to the second integrated network. The second integrated network is also connected to the main carrier wafer at the back face.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the benefit of French Patent Application No. 1853152, filed on April 11, 2018, the contents of which are hereby incorporated by reference in their entirety to the maximum extent permitted by law. Technical Field

[0003] The present invention relates to the field of microelectronics, and more particularly to the field of electronic devices comprising electronic chips. Summary of the invention

[0004] In one embodiment, an electronic device includes: a main carrier chip having a back side and a front side and an integrated electrical connection network arranged from one side to the other; a first electronic chip mounted on top of the front side of the main carrier chip and connected to the electrical connection network of the main carrier chip; an auxiliary carrier chip including a platform and a base, the platform extending above the first chip and having a back side and a front side, the base protruding backward relative to the platform and extending laterally to the first chip in the direction of the main carrier chip so as to have a back end surface facing the front side of the main chip; and a second electronic chip mounted on top of the front side of the platform.

[0005] Advantageously, the auxiliary carrier chip is provided with an integrated electrical connection network comprising at least one positive pad on the front side of the platform and at least one back pad on the back end face of the above-mentioned base, at least one positive pad being connected to the second chip and at least one back pad being connected to the electrical connection network of the main carrier chip.

[0006] Hereby, a compact electronic device may be obtained, wherein the second chip is directly linked to the electrical connection network of the primary carrier wafer via the electrical connection network of the secondary carrier wafer.

[0007] The platform of the secondary carrier wafer may extend at a distance from the first chip.

[0008] Support spacers may be interposed between the first chip and the platform of the secondary carrier wafer.

[0009] The secondary carrier wafer may include a support base that protrudes backward relative to the platform and abuts against the top of the first chip and / or the primary carrier wafer.

[0010] At least one light sensor may be arranged on the front side of the first chip.

[0011] At least one light sensor may be arranged on the front side of the second chip.

[0012] The device may comprise a third electronic chip mounted on top of the front side of the main carrier wafer, the front side of the third chip being provided with a light emitter.

[0013] According to a variant embodiment, the device may comprise a cover mounted on the primary carrier wafer and defining a cavity in which the secondary carrier wafer and the second chip are located.

[0014] According to another variant embodiment, the device may comprise a cover mounted on top of the primary carrier wafer and having an internal partition defining two chambers, the secondary carrier wafer and the second chip being located in one of the chambers and the first chip passing through said internal partition.

[0015] The front wall of the cover may have at least one opening, and the at least one opening is provided with an optical element allowing light to pass therethrough. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The electronic device will now be described by means of non-limiting exemplary embodiments illustrated by the accompanying drawings, in which:

[0017] Figure 1 A longitudinal cross section of an electronic device is shown;

[0018] Figure 2 shows the electronic equipment along Figure 1 A top view of the section marked II-II, with the cover in section;

[0019] Figure 3 shows the electronic equipment along Figure 1 The cross section marked III-III in the figure;

[0020] Figure 4 A perspective view showing a secondary carrier wafer of an electronic device; and

[0021] Figure 5 A longitudinal section through a variant embodiment of an electronic device is shown. DETAILED DESCRIPTION

[0022] Figures 1 to 4 The electronic device 1 shown comprises a main carrier wafer 2 made of dielectric material, for example with a rectangular outline, having a back side 3 and a front side 4 and provided with an integrated electrical connection network 5 electrically connecting the positive pads on the front side to the back pads on the back side.

[0023] The electronic device 1 comprises, for example, a first electronic integrated circuit chip 6 having a rectangular outline, the first electronic integrated circuit chip 6 having a back side 7 and a front side 8 and being mounted above the front side 4 of a main carrier wafer 2 via an adhesive layer, the adhesive layer being inserted between the front side 4 of the main carrier wafer 2 and the back side 7 of the first chip 6.

[0024] The first chip 6 is connected to the electrical connection network 5 by means of electrical connection lines 8a linking the positive pads of the first chip 6 to the positive pads of the main carrier wafer 2. According to a variant embodiment, the first chip 6 can be connected to the electrical connection network 5 by means of electrical connection elements between pads of the front side 4 of the main carrier wafer 2 and pads of the back side 16 of the first chip 6.

[0025] The electronic device 1 comprises a secondary carrier wafer 10 made of a dielectric material, comprising a platform 11 located above and at a distance from a first chip 6, and having a back side 12 and a front side 13. The platform 11, for example having a rectangular outline, extends partially above and at a distance from the first chip 6, and partially laterally beyond the first chip 6.

[0026] The secondary carrier wafer 10 comprises a susceptor 14 which is laterally directed to the first chip 6 relative to the back side 12 of the platform 11 and which protrudes in the direction of the front side 8 of the primary carrier wafer 2 .

[0027] The electronic device 1 comprises a second electronic integrated circuit chip 15 having a back side 16 and a front side 17 and mounted over the front side 13 of the platform 11 via an adhesive layer interposed between the front side 13 of the platform and the back side 16 of the second chip 15 .

[0028] The secondary carrier wafer 10 is provided with an integrated electrical connection network 18, which comprises back pads of the back end face 19 of the base 14 facing the front side 8 of the primary carrier wafer 2 and positive pads of the front side 13 of the platform 11. To this end, the integrated electrical connection network 18 comprises, for example, integrated tracks of the platform 11 and integrated vias of the base 14.

[0029] The second chip 15 is connected to the electrical connection network 18 via electrical connection lines 20, which connect the positive pads of the second chip 15 to the positive pads of the platform 11. According to a variant embodiment, the second chip 13 can be connected to the electrical connection network 18 via electrical connection elements between the pads of the front side 13 of the platform 11 and the pads of the back side 16 of the second chip 13.

[0030] The back pads of the back face 19 of the base 14 are connected to the positive pads of the electrical connection network 5 of the main carrier wafer 2 by local point-like electrical connections 21 formed by dots of conductive adhesive or solder bumps.

[0031] Thus, the second chip 15 is directly connected to the electrical connection network 5 of the primary carrier wafer 2 via the electrical connection network 18 of the secondary carrier wafer 10. Thus, potential electrical losses are reduced.

[0032] The local point-shaped electrical connections 21 allow the secondary carrier wafer 10 to be attached over the primary carrier wafer 2. However, a dielectric adhesive may further be inserted between the front side 8 of the primary carrier wafer 2 and the back side 19 of the pedestal 14 of the secondary carrier wafer 10.

[0033] The electronic device 1 further comprises a support spacer 22 , for example in the form of a partial plate, which is located between the primary carrier wafer 2 and the platform 11 of the secondary carrier wafer 10 , with a bonding adhesive interposed therebetween.

[0034] The sub-carrier wafer 10 can be manufactured in the following manner.

[0035] An initial monolithic wafer having parallel opposing faces and a thickness corresponding to the distance between the front side 13 of the platform 11 and the back side 19 of the base 14 is provided. This initial wafer is provided with a network 18 of electrical connections.

[0036] The thickness of this initial wafer is locally reduced by machining so as to obtain the platform 11 and to leave the pedestal 14. Of course, the removed portion of the initial wafer does not include any part of the electrical connection network 18.

[0037] According to an exemplary embodiment, the electronic device 1 comprises the following arrangement.

[0038] Consider both portrait and landscape orientations.

[0039] The first chip 6 includes two light sensors 23 and 24 spaced apart longitudinally.

[0040] The platform 11 at least partially covers the portion of the chip 6 having the light sensor 23 at a certain distance and does not cover the portion of the chip 6 having the light sensor 24 .

[0041] The second chip 13 has a light sensor 25 on its front side 17 .

[0042] The electronic device 1 also includes a third electronic integrated circuit chip 26, which has a back side 27 and a front side 28, and is mounted on the front side 8 of the main carrier wafer 2, on one side of the portion of the first chip 6 having the light sensor 23 and at a certain distance away from the portion of the first chip 6 having the light sensor 23.

[0043] The third chip 26 has a light emitter 30 in its front side 28 and is connected to the electrical connection network 5 of the main carrier wafer 2, for example by means of a connection between the back pads of the back side 27 of the third chip 26 and the positive pads of the main carrier wafer 2 and by means of wires 31 linking the positive pads of the third chip 26 and the positive pads of the main carrier wafer 2. According to a variant embodiment, the third chip 26 can be connected to the electrical connection network 5 by means of electrical connection elements between the pads of the front side 4 of the main carrier wafer 2 and the pads of the back side 27 of the third chip 26.

[0044] Advantageously, the light sensors 23 and 24 and the light emitter are longitudinally aligned and the light sensor 25 of the second chip 15 is located substantially above the light sensor 23 of the first chip 6 .

[0045] According to one particular arrangement, the support spacer 22 covers the light sensor 23 of the first chip 6 and is made of a transparent material. The adhesive between the first chip 6 and the support spacer 22 is transparent.

[0046] The base 14 includes two legs 32 and 33 which are laterally spaced apart and are located on one side of the third chip 26 relative to the first chip 6 and on either side of the third chip 26 .

[0047] On the side of the third chip 26 , the platform 11 of the auxiliary carrier wafer 10 has a recess 34 .

[0048] The electronic device 1 comprises a cover 35 comprising a front or front wall 36 and a peripheral wall 37 extending rearwardly from the front wall 36 and having a rear face 38 located on top of a peripheral area of ​​the front side 8 of the main carrier wafer 2 .

[0049] The cover 35 is attached to the main carrier wafer 2 via an adhesive bead 39 inserted between the front side 8 of the main carrier wafer 2 and the back end face 38 of the peripheral wall 37 .

[0050] The cover 35 comprises a transverse internal partition 40 which projects rearwardly from the front wall 36 and joins the longitudinal sides of the peripheral wall 37 .

[0051] The internal partition 40 has a rear recess 41, the first chip 6 passes through the rear recess 41, and the internal partition 40 defines two chambers 42 and 43 above the main carrier chip 2, so that the optical sensor 23 of the first chip 6, the auxiliary carrier chip 10, the second chip 15, the supporting spacer 22 and the third chip 26 are located in the chamber 42 and the optical sensor 24 of the first chip 6 is located in the chamber 43.

[0052] Adhesive beads 44 are inserted between the inner partition 40 and the first chip 6 in the recess 41 , and between the inner partition 40 and the main carrier wafer 2 on either side of the first chip 6 .

[0053] The front wall 36 of the cover 35 has through holes 45 and 46, which are positioned facing the chambers 42 and 43 and are provided with optical elements 47 and 48 through which light can pass, which optical elements are, for example, plate-shaped. The optical elements 47 and 48 can abut against the inner shoulders of the openings 45 and 46 and are bonded to the front wall 36 of the cover 35.

[0054] The back side of the optical element 47 is provided with an opaque layer 49 , and the opaque layer 49 is provided with an opening 50 located above the light emitter 30 of the third chip 26 and an opening 51 located above the light sensor of the second chip 15 .

[0055] The optical element 48 is located above the light sensor 25 of the first chip 6 .

[0056] According to a variant embodiment, the optical sensor 47 may be replaced by two optical elements mounted in specific through holes of the front wall 36 , these optical elements being positioned facing the light emitter 30 and the light sensor 25 .

[0057] The electronic device 1 can operate in the following manner.

[0058] The light emitter 30 of the third chip 26 emits light, for example infrared radiation, outwardly through the opening 50 of the opaque layer 49 and the optical element 47. Due to the presence of the recess 34 of the secondary carrier wafer 10, the emitted light can directly reach the optical element 47. The emitted optical radiation present in the cavity 42 is detected by the optical sensor 23 of the first chip 6.

[0059] The light sensor 24 of the first chip 6 detects external light radiation passing through the optical element 48 .

[0060] Light sensor 25 of second chip 15 detects external light radiation through optical element 47 and opening 51 of opaque layer 49. Second chip 15 may be insensitive to radiation emitted by third chip 26 by means of filtering or by sequencing the operation of light sensor 25 and light emitter 30.

[0061] The electronic device 1 may constitute means for detecting the approach of a body by processing signals generated from the light sensors 23 , 24 , and 25 .

[0062] By means of the various arrangements described, the electronic device 1 is particularly compact.

[0063] according to Figure 5 In a variant embodiment shown, the support spacer 22 is omitted and the platform 11 of the secondary carrier wafer 10 comprises a support base 52 which projects backwards relative to the platform 11 and abuts against the top of the first chip 6 and / or the primary carrier wafer 2. The base is positioned transversely to the base 14 on the side of the internal partition 40.

[0064] The support base 52 may include at least one standoff attached to the top of the front side 8 of the first chip 6 by an adhesive bead, and / or at least one standoff extending laterally to the first chip 6 and attached to the top of the front side 4 of the main carrier wafer 2 by an adhesive bead.

Claims

1. An electronic device, comprising: a main carrier wafer having a back side and a front side and provided with an integrated electrical connection network extending between said front side and said back side; a first electronic chip mounted on top of the front side of said main carrier wafer and connected to said electrical connection network of said main carrier wafer; a secondary carrier wafer comprising a platform and a pedestal protruding rearwardly relative to the platform, the platform extending above the first electronic chip and having a back side and a front side, wherein the pedestal extends laterally relative to the first chip and extends rearwardly in the direction of the primary carrier wafer so as to have a back side facing the front side of the primary carrier wafer; as well as a second electronic chip mounted on top of the front side of the platform; wherein the auxiliary carrier wafer is provided with an integrated electrical connection network, the integrated electrical connection network comprising at least one positive pad on the front side of the platform, and at least one back pad on the back side of the base, the at least one positive pad being connected to the second electronic chip, and the at least one back pad being connected to the electrical connection network of the main carrier wafer; The auxiliary carrier wafer further includes a supporting base, which protrudes backward relative to the platform and abuts against the top of the first electronic chip. 2 . The apparatus of claim 1 , wherein the platform of the secondary carrier wafer is separated from the first electronic chip by a distance. 3 . The apparatus of claim 2 , further comprising a support spacer interposed between the first electronic chip and the platform of the secondary carrier wafer. 4 . The device of claim 1 , wherein the front side of the first electronic chip is provided with at least one light sensor.

5. The device of claim 1, wherein the front side of the second electronic chip is provided with at least one light sensor.

6. The device of claim 1, further comprising a third electronic chip mounted on top of the front side of the main carrier wafer and having a light emitter disposed on the front side of the third electronic chip.

7. An electronic device comprising: a main carrier wafer having a back side and a front side and provided with an integrated electrical connection network extending between said front side and said back side; a first electronic chip mounted on top of the front side of said main carrier wafer and connected to said electrical connection network of said main carrier wafer; a secondary carrier wafer comprising a platform and a pedestal protruding rearwardly relative to the platform, the platform extending above the first electronic chip and having a back side and a front side, wherein the pedestal extends laterally relative to the first chip and extends rearwardly in the direction of the primary carrier wafer so as to have a back side facing the front side of the primary carrier wafer; as well as a second electronic chip mounted on top of the front side of the platform; wherein the auxiliary carrier wafer is provided with an integrated electrical connection network, the integrated electrical connection network comprising at least one positive pad on the front side of the platform, and at least one back pad on the back side of the base, the at least one positive pad being connected to the second electronic chip, and the at least one back pad being connected to the electrical connection network of the main carrier wafer; A cover is mounted on the primary carrier wafer and defines a cavity in which the secondary carrier wafer and the second electronic chip are located.

8. The device according to claim 7, wherein the front wall of the cover has at least one opening provided with an optical element allowing light to pass through.

9. An electronic device, comprising: a main carrier wafer having a back side and a front side and provided with an integrated electrical connection network extending between said front side and said back side; a first electronic chip mounted on top of the front side of said main carrier wafer and connected to said electrical connection network of said main carrier wafer; a secondary carrier wafer comprising a platform and a pedestal protruding rearwardly relative to the platform, the platform extending above the first electronic chip and having a back side and a front side, wherein the pedestal extends laterally relative to the first chip and extends rearwardly in the direction of the primary carrier wafer so as to have a back side facing the front side of the primary carrier wafer; as well as a second electronic chip mounted on top of the front side of the platform; wherein the auxiliary carrier wafer is provided with an integrated electrical connection network, the integrated electrical connection network comprising at least one positive pad on the front side of the platform, and at least one back pad on the back side of the base, the at least one positive pad being connected to the second electronic chip, and the at least one back pad being connected to the electrical connection network of the main carrier wafer; A cover is mounted on top of the primary carrier wafer and has an internal partition defining two chambers, the secondary carrier wafer and the second electronic chip are located in one of the chambers, and the first electronic chip passes through the internal partition.

10. The device according to claim 9, wherein the front wall of the cover has at least one opening provided with an optical element allowing light to pass through.

11. The device of claim 9, wherein the front side of the first electronic chip is provided with at least one light sensor.

12. The device of claim 9, wherein the front side of the second electronic chip is provided with at least one light sensor.

13. The device of claim 9, further comprising a third electronic chip mounted on top of the front side of the main carrier wafer and having a light emitter disposed on the front side of the third electronic chip.

14. The apparatus of claim 9, wherein the platform of the secondary carrier wafer is separated from the first electronic chip by a distance.

15. The apparatus of claim 9, further comprising a support spacer interposed between the first electronic chip and the platform of the secondary carrier wafer.

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