A high-reliability printed circuit board suitable for smart wearable devices

Abstract

The present invention discloses a high-reliability printed circuit board suitable for intelligent wearable devices, comprising a first power layer board (1), a signal layer board (2), a first ground layer board (3), a power layer board (4), a second ground layer board (5), an electromagnetic shielding layer board (6), an impedance layer board (7), and a third ground layer board (8) stacked in sequence from top to bottom. The present invention greatly increases the number of sensors of the intelligent wearable device electronic product by placing components on a single side of 8 layers, and at the same time reasonably arranges the sensor components of each layer board, arranges the signal line and the ground line adjacently at different levels, thereby greatly reducing electromagnetic interference, improving the accuracy, reliability and stability of the electronic signal, and making it more flexible to be applied to the intelligent wearable device electronic product.

Description

Technical Field

[0001] The invention relates to a circuit board, and in particular to a high-reliability printed circuit board suitable for an intelligent wearable device. Background Art

[0002] Circuit boards are important electronic components of smart wearable devices. They are carriers of electronic components and load-bearing layers for connecting electronic component circuits. In the prior art, when designing circuit boards for smart wearable devices used for circuit modules, in order to adapt to the small, delicate and sophisticated smart wearable devices, as few sensor components as possible are generally placed, making the functions of smart wearable devices relatively single. This is because the more sensors integrated on traditional circuit boards, the more problems such as electromagnetic compatibility and heat dissipation will seriously affect product quality. However, as smart wearable devices become more and more popular with users, their functions are becoming more and more complex, and more and more sensors and various components are required. Therefore, if the traditional method of designing circuit boards is continued, it is easy to cause electromagnetic interference, heat dissipation and other problems.

[0003] Therefore, providing a multilayer high-efficiency circuit board with a reasonable structure that can effectively improve reliability and stability is a technical problem that needs to be solved urgently in the industry. Summary of the invention

[0004] The present invention aims to solve the above-mentioned problems in the prior art and proposes a high-reliability printed circuit board suitable for smart wearable devices.

[0005] In order to solve the above technical problems, the technical solution proposed in the present invention is to design a high-reliability printed circuit board suitable for smart wearable devices, which includes a first power layer board, a signal layer board, a first ground layer board, a second power layer board, a second ground layer board, an electromagnetic shielding layer board, an impedance layer board, and a third ground layer board stacked in sequence from top to bottom; wherein the first power layer board is used to install a CPU chip, a memory chip, a Beidou chip, a GPS chip, a power chip, a WIFI chip, a gravity sensor, and a crystal oscillator; the signal layer board is used to set the ground wire of the memory chip and the crystal oscillator and the CPU chip to connect the Beidou chip, the GPS chip, the power chip, the WIFI chip, and the signal control line of the gravity sensor; the first ground layer The first board is used to set the ground wires of the CPU chip, the power chip and the memory chip; the second power layer board is used to set the ground wires of the CPU chip and the memory chip, as well as the signal control lines of the WIFI chip, the Beidou chip, the GPS chip and the gravity sensor; the second grounding layer board is used to set the ground wires of the CPU chip and the crystal oscillator; the electromagnetic shielding layer board is used to set the ground wire of the CPU chip, as well as the signal control lines of the power chip, the GPS chip, the Beidou chip and the WIFI chip; the impedance layer board is used to set the power wires of the CPU chip, the memory chip, the Beidou chip, the GPS chip, the power chip, the WIFI chip and the gravity sensor; the third grounding layer board is used to set the ground wire.

[0006] The first power layer board, signal layer board, first ground layer board, second power layer board, second ground layer board, electromagnetic shielding layer board, impedance layer board, and third ground layer board all have through holes, and the through holes include at least two separated on the left and right, and the lines between the layer boards can be connected through the through holes.

[0007] The WIFI chip, Beidou chip, GPS chip and gravity sensor use power supplies with the same voltage level.

[0008] The CPU chip is arranged in the middle of the printed circuit board, and the memory chip, Beidou chip, GPS chip, power chip, WIFI chip, gravity sensor and crystal oscillator surround the CPU chip.

[0009] The first power layer board, the signal layer board, the first ground layer board, the second power layer board, the second ground layer board, the electromagnetic shielding layer board, the impedance layer board, and the third ground layer board are made of chemical nickel-gold OSP boards.

[0010] The nickel plating thickness of the first power layer board, signal layer board, first ground layer board, second power layer board, second ground layer board, electromagnetic shielding layer board, impedance layer board, and third ground layer board is greater than 100μm, the chemical gold plating thickness ranges from 0.03μm to 1.2μm, the surface copper thickness is 0.5OZ, and the OSP plating thickness ranges from 0.2 to 0.5μm.

[0011] The first power layer board, signal layer board, first ground layer board, second power layer board, second ground layer board, electromagnetic shielding layer board, impedance layer board and third ground layer board all adopt a mounting structure for placing components on a single side.

[0012] The beneficial effects of the present invention are as follows: under the actual demand that smart wearable devices are becoming more and more popular with users, their functions are becoming more and more complex, and more and more components are required, by placing complex and large numbers of components and wiring on a multi-layer circuit board, and by reasonably planning the wiring of ground wires and signal control lines, the electromagnetic interference between the components is suppressed, the performance stability and environmental adaptability of the components are enhanced, and better effects are achieved in terms of electromagnetic compatibility, drop, immersion, etc., thereby improving the reliability and stability of the product, so that the smart wearable device can integrate more sensors and components, increase the multiple functions of the smart wearable device, and improve the user's satisfaction with the smart wearable device; the present invention greatly increases the number of sensors of the smart wearable device electronic products by placing components on a single side of 8 layers, and at the same time, the sensor components of each layer of the board are reasonably arranged, and the signal line and the ground line are arranged adjacently at different levels, thereby greatly reducing electromagnetic interference, improving the accuracy, reliability and stability of the electronic signal, so that it can be more flexibly applied to smart wearable device electronic products. BRIEF DESCRIPTION OF THE DRAWINGS

[0013] Figure 1 It is a structural schematic diagram of a preferred embodiment of the present invention;

[0014] Figure 2 It is a schematic plan view of the first power layer board of a preferred embodiment of the present invention;

[0015] Figure 3 It is a schematic plan view of a signal layer board of a preferred embodiment of the present invention;

[0016] Figure 4 It is a schematic plan view of the first grounding layer plate of a preferred embodiment of the present invention;

[0017] Figure 5 It is a plan view of the second power supply layer board of a preferred embodiment of the present invention;

[0018] Figure 6 It is a schematic plan view of the second grounding layer plate of a preferred embodiment of the present invention;

[0019] Figure 7 It is a schematic plan view of an electromagnetic shielding layer plate of a preferred embodiment of the present invention;

[0020] Figure 8 It is a schematic plan view of an impedance layer plate of a preferred embodiment of the present invention;

[0021] Fig. 9 FIG. 1 is a schematic plan view of a third grounding layer plate according to a preferred embodiment of the present invention. DETAILED DESCRIPTION

[0022] In order to make the purpose, technical solution and advantages of the present invention more clearly understood, the present invention is further described in detail below in conjunction with the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are only used to explain the present invention and are not used to limit the present invention.

[0023] The invention discloses a high-reliability printed circuit board suitable for intelligent wearable devices, aiming to solve the problems of few integrated sensors and weak anti-electromagnetic interference caused by the prior art, and ensure the reliability, stability and safety of the circuit board.

[0024] See also Figure 1 The schematic diagram of the structure of the preferred embodiment of the present invention is shown, the present invention comprises a first power layer board 1, a signal layer board 2, a first ground layer board 3, a second power layer board 4, a second ground layer board 5, an electromagnetic shielding layer board 6, an impedance layer board 7, and a third ground layer board 8 stacked in sequence from top to bottom; wherein the first power layer board 1 is used to install a CPU chip 9, a memory chip 10, a Beidou chip 11, a GPS chip 12, a power chip 13, a WIFI chip 14, a gravity sensor 18, and a crystal oscillator 19; the signal layer board 2 is used to set the ground wire of the memory chip and the crystal oscillator and the signal control wire of the CPU chip connecting the Beidou chip, the GPS chip, the power chip, the WIFI chip, and the gravity sensor; the first ground layer board 3, Used to set the ground wire of the CPU chip, the power chip and the memory chip; the second power layer board 4 is used to set the ground wire of the CPU chip and the memory chip, as well as the signal control line of the WIFI chip, Beidou chip, GPS chip and gravity sensor; the second ground layer board 5 is used to set the ground wire of the CPU chip and the crystal oscillator; the electromagnetic shielding layer board 6 is used to set the ground wire of the CPU chip, as well as the signal control line of the power chip, GPS chip, Beidou chip and WIFI chip; the impedance layer board 7 is used to set the power line of the CPU chip, the memory chip, Beidou chip, GPS chip, the power chip, WIFI chip and the gravity sensor; the third ground layer board 8 is used to set the ground wire.

[0025] See also Figure 2 The schematic diagram of the first power layer is shown in FIG. 1 , which is provided with necessary components and other sensors. Figure 3 The schematic diagram of the signal layer shown in FIG. 1 is a plan view of a signal layer board, which is provided with the ground line of the memory chip and the signal control line of the CPU chip, so as to provide a wider electrical isolation area between the signal control line of the CPU chip and other low-voltage components. Figure 4The schematic diagram of the first grounding layer is shown in FIG. This layer is used to set the ground wires of the power chip and the memory chip, but does not place other signal control wires, thereby reducing the area of ​​the high-frequency AC loop and making the analog signal layer and the digital ground layer not overlap. Figure 5 The schematic diagram of the second power layer is shown in Figure 1. This layer is used to set the ground wires of the CPU chip and the memory chip, as well as the signal control wires of the WIFI chip, Beidou chip, GPS chip, and gravity sensor. Components with the same power level and the same type are placed together as much as possible. This allows for the layout of multi-layer PCB boards, and the use of components with different power and ground types is reasonably arranged, which greatly facilitates the segmentation of the inner power layer and can effectively improve the anti-interference ability between components. Figure 6 The second grounding layer is a schematic diagram of the plane, which is used to set the ground wires of the CPU chip and the crystal oscillator. The ground wires and signal wires are arranged alternately to avoid the signal layers being close to each other and the signal isolation being poor. Figure 7 The schematic diagram of the electromagnetic shielding layer shown in the figure shows that the layer is equipped with the ground line of the CPU chip, as well as the signal control lines of the power chip, GPS chip, Beidou chip, and WIFI chip. Each signal layer is directly adjacent to the inner power layer and is effectively isolated from other signal layers, making crosstalk less likely to occur. It can effectively shield the interference of the outside world to the signal layer. Figure 8 The schematic diagram of the impedance layer shown in the figure shows that the power lines of the CPU chip, memory chip, Beidou chip, GPS chip, power chip, WIFI chip and gravity sensor are set on this layer, so that the ground protection of this layer and the third ground layer is tightly coupled. The interference of printed wires mainly includes interference introduced between wires and interference introduced by power lines. Through this reasonable arrangement and layout of routing and grounding, the interference source can be effectively reduced. Fig. 9 The schematic plan view of the third grounding layer is shown. The layer has a large protective ground line, which can effectively reduce interference.

[0026] In a preferred embodiment, the first power layer board 1, the signal layer board 2, the first ground layer board 3, the second power layer board 4, the second ground layer board 5, the electromagnetic shielding layer board 6, the impedance layer board 7, and the third ground layer board 8 all have through holes 16, and the through holes include at least two separated on the left and right, and the lines between the layer boards can be connected through the through holes.

[0027] In a preferred embodiment, the WIFI chip, Beidou chip, GPS chip and gravity sensor use power supplies of the same voltage level. The CPU chip 9 is arranged in the middle of the printed circuit board, and the memory chip 10, Beidou chip 11, GPS chip 12, power chip 13, WIFI chip 14, gravity sensor and crystal oscillator are arranged around the CPU chip to reduce the total length of various lines.

[0028] In the present invention, the first power layer board 1, the signal layer board 2, the first ground layer board 3, the second power layer board 4, the second ground layer board 5, the electromagnetic shielding layer board 6, the impedance layer board 7, and the third ground layer board 8 are made of chemical nickel-gold OSP board. A total of 8 layers are designed, the finished product is a continuous piece, and the thickness of the whole board is 1.0mm±10%; all BGA pads must adopt OSP technology, and the connecting ribs must use stamp holes.

[0029] In a preferred embodiment, the nickel plating thickness of the first power layer 1, signal layer 2, first ground layer 3, second power layer 4, second ground layer 5, electromagnetic shielding layer 6, impedance layer 7, and third ground layer 8 is greater than 100μm (standard), the thickness of the chemical gold plating ranges from 0.03μm to 1.2μm, and the thinnest part shall not be less than 0.03μm; the hole copper thickness is greater than 0.7mil for through holes, and the copper filling process is 0.4mmPITCH BGA blind holes require electroplating filling process; the surface copper thickness is 0.5OZ; the OSP plating thickness ranges from 0.2 to 0.5μm (standard). The OZ is a unit of length in the PCB industry. 1OZ means that the average weight of copper foil on an area of ​​1 square foot is 28.35g, and the weight per unit area is used to represent the average thickness of copper foil.

[0030] The first power layer board 1, signal layer board 2, first ground layer board 3, second power layer board 4, second ground layer board 5, electromagnetic shielding layer board 6, impedance layer board 7 and third ground layer board 8 all adopt a mounting structure for placing components on a single side.

[0031] In a preferred embodiment, the minimum aperture of the mechanical hole of the circuit board is 10mil, and the minimum aperture of the laser hole is 4mil. The minimum line width / line spacing of the outer layer of the circuit board is 4 / 4mil, and the line width / line spacing of the finished product is in accordance with Gerber ±20﹪. The mark point is a circle with a diameter of 1mm. The UL MARK adopts the text surface method S surface, the DATE CODE adopts the text surface method S surface, and the board factory material number adopts the text surface method S surface. The solder mask layer of the circuit board is 5 to 30um higher than the surface copper (special attention: to ensure that there is no copper leakage and no yellowing), the plugging method is full plugging, the solder mask tolerance is in accordance with GERBER ±0.03mm, but the routing cannot leak copper; the black oil bridge with a spacing of less than 7.5mil between two PADs cannot be deleted, and the green oil is allowed to be 1mil on the PAD. The silk screen layer type of the circuit board is double-sided, the color is white (Standard), and some characters on the PAD can be slightly moved or deleted, but the component positioning frame silk screen cannot be moved. The circuit board is formed by CNC, the BGA pad tolerance is ±10% (diameter greater than or equal to 0.3mm), ±15% (diameter less than 0.3mm), (Note: the minimum diameter of the BGA pad shall not be less than 0.22mm), all BGA pads must use OSP technology, all VIAs are plugged and covered with green oil (single-sided windowed holes are plugged from the unopened side, double-sided unopened holes are plugged on both sides, and double-sided windowed VIAs are not plugged); BGA surface lead wires need to be added with teardrops; external tolerance ±0.1mm (Standard); board bending / board warping 0.7﹪ (Standard). External dimensions single board (tolerance) ±0.1mm, continuous piece (tolerance) ±0.1mm. The circuit board requires impedance matching, and the impedance requirement is 50ohm (six-layer board ±10% error, four-layer board ±15%). The circuit board without inner angle or inner angle less than R0.5MM is made according to R0.5MM. For other items not listed, refer to IPC-6012CLS2 technical specification. Test method reference standard: IPC TM650; reference electrical measurement continuity resistance 20Ω@5V; insulation resistance 10MΩ@100V.

[0032] The above technical solution greatly increases the number of sensors of smart wearable electronic products by placing components on a single side of the 8th layer. At the same time, the sensor components on each layer of the board are reasonably arranged, and the signal lines and ground lines are arranged adjacently at different levels, thereby greatly reducing electromagnetic interference and improving the accuracy, reliability and stability of electronic signals, making it more flexibly applicable to smart wearable electronic products.

[0033] The above embodiments are for illustration only and are not intended to be limiting. Any equivalent modifications or changes made thereto without departing from the spirit and scope of the present application shall be included in the scope of the claims of the present application.

Claims

1. A high-reliability printed circuit board suitable for smart wearable devices, characterized in that: It comprises a first power layer board (1), a signal layer board (2), a first ground layer board (3), a second power layer board (4), a second ground layer board (5), an electromagnetic shielding layer board (6), an impedance layer board (7), and a third ground layer board (8) which are stacked in sequence from top to bottom; The first power layer board (1) is used to install a CPU chip (9), a memory chip (10), a Beidou chip (11), a GPS chip (12), a power chip (13), a WIFI chip (14), a gravity sensor (18), and a crystal oscillator (19); The signal layer board (2) is used to set the ground wire of the storage chip and the crystal oscillator and the signal control wire of the CPU chip connected to the Beidou chip, the GPS chip, the power chip, the WIFI chip, and the gravity sensor; The first grounding layer plate (3) is used to set the ground wires of the CPU chip, the power chip and the memory chip; The second power layer board (4) is used to set the ground lines of the CPU chip and the memory chip, as well as the signal control lines of the WIFI chip, Beidou chip, GPS chip, and gravity sensor; The second grounding layer plate (5) is used to set the ground wires of the CPU chip and the crystal oscillator; The electromagnetic shielding layer plate (6) is used to set the ground line of the CPU chip, and the signal control lines of the power chip, GPS chip, Beidou chip, and WIFI chip; The impedance layer plate (7) is used to set the power lines of the CPU chip, memory chip, Beidou chip, GPS chip, power chip, WIFI chip, and gravity sensor; The third grounding layer plate (8) is used to set a ground line; The first power layer board (1), the signal layer board (2), the first ground layer board (3), the second power layer board (4), the second ground layer board (5), the electromagnetic shielding layer board (6), the impedance layer board (7), and the third ground layer board (8) are all provided with through holes (16), wherein the through holes include at least two through holes separated on the left and right sides, and the connection lines between the layer boards can be connected through the through holes; The WIFI chip, Beidou chip, GPS chip and gravity sensor use power supplies with the same voltage level.

2. The high-reliability printed circuit board suitable for smart wearable devices according to claim 1, characterized in that: The CPU chip (9) is arranged in the middle of the printed circuit board, and the memory chip (10), Beidou chip (11), GPS chip (12), power chip (13), WIFI chip (14), gravity sensor and crystal oscillator surround the CPU chip.

3. The high-reliability printed circuit board suitable for smart wearable devices according to claim 1, characterized in that: The first power layer board (1), the signal layer board (2), the first ground layer board (3), the second power layer board (4), the second ground layer board (5), the electromagnetic shielding layer board (6), the impedance layer board (7), and the third ground layer board (8) are made of chemical nickel-gold OSP boards.

4. The high-reliability printed circuit board suitable for smart wearable devices as claimed in claim 3, characterized in that: The nickel plating thickness of the first power layer board (1), the signal layer board (2), the first ground layer board (3), the second power layer board (4), the second ground layer board (5), the electromagnetic shielding layer board (6), the impedance layer board (7), and the third ground layer board (8) is greater than 100 μm, the chemical gold plating thickness ranges from 0.03 μm to 1.2 μm, the surface copper thickness is 0.5 OZ, and the OSP plating thickness ranges from 0.2 to 0.5 μm.

5. The high-reliability printed circuit board suitable for smart wearable devices according to any one of claims 1 to 4, characterized in that: The first power layer board (1), the signal layer board (2), the first ground layer board (3), the second power layer board (4), the second ground layer board (5), the electromagnetic shielding layer board (6), the impedance layer board (7) and the third ground layer board (8) all adopt a mounting structure for placing components on a single side.

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