Basic circuit board manufacturing process and basic circuit board

Abstract

The invention relates to a basic circuit board manufacturing process and a basic circuit board, comprising: a through hole for conducting up and down conduction is arranged at a chip pad of a packaging substrate, a silicon chip is welded on the upper part of the chip pad, and a heat-conducting copper pad is arranged at the bottom of the chip pad of the packaging substrate; a copper pad slot and a clamping copper column are manufactured on a ceramic substrate, more than three clamping holes are arranged in the thickness direction of the packaging substrate, the diameter of the clamping copper column is 95% to 99% of the aperture of the clamping hole, the clamping copper column is assembled with the clamping hole, the heat-conducting copper pad is located in the copper pad slot, and a gap of 3 to 20 μm is arranged between the peripheral side and the bottom of the heat-conducting copper pad and the copper pad slot; a copper plating process is used to fill the gap between the peripheral side and the bottom of the heat-conducting copper pad and the copper pad slot, and at the same time fill the gap between the clamping copper column and the clamping hole, so as to realize the assembly of the packaging substrate and the ceramic substrate, the packaging substrate acts as an intermediary, and the thermal conductive copper pad slot of the chip and the ceramic substrate are integratedly connected by using the electroplating copper process, so as to greatly improve the heat dissipation efficiency.

Description

Technical Field

[0001] The present invention relates to the technical field of electronic components, and in particular to a basic circuit board manufacturing process and a manufactured basic circuit board. Background Art

[0002] Electronic components have been integrated into every aspect of our lives.

[0003] Ceramic substrate refers to a special process board in which copper foil is directly bonded to the surface (single or double sides) of alumina (Al2O3) or aluminum nitride (AlN) ceramic substrate at high temperature, and the thickness of the copper layer can be more than 2mm. The composite substrate has excellent electrical insulation performance, high thermal conductivity, excellent soft solderability and high adhesion strength, and can be etched with various patterns like PCB boards, and has a large current carrying capacity. Therefore, ceramic substrates have become the basic materials for high-power power electronic circuit structure technology and interconnection technology.

[0004] In the packaging of chips and ceramic substrates in the prior art, heat dissipation of the chips is an important issue that needs to be solved. Summary of the invention

[0005] The technical problem to be solved by the present invention is to propose a basic circuit board manufacturing process with high heat dissipation efficiency, including

[0006] A. A via hole is provided at the chip pad of the package substrate, and the via hole is filled with a solid conductive hole through copper plating and hole filling process. The via hole is more than 9 holes distributed in an array. The silicon chip is welded on the upper part of the chip pad, and a thermal conductive copper pad is provided at the bottom of the chip pad of the package substrate;

[0007] B. A copper pad slot and a clamping copper column are made on the ceramic substrate by etching process, more than three clamping holes are provided in the thickness direction of the package substrate, more than three clamping copper columns are provided on the ceramic substrate 2, the diameter of the clamping copper column is 95% to 99% of the aperture of the clamping hole, the clamping copper column is assembled with the clamping hole, the thermal conductive copper pad is located in the copper pad slot, and a gap of 3 to 20 μm is provided between the peripheral side and the bottom of the thermal conductive copper pad and the copper pad slot;

[0008] C. Through the copper plating process, fill the gap between the surrounding side and bottom of the thermal conductive copper pad and the copper pad slot, and fill the gap between the clamping copper column and the clamping hole.

[0009] In this embodiment, the copper plating process includes chemical copper deposition and electrolytic copper plating.

[0010] In this embodiment, the thickness of the copper layer of chemical copper deposition is 1 to 3 μm;

[0011] When electroplating copper, it is a double-circuit electroplating process, and electroplating clip clamping points are set on both the ceramic substrate and the packaging substrate;

[0012] When the gap between the thermal copper pad and the copper pad slot is 3 to 20 μm, a double-loop electroplating process is used for electroplating, and electroplating is performed through the clamping points of the electroplating clips on the ceramic substrate and the packaging substrate at the same time; when the gap between the thermal copper pad and the copper pad slot is less than 3 μm, a single-loop electroplating process is used, and electroplating is performed only through the clamping points of the electroplating clips on the ceramic substrate or the packaging substrate.

[0013] A basic circuit board comprises a silicon chip, a ceramic substrate and a packaging substrate; the silicon chip is a chip with double-sided pads, a via hole for upper and lower conduction is arranged at the chip pad of the packaging substrate, the via hole is filled with solid conductive holes through copper plating and hole filling processes, the via hole is more than 9 holes distributed in an array, the silicon chip is welded on the upper part of the chip pad, and a thermal conductive copper pad is arranged at the bottom of the chip pad of the packaging substrate;

[0014] The packaging substrate is provided with a thermally conductive copper pad, which is located on one side or the bottom of the silicon chip, and the ceramic substrate is provided with a copper pad slot;

[0015] More than three clamping holes are provided in the thickness direction of the package substrate, and more than three clamping copper pillars are provided on the ceramic substrate. The diameter of the clamping copper pillars is 95% to 99% of the aperture of the clamping holes. After the clamping copper pillars are assembled with the clamping holes, the thermal conductive copper pad is located in the copper pad clamping groove, and a gap of 3 to 20 μm is provided between the peripheral side and the bottom of the thermal conductive copper pad 31 and the copper pad clamping groove;

[0016] Through the copper plating process, the gap between the clamping copper column and the clamping hole is filled, and at the same time, the gap between the thermal conductive copper pad and the copper pad slot is filled to achieve the assembly of the packaging substrate and the ceramic substrate.

[0017] Preferably, the peripheral side of the clamping hole is resin or a combination of resin and fiber.

[0018] Preferably, the clamping hole is provided with a copper-plated hole of the copper layer; and the clamping copper column is a copper clamping copper column.

[0019] Preferably, the ceramic substrate is a circuit board with copper layers on both sides, the ceramic substrate is provided with a first circuit pattern, and the copper clamping copper column is a part of the first circuit pattern;

[0020] The packaging substrate comprises at least two layers of second circuit patterns, and the copper-plated hole is a part of the second circuit pattern;

[0021] After the copper-plated holes and the copper-clamping copper pillars are assembled through the copper-plating process, the first circuit pattern and the second circuit pattern are assembled.

[0022] Preferably, the copper clamping copper column is higher than other parts of the first circuit pattern; the copper clamping copper column and other parts of the first circuit pattern are made of the same copper layer of the ceramic substrate through different etching processes.

[0023] Preferably, the insulating layer of the packaging substrate is made of one or two of polyimide, BT resin or epoxy resin.

[0024] BT resin is a thermosetting resin composed of bismaleimide (BMI) and triazine as the main resin components, with epoxy resin, polyphenylene ether resin (PPE) or allyl compounds added as modified components.

[0025] Preferably, the insulating layer of the ceramic substrate is aluminum oxide or aluminum nitride.

[0026] Preferably, the bottom wall of the copper pad slot is provided with a thermoelectric conversion layer, and the thermoelectric conversion layer is firmly connected to the bottom wall of the thermally conductive copper pad via the copper plating layer.

[0027] Preferably, the copper plating process includes chemical copper deposition and electrolytic copper plating.

[0028] Preferably, the thickness of the copper layer of chemical copper deposition is 1 to 3 μm;

[0029] When electroplating copper, it is a double-circuit electroplating process, and electroplating clip clamping points are set on both the ceramic substrate and the packaging substrate;

[0030] When the gap between the thermal copper pad and the copper pad slot is 3 to 20 μm, a double-loop electroplating process is used for electroplating, and electroplating is performed through the clamping points of the electroplating clips on the ceramic substrate and the packaging substrate at the same time; when the gap between the thermal copper pad and the copper pad slot is less than 3 μm, a single-loop electroplating process is used, and electroplating is performed only through the clamping points of the electroplating clips on the ceramic substrate or the packaging substrate.

[0031] The invention has the following beneficial effects: the invention relates to a basic circuit board manufacturing process and a basic circuit board, comprising: a through hole for conducting up and down at a chip pad of a packaging substrate, a silicon chip is welded on the upper part of the chip pad, and a thermally conductive copper pad is arranged at the bottom of the chip pad of the packaging substrate; a copper pad slot and a clamping copper column are made on a ceramic substrate, more than three clamping holes are arranged in the thickness direction of the packaging substrate, the diameter of the clamping copper column is 95% to 99% of the aperture of the clamping hole, the clamping copper column is assembled with the clamping hole, the thermally conductive copper pad is located in the copper pad slot, and a gap of 3 to 20 μm is arranged between the peripheral side and the bottom of the thermally conductive copper pad and the copper pad slot; through a copper plating process, the gap between the peripheral side and the bottom of the thermally conductive copper pad and the copper pad slot is filled, and the gap between the clamping copper column and the clamping hole is filled at the same time, so as to realize the assembly of the packaging substrate and the ceramic substrate, the packaging substrate acts as an intermediary, and the thermally conductive copper pad slot of the chip and the ceramic substrate are integratedly connected by using the electroplating copper process, which can greatly improve the heat dissipation efficiency.

[0032] The present invention also relates to a basic circuit board, comprising a silicon chip, a ceramic substrate and a packaging substrate; the silicon chip is a chip with a double-sided pad, and a via hole that is connected up and down is set at the chip pad of the packaging substrate. The via hole is filled with a solid conductive hole through a copper plating and hole filling process. The via hole is more than 9 holes distributed in an array, and the silicon chip is welded on the upper part of the chip pad. A thermally conductive copper pad is set at the bottom of the chip pad of the packaging substrate; the packaging substrate is provided with a thermally conductive copper pad, which is located on one side or the bottom of the silicon chip, and the ceramic substrate is provided with a copper pad. Card slot; more than 3 card holes are provided in the thickness direction of the package substrate, and more than 3 card copper pillars are provided on the ceramic substrate. The diameter of the card copper pillar is 95% to 99% of the aperture of the card hole. After the card copper pillar and the card hole are assembled, the thermal conductive copper pad is located in the copper pad card slot, and a gap of 3 to 20 μm is provided between the peripheral side and bottom of the thermal conductive copper pad 31 and the copper pad card slot; through the copper plating process, the gap between the card copper pillar and the card hole is filled, and at the same time, the gap between the thermal conductive copper pad and the copper pad card slot is filled to realize the assembly of the package substrate and the ceramic substrate. The package substrate acts as an intermediary. The package substrate can be made very thin and made of high heat dissipation materials such as BT. The electroplating copper process is used to realize the integrated connection between the thermal conductive copper pad at the bottom of the chip and the thermal conductive copper pad card slot of the ceramic substrate. The thermal conductive copper pad card slot and the large area copper block on its peripheral side are integrated and tightly combined through the copper plating process, which can greatly improve the heat dissipation efficiency. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The basic circuit board of the present invention is further described below in conjunction with the accompanying drawings.

[0034] Figure 1 The present invention is a basic circuit board manufacturing process flow chart.

[0035] Figure 2 It is an exploded view of a basic circuit board of the present invention from a first viewing angle.

[0036] Figure 3 It is an exploded view of a basic circuit board of the present invention from a second viewing angle.

[0037] Figure 4 It is an exploded view of a basic circuit board of the present invention from a third viewing angle.

[0038] Figure 5 It is a structural schematic diagram of a packaging substrate of a basic circuit board of the present invention.

[0039] In the figure:

[0040] 1-silicon chip; 2-ceramic substrate; 21-copper pad slot; 22-clip copper column; 3-packaging substrate; 31-thermal copper pad; 32-clip hole; 33-conducting hole; 34-chip pad; 4-thermoelectric conversion layer; 5-large area heat dissipation copper layer. DETAILED DESCRIPTION

[0041] The following is combined with Figures 1 to 5 A basic circuit board manufacturing process and a corresponding basic circuit board of the present invention are further described.

[0042] First, the basic circuit board manufacturing process is introduced.

[0043] A. A through hole 33 is provided at the chip pad 34 of the package substrate 3, and the through hole 33 is filled with a solid conductive hole through copper plating and hole filling process. The through hole 33 is more than 9 holes distributed in an array. The silicon chip 1 is welded on the upper part of the chip pad 34, and a thermal conductive copper pad 31 is provided at the bottom of the chip pad 34 of the package substrate 3;

[0044] B. A copper pad slot 21 and a clamping copper column 22 are made on the ceramic substrate 2 by etching process, more than three clamping holes 32 are provided in the thickness direction of the package substrate 3, more than three clamping copper columns 22 are provided on the ceramic substrate 2, the diameter of the clamping copper column 22 is 95% to 99% of the aperture of the clamping hole 32, the clamping copper column 22 is assembled with the clamping hole 32, the thermal conductive copper pad 31 is located in the copper pad slot 21, and a gap of 3 to 20 μm is provided between the peripheral side and the bottom of the thermal conductive copper pad 31 and the copper pad slot 21;

[0045] C. Fill the gap between the side and bottom of the thermal conductive copper pad 31 and the copper pad slot 21 through the copper plating process, and fill the gap between the clamping copper column 22 and the clamping hole 32 at the same time.

[0046] In this embodiment, the copper plating process includes chemical copper deposition and electrolytic copper plating.

[0047] In this embodiment, the thickness of the copper layer of chemical copper deposition is 1 to 3 μm;

[0048] When electroplating copper, a double-circuit electroplating process is used, and electroplating clamping points are provided on both the ceramic substrate 2 and the packaging substrate 3;

[0049] When the gap between the thermally conductive copper pad 31 and the copper pad slot 21 is 3 to 20 μm, a double-loop electroplating process is used for electroplating, and electroplating is performed through the clamping points of the electroplating clips on the ceramic substrate 2 and the packaging substrate 3 at the same time; when the gap between the thermally conductive copper pad 31 and the copper pad slot 21 is less than 3 μm, a single-loop electroplating process is used, and electroplating is performed only through the clamping points of the electroplating clips on the ceramic substrate 2 or the packaging substrate 3.

[0050] Then the basic circuit board made based on the above manufacturing process is introduced.

[0051] A basic circuit board comprises a silicon chip 1, a ceramic substrate 2 and a packaging substrate 3;

[0052] The silicon chip 1 is a chip with double-sided pads. A through hole 33 for conducting up and down is set at the chip pad 34 of the package substrate 3. The through hole 33 is filled with a solid conductive hole through copper plating and hole filling process. The through hole 33 is more than 9 holes distributed in an array. The silicon chip 1 is welded on the upper part of the chip pad 34. A thermal conductive copper pad 31 is set at the bottom of the chip pad 34 of the package substrate 3.

[0053] The packaging substrate 3 is provided with a thermally conductive copper pad 31, which is located on one side or the bottom of the silicon chip 1, and the ceramic substrate 2 is provided with a copper pad slot 21;

[0054] More than three clamping holes 32 are provided in the thickness direction of the package substrate 3, and more than three clamping copper pillars 22 are provided on the ceramic substrate 2. The diameter of the clamping copper pillars 22 is 95% to 99% of the aperture of the clamping holes 32. After the clamping copper pillars 22 and the clamping holes 32 are assembled, the thermal conductive copper pad 31 is located in the copper pad clamping groove 21, and a gap of 3 to 20 μm is provided between the peripheral side and the bottom of the thermal conductive copper pad 31 and the copper pad clamping groove 21;

[0055] Through the copper plating process, the gap between the clamping copper column 22 and the clamping hole 32 is filled, and at the same time, the gap between the thermal conductive copper pad 31 and the copper pad clamping groove 21 is filled, so as to realize the assembly of the packaging substrate 3 and the ceramic substrate 2.

[0056] The packaging substrate acts as an intermediary. The packaging substrate can be made very thin and is made of high heat dissipation materials such as BT. The electroplating copper process is used to integrate the thermal copper pad at the bottom of the chip with the thermal copper pad slot of the ceramic substrate. The thermal copper pad slot is tightly integrated with the large-area copper block on its surrounding side through the copper plating process, which can greatly improve the heat dissipation efficiency.

[0057] In this embodiment, the peripheral side of the engaging hole 32 is made of resin or a combination of resin and fiber.

[0058] In this embodiment, the clamping hole 32 is provided with a copper-plated hole of a copper layer; and the clamping copper column 22 is a copper clamping copper column.

[0059] In this embodiment, the ceramic substrate 2 is a circuit board with copper layers on both sides, the ceramic substrate 2 is provided with a first circuit pattern, and the copper clamping copper column is a part of the first circuit pattern;

[0060] The packaging substrate 3 includes at least two layers of second circuit patterns, and the copper-plated holes are part of the second circuit patterns;

[0061] After the copper-plated holes and the copper-clamping copper pillars are assembled through the copper-plating process, the first circuit pattern and the second circuit pattern are assembled.

[0062] In this embodiment, the copper clamping copper pillar is higher than other parts of the first circuit pattern; the copper clamping copper pillar and other parts of the first circuit pattern are made of the same copper layer of the ceramic substrate through different etching processes.

[0063] In this embodiment, the insulating layer of the packaging substrate 3 is made of one or two of polyimide, BT resin or epoxy resin.

[0064] BT resin is a thermosetting resin composed of bismaleimide (BMI) and triazine as the main resin components, with epoxy resin, polyphenylene ether resin (PPE) or allyl compounds added as modified components.

[0065] In this embodiment, the insulating layer of the ceramic substrate 2 is aluminum oxide or aluminum nitride.

[0066] Ceramic substrate refers to a special process board in which copper foil is directly bonded to the surface (single or double sides) of alumina (Al2O3) or aluminum nitride (AlN) ceramic substrate at high temperature. The ultra-thin composite substrate has excellent electrical insulation performance, high thermal conductivity, excellent soft solderability and high adhesion strength. It can be etched with various patterns like PCB boards and has a large current carrying capacity. Therefore, ceramic substrate has become the basic material for high-power power electronic circuit structure technology and interconnection technology.

[0067] In this embodiment, a thermoelectric conversion layer 4 is provided on the bottom wall of the copper pad slot 21 , and the thermoelectric conversion layer 4 is firmly connected to the bottom wall of the thermally conductive copper pad 31 through a copper plating layer.

[0068] In this embodiment, the copper plating process includes chemical copper deposition and electrolytic copper plating.

[0069] In this embodiment, the thickness of the copper layer of chemical copper deposition is 1 to 3 μm;

[0070] When electroplating copper, a double-circuit electroplating process is used, and electroplating clamping points are provided on both the ceramic substrate 2 and the packaging substrate 3;

[0071] When the gap between the thermally conductive copper pad 31 and the copper pad slot 21 is 3 to 20 μm, a double-loop electroplating process is used for electroplating, and electroplating is performed through the clamping points of the electroplating clips on the ceramic substrate 2 and the packaging substrate 3 at the same time; when the gap between the thermally conductive copper pad 31 and the copper pad slot 21 is less than 3 μm, a single-loop electroplating process is used, and electroplating is performed only through the clamping points of the electroplating clips on the ceramic substrate 2 or the packaging substrate 3.

[0072] The present invention is not limited to the above-mentioned embodiments. The technical solutions of the above-mentioned embodiments of the present invention can be cross-combined with each other to form new technical solutions. In addition, all technical solutions formed by equivalent replacement fall within the protection scope required by the present invention.

Claims

1. A basic circuit board manufacturing process, characterized in that: include: A. a through hole (33) for conducting up and down connection is provided at a chip pad (34) of a packaging substrate (3); the through hole (33) is filled with a solid conductive hole through a copper plating and hole filling process; the through hole (33) is more than 9 holes distributed in an array; a silicon chip (1) is welded on the upper part of the chip pad (34); and a thermal conductive copper pad (31) is provided at the bottom of the chip pad (34) of the packaging substrate (3); B. A copper pad slot (21) and a clamping copper column (22) are manufactured on a ceramic substrate (2) by etching, wherein the packaging substrate (3) is provided with more than three clamping holes (32) in the thickness direction, and the ceramic substrate (2) is provided with more than three clamping copper columns (22), wherein the diameter of the clamping copper columns (22) is 95% to 99% of the hole diameter of the clamping holes (32), the clamping copper columns (22) are assembled with the clamping holes (32), the thermal conductive copper pad (31) is located in the copper pad slot (21), and a gap of 3 to 20 μm is provided between the peripheral side and the bottom of the thermal conductive copper pad (31) and the copper pad slot (21); C. Filling the gap between the peripheral side and the bottom of the thermally conductive copper pad (31) and the copper pad slot (21) through a copper plating process, and filling the gap between the clamping copper column (22) and the clamping hole (32).

2. The basic circuit board manufacturing process as claimed in claim 1, characterized in that: The copper plating process includes chemical copper deposition and electrolytic copper plating.

3. The basic circuit board manufacturing process as claimed in claim 2, characterized in that: The thickness of the copper layer of the chemical copper deposition is 1-3 μm; When the copper is electroplated, a double-circuit electroplating process is used, and electroplating clamping points are provided on both the ceramic substrate (2) and the packaging substrate (3); When the gap between the thermally conductive copper pad (31) and the copper pad slot (21) is 3 to 20 μm, a double-loop electroplating process is used for electroplating, and electroplating is performed simultaneously through the electroplating clip clamping points on the ceramic substrate (2) and the packaging substrate (3); when the gap between the thermally conductive copper pad (31) and the copper pad slot (21) is less than 3 μm, a single-loop electroplating process is used, and electroplating is performed only through the electroplating clip clamping points on the ceramic substrate (2) or the packaging substrate (3).

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