Silicon carbide devices and methods for forming silicon carbide devices

By introducing a multilayer doped structure into the bulk region of silicon carbide devices, the short-channel effect caused by drain-induced barrier reduction is solved, improving the electrical and switching characteristics of transistors, and enhancing the stability of threshold voltage and short-circuit withstand capability.

CN110931562BActive Publication Date: 2026-02-24INFINEON TECHNOLOGIES AG
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Patent Information

Application Number
CN201910891488.4
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-09-20
Filing Date
2019-09-20
Publication Date
2026-02-24
Estimated Expiration
2039-09-20

AI Technical Summary

Technical Problem

As transistors continue to shrink, the drain-induced barrier decreases, leading to a short-channel effect that affects the threshold voltage and turn-off characteristics, a problem that is difficult to solve effectively with existing technologies.

Method used

Introducing a multilayer doped structure in the bulk region of a silicon carbide device, including portions with different doping concentrations and extensions, and forming multilayer doped regions by injecting dopants with different doses and energies, reduces the penetration of the space charge region.

Benefits of technology

It effectively reduces leakage-induced barrier reduction, improves the electrical and switching characteristics of transistors, and enhances the stability of threshold voltage and short-circuit withstand capability.

✦ Generated by Eureka AI based on patent content.

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Abstract

Silicon carbide devices and methods for forming silicon carbide devices are disclosed. A silicon carbide device includes a transistor cell having a front-side doped region, a body region, and a drift region. The body region includes a first portion having a first average net dopant concentration and a second portion having a second average net dopant concentration. The first portion and the second portion have an extension of at least 50 nm in a vertical direction. The first average net dopant concentration is at least twice the second average net dopant concentration, and the first average net dopant concentration is at least 1 10 17 cm ‑3 .
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Description

[0001] Related applications.

[0002] This application claims priority to German patent application No. 102018123210.1, filed on September 20, 2018, entitled "Silicon carbide devices and methods for forming silicon carbide devices," which is incorporated herein by reference. Technical Field

[0003] Examples of this disclosure relate to silicon carbide devices. Further examples relate to methods for forming silicon carbide devices. Background Technology

[0004] Short-channel effects, such as drain-induced barrier reduction, can occur due to the continuous shrinking of transistors. For example, space charge regions may penetrate from the drain region into the body region and affect the transistor's threshold voltage.

[0005] For example, due to the reduced drain barrier, the threshold voltage of a transistor may decrease or its turn-off characteristics may be compromised. What might be desired is to improve the semiconductor device or reduce short-channel effects within it. Summary of the Invention

[0006] One example relates to a silicon carbide device. The silicon carbide device includes a transistor cell. The transistor cell includes a front-side doped region having a first conductivity type. The transistor cell includes a body region having a second conductivity type. The transistor cell includes a drift region having a first conductivity type. The body region is vertically positioned between the front-side doped region and the drift region. The body region includes a first portion having a first average net doping concentration. The body region includes a second portion having a second average net doping concentration. The first portion is positioned between the drift region and the second portion. The first portion has an extension of at least 50 nm in the vertical direction. The second portion has an extension of at least 50 nm in the vertical direction. The first average net doping concentration is at least twice the second average net doping concentration. The first average net doping concentration is at least 1.10. 17 cm -3 .

[0007] Further examples relate to silicon carbide devices. A silicon carbide device includes a transistor cell. The transistor cell includes a front-side doped region having a first conductivity type. The transistor cell includes a body region having a second conductivity type. The transistor cell includes a drift region having a first conductivity type. The body region is vertically positioned between the front-side doped region and the drift region. The body region includes a first portion having a first average net doping concentration. The body region includes a second portion having a second average net doping concentration. The body region includes a third portion having a third average net doping concentration. The first portion is positioned between the drift region and the second portion. The second portion is positioned between the first portion and the third portion. The first portion has an extension of at least 50 nm in the vertical direction. The second portion has an extension of at least 50 nm in the vertical direction. The third portion has an extension of at least 50 nm in the vertical direction. The first average net doping concentration is at least twice the second average net doping concentration. The third average net doping concentration is at least twice the second average net doping concentration.

[0008] According to an embodiment, a method for forming a silicon carbide device includes implanting a first dopant into a silicon carbide substrate using a first implantation dose to form a first portion of a body region of a transistor in the silicon carbide device. The first portion of the body region has an extension of at least 50 nm in the vertical direction within the body region. The method further includes implanting a second dopant into the silicon carbide substrate using a second implantation dose to form a second portion of the body region. The first implantation dose is at least twice the second implantation dose, and is at least 2.10. 12 cm -2 . Attached Figure Description

[0009] Some examples of apparatus and / or methods will be described below by way of example only, and with reference to the accompanying figures, in which...

[0010] Figure 1 A schematic cross-section of an embodiment of a silicon carbide device having a body region comprising at least two parts is shown;

[0011] Figure 2 A schematic cross-section of an embodiment of a silicon carbide device having a body region comprising at least three parts is shown;

[0012] Figure 3 A flowchart illustrating a method for forming a silicon carbide device according to an embodiment is shown;

[0013] Figure 4 A schematic cross-section illustrating an embodiment of a silicon carbide device with spacer regions; and

[0014] Figure 5 A schematic doping profile of a silicon carbide device according to an embodiment is shown. Detailed Implementation

[0015] The various examples will now be described more fully with reference to the accompanying figures, some of which illustrate certain aspects. For clarity, the thickness of lines, layers, and / or zones may be exaggerated in the figures.

[0016] Therefore, while further examples can take various forms of modification and substitution, some of these examples are shown in the figures and will be described in detail thereafter. However, this detailed description does not limit the further examples to the specific forms described. Further examples may cover all modifications, equivalents, and substitutions falling within the scope of this disclosure. Throughout the description of the figures, the same or identical numbers refer to the same or similar elements that, when compared with each other, can be implemented identically or in modified form while providing the same or similar functionality.

[0017] It will be understood that when an element is referred to as "connected" or "coupled" to another element, the element can be directly connected or coupled or connected or coupled via one or more intermediate elements. If two elements A and B are combined using "or," this is to be understood as disclosing all possible combinations, i.e., only A, only B, and A and B, unless otherwise expressly or implicitly defined. Alternative wording for the same combination is "at least one of A and B" or "A and / or B." With necessary modifications, the wording applies to combinations of more than two elements.

[0018] The terminology used herein for the purpose of describing examples is not intended to limit further examples. Whenever the singular forms such as “a,” “an,” and “the” are used, and the use of only a single element is neither explicitly nor implicitly required, further examples may use multiple elements to achieve the same functionality. Similarly, when a function is subsequently described as being implemented using multiple elements, further examples may use a single element or a processing entity to achieve the same functionality. It will be further understood that when the terms “comprising,” “containing,” “having,” “possessing,” “including,” “comprise,” “including,” and / or “include,” specify the presence of the declared feature, whole, step, operation, process, action, element, and / or component, but do not preclude the presence or addition of one or more other features, wholes, steps, operations, processes, actions, elements, components, and / or any groups thereof.

[0019] Unless otherwise specified, all terms (including technical and scientific terms) are used herein in their ordinary meaning in the field to which the example pertains.

[0020] In semiconductor devices such as silicon carbide (SiC) devices, space charge regions can penetrate into the body region of the transistor, potentially causing leakage-induced barrier reduction at these transistors. Short-channel effects can significantly affect the threshold voltage of the transistor and may impair the electrical characteristics of the silicon carbide device.

[0021] The following examples illustrate a concept for reducing penetration from the space charge region into the body region. By reducing penetration from the space charge region into the transistor's body region, drain-induced barrier reduction can be reduced, and the electrical characteristics of silicon carbide devices can be improved.

[0022] Figure 1 A schematic cross-section of a silicon carbide device 100 according to an exemplary embodiment is shown. The silicon carbide device 100 may include transistor cells. The transistor cells may include a front-side doped region 110 having a first conductivity type. The front-side doped region 110 may be a source region or a drain region of the transistor cell. The front-side doped region 110 may be located within a silicon carbide substrate of the silicon carbide device 100, for example, adjacent to the surface of the silicon carbide substrate. For example, the upper surface of the front-side doped region 110 may form part of the surface of the silicon carbide substrate.

[0023] The transistor cell may include a body region 120 having a second conductivity type. The second conductivity type may be the opposite of the first conductivity type. The first conductivity type may be n-type, resulting in an n-doped region, and the second conductivity type may be p-type, resulting in a p-doped region, or vice versa.

[0024] The transistor cell may include, for example, a drift region 130 having a first conductivity type. For example, the drift region 130 may be located adjacent to the body region 120, such that a pn junction exists between the body region 120 and the drift region 130.

[0025] For example, in the vertical direction, the body region 120 can be positioned between the front-doped region 110 and the drift region 130. Alternatively, the body region 120 can be positioned between the front-doped region 110 and the drift region 130 in a direction differing from the vertical direction by up to 8 degrees—for example, at least 2 degrees and / or up to 6 degrees (for example, a difference of 4 degrees)—(for example, in the case of a vertical transistor cell). The body region 120 can be positioned adjacent to the front-doped region 110, thereby creating a pn junction between the body region 120 and the front-doped region 110.

[0026] For example, the vertical direction and vertical dimensions or thickness of each layer can be measured orthogonally to the front and / or back surfaces of the silicon carbide substrate.

[0027] For example, the transistor cells of the silicon carbide device 100 may be vertical transistor cells, and the front doped region 110, the body region 120, and the drift region 130 may be arranged vertically within the silicon carbide substrate (e.g., stacked or one on top of another). Figure 1 Additionally, a gate trench having a gate insulating layer 150 and a gate electrode 160 is shown in a trench for a vertical transistor cell.

[0028] For example, body region 120 may include a plurality of doped portions. Body region 120 may include, for example, a first portion 121 having a first average net doping concentration. Body region 120 may include, for example, a second portion 122 having a second average net doping concentration. The first portion 121 may be positioned between drift region 130 and the second portion 122. For example, the first portion 121 may be positioned vertically between drift region 130 and the second portion 122.

[0029] For example, in the vertical direction or in a direction differing from the vertical direction by at most 8 degrees, the first portion 121 of the body region 120 may have an extension of at least 50 nm (or at least 70 nm, at least 100 nm, at least 150 nm, or at least 200 nm) within the body region 120. Furthermore, or alternatively, in the vertical direction or in a direction differing from the vertical direction by at most 8 degrees, the second portion 122 of the body region 120 may have an extension of at least 50 nm (or at least 100 nm, at least 200 nm, or at least 300 nm) within the body region 120. Hereinafter, the extension of a portion of the doped region—e.g., a portion of the body region—may be the full width at half maximum (FWHM) of said portion.

[0030] The vertical direction can extend from the front doped region 110 to the drift region 130. The direction from the front doped region 110 to the drift region 130 and / or the vertical direction can be parallel to the interface between the body region 120 and the gate insulating layer 150 of the transistor cell. For example, the first portion 121 of the body region can have an extension of up to 300 nm (or up to 200 nm, or up to 150 nm) in the vertical direction and / or in the direction parallel to the interface between the body region 120 and the gate insulating layer 150. For example, the direction of extension can be vertical, or it can differ from the vertical direction by at least 2 degrees and / or up to 6 degrees (e.g., 4 degrees), for example, if the interface is tilted about the vertical direction. If the transistor cell is a vertical transistor cell, the first portion 121 can have a predominantly vertical extension of at least 50 nm.

[0031] For example, the second average net doping concentration may differ from the first average net doping concentration. For example, the first average net doping concentration may be at least two times (or at least three times, at least five times, or at least 10 times) and / or at most 20 times (or at most 10 times) the second average net doping concentration. For example, the first average net doping concentration may be at least 1.10. 17 cm -3 (or at least 3.10) 17 cm -3 Or at least 7.10 18 cm -3 ) and / or at most 2.10 18 cm -3 (or at most 8.10) 17 cm -3 Or at most 5.10 18 cm -3 ).

[0032] For example, a first portion 121 with a relatively small extension—e.g., a vertical extension—can provide field stop to prevent space charge regions from penetrating from the drift region 130 into the body region 120 of the transistor cell during operation. Thus, for example, drain-induced barrier reduction can be reduced within the transistor of the silicon carbide device 100. A reduction in the transistor's threshold voltage can be avoided or reduced. For example, providing the first portion 121 can improve the switching characteristics of the transistor or transistor cell of the silicon carbide device 100.

[0033] For example, a transistor cell may include a gate insulating layer. At least a second portion 122 of the body region 120 may be located adjacent to and / or in contact with the gate insulating layer 150 of the transistor cell.

[0034] The first portion 121 of the body region 120 may be positioned adjacent to (e.g., directly adjacent to) and / or in contact with the gate insulating layer 150 of the transistor cell. Alternatively, the spacer region (in Figure 1 (Not depicted in the embodiments) can be positioned between a first portion of the body region 120 of the transistor cell and the gate insulating layer 150. A spacer region can separate the first portion 121 from the gate insulating layer 150. By providing a spacer region, direct contact between the first portion 121 of the body region 120 and the gate insulating layer can be avoided. By keeping the first portion 121 of the body region 120 separated from the gate insulating layer, the influence of the first portion 121 on the transistor threshold voltage can be kept low.

[0035] For example, the spacer region can be a doped region of a first conductivity type. For example, the spacer region is also part of a common doped region of the first conductivity type that includes the drift region. The spacer region can have a higher doping concentration than the drift region. That is, the spacer region can also be part of a common doped region of the first conductivity type that includes the drift region, wherein the doping concentration is increased in said portion. For example, the spacer region can have a doping concentration similar to or the same as that of the current-spreading region of a silicon carbide device.

[0036] Alternatively, the spacer region may have a second conductivity type. In this case, the average net doping concentration of the spacer region may be lower than the first average net doping concentration. For example, the average net doping concentration of the spacer region may be at most 50% (or at most 40%, or at most 30%) of the first average net doping concentration. For example, the average net doping concentration of the spacer region may be a second average net doping concentration that differs from the second average net doping concentration by less than 10%.

[0037] For example, the distance (e.g., minimum distance and / or lateral distance) between the first portion 121 of the body region 120 and the gate insulating layer 150 can be at least 20 nm (or at least 50 nm, at least 100 nm, or at least 200 nm) and / or at most 500 nm (or at most 300 nm, or at most 200 nm). The distance between the first portion 121 and the gate insulating layer 150 can be caused by a gap region between the first portion 121 and the gate insulating layer 150.

[0038] For example, at least 80% (or at least 90%) of the doping atoms within the first portion 121 of the body region 120 may be at least one of aluminum atoms or gallium atoms. Generally, the doping atoms can have an effect (e.g., an intentional effect) on the electrical characteristics of, for example, a transistor cell. The doping atoms may be, for example, electroactive atoms that act as donors and / or acceptors in the operating mode of the transistor cell. The diffusion of at least one of aluminum atoms or gallium atoms within the silicon carbide substrate may be negligible. Due to the absence of diffusion, for example, a small height (or vertical extension) of the first portion 121 can be achieved.

[0039] For example, at least 80% (or at least 90%) of the doping atoms within the second portion 122 of the body region 120 may be at least one of boron atoms, boron difluoride molecules, fluorine atoms, or chlorine atoms. For example, by using boron atoms for doping the second portion 122, the channel mobility within the second portion 122 can be improved. For example, because boron atoms can diffuse within the silicon carbide substrate, the second portion 122 can be formed using a low amount of implantation. Furthermore, fluorine (e.g., from boron difluoride molecules or from fluorine atoms) can saturate so-called "dangling bonds" at the interface between the gate insulating layer and the silicon carbide substrate.

[0040] For example, the silicon carbide device 100 may further include a third portion of the body region 120 (not depicted in...). Figure 1 (In the embodiments described). The third portion of the body region may have a third average net doping concentration. For example, the third portion may have an extension of at least 50 nm within the body region in the vertical direction or in a direction differing from the vertical direction by at most 8 degrees. The third portion of the body region 120 may be positioned between the second portion 122 of the body region 120 and the front-side doped region 110. For example, the third portion may at least partially define the threshold voltage of the transistor cell of the silicon carbide device. However, the threshold voltage may also be defined by other portions or regions of the silicon carbide device (such as, for example, the second portion).

[0041] For example, the third average net doping concentration can be higher than the first average net doping concentration. The third average net doping concentration can be at least two times (or at least three times, at least five times, or at least 10 times) and / or at most 30 times (or at most 20 times, or at most 10 times) the second average net doping concentration. Typically, the third average net doping concentration is at least 10 times and at most 20 times the second average net doping concentration. A higher third average net doping concentration compared to the second average net doping concentration can result in improved contact in the body region. Furthermore, a high third average net doping concentration can support suppression of accidental turn-on due to parasitic npn transistors under short-circuit conditions (so-called latch-up resistance). Alternatively, the third average net doping concentration can be lower than the first average net doping concentration. For example, this can be the case in embodiments of silicon carbide devices including doped regions.

[0042] Providing a third portion within the body region 120 can create a well-shaped doping profile within the body region 120 from the first portion 121 to the third portion, because the doping concentration of the intermediate second portion 122 can be lower than the doping concentration of the first portion 121 and the third portion.

[0043] For example, at least 80% (or at least 90%) of the doping atoms in the third portion of the body region may be at least one of boron atoms, boron difluoride molecules, fluorine atoms, or chlorine atoms, or at least 80% (or at least 90%) of the doping atoms in the third portion of the body region may be at least one of boron atoms or aluminum atoms. The boron atoms in the third portion can cause improved stability of the threshold voltage of the transistor in the silicon carbide device 100.

[0044] For example, if the first portion 121 of the body region 120 is located adjacent to the gate insulating layer of the transistor cell, the first maximum net doping concentration in the third portion of the body region can be implemented to be higher than the second maximum net doping concentration in the first portion of the body region. When the second maximum net doping concentration of the first portion 121 is lower than the first maximum net doping concentration of the third portion, the first portion 121 may not affect or significantly affect the threshold voltage of the transistor.

[0045] For example, the silicon carbide device 100 may include, for example, a current-spreading region having a first conductivity type (not in...) Figure 1 (As depicted in the embodiments). The current extension region may be located between the body region 120 and the drift region 130. The average net doping concentration of the current extension region may be at least twice the average net doping concentration of the drift region 130. For example, the current extension region may extend vertically for more than 200 nm (or at least 500 nm, or at least 800 nm).

[0046] For example, the silicon carbide device 100 may further include, for example, a drain region (not shown in the portions shown in the figures) having a transistor cell of a first conductivity type, wherein the average net doping concentration of the drain region is at least 30 times or even at least 100 times the average net doping concentration of the drift region 130. The drain region may be located on the back side of the silicon carbide substrate. The back side may be opposite to the front side. Additionally, a buffer layer of the first conductivity type may be implemented between the drain layer and the drift region band. The thickness of the buffer layer may be at least 1 μm and at most 30 μm. The doping concentration of the buffer layer may be at least 1.10. 17 cm -3 And at most 8.10 18 cm -3 .

[0047] For example, a transistor cell in a silicon carbide device may include a trench gate. The trench gate may include a gate electrode and a gate insulating layer positioned within a gate trench. For example, the transistor (e.g., a transistor cell) may be arranged only on one side of the trench gate (e.g., as in...). Figure 4 (As shown in the diagram). In this case, the first sidewall of the trench gate may be adjacent to a transistor cell. The opposing second sidewall may not contain a transistor cell. Alternatively, the transistor cells of the silicon carbide device may be positioned on opposite sides of the trench gate, so that the body regions may be positioned on opposite sides of the trench gate. For example, at least a portion of each body region may be in contact with a corresponding sidewall of the trench gate—e.g., the gate insulating layer of the trench gate.

[0048] For example, in addition to the gate electrode, a second electrode may also be positioned at the bottom of the gate trench. The second electrode may be used to contact a shielded doped region positioned adjacent to and / or below the bottom of the trench. The shielded doped region may have a second conductivity type. For example, the second electrode may be connected to or may be connected to a voltage different from the gate electrode (e.g., the source voltage).

[0049] The transistor cells of the silicon carbide device 100 can be transistor cells among multiple transistor cells in a transistor arrangement. For example, a transistor cell may include one or more source regions (e.g., distributed or located along a gate), at least one body region, and a gate (e.g., a trench gate located within a gate trench extending into a semiconductor substrate). Further, transistor cells among multiple transistor cells may share a common (common) drift region and / or a common drain region (e.g., if the transistor cell is a MOSFET cell) or a common collector region (e.g., if the transistor cell is an IGBT cell).

[0050] The transistors and / or transistor arrangements of the silicon carbide device 100 (e.g., insulated-gate field-effect transistors (IGFETs), metal-oxide-semiconductor field-effect transistors (MOSFETs), or insulated-gate bipolar transistors (IGBTs)) can be vertical transistor structures that conduct current between the front surface and the back surface of the silicon carbide substrate. For example, the transistor arrangement of the silicon carbide device includes multiple source-doped regions connected to a source wiring structure, multiple gate electrodes or gate electrode grids connected to a gate wiring structure, and back-side drain metallization.

[0051] The silicon carbide device 100 may be a power semiconductor device. The power semiconductor device or the electrical structure of the power semiconductor device (e.g., the transistor cell of the silicon carbide device 100) may have a breakdown voltage or a blocking voltage of more than 100V, more than 500V, or more than 1kV.

[0052] Figure 2 A schematic cross-section of a silicon carbide device 200 according to an embodiment is shown. The silicon carbide device 200 may include transistor cells, for example, including a front-side doped region 210. The front-side doped region 210 may have a first conductivity type. The transistor cell may include a body region 220 having a second conductivity type, and / or a drift region 230 having a first conductivity type. The body region 220 may be positioned, for example, vertically between the front-side doped region 210 and the drift region 230.

[0053] The body region 220 may include, for example, a first portion 221 having a first average net doping concentration. The body region 220 may include, for example, a second portion 222 having a second average net doping concentration, and / or, for example, a third portion 223 having a third average net doping concentration.

[0054] The first portion 221 can be positioned between the drift region 230 and the second portion 222. The second portion 222 can be positioned between the first portion 221 and the third portion 223. The first portion 221 and / or the second portion 222 and / or the third portion 223 can each have an extension of at least 50 nm in the vertical direction. For example, the vertical direction can be the direction extending from the front-side doped region to the drift region.

[0055] The first average net doping concentration may be at least twice the second average net doping concentration. The third average net doping concentration may be at least twice the second average net doping concentration.

[0056] For example, the third portion 223 may be positioned adjacent to the front doped region 210. In the example, the first portion 221, the second portion 222, and the third portion 223 may be arranged vertically within the body region 220, for example, arranged as a vertical stack, for example, arranged in a vertical transistor of the silicon carbide device 200.

[0057] The first average net doping concentration may be at least twice the second average net doping concentration. The third average net doping concentration may be at least twice the second average net doping concentration.

[0058] Further details and aspects are mentioned in relation to the embodiments described above or below. Figure 2 The embodiments shown may include one or more optional additional features, which correspond to features above or below (e.g., Figure 1 or Figures 3 to 5 The present conception described in connection with one or more embodiments refers to one or more aspects of the proposed concept.

[0059] Some embodiments relate to having, as about Figure 1 or Figure 2 Semiconductor devices with a described body region for transistors. In these examples, instead of silicon carbide, the body region can be provided in a different wide-bandgap semiconductor substrate. For example, the wide-bandgap semiconductor substrate can have a bandgap greater than 2 eV—for example, greater than 3 eV. For example, the wide-bandgap semiconductor substrate can be a diamond (C) substrate or a gallium nitride (GaN) based semiconductor substrate.

[0060] Figure 3A flowchart of a method 300 for forming a silicon carbide device according to an embodiment is shown. Method 300 can be used to form the silicon carbide device as described herein.

[0061] Method 300 may include implanting a first dopant 310 into a silicon carbide substrate using a first implantation dose to form a first portion of the body region of a transistor of a silicon carbide device. The first portion of the body region may have an extension of at least 50 nm within the body region in a vertical direction—for example, from the front-side doped region of the transistor to the drift region of the transistor.

[0062] Further, method 300 may include implanting a second dopant 320 into the silicon carbide substrate using a second implantation dose to form a second portion of the body region. The second portion may be formed adjacent to the first portion. For example, the second portion of the body region may have an extension of at least 50 nm within the body region.

[0063] For example, the first injection dose may be at least twice the second injection dose. The first injection dose may be at least 2.10. 12 cm -2 The implantation dose can be adapted to the extension of the doped portion; for example, the implantation dose can be selected such that the doping concentration of the first portion is at least twice that of the second portion.

[0064] Method 300 may further include a front-side doped region adjacent to the body region forming the transistor. The front-side doped region may have a first conductivity type. For example, a first portion of the body region may have an extension of at least 30 nm within the body region in the direction from the front-side doped region to the drift region of the transistor.

[0065] For example, the first dopant is injected using a higher first injection energy than the second injection energy used to inject the second dopant.

[0066] Furthermore, a third portion of the bulk region can be formed by implanting a third dopant into the silicon carbide substrate using a third implantation energy that is lower than the second implantation energy. For example, to form the second portion (and / or the first portion and / or the third portion), one or more implantation processes can be performed, for example, using different implantation energies and / or different implantation doses.

[0067] According to one aspect, method 300 may include forming a mask 330 for implanting a first dopant, thereby forming a first portion of a body region at a distance from the gate insulating layer of the transistor. The mask formation 330 may be performed prior to the implantation of the first dopant. For example, the first portion of the body region may be formed to have a minimum distance from the gate insulating layer of at least 20 nm (or at least 50 nm) and / or at most 500 nm (or at most 300 nm).

[0068] Further details and aspects are mentioned in relation to the embodiments described above or below. Figure 3 The embodiments shown may include one or more optional additional features, which correspond to features above or below (e.g., Figures 1 to 2 or Figures 4 to 5 The present conception described in connection with one or more embodiments refers to one or more aspects of the proposed concept.

[0069] Figure 4 A schematic cross-section of a silicon carbide device 490 is shown. Even Figure 4 The silicon carbide device 490 is described as an n-channel transistor device, but it can also be implemented as a p-channel transistor device, for example, by changing the corresponding doping type from n to p, and vice versa.

[0070] Silicon carbide device 490 can be related to Figure 1 and / or Figure 2 The implementation described is similarly implemented. The silicon carbide device 490 includes a transistor comprising a body region vertically positioned between a front-side doped region 480 (which may be a highly n-doped source region 480) and a lightly n-doped drift region and / or current spread region n2. The body region includes a first portion p1 (e.g., a field stop), a second portion p2, and as described above. Figure 1 and / or Figure 2 The optional third part p3 is implemented as described in the relevant description.

[0071] The silicon carbide device 490 includes a trench gate with a gate trench. For example, a gate insulating layer 412 of the trench gate is positioned between a body region and a gate electrode 410 positioned in the gate trench. In the transistor's operating mode, the current flow through the transistor's channel region 470 can be controlled by applying a gate voltage to the gate electrode 410.

[0072] The spacer region 400 can be laterally positioned between the first portion p1 of the body region and the gate insulating layer 412.

[0073] The highly p-doped region 460 of the silicon carbide device can be positioned adjacent to the gate insulating layer 412 at the second sidewall of the gate structure, the second sidewall being opposite to the first sidewall of the trench gate positioned adjacent to the body region of the transistor. The highly p-doped region 460 extends along the second sidewall of the trench gate from the bottom of the trench gate to the highly n-doped region 420 and / or to the front surface. Further, a highly p-doped shielding region 462 can be positioned at the bottom of the gate trench. The highly p-doped shielding region 462 can be in contact with or part of the highly p-doped region 460.

[0074] The highly n-doped region 420 can extend from the highly p-doped region 460 along the second sidewall of the trench gate to the front surface of the silicon carbide substrate. The highly n-doped region 420 can be formed simultaneously with the front-side doped region 480. For example, the highly n-doped region 420 can be electrically connected to the front-side doped region 480.

[0075] Further details and aspects are mentioned in relation to the embodiments described above or below. Figure 4 The embodiments shown may include one or more optional additional features, which correspond to features above or below (e.g., Figures 1 to 3 or Figure 5 The present conception described in connection with one or more embodiments refers to one or more aspects of the proposed concept.

[0076] Figure 5 A schematic doping profile 500 of a silicon carbide device is shown. Doping profile 500 shows the net doping concentration of donors NB and acceptors NA at depth WB in different regions of the silicon carbide device (e.g., along the...). Figure 4 The cross-section 450 shown is illustrated. For example, the doping profile 500 is a vertical doping profile. For example, in... Figure 5 The doping profile shown can be optimized for silicon carbide (SiC) based devices with n-channels having p-type body regions.

[0077] Doping profile 500 shows the relative doping concentrations in the front-side doped region 510 (e.g., an n-type source region or an n+ source 512), body region 520, current spread region 522 (which may be n-doped), and drift region band 532 (which may be n-doped) of the transistor. Body region 520 is p-doped. Body region 520 may include three components (e.g., viewed in order from the front side along the vertical direction): a third portion p3 (e.g., including boron atoms), a second portion p2 (e.g., including boron atoms), and a first portion p1 (e.g., including aluminum atoms and providing field stopping).

[0078] The first portion p1 of the body region can have a very short vertical extension. The first portion p1 can have an effect similar to the field stop zone of the body region 520, for example, to prevent the space charge region of the silicon carbide device from dynamically penetrating into the body region 520. The first portion p1 can include at least one of aluminum or gallium atoms as dopant atoms.

[0079] The second part p2 can have a moderate vertical extension. The second part p2 essentially defines the channel resistance. The second part p2 has a lower doping concentration compared to the first part p1. The second part can, for example, include boron as a dopant atom.

[0080] The third portion p3 can have a relatively narrow vertical extension. The third portion p3 can at least partially define the threshold voltage. Furthermore, if the second conductivity type is p-type, the third portion p3 can reduce the resistive path for holes in the event of high-energy short circuits and / or avalanches, thus supporting suppression of the turn-on of parasitic npn transistors. For example, the third portion p3 has a higher doping concentration than the second portion p2 and can be formed by boron implantation.

[0081] The first part can be achieved by implanting aluminum as a dopant atom, which can act as an acceptor atom. Aluminum atoms can exhibit negligible diffusion. Therefore, it is possible to achieve a short vertical extension of the first part. The vertical half-width (FWHM) of the first part (i.e., the FWHM of the first part in the vertical direction) can be between at least 50 nm and at most 300 nm, for example, between at least 70 nm and at most 200 nm. The implantation dose can be varied to effectively prevent penetration of the space charge region. For example, the implantation dose can be 1.10 per square centimeter. 12 and 5∙10 13 Within the range of atoms, typically 2.10 per square centimeter. 12 and 2∙10 13 Between atoms. In silicon-based power semiconductors, such a narrow first section (e.g., a narrow field stop region) can be difficult to achieve due to potentially non-negligible diffusion in subsequent processing steps.

[0082] If the maximum doping concentration of the first portion of the body region is less than or equal to the maximum doping concentration of the third portion of the body region, the first portion can extend to the gate insulating layer without affecting the threshold voltage. However, if the maximum doping concentration of the first portion exceeds the maximum doping concentration of the third portion, a gap (e.g., via a spacer region) can be provided between the first portion and the gate insulating layer to prevent the first portion from affecting the threshold voltage. For example, the lateral width of the spacer region can be in the range of at least 20 nm and at most 500 nm, typically in the range of at least 50 nm and at most 300 nm.

[0083] The second portion of the body region can be achieved through boron doping. Boron doping can also extend to some extent into the drift region. Boron doping can have several effects: (i) fewer implantation steps can be required because the diffusion of boron during subsequent high-temperature processing (which may not be negligible) can lead to a vertical tailing effect in the implantation profile. (ii) Additionally, improved channel mobility can be obtained in the boron-doped region. (iii) Further, boron doping (e.g., partial boron-doped atoms in the drift region band) can induce recombination effects at suitable sizes, which can result in a reduction in so-called bipolar drift. Optionally, the second portion may also contain at least one of aluminum or gallium atoms as doping atoms.

[0084] The third part of the body region may include aluminum atoms alone as dopant atoms, or in some examples, a combination of aluminum atoms with boron and / or gallium atoms as dopant atoms. This is merely an example. Figure 5 In this study, although boron is used as a dopant in the third region, the substantial portion of the dopant atoms in this region can be aluminum atoms. The use of boron can further improve the stability of the threshold voltage: during the processing of the silicon carbide substrate, hydrogen can be introduced into the semiconductor and can form acceptor-hydrogen complexes. If these complexes dissolve due to current or temperature, this can lead to instability in the threshold voltage. As a result of the higher binding energy of boron-hydrogen complexes compared to aluminum-hydrogen complexes, increased stability of the threshold voltage during operation can be achieved when boron is used as a dopant atom.

[0085] Alternatively, instead of boron, boron difluoride (BF2) molecules can be used as the dopant atom in the second part, for example. Fluorine can possess the property of being able to saturate "dangling bonds" at the interface between the gate insulating layer and the silicon carbide substrate in a stable and efficient manner. Dangling bonds saturated with hydrogen may become less stable under stresses such as, for example, increased temperatures and / or high current densities.

[0086] Fluorine, such as boron difluoride, can also be utilized independently of the presence of the first portion in the bulk region. Therefore, silicon carbide devices may not contain the first portion in the bulk region. In this case, a second and / or third portion may be present, wherein the second and / or third portion includes fluorine as a dopant atom. Alternatively, fluorine or chlorine atoms may be used, preferably by implantation into the substrate surface, as boron-free ions.

[0087] Further details and aspects are mentioned in relation to the embodiments described above or below. Figure 5 The embodiments shown may include one or more optional additional features, which correspond to features above or below (e.g., Figures 1 to 4 The present conception described in connection with one or more embodiments refers to one or more aspects of the proposed concept.

[0088] Examples involve concepts for reducing drain-induced barrier reduction (DIBL), or short-channel effects, in silicon carbide (SiC) devices. It may be desirable to minimize the penetration of space charge regions into the p-body of these devices during operation. This can significantly reduce DIBL. Excessive DIBL can cause the device's threshold voltage to drop too much at high drain-source voltages. This can lead to high short-circuit currents, for example, when the DC link voltage is close to the applied voltage. Furthermore, in some embodiments, turn-off performance may be undesirably affected because highly inductive switches may turn off the channel more quickly under high overvoltage DIBL conditions. The device may switch "more aggressively" and strong continuous LC oscillations may occur. This can be detrimental to, for example, high-voltage SiC devices that must switch high currents with high parallel switching.

[0089] Deep p-shielding structures can be implemented to be narrower (reducing p-holes), but this may cause R... DS,on A significant increase.

[0090] For example, when high-current applications are used with high-inductance circuits (e.g., traction applications), improved switching performance (e.g., softer switching) in terms of power consumption size can be achieved by reducing field penetration into the channel region (e.g., the channel region) and utilizing the resulting DIBL weakening. For example, standard first-stage gate drivers for IGBTs can be applied using the proposed concept. Furthermore, low short-circuit current can be achieved, which can increase short-circuit robustness.

[0091] Examples involve specific doping profiles for silicon carbide-based devices (e.g., in...). Figure 5 The implementation of the doping profile shown in the figure can offset, for example, the penetration of the space charge region into the p-body during device operation.

[0092] The proposed concept can be detected using doping profile analysis employing extended resistance measurement or secondary ion mass spectrometry (SIMS) analysis. For example, the proposed concept can be applied to various power semiconductor devices.

[0093] The aspects and features mentioned and described together with the previously detailed examples and one or more of the figures may also be combined with one or more other examples in order to replace similar features of other examples or to additionally introduce said features into other examples.

[0094] The description and accompanying drawings are merely illustrative of the principles of this disclosure. Furthermore, all examples described herein are primarily intended for explicit illustrative purposes only, to aid the reader in understanding the principles of this disclosure and the concepts contributed by the inventors(s) to advance the technology. All statements regarding the principles, aspects, and examples of this disclosure, and their specific examples, are intended to cover their equivalents.

[0095] It should be understood that unless otherwise expressly or implicitly stated, for example for technical reasons, the disclosure of multiple actions, processes, operations, steps, or functions in the specification or claims is not to be construed as requiring a particular order. Therefore, the disclosure of multiple actions or functions will not limit these actions or functions to a particular order unless such actions or functions are technically non-interchangeable. Furthermore, in some examples, a single action, function, process, operation, or step may include or can be correspondingly decomposed into multiple sub-actions, sub-functions, sub-processes, sub-operations, or sub-steps. Unless expressly excluded, such sub-actions may be included in the disclosure of the single action and may be part of the disclosure of that single action.

[0096] Furthermore, the subsequent claims are thus incorporated into the detailed description, wherein each claim may stand independently as a separate example. While each claim may stand independently as a separate example, it should be noted that although a dependent claim may refer in the claims statement to a specific combination with one or more other claims, other examples may also include combinations of dependent claims with the subject matter of each of the other dependent claims or independent claims. Such combinations are expressly presented herein unless it is stated that there is no intention to make a specific combination. Furthermore, there is an intention to include features of the claims in any other independent claims, even if that claim is not directly subordinate to the stated independent claim.

Claims

1. A silicon carbide device, comprising: A transistor cell includes: a front-side doped region having a first conductivity type; a body region having a second conductivity type; and a drift region having a first conductivity type, the body region being vertically positioned between the front-side doped region and the drift region. The body region includes a first portion having a first average net doping concentration and a second portion having a second average net doping concentration, the first portion being positioned between the drift region and the second portion, and The body region includes a third portion having a third average net doping concentration, wherein the third portion is located between the second portion and the front-side doped region. The first part extends in the vertical direction within the volume region in the range of 50 nm to 300 nm. The silicon carbide device further includes a spacer region laterally positioned between a first portion of the body region of the transistor cell and the gate insulating layer of the transistor cell, the spacer region being a doped region having a first conductivity type or a second conductivity type and having a lateral width in the range of at least 20 nm and at most 500 nm.

2. The silicon carbide device according to claim 1, At least the second portion is positioned adjacent to the gate insulating layer.

3. The silicon carbide device according to claim 1, At least 80% of the doped atoms in the first part are at least one of aluminum or gallium atoms.

4. The silicon carbide device according to claim 1, At least 80% of the doped atoms in the second part are at least one of boron atoms, boron difluoride molecules, fluorine atoms, or chlorine atoms.

5. The silicon carbide device according to claim 2, Wherein the first average net doping concentration is at least twice the second average net doping concentration, and The third average net doping concentration is at least twice the second average net doping concentration.

6. The silicon carbide device according to claim 5, At least 80% of the doped atoms in the third part of the body region are at least one of boron, aluminum or gallium atoms.

7. The silicon carbide device according to claim 5, The first maximum net doping concentration in the third part is higher than the second maximum net doping concentration in the first part.

8. The silicon carbide device according to claim 1, At least one of the second or third portions is positioned adjacent to the gate insulating layer.

9. The silicon carbide device according to claim 1, At least some of the doped atoms in the first part are gallium atoms.

10. The silicon carbide device according to claim 1, At least some of the doped atoms in the second part are at least one of fluorine or chlorine atoms.

11. A silicon carbide device, comprising: A transistor cell includes: a front-side doped region having a first conductivity type; a body region having a second conductivity type; and a drift region having a first conductivity type, the body region being vertically positioned between the front-side doped region and the drift region. The body region includes: a first portion having a first average net doping concentration; a second portion having a second average net doping concentration; and a third portion having a third average net doping concentration. The first part is positioned between the drift zone and the second part, and the second part is positioned between the first part and the third part. The first portion extends in the body region in the vertical direction within a range of 50 nm to 300 nm, the second portion extends in the vertical direction by at least 50 nm, the third portion extends in the vertical direction by at least 50 nm, and The first average net doping concentration is at least twice the second average net doping concentration, and the third average net doping concentration is at least twice the second average net doping concentration. The silicon carbide device further includes a spacer region laterally positioned between a first portion of the body region of the transistor cell and the gate insulating layer of the transistor cell, the spacer region being a doped region having a first conductivity type or a second conductivity type and having a lateral width in the range of at least 20 nm and at most 500 nm.

12. The silicon carbide device according to claim 11, At least one of the second or third portions is positioned adjacent to the gate insulating layer.

13. The silicon carbide device according to claim 11, At least 80% of the doped atoms in the first part are aluminum or gallium atoms.

14. The silicon carbide device according to claim 11, At least 80% of the doped atoms in the second part are at least one of boron atoms, boron difluoride molecules, fluorine atoms, or chlorine atoms.

15. The silicon carbide device according to claim 11, In the third part, at least 80% of the doped atoms are at least one of boron, aluminum, or gallium atoms.

16. The silicon carbide device according to claim 11, The first maximum net doping concentration in the third part is higher than the second maximum net doping concentration in the first part.

17. The silicon carbide device according to claim 11, comprising: It has a current extension region of the first conductivity type. The current extension region is located between the volume region and the drift region.

18. The silicon carbide device according to claim 11, The front-side doped region is the source region of the transistor cell.

19. The silicon carbide device according to claim 11, The transistor unit is a vertical transistor unit.

20. A method for forming a silicon carbide device according to any one of claims 1 to 19, comprising: A first dopant is implanted into a silicon carbide substrate using a first implantation dose to form a first portion of the body region of a transistor in a silicon carbide device, wherein the first portion of the body region extends in the vertical direction in the range of 50 nm to 300 nm, and A second dopant is implanted into the silicon carbide substrate using a second implantation dose to form a second portion of the bulk region. The first injection dose is at least twice the second injection dose, wherein the first injection dose is at least 2.

10. 12 cm -2 ,as well as The third part of the forming body region has a higher average net doping concentration compared to the second part.

21. The method according to claim 20, The formation of the third part includes implanting a third dopant into the silicon carbide substrate using a third implantation energy. The first dopant is implanted using a first implantation energy, which is higher than the second implantation energy used to implant the second dopant. The third injection energy is lower than the second injection energy.

22. The method according to claim 20, The transistor unit includes a body region. The transistor unit includes a gate insulating layer, wherein at least one of the second or third portions is positioned adjacent to the gate insulating layer.

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