A conversion device, network equipment and data transmission method

Abstract

The present application provides a conversion device, a network device and a data transmission method, wherein the conversion device includes an interrupt processing unit, a read processing unit, a buffer, and a DMA controller; the interrupt processing unit is used to prohibit the interrupt from being sent to the main control board each time an interrupt sent by the interface board is received, and output a control command to the read processing unit; the read processing unit is used to send a read operation command to the interface board each time a control command is received, so that the interface board returns data according to the read operation command; the buffer is used to store the data returned by the interface board; the DMA controller is used to obtain operating parameters, and when the operating parameters meet the data uploading conditions, the data in the buffer is sent to the main control board. Through the technical solution of the present application, the main control board resources can be saved, the bandwidth utilization rate can be improved, and the occupancy rate of the main control board can be reduced.

Description

Technical Field

[0001] The present application relates to the field of communications, and in particular to a conversion device, a network device and a data transmission method. Background Art

[0002] Network devices (such as routers, switches, firewalls, etc.) include a main control board and an interface board. The main control board may include a PCI-E (Peripheral Component Interconnect Express) interface, and the interface board may also include a PCI-E interface. Based on this, the main control board can be connected to the interface board via a PCI-E bus, that is, both sides of the PCI-E bus are PCI-E interfaces.

[0003] In some application scenarios, the interface board does not have a PCI-E interface, but has a low-speed interface (such as a local bus interface). In order to enable the main control board to interact with the interface board, it is necessary to deploy a conversion device between the main control board and the interface board. The conversion device has a PCI-E interface and a low-speed interface. The main control board is connected to the conversion device through the PCI-E bus, and the interface board is connected to the conversion device through a low-speed bus (such as a local bus).

[0004] In the above application scenario, in order to read data 1-data 10 from the interface board, the main control board sends a read command to the conversion device, and the conversion device reads data 1 from the interface board and returns data 1 to the main control board. After obtaining data 1, the main control board sends a read command to the conversion device, and the conversion device reads data 2 from the interface board and returns data 2 to the main control board, and so on, until data 1-data 10 are successfully read.

[0005] The above data reading operation takes a long time. During this time, the main control board is always occupied and cannot process other tasks. That is, other tasks can only wait, which wastes the resources of the main control board. Summary of the invention

[0006] The present application provides a conversion device, which is applied to a network device, wherein the network device further comprises a main control board and an interface board, wherein the conversion device is connected to the main control board via a first type of interface, and the conversion device is connected to the interface board via a second type of interface, wherein: the conversion device comprises an interrupt processing unit, a read processing unit, a buffer, and a direct memory access DMA controller;

[0007] The interrupt processing unit is used to receive the interrupt sent by the interface board; each time the interrupt sent by the interface board is received, the interrupt is prohibited from being sent to the main control board, and a control command is output to the read processing unit;

[0008] The read processing unit is used to send a read operation command to the interface board each time the control command is received, so that the interface board returns data according to the read operation command;

[0009] The buffer is used to store the data returned by the interface board;

[0010] The DMA controller is used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board.

[0011] The present application provides a network device, which includes a main control board, an interface board and a conversion device, wherein the conversion device is connected to the main control board through a first type of interface, and the conversion device is connected to the interface board through a second type of interface; wherein:

[0012] The interface board is used to send an interrupt to the conversion device;

[0013] The conversion device is used to receive an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the conversion device prohibits the interrupt from being sent to the main control board, and sends a read operation command to the interface board so that the interface board returns data according to the read operation command; after receiving the data returned by the interface board, the data is stored in the buffer of the conversion device;

[0014] The conversion device is also used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board.

[0015] The present application provides a data transmission method, which is applied to a network device, wherein the network device includes a main control board, an interface board, and a conversion device, wherein the conversion device is connected to the main control board through a first type of interface, and the conversion device is connected to the interface board through a second type of interface, and the method includes:

[0016] The interface board sends an interrupt to the conversion device;

[0017] The conversion device receives an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the interrupt is prohibited from being sent to the main control board, and a read operation command is sent to the interface board;

[0018] After receiving the read operation command, the interface board sends data to the conversion device;

[0019] After receiving the data returned by the interface board, the conversion device stores the data in a buffer of the conversion device;

[0020] The conversion device obtains operating parameters, and when the operating parameters meet the data sending condition, the data in the buffer is sent to the main control board.

[0021] Based on the above technical solution, in the embodiment of the present application, after receiving the interrupt sent by the interface board, the conversion device does not send the interrupt to the main control board, but directly reads data from the interface board. In this way, the process of reading data from the interface board does not need to be initiated by the main control board. The conversion device stores the read data in the buffer, and after the data reading is completed, the data in the buffer is sent to the main control board. Obviously, the above method can avoid the main control board initiating the data reading process, reduce the time consumed by the data reading operation, avoid the main control board being occupied by the data reading operation for a long time, save the main control board resources, improve the bandwidth utilization, improve the efficiency of the main control board in obtaining data, improve the overall performance of the network equipment, and reduce the occupancy rate of the main control board. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] In order to more clearly illustrate the embodiments of the present application or the technical solutions in the prior art, the drawings required for use in the embodiments of the present application or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are only some embodiments recorded in this application. For ordinary technicians in this field, other drawings can also be obtained based on these drawings of the embodiments of the present application.

[0023] Figure 1 is a hardware structure diagram of a network device in one embodiment of the present application;

[0024] Figure 2 is a hardware structure diagram of a conversion device in one embodiment of the present application;

[0025] Figure 3 is a hardware structure diagram of a network device in one embodiment of the present application;

[0026] Figure 4 It is a flow chart of a data transmission method in one embodiment of the present application. DETAILED DESCRIPTION

[0027] The terms used in this application are only for the purpose of describing specific embodiments, rather than limiting this application. The singular forms of "a", "said" and "the" used in this application and the claims are also intended to include plural forms, unless the context clearly indicates other meanings. It should also be understood that the term "and / or" used in this article refers to any or all possible combinations of one or more associated listed items.

[0028] It should be understood that although the terms first, second, third, etc. may be used in the present application to describe various information, these information should not be limited to these terms. These terms are only used to distinguish the same type of information from each other. For example, without departing from the scope of the present application, the first information may also be referred to as the second information, and similarly, the second information may also be referred to as the first information. Depending on the context, in addition, the word "if" used may be interpreted as "at the time of", or, "when", or, "in response to determining".

[0029] In the embodiment of the present application, a network device (such as a router, a switch, a firewall, a server, etc.) is proposed, and the network device may include a main control board, an interface board and a conversion device. Figure 1 As shown, it is a schematic diagram of the structure of the network device, which may include but is not limited to: a main control board 10, a conversion device 20, an interface board 30 and an interface board 40. Among them, the main control board 10 can be connected to the interface board 40, the main control board 10 can also be connected to the conversion device 20, and the conversion device 20 can be connected to the interface board 30.

[0030] In one example, the conversion device 20 and the main control board 10 can be deployed on the same single board, that is, one single board includes both the conversion device 20 and the main control board 10. Alternatively, the conversion device 20 can be deployed on a separate single board, that is, the conversion device 20 and the main control board 10 are deployed on different single boards. Of course, the above are just two examples, and there is no limitation on the location of the conversion device 20. For example, the conversion device 20 can also be deployed on the same single board as the interface board 30, or, for a network device including a main control board, a network board, and an interface board, the conversion device 20 can also be deployed on the same single board as the network board, and there is no limitation on this.

[0031] See also Figure 1 As shown, the conversion device 20 is deployed on a separate board as an example for description.

[0032] Among them, the main control board 10 includes a CPU (Central Processing Unit) implemented based on SOC (System on Chip), and the CPU communicates with the interface board 30 / interface board 40, that is, writes data to the interface board 30 / interface board 40 and reads data from the interface board 30 / interface board 40.

[0033] In one example, some interface boards (such as interface board 40) have high-speed interfaces (such as PCI-E interfaces, SGMII (Serial Gigabit Media Independent) interfaces, etc. Figure 1In the example of PCI-E interface, since the main control board 10 has a PCI-E interface, the main control board 10 is directly connected to the interface board 40, that is, the main control board 10 and the interface board 40 can be connected via a high-speed bus (such as PCI-E bus, SGMII bus, etc. Figure 1 The PCI-E bus is used as an example for explanation) connection.

[0034] In another example, some interface boards (such as interface board 30) may have a low-speed interface (such as a local bus interface, a TDM (Time Division Multiplexing) interface, etc.) Figure 1 The local bus interface is used as an example for explanation), however, it does not have a PCI-E interface. Since the main control board 10 has a PCI-E interface but does not have a local bus interface, the main control board 10 can be connected to the interface board 30 through the conversion device 20, that is, the main control board 10 is not directly connected to the interface board 30.

[0035] Furthermore, the conversion device 20 may have a PCI-E interface and a local bus interface, so the conversion device 20 may be connected to the main control board 10 via the PCI-E interface, that is, the conversion device 20 and the main control board 10 may be connected via the PCI-E bus. In addition, the conversion device 20 may be connected to the interface board 30 via the local bus interface, that is, the conversion device 20 and the interface board 30 may be connected via a low-speed bus (such as a local bus, a TDM bus, etc.) Figure 1 The local bus is used as an example for explanation) connection.

[0036] In the above application scenario, the communication process between the main control board 10 and the interface board 40 may include: the main control board 10 writes data to the interface board 40 through the PCI-E bus, and the main control board 10 reads data from the interface board 40 through the PCI-E bus. The data writing process and the data reading process will not be repeated here.

[0037] The communication process between the main control board 10 and the interface board 30 may include: the main control board 10 sends data to the conversion device 20 through the PCI-E bus, and the conversion device 20 writes data to the interface board 30 through the local bus. The data writing process will not be described in detail. The main control board 10 sends a read command to the conversion device 20 through the PCI-E bus, and the conversion device 20 reads data from the interface board 30 through the local bus and returns the data to the main control board 10 through the PCI-E bus. In the subsequent embodiments, this data reading process is introduced.

[0038] In the conventional manner, in order to read data from the interface board 30, the main control board 10 sends a read command to the conversion device 20, and the conversion device 20 reads data from the interface board 30 via the local bus. Since the data bit width of the local bus is 8 bits, the conversion device 20 only reads 8 bits of data from the interface board 30 and sends the data to the main control board 10. After receiving the 8 bits of data, if the main control board 10 has not read all the data, it continues to send a read command to the conversion device 20, and so on.

[0039] Assuming that the interface board 30 includes 80 bits of data, the main control board 10 needs to send 10 read commands, the conversion device 20 reads data from the interface board 30 10 times, and the conversion device 20 sends 10 data to the main control board 10. Obviously, the data reading operation takes a long time, during which the main control board 10 is always occupied and cannot process other tasks. Other tasks can only wait, wasting the resources of the main control board 10.

[0040] In view of the above findings, in the embodiment of the present application, after the conversion device 20 receives the interrupt sent by the interface board 30, it no longer forwards the interrupt to the main control board, but directly reads data from the interface board 30 through the local bus, and stores the read data in the buffer. The conversion device 20 can read data from the interface board 30 multiple times until the data uploading condition is met, and then send the data in the buffer to the main control board. For example, if the interface board 30 includes 80 bits of data, the conversion device 20 reads data from the interface board 30 10 times, reading 8 bits each time, so that a total of 80 bits of data are read, and all the read data are stored in the buffer. After the data reading is completed, the conversion device 20 sends the data in the buffer to the main control board.

[0041] From the above, it can be seen that the main control board 10 does not participate in the process in which the conversion device 20 reads data from the interface board 30, stores the data in the buffer, and sends the data in the buffer to the main control board 10. In other words, the time consumed by the data reading operation is not occupied by the main control board 10 and can continue to process other tasks, thereby saving the resources of the main control board 10, reducing the occupancy rate of the main control board 10, and improving the overall performance of the network device.

[0042] In order to realize the above functions, a conversion device is proposed in an embodiment of the present application. The conversion device can be applied to a network device. The network device can also include a main control board (such as a main control board with a first type of interface) and an interface board (such as an interface board with a second type of interface). The conversion device can include a first type of interface and a second type of interface. The conversion device is connected to the main control board through the first type of interface, and the conversion device is connected to the interface board through the second type of interface. The first type of interface can be a high-speed interface (such as a PCI-E interface, an SGMII interface, etc.), Figure 1The second type of interface may be a low-speed interface (such as a local bus interface, a TDM interface, etc.). Figure 1 The local bus interface is used as an example for explanation).

[0043] See also Figure 2 , which is a schematic diagram of the structure of the conversion device 20, the conversion device 20 may include but is not limited to: an interrupt processing unit 21, a read processing unit 22, a buffer 23, and a DMA (Direct Memory Access) controller 24. The buffer 23 is a storage area inside the conversion device 20, and may include but is not limited to a RAM (Random Access Memory) and the like.

[0044] In one example, the interrupt processing unit 21 is used to receive an interrupt sent by the interface board 30; each time an interrupt sent by the interface board 30 is received, the interrupt is prohibited from being sent to the main control board 10, and a control command is output to the read processing unit 22. The read processing unit 22 is used to send a read operation command to the interface board 30 each time the control command is received, so that the interface board 30 returns data according to the read operation command; the buffer 23 is used to store the data returned by the interface board 30; the DMA controller 24 is used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer 23 is sent to the main control board 10.

[0045] Optionally, the DMA controller 24 obtains the operating parameters in each cycle, and determines whether the data sending condition is met according to the operating parameters. If yes, all the data in the buffer 23 are sent to the main control board 10. If not, the data in the buffer 23 is not sent to the main control board 10, but waits for the next cycle, continues to obtain the operating parameters, and determines whether the data sending condition is met according to the operating parameters, and so on.

[0046] Optionally, when the DMA controller 24 determines that the operating parameters meet the data transmission condition, it is specifically used to:

[0047] Case 1: if the operating parameter is the amount of data in the buffer 23, when the amount of data in the buffer 23 reaches a preset threshold, it can be determined that the operating parameter meets the data sending condition.

[0048] Case 2: if the operating parameter is the interruption interval, when the interruption processing unit 21 does not receive the interruption sent by the interface board within the preset time, it can be determined that the operating parameter meets the data sending condition.

[0049] Case three: if the operating parameters include the amount of data in the buffer 23 and the interrupt interval time, when the amount of data in the buffer 23 reaches a preset threshold, it is determined that the operating parameters meet the data sending conditions; or, when the interrupt processing unit 21 does not receive an interrupt sent by the interface board within a preset time, it is determined that the operating parameters meet the data sending conditions.

[0050] Optionally, when the DMA controller 24 sends the data in the buffer 23 to the main control board 10, it is specifically used to: store all the data in the buffer 23 in the memory corresponding to the main control board 10; after the data storage is completed, that is, all the data in the buffer 23 are stored in the memory, send a DMA completion interrupt to the main control board 10, so that the main control board 10 obtains the data from the memory after receiving the DMA completion interrupt.

[0051] Further, the DMA controller 24 sends a DMA completion interrupt to the main control board 10, so that the main control board 10 obtains data from the memory after receiving the DMA completion interrupt, specifically for:

[0052] The DMA controller 24 sends a DMA completion interrupt to the main control board 10, and sends the BD information and data length corresponding to the data in the buffer 23 to the main control board 10, so that the main control board 10 obtains data from the memory according to the BD information and the data length after receiving the DMA completion interrupt.

[0053] Based on the above technical solution, in the embodiment of the present application, after receiving the interrupt sent by the interface board, the conversion device does not send the interrupt to the main control board, but directly reads data from the interface board. In this way, the process of reading data from the interface board does not need to be initiated by the main control board. The conversion device stores the read data in the buffer, and after the data reading is completed, the data in the buffer is sent to the main control board. Obviously, the above method can avoid the main control board initiating the data reading process, reduce the time consumed by the data reading operation, avoid the main control board being occupied by the data reading operation for a long time, save the main control board resources, improve the bandwidth utilization, improve the efficiency of the main control board in obtaining data, improve the overall performance of the network equipment, and reduce the occupancy rate of the main control board.

[0054] The following combination Figure 2 The application scenario shown in the figure provides a detailed description of the above solution. Figure 2As shown, the conversion device 20 may include: an interrupt processing unit 21, a read processing unit 22, a buffer 23, and a DMA controller 24. The conversion device 20 may include, but is not limited to, a logic chip, such as FPGA (Field Programmable Gate Array), CPLD (Complex Programmable Logic Device), ASIC (Application Specific Integrated Circuit), etc., and the type of the conversion device 20 is not specifically limited herein.

[0055] In one example, when the interface board 30 has data to be read (ie, data to be sent to the main control board 10 ), the interface board 30 sends an interrupt to the interrupt processing unit 21 of the conversion device 20 through an interrupt channel.

[0056] After receiving the interrupt, the interrupt processing unit 21 does not forward the interrupt to the main control board 10, but responds to the interrupt by itself, that is, after receiving the interrupt, the interrupt processing unit 21 prohibits sending the interrupt to the main control board 10, but determines based on the interrupt that data needs to be read from the interface board 30. In order to read data from the interface board 30, the interrupt processing unit 21 can output a control command to the read processing unit 22, and the control command is used to instruct the read processing unit 22 to read data from the interface board 30.

[0057] When receiving the control command, the read processing unit 22 may send a read operation command to the interface board 30, so that the interface board 30 returns data, such as 8 bits of data, to the buffer 23 of the conversion device 20 according to the read operation command. Specifically, the read processing unit 22 may send only one read operation command to the interface board 30, and after receiving the read operation command, the interface board 30 may return data to the buffer 23 of the conversion device 20 through the local bus interface, and after receiving the data, the buffer 23 may store the data.

[0058] After the interface board 30 sends the data to the buffer 23, if there is still data to be read in the interface board 30, the interface board 30 continues to send interrupts to the interrupt processing unit 21. After receiving the interrupt, the interrupt processing unit 21 outputs a control command to the read processing unit 22. When the read processing unit 22 receives the control command, it sends a read operation command to the interface board 30, so that the interface board 30 returns data to the buffer 23 according to the read operation command. And so on, until there is no data to be read in the interface board 30, the interrupt is stopped. After the interrupt processing unit 21 does not receive the interrupt, it will not output a control command to the read processing unit 22. The read processing unit 22 no longer sends a read operation command to the interface board 30, and thus no longer reads data from the interface board.

[0059] In one example, the DMA controller 24 can obtain the operating parameters in each statistical cycle (the interval of the statistical cycle can be configured based on experience), and judge whether the data sending condition is met according to the operating parameters. If it is met, the DMA controller 24 can send all the data in the buffer 23 to the main control board 10. If it is not met, the DMA controller 24 does not send the data in the buffer 23 to the main control board 10 at present, but waits for the next cycle, continues to obtain the operating parameters, and judges whether the data sending condition is met according to the operating parameters, and so on.

[0060] The operating parameter may be the amount of data in the buffer 23, or the interruption interval. There is no limitation on the operating parameter. The above process is described in the following manner.

[0061] Mode 1: The operating parameter is the amount of data in the buffer 23. The DMA controller 24 obtains the amount of data in the buffer 23 in each statistical cycle. If the amount of data reaches a preset threshold (the preset threshold can be configured based on experience, such as 95% of the maximum storage capacity of the buffer 23, and there is no limit to this preset threshold), it means that a large amount of data has been stored in the buffer 23, and these data have already filled up the storage space of the buffer 23. Therefore, the DMA controller 24 determines that the data sending condition is met and sends all the data in the buffer 23 to the main control board 10. If the data amount does not reach the preset threshold, it means that there is still unoccupied storage space in the buffer 23. Therefore, the DMA controller 24 determines that the data sending condition is not met, and currently does not send the data in the buffer 23 to the main control board 10, and waits for the next cycle to obtain the amount of data in the buffer 23.

[0062] Mode 2: The operating parameter is the interruption interval, that is, the difference between the current time and the time when the interruption processing unit 21 last received an interrupt. The DMA controller 24 obtains the interruption interval of the interruption processing unit 21 in each statistical cycle. If it is determined according to the interruption interval that the interruption processing unit 21 has not received an interrupt within a preset time (the preset time can be configured based on experience and is not limited to this), the DMA controller 24 determines that the data transmission condition is met and sends all the data in the buffer 23 to the main control board 10. If it is determined according to the interruption interval that the interruption processing unit 21 has received an interrupt within the preset time, the DMA controller 24 determines that the data transmission condition is not met, and does not currently send the data in the buffer 23 to the main control board 10, and waits for the next cycle to obtain the interruption interval of the interruption processing unit 21.

[0063] For example, when there is data to be read on the interface board 30, the interface board 30 sends an interrupt to the conversion device 20 every time length A (time length A is an empirical value and there will be errors). The preset time may be greater than or equal to time length A. Taking time length B as an example, time length B is greater than time length A.

[0064] Each time the interrupt processing unit 21 receives an interrupt, the DMA controller 24 may record the reception time of the interrupt. For example, when the interrupt processing unit 21 receives an interrupt at time 1, the DMA controller 24 records the reception time of the interrupt as time 1; when the interrupt processing unit 21 receives an interrupt at time 2, the DMA controller 24 records the reception time of the interrupt as time 2 and deletes the previously recorded time 1, and so on.

[0065] In each statistical cycle, the DMA controller 24 determines the difference between the current time and the time when the most recent interrupt was received (such as time 2). If the difference is greater than the time length B, it means that the interface board 30 has not sent an interrupt to the interrupt processing unit 21 within the time length B, and the interrupt processing unit 21 has not received an interrupt within the time length B. The reason may be that there is no data to be read on the interface board 30, that is, the read processing unit 22 of the logic device 20 has read all the data from the interface board 30. Therefore, the DMA controller 24 determines that the data sending condition is met, and sends all the data in the buffer 23 to the main control board 10.

[0066] If the difference is less than the time length B, it means that the interface board 30 sends an interrupt to the interrupt processing unit 21 within the time length B, and the interrupt processing unit 21 receives the interrupt within the time length B, that is, the interface board 30 still has data to be read. Therefore, the DMA controller 24 determines that the data sending condition is not met.

[0067] Mode 3: The operating parameters are the amount of data in the buffer 23 and the interruption interval.

[0068] The DMA controller 24 obtains the amount of data and the interruption interval in the buffer 23 in each statistical cycle. If the amount of data reaches a preset threshold, the DMA controller 24 determines that the data transmission condition is met, and sends all the data in the buffer 23 to the main control board 10. Alternatively, if it is determined according to the interruption interval that the interruption processing unit 21 has not received an interruption within a preset time, the DMA controller 24 determines that the data transmission condition is met, and sends all the data in the buffer 23 to the main control board 10.

[0069] In one example, when the data sending condition is met, the DMA controller 24 can send all the data in the buffer 23 to the main control board 10. Specifically, the DMA controller 24 stores all the data in the buffer 23 in the memory corresponding to the main control board 10. For example, the DMA controller 24 directly moves all the data in the buffer 23 to the memory corresponding to the main control board 10 through the DMA write operation. The DMA write operation is implemented based on the DMA technology. When the DMA controller 24 writes data to the memory, the participation of the main control board 10 is not required, so the operation of the main control board 10 is omitted, and the interaction between the DMA controller 24 and the main control board 10 is not involved. The DMA controller 24 only needs to move the data to the memory corresponding to the main control board 10.

[0070] In summary, the DMA controller 24 moves all the data in the buffer 23 to the memory corresponding to the main control board 10. This operation does not require the participation of the main control board 10, and there is no restriction on this process.

[0071] After the data storage is completed, that is, after all the data in the buffer 23 are stored in the memory, the DMA controller 24 can also send a DMA completion interrupt (such as a PCI-E in-band interrupt), BD (Buffer Descriptor) information and data length to the main control board 10. The BD information may include but is not limited to the starting address of the data in the buffer 23 in the memory. Of course, the BD information may also include other content, which is not limited. The data length is the data length of the data in the buffer 23.

[0072] After receiving the DMA completion interrupt, BD information and data length, the main control board 10 determines that data needs to be obtained from the memory based on the DMA completion interrupt. In order to obtain data from the memory, the main control board 10 uses the BD information to determine the starting address of the data in the memory, and then reads data matching the data length starting from this starting address. In this way, the main control board 10 successfully obtains the data from the interface board 30.

[0073] Based on the above technical solution, in the embodiment of the present application, after receiving the interrupt sent by the interface board, the conversion device does not send the interrupt to the main control board, but directly reads the data from the interface board. In this way, the process of reading data from the interface board does not need to be initiated by the main control board. The conversion device stores the read data in the buffer, and after the data reading is completed, the data in the buffer is sent to the main control board. Obviously, the above method can avoid the main control board initiating the data reading process, that is, the main control board does not need to participate in the acquisition of data. The main control board only reads data from the memory after receiving the DMA completion interrupt, thereby releasing a large amount of resources of the main control board, avoiding the main control board from being occupied by data reading operations for a long time, saving main control board resources, improving bandwidth utilization, improving the efficiency of the main control board in acquiring data, improving the overall performance of the network device, and reducing the occupancy rate of the main control board.

[0074] See also Figure 3 As shown, in an embodiment of the present application, a network device is also proposed, the network device may include a main control board, an interface board and a conversion device, the conversion device may be connected to the main control board through a first type of interface, and the conversion device may be connected to the interface board through a second type of interface; wherein:

[0075] The interface board is used to send an interrupt to the conversion device;

[0076] The conversion device is used to receive an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the conversion device prohibits the interrupt from being sent to the main control board, and sends a read operation command to the interface board so that the interface board returns data according to the read operation command; after receiving the data returned by the interface board, the data is stored in the buffer of the conversion device;

[0077] The conversion device is also used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board.

[0078] Optionally, in one example, if the operating parameter is the amount of data, the conversion device determines that the operating parameter meets the data uploading condition by specifically: when the amount of data in the buffer reaches a preset threshold, it is determined that the operating parameter meets the data uploading condition.

[0079] Optionally, in one example, if the operating parameter is an interruption interval, the conversion device determines that the operating parameter meets the data sending condition by specifically: when the conversion device does not receive an interruption sent by the interface board within a preset time, it determines that the operating parameter meets the data sending condition.

[0080] Optionally, in one example, when the conversion device sends the data in the buffer to the main control board, it is specifically used to: store all the data in the buffer into the memory corresponding to the main control board; the conversion device is also used to send a DMA completion interrupt to the main control board after the data storage is completed;

[0081] The main control board is used to receive the DMA completion interrupt sent by the conversion device, and obtain data from the memory after receiving the DMA completion interrupt.

[0082] Optionally, in one example, the conversion device is also used to send the buffer descriptor BD information and data length corresponding to the data in the buffer to the main control board after sending a DMA completion interrupt to the main control board; when the main control board obtains data from the memory, it is specifically used to: receive the BD information and data length, and obtain data from the memory according to the BD information and data length.

[0083] Optionally, in an example, the conversion device and the main control board can be deployed on the same board; or, the conversion device can be deployed on a separate board.

[0084] The functions of the various components in the network device can be found in the above embodiments and will not be described in detail here.

[0085] Based on the same application concept as the above-mentioned network device and conversion device, the embodiment of the present application also proposes a data transmission method, which can be applied to the network device, the network device includes a main control board, an interface board and a conversion device, the conversion device is connected to the main control board through a first type of interface, and the conversion device is connected to the interface board through a second type of interface, see Figure 4 As shown, the method may include:

[0086] Step 401: the interface board sends an interrupt to the conversion device.

[0087] Step 402, the conversion device receives an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the conversion device prohibits the interrupt from being sent to the main control board, and sends a read operation command to the interface board.

[0088] Step 403: After receiving the read operation command, the interface board sends data to the conversion device.

[0089] Step 404: After receiving the data returned by the interface board, the conversion device stores the data in a buffer of the conversion device.

[0090] Step 405: the conversion device obtains operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board.

[0091] Optionally, in one example, if the operating parameter is the amount of data, the conversion device determines that the operating parameter meets the data uploading condition, which may include: when the amount of data in the buffer reaches a preset threshold, determining that the operating parameter meets the data uploading condition.

[0092] Optionally, in one example, if the operating parameter is an interruption interval time, the conversion device determines that the operating parameter meets the data sending condition, which may include: when the conversion device does not receive an interruption sent by the interface board within a preset time, determining that the operating parameter meets the data sending condition.

[0093] Optionally, in one example, the conversion device sends the data in the buffer to the main control board, which may include: storing all the data in the buffer in the memory corresponding to the main control board; after the data storage is completed, sending a DMA completion interrupt to the main control board, so that the main control board obtains the data from the memory after receiving the DMA completion interrupt.

[0094] Optionally, in one example, the conversion device sends a DMA completion interrupt to the main control board so that the main control board obtains data from the memory after receiving the DMA completion interrupt. This may include: sending a DMA completion interrupt to the main control board, and sending the buffer descriptor BD information and data length corresponding to the data in the buffer to the main control board, so that the main control board obtains data from the memory according to the BD information and data length after receiving the DMA completion interrupt.

[0095] The systems, devices, modules or units described in the above embodiments may be implemented by computer chips or entities, or by products with certain functions. A typical implementation device is a computer, which may be in the form of a personal computer, a laptop computer, a cellular phone, a camera phone, a smart phone, a personal digital assistant, a media player, a navigation device, an email transceiver, a game console, a tablet computer, a wearable device or a combination of any of these devices.

[0096] For the convenience of description, the above device is described in various units according to their functions. Of course, when implementing the present application, the functions of each unit can be implemented in the same or multiple software and / or hardware.

[0097] Those skilled in the art will appreciate that the embodiments of the present application may be provided as methods, systems, or computer program products. Therefore, the present application may adopt the form of a complete hardware embodiment, a complete software embodiment, or an embodiment in combination with software and hardware. Moreover, the embodiments of the present application may adopt the form of a computer program product implemented in one or more computer-usable storage media (including but not limited to disk storage, CD-ROM, optical storage, etc.) that contain computer-usable program code.

[0098] The present application is described with reference to the flowcharts and / or block diagrams of the methods, devices (systems), and computer program products according to the embodiments of the present application. It should be understood that each process and / or box in the flowchart and / or block diagram, as well as the combination of the processes and / or boxes in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to generate a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that provides the functions specified in a block or multiple blocks.

[0099] Moreover, these computer program instructions can also be stored in a computer-readable memory that can guide a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce a product including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 The function specified in one or more boxes.

[0100] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for executing on the computer or other programmable device to implement the process. Figure 1 A process or multiple processes and / or boxes Figure 1 A step that specifies a function in one or more boxes.

[0101] The above is only an embodiment of the present application and is not intended to limit the present application. For those skilled in the art, the present application may have various changes and variations. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present application should be included in the scope of the claims of the present application.

Claims

1. A conversion device, characterized in that: The conversion device is applied to a network device, the network device further comprising a main control board and an interface board, the conversion device is connected to the main control board via a first type of interface, the conversion device is connected to the interface board via a second type of interface, the first type of interface is a high-speed interface, and the second type of interface is a low-speed interface, wherein: the conversion device comprises an interrupt processing unit, a read processing unit, a buffer, and a direct memory access DMA controller; The interrupt processing unit is used to receive the interrupt sent by the interface board; each time the interrupt sent by the interface board is received, the interrupt is prohibited from being sent to the main control board, and a control command is output to the read processing unit; The read processing unit is used to send a read operation command to the interface board each time the control command is received, so that the interface board returns data according to the read operation command; The buffer is used to store the data returned by the interface board; The DMA controller is used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board; Wherein, when the DMA controller sends the data in the buffer to the main control board, it is specifically used to: store all the data in the buffer into the memory corresponding to the main control board; after the data storage is completed, send a DMA completion interrupt to the main control board, and send the buffer descriptor BD information and data length corresponding to the data in the buffer to the main control board, so that the main control board obtains the data from the memory according to the BD information and data length after receiving the DMA completion interrupt; The BD information includes the starting address of the data in the buffer in the memory, and the main control board reads data matching the data length starting from the starting address.

2. The conversion device according to claim 1, characterized in that: The operating parameter is the data volume; when the DMA controller determines that the operating parameter meets the data sending condition, it is specifically used to: When the amount of data in the buffer reaches a preset threshold, it is determined that the operating parameters meet the data sending condition.

3. The conversion device according to claim 1, characterized in that: The operating parameter is an interruption interval time; when the DMA controller determines that the operating parameter meets the data sending condition, it is specifically used to: When the interrupt processing unit does not receive an interrupt sent by the interface board within a preset time, it is determined that the operating parameter meets the data sending condition.

4. A network device, characterized in that: The network device comprises a main control board, an interface board and a conversion device, wherein the conversion device is connected to the main control board via a first type of interface, and the conversion device is connected to the interface board via a second type of interface; the first type of interface is a high-speed interface, and the second type of interface is a low-speed interface, wherein: The interface board is used to send an interrupt to the conversion device; The conversion device is used to receive an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the conversion device prohibits the interrupt from being sent to the main control board, and sends a read operation command to the interface board so that the interface board returns data according to the read operation command; after receiving the data returned by the interface board, the data is stored in the buffer of the conversion device; The conversion device is further used to obtain operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board; Wherein, when the conversion device sends the data in the buffer to the main control board, it is specifically used to: store all the data in the buffer into the memory corresponding to the main control board; after the data storage is completed, send a DMA completion interrupt to the main control board, and send the buffer descriptor BD information and data length corresponding to the data in the buffer to the main control board; The main control board is used to obtain data from the memory according to the BD information and data length after receiving the DMA completion interrupt; The BD information includes the starting address of the data in the buffer in the memory, and the main control board reads data matching the data length starting from the starting address.

5. The network device according to claim 4, characterized in that: The conversion device and the main control board are deployed on the same single board; or, the conversion device is deployed on a separate single board.

6. A data transmission method, characterized in that: Applied to a network device, the network device includes a main control board, an interface board and a conversion device, characterized in that the conversion device is connected to the main control board through a first type of interface, the conversion device is connected to the interface board through a second type of interface, the first type of interface is a high-speed interface, and the second type of interface is a low-speed interface, the method includes: The interface board sends an interrupt to the conversion device; The conversion device receives an interrupt sent by the interface board; each time an interrupt sent by the interface board is received, the interrupt is prohibited from being sent to the main control board, and a read operation command is sent to the interface board; After receiving the read operation command, the interface board sends data to the conversion device; After receiving the data returned by the interface board, the conversion device stores the data in a buffer of the conversion device; The conversion device obtains operating parameters, and when the operating parameters meet the data sending conditions, the data in the buffer is sent to the main control board; The conversion device sends the data in the buffer to the main control board, including: storing all the data in the buffer into the memory corresponding to the main control board; after the data storage is completed, sending a DMA completion interrupt to the main control board, and sending the buffer descriptor BD information and data length corresponding to the data in the buffer to the main control board, so that the main control board obtains the data from the memory according to the BD information and data length after receiving the DMA completion interrupt; The BD information includes the starting address of the data in the buffer in the memory, and the main control board reads data matching the data length starting from the starting address.

Images