Miniature sensors

Abstract

The present invention relates to a micro sensor, comprising a substrate, a chip, and a first sensing element. The substrate has a plate-like shape, including a surface and an internal connection structure. The chip is embedded in the substrate and electrically connected to the internal connection structure. The first sensing element is arranged on the surface of the substrate and electrically connected to the chip through the internal connection structure. Through the present invention, the space occupied by the element can be reduced, the technical effect of miniaturization can be achieved, and the accuracy of sensing can be increased.

Description

Technical Field

[0001] The present invention relates to a sensor, and in particular to a micro sensor. Background Art

[0002] The integrated circuit (IC) industry has experienced exponential growth. Technological improvements in IC materials and design have produced several generations of ICs, each with smaller and more complex circuits than the previous generation, and have been used in various devices in daily life (e.g., mobile phones, transformers, batteries, cars, etc.). In order to further increase the performance of integrated circuit devices, the industry is committed to seeking various miniaturization methods that can improve production efficiency and reduce related costs. For example, in various micro sensors (e.g., microphones, gyroscopes, etc.) in today's electronic devices, the substrate occupies a certain amount of space, which limits the space for other components (such as batteries). If the space occupied by the substrate can be reduced, the additional space can be flexibly used to meet the needs of users.

[0003] In existing sensors, microelectromechanical systems (MEMS) components and application-specific integrated circuit (ASIC) chips are usually placed on the surface of a substrate to form a sensor (such as a micro sensor) to perform sensing and data analysis respectively. However, today's electronic devices have increasingly higher requirements for space, so how to further reduce the space occupied by the above components is currently a topic of concern in the industry. Summary of the invention

[0004] Some embodiments of the present invention relate to a micro sensor, including a substrate, a chip, and a sensing element. The substrate has a plate-like shape, including a surface and an internal connection structure, and the internal connection structure is arranged in the substrate. The chip is embedded in the substrate and electrically connected to the internal connection structure. The sensing element is arranged on the surface of the substrate and electrically connected to the chip through the internal connection structure.

[0005] In some embodiments of the present invention, the microsensor further includes a housing disposed on a substrate, wherein the substrate and the housing form a space, and the sensing element is disposed in the space. The substrate includes a perforation, and the perforation partially overlaps with the sensing element in a direction perpendicular to the substrate surface. The perforation has a first section, a second section, and a third section in sequence in a direction perpendicular to the substrate surface, and the size of the second section is larger than the first section and the third section. In other embodiments, the size of the second section is smaller than the first section and the third section. In addition, the first section is farther away from the sensing element than the third section, and the size of the third section is larger than the first section and the second section.

[0006] The microsensor in some embodiments of the present invention further includes a passive element (passive element) disposed in the substrate and electrically connected to the chip. The passive element is formed by an internal wiring structure. In a direction perpendicular to the surface of the substrate, the chip and the sensing element at least partially overlap. In addition, the microsensor further includes a second sensing element disposed on the substrate, and the sensing element and the second sensing element are disposed on opposite sides of the substrate. Furthermore, the microsensor further includes a circuit board disposed on the same side of the substrate as the sensing element, and the circuit board is electrically connected to the substrate. The sensing element and the circuit board have a spacing in a direction perpendicular to the surface of the substrate. The microsensor further includes a sealing material disposed between the substrate and the circuit board, and the substrate further includes a perforation that partially overlaps with the sensing element in a direction perpendicular to the surface of the substrate, and the sealing material surrounds the perforation. The circuit board includes a through hole, and in a direction perpendicular to the surface of the substrate, the through hole partially overlaps with the sensing element, and the sealing material surrounds the through hole. The substrate includes a groove, and the second sensing element is disposed in the groove.

[0007] Some embodiments of the present invention relate to a micro sensor, including a substrate, a first chip, a second chip, a first sensing element, a second sensing element, a first internal connection structure, and a second internal connection structure. The first chip and the second chip are arranged in the substrate. The first sensing element and the second sensing element are arranged on the substrate, corresponding to the first chip and the second chip respectively. The first internal connection structure and the second internal connection structure are arranged in the substrate, electrically connecting the first chip and the first sensing element, and electrically connecting the second chip and the second sensing element, respectively.

[0008] In some embodiments of the present invention, the first sensing element and the second sensing element are arranged on the same side of the substrate, and the substrate includes a through hole, and the through hole overlaps with the first sensing element in a direction perpendicular to the substrate. The first sensing element and the second sensing element are arranged on the same side of the substrate, and the microsensor also includes a first shell and a second shell, which are arranged on the substrate, the first sensing element is arranged in a space formed by the substrate and the first shell, and the second sensing element is arranged in a space formed by the substrate and the second shell. In some embodiments, the first sensing element and the second sensing element are arranged on opposite sides of the substrate, and in a direction perpendicular to the substrate, the first chip and the second chip at least partially overlap. BRIEF DESCRIPTION OF THE DRAWINGS

[0009] The following will be described in detail with reference to the accompanying drawings. It should be noted that, in accordance with standard practice in the industry, various features are not shown in proportion and are only used for illustration purposes. In fact, the size of the components may be arbitrarily enlarged or reduced to clearly show the features of the present invention.

[0010] Figure 1A is a schematic diagram of a sensor according to some embodiments.

[0011] Figure 1B is a schematic diagram of a sensor according to some embodiments.

[0012] Figure 2A is a schematic diagram of a sensor according to some embodiments.

[0013] Figure 2B is a schematic diagram of a sensor according to some embodiments.

[0014] Figure 3A is a schematic diagram of a sensor according to some embodiments.

[0015] Figure 3B is a schematic diagram of a sensor according to some embodiments.

[0016] Figure 4A is a schematic diagram of a sensor according to some embodiments.

[0017] Figure 4B is a schematic diagram of a sensor according to some embodiments.

[0018] Figure 5A is a schematic diagram of a sensor according to some embodiments.

[0019] Figure 5B is a schematic diagram of a sensor according to some embodiments.

[0020] Figure 6 is a schematic diagram of a sensor according to some embodiments.

[0021] Figure 7 is a schematic diagram of a sensor according to some embodiments.

[0022] Figure 8 is a top view of a sensor according to some embodiments of the present invention.

[0023] Fig. 9 is a schematic diagram of an electronic system according to an embodiment of the present invention.

[0024] Figure 10A to Figure 10V The various steps of forming a substrate with through holes and a chip are shown.

[0025] FIG. 11A to FIG. 11Q , which shows the various steps of forming a substrate with a capacitor.

[0026] Explanation of symbols

[0027] 1A, 1B, 2A, 2B, 3A, 3B, 4A, 4B, 5A, 5B, 6, 7 Sensors

[0028] 10 Carrier board

[0029] 12 Conductive layer

[0030] 14, 20, 21, 32, 40 conductor layers

[0031] 15 Dielectric layer

[0032] 16, 24, 28, 36 insulation layer

[0033] 18, 30, 33, 38, 39, H through hole

[0034] 22, 34, 42 guide holes

[0035] 26 Conductive pad

[0036] 13, 31, 44, 46, 48 protective layer

[0037] 50 Piercing

[0038] 52, 54 Passivation layer

[0039] 100 substrates

[0040] 100A, 100B, 100C Surface

[0041] 200, 210, 220, 706 chips

[0042] 300, 310, 320, 708 sensing elements

[0043] 302, 312, 314, 322, 324 wires

[0044] 400, 401, 402 housing

[0045] 410 Opening

[0046] 500 Solder Balls

[0047] 600 Sealing material

[0048] 700 Electronic Systems

[0049] 702 Power supply element

[0050] 704 Filter Components

[0051] C Capacitor

[0052] D1, D2, D3, D4, D5, D6, D7, D8 Size

[0053] I Internal Connection Structure

[0054] I1 First Inner Connection Structure

[0055] I2 Second Internal Connection Structure

[0056] R groove

[0057] S Circuit Board

[0058] S1, S2, S3, S4, S5, S6, S7, S8 sections

[0059] T1, T2 thickness

[0060] X, Y, Z directions DETAILED DESCRIPTION

[0061] Many different implementation methods or examples are disclosed below to implement different features of the provided subject matter. Specific embodiments of components and their arrangements are described below to illustrate the present invention. Of course, these embodiments are only for illustration and should not be used to limit the scope of the present invention.

[0062] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by the skilled person to whom this disclosure belongs. It is understood that these terms, such as those defined in commonly used dictionaries, should be interpreted as having a meaning consistent with the background or context of the relevant technology and the present disclosure, and should not be interpreted in an idealized or overly formal manner unless specifically defined herein.

[0063] In addition, repeated numbers or markings may be used in different embodiments, and these repetitions are only for the purpose of simply and clearly describing the present invention, and do not represent a specific relationship between the different embodiments and / or structures discussed. In addition, the present invention may include embodiments in which the feature components are formed to be in direct contact, and may also include embodiments in which additional feature components inserted into the above-mentioned feature components can be formed, so that the above-mentioned feature components may not be in direct contact. In addition, space-related words may be used, such as "below...", "below", "horizontal", "vertical", "above", "higher", "below", "lower", "up", "down", "top", "bottom" and similar words (such as "horizontally", "downwardly", "upwardly", etc.), these space-related words are intended to cover different directions of the device including the feature for the convenience of describing the relationship between one (some) element or feature and another (some) element or feature in the figure.

[0064] Please refer to the present invention Figure 1A, which is a schematic diagram of a sensor 1A (microsensor) according to some embodiments. The sensor 1A includes a substrate 100, a chip 200, a sensing element 300, a housing 400, and an internal connection structure I (including wire layers 14, 20, 32, 40 and guide holes 22, 34, 42 and a conductive pad 26) disposed in the substrate 100. The substrate 100 has a plate-like shape and includes a surface 100A. The chip 200 is buried in the substrate 100. The internal connection structure I is disposed in the substrate 100 and is electrically connected to the chip 200. The sensing element 300 is disposed on the surface 100A and is electrically connected to the chip 200 through the above-mentioned internal connection structure I and the wire 302. The housing 400 is disposed on the substrate 100, wherein the substrate 100 and the housing 400 form a space, and the sensing element 300 is disposed in this space.

[0065] The substrate 100 includes insulating layers 16, 28, 36, an internal connection structure I (including wire layers 14, 20, 32, 40, guide holes 22, 34, 42 and conductive pads 26) disposed in the substrate 100, and passivation layers 52 and 54 on both sides of the substrate 100. Specifically, the wire layer 14 is disposed between the passivation layer 52 and the insulating layer 16, the wire layer 20 is disposed between the insulating layers 16 and 28, the wire layer 32 is disposed between the insulating layers 28 and 36, and the wire layer 40 is disposed between the insulating layer 36 and the passivation layer 54; the guide hole 22 is disposed in the insulating layer 16, the guide hole 34 is disposed in the insulating layer 28, and the guide hole 42 is disposed in the insulating layer 36. In addition, the chip 200 is buried in the insulating layer 28, and a conductive pad 26 is disposed on the chip 200. The chip 200 is electrically connected to the internal connection structure I through the conductive pad 26 and the guide hole 34.

[0066] The above-mentioned interconnect structure I (including the wire layers 14, 20, 32, 40 and the guide holes 22, 34, 42 and the conductive pad 26) may include suitable conductive materials, such as copper and other suitable conductive materials. Those skilled in the art will understand that other conductive materials used for the above-mentioned interconnect structure I fall within the scope and spirit of the present embodiment. In some embodiments, the passivation layers 52 and 54 are solder mask. In some embodiments, the passivation layers 52 and 54 are formed by polymers. In some embodiments, the passivation layers 52 and 54 are formed by chemical vapor deposition process, spin coating process, sputtering process or a combination thereof.

[0067] The materials of the insulating layer 16 and the insulating layer 36 can be the same or similar resin materials, such as FR-4 or BT (Bismaleimide Triazine). The material of the insulating layer 28 can be different from that of the insulating layer 16 or the insulating layer 36, for example, a pure glue material that has fluidity when heated, so that the embedded components (such as the chip 200) can be completely covered without the risk of delamination. In addition, the insulating layer 16 or the insulating layer 36 can contain glass fibers, which can increase the thermal conductivity to accelerate the discharge of the heat generated by the chip 200 in the substrate 100 during operation. In addition, the glass fibers can also strengthen the support of the insulating layer 16 or the insulating layer 36 on the substrate 100.

[0068] The chip 200 may be, for example, an application-specific integrated circuit (ASIC) to process the signal sent by the sensing element 300. The sensing element 300 may be any suitable sensor, such as a gyroscope, an acoustic sensor (such as a microphone), a pressure sensor, a temperature sensor, etc. That is, the sensing element 300 may be a microelectromechanical system (MEMS) element. It should be noted that the wire 302 electrically connected to the above-mentioned sensing element 300 and the above-mentioned internal connection structure I will pass through the passivation layer 54 and directly contact the wire layer 40. In addition, the housing 400 may have an opening 410 to allow the sensing element 300 to communicate with the external environment, thereby enhancing the sensing effect of the sensing element 300. For example, the opening 410 allows external sound to propagate to the sensing element 300 through the air, thereby making the sound sensed by the sensing element 300 clearer.

[0069] Since the chip 200 in this embodiment is embedded in the substrate 100, there is no need to additionally package the chip 200, so the space occupied by the chip 200 can be reduced, thereby achieving a technical effect of miniaturization. In addition, the housing 400 is made of a metal material (such as brass or its alloy), so as to protect the sensing element 300 from external noise interference (such as electromagnetic waves, etc.), thereby increasing the accuracy of sensing.

[0070] It should be noted that in the direction perpendicular to the surface 100A (Z direction), the chip 200 and the sensing element 300 at least partially overlap, thereby reducing the distance between the chip 200 and the sensing element 300, thereby shortening the signal transmission path between the chip 200 and the sensing element 300, thereby increasing the efficiency of the sensor 1A and achieving the purpose of miniaturization.

[0071] In addition, other components (such as passive components such as capacitors, resistors, and inductors) electrically connected to the chip 200 may also be disposed in the substrate 100. For example, please refer to Figure 1B , which is a schematic diagram of a sensor 1B according to another embodiment of the present invention. Figure 1A Unlike the sensor 1A in the embodiment, the sensor 1B further includes a conductor layer 21 and a capacitor C disposed between the conductor layers 20 and 21. That is, the capacitor C in the present embodiment is a part of the internal connection structure I. The material of the capacitor C may be any suitable dielectric material to allow it to function as a capacitor. By disposing the capacitor C in the substrate 100 and electrically connecting it to the chip 200, the volume of the sensor 1B can be further reduced to achieve the technical effect of miniaturization. In addition, since the capacitor C has a filtering function, if the distance between the capacitor C and the chip 200 or the sensing element 300 is shortened, the generation of noise can be reduced to further enhance the sensing effect. However, the present invention is not limited thereto. For example, the capacitor C may also be replaced by other components (such as passive components such as resistors and inductors) to achieve the desired function.

[0072] In some embodiments, the housing 400 may not have an opening formed thereon, but instead a through hole may be formed on the substrate 100 corresponding to the sensing element 300 to allow the sensing element 300 to communicate with the external environment and enhance the sensing function of the sensing element 300. Figure 2A , which is a schematic diagram of a sensor 2 according to an embodiment of the present invention. A through hole 50 is provided in the substrate 100 of the sensor 2. The through hole 50 partially overlaps with the sensing element 300 in the direction perpendicular to the surface 100A (Z direction in FIG. 2 ), thereby allowing the sensing element 300 to communicate with the outside world, thereby enhancing the sensing function of the sensing element 300.

[0073] It should be noted that the through hole 50 has multiple sections of different sizes and is formed by a laser etching drilling process. Therefore, it is possible to drill holes on a substrate with a relatively small size (e.g., 2mm*2mm or 3mm*3mm) without affecting the flatness of the substrate, and because the laser etching drilling process does not accumulate stress on the substrate, damage to the substrate can be avoided. For example, please refer to Figure 2B , which is Figure 2AAn enlarged view of the perforation 50. The perforation 50 sequentially has sections S1, S2, S3, S4, S5, S6, S7, S8 in the direction of the vertical surface 100A (towards the +Z direction), and their sizes are D1, D2, D3, D4, D5, D6, D7, D8 respectively. Each section has a different size from the adjacent sections. In this embodiment, D1 > D2; D2 > D3; D3 < D4; D4 > D5; D5 < D6; D6 > D7; D7 < D8. Thus, for example, among the sequentially arranged sections S3, S4, S5, the size D4 of the section S4 is greater than the size D3 of the section S3 and the size D5 of the section S5. In addition, among the sequentially arranged sections S6, S7, S8, the size D7 of the section S7 is less than the size D6 of the section S6 and the size D8 of the section S8. Furthermore, the section S6 is farther from the sensing element 300 than the section S8, and the size D8 of the section S8 can be set to be greater than the size D6 of the section S6 and the size D7 of the section S7. In addition, since the perforation 50 is formed by a laser etching drilling process, the side walls of the respective sections S1, S2, S3, S4, S5, S6, S7, S8 of the perforation 50 are substantially perpendicular to the surface 100A. By forming the perforation 50 through a laser etching drilling process, debris generation inside the perforation can be avoided, thereby maintaining the cleanliness inside the perforation. In addition, the risk of damage to the components (such as the chip 200) embedded in the substrate 100 during the drilling process can also be reduced.

[0074] Some embodiments of the present invention also provide a structure in which multiple sensing elements can be arranged on a single sensor. For example, please refer to Figure 3A , which is a schematic diagram of a sensor 3A according to an embodiment of the present invention. On the surface 100A of the sensor 3A, there are a sensing element 310 (first sensing element) and a sensing element 320 (second sensing element), which are electrically connected to the internal wiring structure I in the substrate 100 through wires 312 and 322 respectively. And in the substrate 100, there are a chip 210 and a chip 220 corresponding to the sensing element 310 and the sensing element 320 respectively. The sensing element 310 and the sensing element 320 are arranged on the same side of the substrate 100, and the substrate 100 includes a perforation 50. The perforation 50 overlaps with the sensing element 320 in the direction perpendicular to the surface 100A of the substrate 100 and does not overlap with the sensing element 310. That is, the perforation 50 corresponds to the sensing element 320. Therefore, the sensing element 320 can be a sensing element that needs to communicate with the external environment more, such as an acoustic sensing element, etc. And the sensing element 310 can be a sensing element different from the sensing element 320, such as a gyroscope, etc., which does not need to directly communicate with the external environment, so as to increase the application range of the sensor 3A.

[0075] It should be noted that the sensing element 310 and the sensing element 320 are not electrically connected to each other. That is, the corresponding internal connection structures of the sensing element 310 and the sensing element 320 are not electrically connected (the sensing element 310 and the sensing element 320 are electrically connected to the electrically independent first internal connection structure I1 and the second internal connection structure I2, respectively), thereby avoiding mutual interference between the signals of the two.

[0076] In this embodiment, the sensing element 310 and the sensing element 320 are electrically connected to the inner connection structure in the substrate 100 by the wire 312 and the wire 314 respectively, however, the present invention is not limited thereto. Figure 3B , which is a schematic diagram of a sensor 3B according to another embodiment of the present invention. In this embodiment, a surface mount technology (SMT) process can also be used to form a wire 314 between the sensing element 310 and the substrate 100, and a wire 324 between the sensing element 320 and the substrate 100, and the sensing element 310 and the sensing element 320 are electrically connected to the corresponding internal connection structure through the wire 314 and the wire 324. In this way, the efficiency of the electrical connection can be increased.

[0077] Although in the above embodiment, the sensing element 310 and the sensing element 320 are disposed on the same side of the substrate 100, the present invention is not limited thereto. Figure 4A , which is a schematic diagram of a sensor 4A according to an embodiment of the present invention. In this embodiment, the sensing element 310 and the sensing element 320 are arranged on opposite sides of the substrate 100. Specifically, the sensing element 310 is arranged on the surface 100A of the substrate 100, and the sensing element 320 is arranged on the surface 100B of the substrate 100. In addition, a circuit board S is also provided on the side facing the surface 100B of the substrate 100, wherein the circuit board S and the sensing element 320 are arranged on the same side of the substrate 100, the circuit board S and the substrate 100 are electrically connected to each other through the solder balls 500, and the sensing element 320 and the circuit board S have a spacing in the direction (Z direction) perpendicular to the surface 100A, rather than in direct contact. Thereby, the sensing element 310 and the sensing element 320 can be located in different directions, respectively, to allow a variety of different designs and applications.

[0078] In this embodiment, in the direction along the surface 100A (X direction), the chip 210 and the chip 220 at least partially overlap. That is, the chip 210 and the chip 220 are substantially located on the same plane parallel to the surface 100A, thereby reducing the size of the sensor 4A in the direction perpendicular to the substrate 100 (Z direction), so that the sensor 4A can achieve a miniaturized technical effect in applications with high thickness requirements. However, the present invention is not limited to this. For example, please refer to Figure 4B, which is a schematic diagram of a sensor 4B according to an embodiment of the present invention. Figure 4B In the direction perpendicular to the substrate 100 (Z direction), the chip 210 and the chip 220 at least partially overlap. Therefore, it is allowed to set various sensing elements and chips in the direction perpendicular to the substrate 100 (Z direction), thereby reducing the size of the sensor 4B in the direction parallel to the substrate 100 (on the XY plane), so that the sensor 4B can achieve a miniaturized technical effect in applications with low thickness requirements.

[0079] Although the two chips in the above embodiment correspond to the two sensing elements respectively, the present invention is not limited thereto. For example, only one chip corresponding to the two sensing elements may be disposed in the substrate 100 to save costs and reduce space.

[0080] Next, please refer to Figure 5A , which is a schematic diagram of a sensor 5A according to an embodiment of the present invention. A sealing material 600 is further included between the substrate 100 and the circuit board S in the sensor 5A, and in a direction perpendicular to the surface 100A of the substrate 100, the through hole 50 partially overlaps with the sensing element 300 in a direction perpendicular to the surface 100A (Z direction). Therefore, the sensing element 300 can communicate with the external environment through the through hole 50, thereby increasing the sensing effect of the sensing element 300.

[0081] In addition, in some embodiments, a through hole may be formed on the circuit board S to further enhance the sensing effect of the sensing element. Figure 5B , which is a schematic diagram of a sensor 5B according to an embodiment of the present invention. Figure 5B The circuit board S in the circuit board 100 has a through hole H to further allow the sensing element 300 to sense through the through hole H on the circuit board S, thereby achieving a better degree of design freedom. In addition, in the direction perpendicular to the surface 100A (Z direction), the through hole H partially overlaps with the sensing element 300. That is, the through hole H corresponds to the position of the sensing element 300. Thereby, the distance between the through hole H and the sensing element 300 can be shortened to enhance the sensing effect of the sensing element 300. In addition, in the present embodiment, the sealing material 600 surrounds the through hole H. Therefore, the sensing element 300 disposed outside the substrate 100 can be further protected from interference from the outside. Furthermore, although the through hole 50 and the through hole H corresponding to the sensing element are provided at the same time in the present embodiment, the present invention is not limited thereto. For example, the through hole H can also be formed only in the circuit board S without forming the through hole 50 in the substrate 100, depending on the design requirements.

[0082] In the above embodiment, the thickness of the substrate 100 where the sensing element 310 and the sensing element 320 are disposed is the same, but the present invention is not limited thereto. Figure 6 , which is a schematic diagram of a sensor 6 according to an embodiment of the present invention. Figure 6 In the embodiment, the thickness of a portion of the substrate 100 can be reduced to form a groove R on the substrate 100, and the sensing element 320 is disposed in the groove R (i.e., disposed on the surface 100C of the substrate 100) to further reduce the size of the sensor 6. Specifically, the thickness of the substrate 100 where the sensing element 320 is disposed is T1 (i.e., the distance between the surface 100A and the surface 100C), and the thickness of the substrate 100 where the sensing element 320 is not disposed is T2 (i.e., the distance between the surface 100A and the surface 100B), and the thickness T2>thickness T1. Therefore, in this embodiment, the thickness of the insulating layer 16 is reduced to achieve the purpose of reducing the size of the sensor 6 by reducing the thickness of the substrate 100. However, the present invention is not limited thereto. For example, in some embodiments, the thickness of the insulating layer 28 or the insulating layer 40 can also be reduced to achieve the same purpose, depending on the design requirements. Furthermore, in this embodiment, the sensing element 310 and the sensing element 320 may be disposed on opposite sides of the substrate 100 , and a through hole 50 partially overlapping the sensing element 310 in the Z direction may be formed in the substrate 100 to achieve a technical effect similar to that of the aforementioned embodiment.

[0083] Next, please refer to Figure 7 , which is a schematic diagram of a sensor 7 according to an embodiment of the present invention. In the sensor 7, the sensing element 310 and the sensing element 320 are arranged on the same side of the substrate 100 (both are arranged on the surface 100A). In addition, the sensor 7 also includes two shells (shell 410 (first shell) and shell 420 (second shell)) arranged on the substrate 100, the sensing element 310 is arranged in the space formed by the substrate 100 and the shell 410, and the sensing element 320 is arranged in the space formed by the substrate 100 and the shell 420. By arranging the sensing element 310 and the sensing element 320 in two different spaces, mutual interference between the two sensing elements can be avoided. In addition, in the present embodiment, the sensing element 310 (first sensing element) and the sensing element 320 (second sensing element) correspond to the chip 210 (first chip) and the chip 220 (first chip), respectively, that is, the sensing element 310 and the chip 210 partially overlap in the direction (Z direction) perpendicular to the surface 100A, and the sensing element 320 and the chip 220 partially overlap in the direction (Z direction) perpendicular to the surface 100A, thereby reducing the distance between the sensing element and the chip to increase efficiency.

[0084] Next, the configuration when two sensing elements are provided on the same sensor substrate is described. Figure 8 , which is a top view of a sensor according to some embodiments of the present invention. Figure 8In the figure, the chip 210 and the chip 220 are buried in the substrate 100, and are therefore shown by dotted lines. The sensing element 310 is disposed on the through hole 50 (partially overlapped in the Z direction), and is electrically connected to the chip 210 through the wire 312 and the internal connection structure (not shown) in the substrate 100; and the sensing element 320 can partially overlap with the chip 220 in the Z direction (a direction perpendicular to the substrate 100), and is electrically connected to the chip 220 through the wire 322 and the internal connection structure (not shown) in the substrate 100.

[0085] Please refer to Fig. 9 , which is a schematic diagram of an electronic system 700 of an embodiment of the present invention. The electronic system 700 mainly includes a power supply element 702, a filter element 704, a chip 706, and a sensing element 708. The power supply element 702 can be, for example, a suitable element such as a power management integrated circuit, which is used to supply power and is electrically connected to the filter element 704. Since the current provided by the power supply element 702 will contain noise, in order not to affect the operation of the electronic system 700, it is necessary to use a filter element 704 to filter the noise from the power supply element 702. The filter element 704 can be, for example, a capacitor or other element that can be used to filter noise. Then, the filter element 704 is electrically connected to the chip 706, and the chip 706 is further connected to the sensing element 708 to provide the energy required for the chip 706 and the sensing element 708 to operate.

[0086] Next, please refer to Figure 10A to Figure 10V , which shows the various steps of forming a substrate 100 having a through hole 50 and a chip 200. First, Fig. 10A In the embodiment, a carrier 10 is provided. The carrier 10 may include a suitable metal carrier (such as stainless steel). Then, a coreless carrier process may be used for manufacturing. Fig. 10B In the present invention, a conductive layer 12 is provided on the carrier 10 to serve as a buffer for the following process. The conductive layer 12 may include a suitable metal material and may be formed by a plating process (eg, electroplating, chemical plating, etc.).

[0087] exist Fig. 10C In the embodiment, a patterned conductive line layer 14 is formed on the conductive layer 12. The conductive line layer 14 can be used to resist the laser used in the subsequent process, that is, it has a buffering function. It should be noted that the process of forming the conductive line layer 14 includes appropriate deposition and patterning processes to allow Fig. 10C The conductive layer 12 in the middle is exposed from the wire layer 14. Fig. 10D In the embodiment, an insulating layer 16 is provided on the conductive layer 12 and the wire layer 14. The insulating layer 16 may be a dielectric material (such as resin, etc.) containing glass fibers, and may be combined with the conductive layer 12 and the wire layer 14 by a lamination process.

[0088] exist Fig. 10E In the embodiment, a through hole 18 is formed on the insulating layer 16 using a laser etching and drilling process. It should be noted that the through hole 18 is formed on the wire layer 14 to avoid affecting the conductive layer 12 during the laser etching and drilling process, thereby preventing the conductive layer 12 from being damaged. Fig.10F In the embodiment, a conductive material is disposed on the insulating layer 16 and in the through hole 18 to respectively form a wire layer 20 and a guide hole 22. The wire layer 20 is formed on the insulating layer 16, and the guide hole 22 is formed in the through hole 18. The wire layer 20 and the guide hole 22 can be formed by a suitable deposition process.

[0089] Then, in Figure 10G In the embodiment, an insulating layer 24 is formed on the conductive line layer 20. The insulating layer 24 may include a dielectric material (such as a resin) different from the insulating layer 16, and a lamination process may be used to combine the insulating layer 24 with other structures. Fig. 10H In the process, the chip 200 is disposed on the insulating layer 24, and a conductive pad 26 is disposed on the chip 200 to allow the chip 200 to be electrically connected to the subsequently formed internal connection structure. Fig.10I In the case of an additional dielectric material, Fig. 10H The insulating layer 24 in the chip 200 is combined with the insulating layer 24 to form an insulating layer 28 to cover the entire chip 200 and are fixed to each other through a lamination process.

[0090] exist Fig.10J In the embodiment, a through hole 30 is formed by a laser etching drilling process at the location where the wire layer 20 and the conductive pad 26 are provided. That is, in a direction perpendicular to the carrier 10, the through hole 30 partially overlaps with the wire layer 20 or the conductive pad 26. It should be noted that a portion of the wire layer 14, the wire layer 20, the through hole 22 and the through hole 30 partially overlap each other in a direction perpendicular to the carrier 10. Next, Figure 10K In the embodiment, on the insulating layer 28 and the through hole 30 ( Fig.10J ) to form a conductive layer 32 and a guide hole 34, respectively. It should be noted that a portion of the conductive layer 14, the conductive layer 20, the through hole 22, the through hole 30, the conductive layer 32 and the guide hole 34 partially overlap each other in a direction perpendicular to the carrier 10. Fig.10L In the embodiment, an insulating layer 36 is provided on the conductor layer 32 and is bonded to the above structure by a lamination process. The insulating layer 36 may be made of a resin material that is the same as or similar to the insulating layer 16, such as FR-4 or BT (Bismaleimide Triazine), and may include glass fiber.

[0091] Then, in Figure 10MIn the embodiment, a through hole 38 is formed by a laser etching and drilling process at a location of the insulating layer 36 corresponding to the conductive layer 32 (ie, the through hole 38 and the conductive layer 32 partially overlap in a direction perpendicular to the carrier). Fig.10N In the embodiment, on the insulating layer 36 and the through hole 38 ( Figure 10M ) are formed in the substrate 10, respectively. The process of forming the conductor layer 40 and the guide hole 42 may include a suitable deposition process. It should be noted that a portion of the conductor layer 14, the conductor layer 20, the through hole 22 and the through hole 30, the conductor layer 32, the guide hole 34, the conductor layer 40 and the guide hole 42 partially overlap each other in the direction perpendicular to the carrier 10. Then, Fig.10O In the embodiment of the present invention, the carrier board 10 is removed. Figure 10P In the embodiment, a protective layer 44 is formed on the conductive line layer 40. The protective layer 44 may be disposed on the above structure by a lamination process, and the process of forming the protective layer 44 may further include an exposure process.

[0092] exist Figure 10Q In the process, the conductive layer 12 is removed, and a suitable etching process can be used to remove the conductive layer 12. At this time, the protective layer 44 can protect the insulating layer 36, the wire layer 40, etc. thereunder from being affected by the etching process used to remove the conductive layer 12. Figure 10R In the embodiment of the present invention, the protective layer 44 is removed. Fig. 10S In the embodiment, protective layers 46 and 48 are respectively provided on both sides of the above structure. It should be noted that protective layers 46 and 48 do not cover a portion of the conductor layer 14, conductor layer 20, through hole 22 and through hole 30, conductor layer 32, guide hole 34, conductor layer 40 and guide hole 42 that partially overlap each other in the direction perpendicular to the insulating layer 28. Figure 10T In the process, the portion where the protection layer 46 and the protection layer 48 are not provided is etched to remove a portion of the conductive line layers 14 , 20 , 32 , 40 and the guide holes 22 , 34 , 42 , and form the through hole 50 .

[0093] exist Figure 10U In the process, the protective layer 46 and the protective layer 48 are removed. Figure 10V In the embodiment, a passivation layer 52 and a passivation layer 54 are formed on both sides of the above structure, thereby completing the substrate 100. Figure 10A to Figure 10V The above process can form a substrate 100 with a through hole 50, and the chip 200 can be embedded in the substrate 100, thereby achieving the advantages mentioned above. In addition, the conductive layer 14, 20, 32, 40 and the guide holes 22, 34, 42 and the conductive pad 26 together form an internal connection structure embedded in the substrate 100.

[0094] Some other embodiments of the present invention also provide a method for embedding other components in a substrate. For example, please refer to FIG. 11A to FIG. 11Q, which shows the various steps of forming a substrate 100 having a capacitor C. First, Fig.11A In the embodiment, a protective layer 13, an insulating layer 16, and a conductor layer 20 are provided in sequence. Fig. 11B In the embodiment, the conductive line layer 20 is patterned to form a patterned conductive line layer 20. Fig. 11C In the embodiment, a dielectric layer 15 is formed on the patterned conductive line layer 20. The method of forming the dielectric layer 15 may include a suitable deposition process, and the dielectric layer 15 may be a resin material, for example.

[0095] Then, in Fig.11D In the embodiment, a conductor layer 21 is formed on the dielectric layer 15. The process and material of the conductor layer 21 may be the same or similar to those of the conductor layer 20, and will not be described in detail herein. Fig.11E In the embodiment, the conductive line layer 21 is patterned to remove a portion of the conductive line layer 21. It should be noted that in the direction perpendicular to the insulating layer 16, the patterned conductive line layer 21 at least partially overlaps the patterned conductive line layer 20. Fig.11F In the process, a portion of the dielectric layer 15 and the conductor layer 20 are removed by etching and patterning. Fig.11F The dielectric layer 15 between the wire layer 20 and the wire layer 21 is not removed, and the dielectric layer 15 between the wire layer 20 and the wire layer 21 forms a capacitor C here and serves as a part of the internal connection structure in the substrate of this embodiment. It should be noted that the present invention is not limited to this. For example, other suitable materials can also be set, and other components (such as resistors, inductors and other passive components) can be set between the wire layer 20 and the wire layer 21, depending on the design requirements. In addition, it is allowed that the capacitor C and the wire layer 21 are not set on a part of the wire layer.

[0096] exist Fig.11G In the embodiment, an insulating layer 24 is formed on the above structure, so that the above wire layer 20, the wire layer 21 and the capacitor C are buried in the insulating layer 24. The material and process of the insulating layer 24 are the same or similar to those in the above embodiment, and will not be repeated here. Fig.11H In the embodiment, a chip 200 is disposed on the insulating layer 24, and a conductive pad 26 is disposed on the chip 200. Fig.11I In the insulating layer 24 ( Fig.11H ) and the chip 200 to provide an additional dielectric material to the insulating layer 24 ( Fig.11H ) together form an insulating layer 28. At this time, the chip 200 is buried in the insulating layer 28. Fig.11J In the embodiment, a protective layer 31 is deposited on the insulating layer 28. The protective layer 31 may be a photoresist material, for example. Figure 11KIn the embodiment, a through hole 33 is formed in the insulating layer 28 and the protective layer 31 is removed. The insulating layer 28 may be patterned by the protective layer 31, and then the through hole 33 may be formed by a process such as chemical etching. Therefore, the through hole 33 may have an inclined side wall. However, the present invention is not limited thereto. In some embodiments, a laser etching drilling process may also be used to form the through hole 33, thereby achieving a through hole 33 with a vertical side wall, depending on the design requirements. Fig.11L In the embodiment, a conductive line layer 32 and a guide hole 34 are formed on the insulating layer 28 and in the through hole 33, respectively, and the conductive line layer 32 and the guide hole 34 can be formed by a suitable deposition and patterning process.

[0097] Then, in Fig.11M In the embodiment, an insulating layer 36 is formed on the insulating layer 28 and the conductive line layer 32, and a protective layer 37 is formed on the insulating layer 36. The process and material of the insulating layer 36 are as described above and will not be described again. The protective layer 37 may be a patterned photoresist layer (photoresist layer) to allow the material thereunder to be patterned in the subsequent etching process. Fig.11N The protective layer 13 and the protective layer 37 are used to pattern the material thereunder, and the protective layer 13 and the protective layer 37 are removed after patterning.

[0098] exist Fig.11O In the embodiment, the insulating layer 36 and the insulating layer 16 after patterning are etched to form a through hole 38 and a through hole 39 in the insulating layer 36 and the insulating layer 16, respectively. In the present embodiment, the through hole 38 and the through hole 39 may have inclined side walls, but the present invention is not limited thereto. For example, the through hole 38 or the through hole 39 may be formed by a laser etching drilling process, so that the through hole 38 or the through hole 39 has a straight side wall. Then, in Figure 11P In the embodiment, the conductive line layer 14 and the conductive line layer 40 are formed on the insulating layer 16 and the insulating layer 36, respectively, and the guide hole 22 and the guide hole 42 are formed in the insulating layer 16 and the insulating layer 36, respectively. Figure 11Q In the embodiment, a passivation layer 52 is disposed on the conductive line layer 14 and the insulating layer 16 , and a passivation layer 54 is disposed on the insulating layer 36 and the conductive line layer 40 , so as to form the substrate 100 .

[0099] In summary, some embodiments of the present invention provide a microsensor and allow the chip in the microsensor to be set in a substrate. In addition, some embodiments of the present invention also form perforations corresponding to sensing elements on the substrate. Furthermore, some embodiments of the present invention also provide methods for forming various elements (such as passive elements) in a substrate. Finally, some embodiments of the present invention provide a method for forming the aforementioned substrate. Through the sensor and the method for forming the microsensor described in the present invention, the size of the microsensor can be reduced to achieve the purpose of miniaturization, and the effect of the sensing element can also be enhanced.

[0100] The above content summarizes the features of many embodiments, so that any person skilled in the art can better understand the various aspects of the present invention. Any person skilled in the art may have no difficulty in designing or modifying other processes and structures based on the present invention to achieve the same purpose and / or obtain the same advantages as the embodiments of the present invention. Any person skilled in the art should also understand that different changes, substitutions and modifications are made without departing from the spirit and scope of the present invention, and such equivalent creations do not exceed the spirit and scope of the present invention.

Claims

1. A micro sensor, comprising: A substrate having a plate-like shape, comprising a surface, a first insulating layer, a second insulating layer and an internal connection structure; a chip embedded in the substrate and electrically connected to the interconnect structure, wherein the first insulating layer and the second insulating layer overlap the chip when viewed from a direction perpendicular to the surface, and the chip is located between the first insulating layer and the second insulating layer when viewed from a direction parallel to the surface; and a first sensing element disposed on the surface and electrically connected to the chip through the interconnect structure, wherein the first insulating layer and the second insulating layer at least partially overlap the first sensing element when viewed from a direction perpendicular to the surface; The substrate includes a hollow through hole, the hollow through hole is filled with air and overlaps with a portion of the first sensing element in a direction perpendicular to the surface to allow the first sensing element to communicate with the outside world. When viewed from a direction perpendicular to the surface, the first sensing element is exposed from the hollow through hole. The hollow through hole has a first section, a second section, a third section, and a fourth section in sequence in a direction perpendicular to the surface; The first section and the second section have different sizes. The second section has a smaller size than the first section and the third section, and the third section has a larger size than the fourth section. 2 . The micro sensor according to claim 1 , further comprising a shell disposed on the substrate, wherein the substrate and the shell form a space, and the first sensing element is disposed in the space. 3 . The microsensor according to claim 1 , wherein a size of the first section is larger than sizes of the second section and the fourth section. 4 . The microsensor according to claim 1 , wherein the first section is farther away from the first sensing element than the third section, and the third section is larger in size than the first section and the second section. 5 . The micro sensor according to claim 1 , further comprising a passive element disposed in the substrate and electrically connected to the chip. The microsensor according to claim 5 , wherein the passive element is formed by the interconnect structure. 7 . The microsensor according to claim 1 , wherein in a direction perpendicular to the surface, the chip at least partially overlaps with the first sensing element. 8 . The microsensor according to claim 1 , further comprising a second sensing element disposed on the substrate, and the first sensing element and the second sensing element are disposed on opposite sides of the substrate. 9 . The micro sensor according to claim 1 , further comprising a circuit board disposed on the same side of the substrate as the first sensing element, and the circuit board is electrically connected to the substrate. 10 . The micro sensor as claimed in claim 9 , wherein the first sensing element and the circuit board have a distance in a direction perpendicular to the surface.

11. The microsensor according to claim 9, further comprising a sealing material disposed between the substrate and the circuit board, wherein the substrate further comprises a through hole, the through hole partially overlaps with the first sensing element in a direction perpendicular to the surface, and the sealing material surrounds the through hole. 12 . The micro sensor according to claim 9 , wherein the circuit board comprises a through hole, and in a direction perpendicular to the surface, the through hole partially overlaps with the first sensing element. 13 . The micro sensor according to claim 12 , further comprising a sealing material disposed between the substrate and the circuit board, wherein the sealing material surrounds the through hole in a direction perpendicular to the surface. 14 . The micro sensor according to claim 1 , further comprising a second sensing element, wherein the substrate comprises a groove, and the second sensing element is disposed in the groove.

15. The micro sensor according to claim 3, wherein the hollow through hole further comprises a fifth section, The fifth section, the fourth section and the first section are arranged in sequence in a direction perpendicular to the surface, and the size of the fourth section is smaller than that of the first section and the fifth section.

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