Crack-resistant silicon-based planarization compositions, methods and films

Abstract

A composition for planarizing the surface of a semiconductor device includes a silicon-based material including siloxane, silsesquioxane, polysiloxane, polysilsesquioxane and / or polysiloxane resin; together with at least one solvent, a catalyst and a crosslinking agent, the crosslinking agent including a siloxane compound.

Description

Technical Field

[0001] The present invention relates to planarization materials, and more particularly to planarization dielectric materials for use in semiconductor and display manufacturing. Background Art

[0002] In advanced semiconductor manufacturing such as microprocessors, memory devices, and displays employing light emitting diodes, there is a need for dielectric materials that can be spin-coated onto the surface of the device to fill deep spaces or gaps between device structures to provide a relatively flat surface suitable for subsequent device layer processing.

[0003] Improved planarization dielectric materials are desired to provide planarization for advanced semiconductor devices having trenches six microns deep or deeper. It is important that such dielectric materials be crack resistant at such thicknesses, even when exposed to temperatures exceeding 400°C. It is also important for optoelectronic applications that such dielectric materials have high optical transmittance. The dielectric material should also be thermally stable when exposed to temperatures exceeding 400°C. Summary of the invention

[0004] A composition for planarizing the surface of a semiconductor device includes a silicon-based material and a crosslinking agent, wherein the crosslinking agent includes a siloxane compound according to the following general formula:

[0005]

[0006] wherein R is an aliphatic containing group, and R1, R2, R3, R4, R5 and R6 are each independently selected from the group consisting of: H or an alkyl group having substituted or unsubstituted carbon.

[0007] Various embodiments relate to a composition for planarizing a semiconductor device. The composition includes a silicon-based material, at least one solvent, a catalyst, and a crosslinking agent. The silicon-based material includes at least one of the following: a siloxane, a silsesquioxane, a polysiloxane, a polysilsesquioxane, and a polysiloxane resin. The crosslinking agent includes a siloxane compound according to the following general formula:

[0008]

[0009] Wherein R is a group containing aliphatic, and R1, R2, R3, R4, R5 and R6 are each independently selected from the group consisting of: H or an alkyl group having substituted or unsubstituted carbon. In some embodiments, the crosslinking agent includes at least one of the following items: bis-(trimethoxysilylpropyl)amine, bis(triethoxysilyl)methane, 1,2-bis(triethoxysilyl)ethane and 1-(triethoxysilyl)-2-(diethoxymethylsilyl)ethane. In some other embodiments, the crosslinking agent is composed of bis-(trimethoxysilylpropyl)amine. In some embodiments, the silicon-based material includes a polysiloxane resin formed by the following monomers, and the monomers include at least one of the following items: methyltrimethoxysilane, methyltriethoxysilane, dimethyldiethoxysilane, phenyltriethoxysilane, dimethyldimethoxysilane and phenyltrimethoxysilane. In some other embodiments, the polysiloxane resin is formed by the following monomers, which are composed of the following items: methyltriethoxysilane, dimethyldiethoxysilane and phenyltriethoxysilane. In some embodiments, the concentration of the crosslinking agent is 0.1 weight percent to 5 weight percent of the composition. In some embodiments, the at least one solvent includes at least one of the following items: ethyl lactate, propylene glycol propyl ether, propylene glycol monomethyl ether acetate, ethanol, isopropanol and n-butyl acetate. In some embodiments, the catalyst includes at least one of the following items: tetramethylammonium acetate, tetramethylammonium hydroxide, tetrabutylammonium acetate, hexadecyltrimethylammonium acetate and tetramethylammonium nitrate. In some embodiments, the composition also includes a surfactant.

[0010] Various embodiments relate to a method for preparing a planarization composition. The method includes: dissolving a silicon-based material in one or more solvents to form a silicon-based material solution, adding a catalyst to the silicon-based material solution, and adding a crosslinking agent to the silicon-based material solution. The silicon-based material includes at least one of the following: siloxane, silsesquioxane, polysiloxane, polysilsesquioxane, and polysiloxane resin. The crosslinking agent includes a siloxane compound according to the following general formula:

[0011]

[0012] Wherein R is a group containing aliphatic, and R1, R2, R3, R4, R5 and R6 are each independently selected from the group consisting of: H or an alkyl group having substituted or unsubstituted carbon. In some embodiments, the crosslinking agent includes at least one of the following items: bis-(trimethoxysilylpropyl)amine, bis(triethoxysilyl)methane, 1,2-bis(triethoxysilyl)ethane and 1-(triethoxysilyl)-2-(diethoxymethylsilyl)ethane. In some other embodiments, the crosslinking agent is composed of bis-(trimethoxysilylpropyl)amine. In some embodiments, the silicon-based material includes a polysiloxane resin formed by the following monomers, and the monomers include at least one of the following items: methyltrimethoxysilane, methyltriethoxysilane, dimethyldiethoxysilane, phenyltriethoxysilane, dimethyldimethoxysilane and phenyltrimethoxysilane. In some further embodiments, the polysiloxane resin is formed from monomers consisting of methyltriethoxysilane, dimethyldiethoxysilane, and phenyltriethoxysilane. In some embodiments, the catalyst comprises at least one of tetramethylammonium acetate, tetramethylammonium hydroxide, tetrabutylammonium acetate, hexadecyltrimethylammonium acetate, and tetramethylammonium nitrate. In some embodiments, the concentration of the crosslinking agent is from 0.1 weight percent to 5 weight percent of the composition.

[0013] Various embodiments relate to a planarization film for a semiconductor device. The planarization film includes a cured silicon-based polymer, a residue of a catalyst, and a residue of a cross-linking agent. The polymer includes at least one of the following: polysiloxane, polysilsesquioxane, and polysiloxane resin. The residue of the cross-linking agent includes a residue of a siloxane compound according to the following general formula:

[0014]

[0015] Wherein R is a group containing aliphatic, and R1, R2, R3, R4, R5 and R6 are each independently selected from the group consisting of: H or an alkyl group having substituted or unsubstituted carbon. In some embodiments, the residue of the cross-linking agent includes the residue of at least one of the following items: bis-(trimethoxysilylpropyl)amine, bis(triethoxysilyl)methane, 1,2-bis(triethoxysilyl)ethane and 1-(triethoxysilyl)-2-(diethoxymethylsilyl)ethane. In some embodiments, the residue of the catalyst includes at least one of the following items: tetramethylammonium acetate, tetramethylammonium hydroxide, tetrabutylammonium acetate, hexadecyltrimethylammonium acetate and tetramethylammonium nitrate. In some embodiments, the planarization film has a film thickness greater than 6 microns in a portion of the semiconductor device.

[0016] By referring to the following description of the embodiments of the present invention in conjunction with the accompanying drawings, the above-mentioned features and other features of the present invention and the manner in which they are achieved will become more apparent, and the present invention itself will be better understood. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] Figure 1 is a schematic cross section of a portion of a semiconductor device showing the surface topography to be planarized.

[0018] Figure 2 yes Figure 1 Schematic cross section of the portion of a semiconductor device illustrating planarization of the surface topography by a planarization film according to an embodiment of the present disclosure. DETAILED DESCRIPTION

[0019] The embodiments of the present disclosure may use the composition comprising a silicon-based material and a cross-linking agent described below to apply it to the surface of a semiconductor device (such as a microprocessor, a memory device, and a display using a light-emitting diode or other type of display) to flatten the surface of the semiconductor device. The coating can be applied, for example, by spin coating or slot coating. It has been found that the flattened film formed by curing the composition according to the embodiment of the present disclosure exhibits excellent crack resistance at a thickness greater than 6 microns, even when subjected to a temperature exceeding 400°C. It has also been found that the flattened film formed by curing the composition according to the embodiment of the present disclosure exhibits high strength and high optical transmittance. It has also been found that the flattened film formed by curing the composition according to the embodiment of the present disclosure is thermally stable when exposed to a temperature exceeding 400°C.

[0020] Figure 1 is a schematic cross section of a portion of a semiconductor device showing the surface topography to be planarized. Figure 1 A semiconductor device 10 is shown that includes a substrate 12 and at least one surface feature 14. Substrate 12 may include, for example, silicon, silicon dioxide, silicon nitride, aluminum, copper, or any other material in various layers of various thicknesses and arrangements as desired for the semiconductor device. In some embodiments, surface feature 14 may be a trench formed into substrate 12.

[0021] The surface feature 14 may be described as having a width W and a depth D. In some embodiments, the depth D of the surface feature 14 may be as small as 0.01 micron, 0.1 micron, 0.5 micron, or 1 micron, and as large as 3 microns, 5 microns, 10 microns, 100 microns. In some embodiments, the depth D of the surface feature 14 may be in the range of 0.01 micron to 100 microns, 0.1 micron to 10 microns, 0.5 micron to 5 microns, or 1 micron to 3 microns. In some embodiments, the width W of the surface feature 14 may be as small as 0.01 micron, 0.1 micron, 1 micron, 10 microns, or as large as 50 microns, 100 microns, 500 microns, 1000 microns. In some embodiments, the width W of the surface feature 14 may be in the range of 0.01 micron to 1000 microns, 0.1 micron to 500 microns, 1 micron to 100 microns, or 10 microns to 50 microns.

[0022] Figure 2 yes Figure 1 FIG. 1 is a schematic cross-section of the portion of semiconductor device 10 illustrating planarization of surface features 14 by planarization film 16 according to an embodiment of the present disclosure. Figure 2 The semiconductor device 10 is shown after a planarization film 16 is formed from a silicon-based material and a crosslinker composition according to an embodiment of the present disclosure. The planarization film 16 can fill the surface features 14 to provide a substantially planar surface 18 on which subsequent device layers (not shown) can be formed. In some embodiments, the planarization film 16 can have a thickness T greater than 6 microns within a portion of the semiconductor device.

[0023] Figure 1 and Figure 2 1 shows an example in which the planarization film 16 according to an embodiment of the present disclosure can be formed. It should be understood that the planarization film 16 according to an embodiment of the present disclosure can be formed on many other topography involving different arrangements of conductive materials, non-conductive materials, and semi-conductive materials. For ease of illustration, Figure 1 and Figure 2 Only one surface feature 14 is shown in FIG. 1 . However, it should be understood that embodiments may include multiple surface features 14 .

[0024] The planarization film 16 can be formed by coating at least a portion of the semiconductor device 10 (e.g., by spin coating or slot coating a composition comprising a silicon-based material, at least one solvent, a catalyst, and a cross-linking agent as described below). In some embodiments, the composition may also include a surfactant. In some embodiments, the composition consists essentially of a composition comprising a silicon-based material, at least one solvent, a catalyst, a surfactant, and a cross-linking agent as described below.

[0025] In some embodiments, the silicon-based material may include siloxane, silsesquioxane, polysiloxane, or polysilsesquioxane, or any combination thereof. In some embodiments, the silicon-based resin may include, for example, methylsiloxane, methylsilsesquioxane, phenylsiloxane, phenylsilsesquioxane, methylphenylsiloxane, methylphenylsilsesquioxane, dimethylsiloxane, diphenylsiloxane, methylphenylsiloxane, polyphenylsilsesquioxane, polyphenylsiloxane, polymethylphenylsiloxane, polymethylphenylsilsesquioxane, polymethylsiloxane, or polymethylsilsesquioxane, or any combination thereof.

[0026] In some embodiments, the silicon-based material may additionally or alternatively include one or more polysiloxane resins, such as one or more of the glass resin polysiloxane resins purchased from Techneglas, Perrysburg, Ohio. In some embodiments, the polysiloxane resin is a silicon-based oligomer formed by limited hydrolysis and condensation reactions of one or more silicon-based monomers. In some embodiments, the silicon-based monomer may include an organic alkoxysilane with a Si-C bond, such as methyltrimethoxysilane (MTMOS), methyltriethoxysilane (MTEOS), dimethyldiethoxysilane (DMDEOS), phenyltriethoxysilane (PTEOS), dimethyldimethoxysilane, or phenyltrimethoxysilane or any combination thereof. In some embodiments, the silicon-based monomer may include an organic alkoxysilane without a Si-C bond, such as tetraethyl orthosilicate (TEOS).

[0027] In some embodiments, the concentration of the silicon-based material in the composition can be as low as 5 weight percent (wt%), 10 wt%, 20 wt%, or 30 wt%, of the total weight of the composition, or as high as 40 wt%, 50 wt%, 60 wt%, 70 wt%, or 80 wt%, of the total weight of the composition, or within any range bounded by any two of the foregoing values, for example, in some embodiments, the concentration of the silicon-based material in the composition can be in the range of 5 wt% to 80 wt%, 10 wt% to 60 wt%, or 20 wt% to 40 wt%, of the total weight of the composition.

[0028] At least one solvent can include a single solvent, such as glycol ether, glycol ether acetate, n-butyl acetate, ketone or alcohol. Glycol ether can include, for example, propylene glycol propyl ether or propylene glycol methyl ether. Glycol ether acetate can include, for example, propylene glycol methyl ether acetate (PGMEA), 2-ethoxyethyl acetate or 2-methoxyethyl acetate. Ketone can include, for example, acetone or diethyl ketone. Alcohol can include, for example, isopropanol, butanol or ethanol. In other embodiments, at least one solvent includes a mixture of two or more solvents in the aforementioned solvent.

[0029] Crosslinking agents include siloxane compounds according to the following general formula:

[0030] Formula (I)

[0031]

[0032] Wherein R is an aliphatic containing group, and R1, R2, R3, R4, R5 and R6 are each independently selected from the group consisting of: H or an alkyl group having substituted or unsubstituted carbon. In some embodiments, R is an aliphatic group.

[0033] For example, in some embodiments, the cross-linking agent can be bis-(trimethoxysilylpropyl)amine, bis(triethoxysilyl)methane, 1,2-bis(triethoxysilyl)ethane or 1-(triethoxysilyl)-2-(diethoxymethylsilyl)ethane or any combination thereof. Such cross-linking agents have high functionality to provide a greater opportunity to link high molecular weight chains and low molecular weight oligomers together. Without wishing to be bound by any theory, it is believed that in the absence of a cross-linking agent as described above, the high molecular weight chains are directly cross-linked, thereby producing a rigid structure that accumulates high stress after high temperature exposure. It is also believed that the insufficiently bonded low molecular weight oligomers weaken the coating and are more likely to break due to the accumulation of high stress in the film. High functionality cross-linking agents bond high molecular weight chains together at more locations to provide additional strength, and the aliphatic groups of the cross-linking agent provide flexibility between the chains to reduce film stress. The high functionality crosslinker also bonds to more low molecular weight oligomers, thereby acting as a chain extender to increase the molecular weight of the film and increase film strength. Thus, the planarized film according to an embodiment of the present disclosure is resistant to cracking, even at thicknesses exceeding 6 microns and after exposure to temperatures exceeding 400°C.

[0034] In some embodiments, the concentration of the crosslinker in the composition can be as low as 0.01 wt %, 0.1 wt %, 0.4 wt %, 0.6 wt %, or 0.8 wt %, or as high as 1 wt %, 2 wt %, 3 wt %, 4 wt %, or 5 wt %, of the total weight of the composition, or in any range bounded by any two of the foregoing values, for example, in some embodiments, the concentration of the crosslinker in the composition can be in the range of 0.01 wt % to 5 wt %, 0.1 wt % to 4 wt %, 0.4 wt % to 3 wt %, 0.6 wt % to 2 wt %, 0.8 wt % to 1 wt %, or 0.4 wt % to 0.8 wt %, of the total weight of the composition.

[0035] The catalyst may include, for example, tetramethylammonium acetate (TMAA), tetramethylammonium hydroxide (TMAH), tetrabutylammonium acetate (TBAA), hexadecyltrimethylammonium acetate (CTAA), tetramethylammonium nitrate (TMAN), triphenylamine, trioctylamine, tridodecylamine, triethanolamine, tetramethylphosphonium acetate, tetramethylphosphonium hydroxide, triphenylphosphine, trimethylphosphine, trioctylphosphine, aminopropyltriethoxysilane, aminopropyltriethoxysilane trifluoromethanesulfonate, and any combination thereof. Such a catalyst may be activated by heat after the composition is applied to the semiconductor device 10, so that the composition is polymerized and cross-linked to form the planarization film 16.

[0036] In some embodiments, the composition may further include a surfactant. It has been found that a surfactant can further reduce streaking, which can be particularly useful when the composition is spin-coated onto a larger diameter semiconductor device wafer or display substrate. In some embodiments, the surfactant can be a polyether-modified polydimethylsiloxane surfactant, such as Siloxane® available from BYK-Chemie, Wesel, Germany. -306 or -307.

[0037] In some embodiments, the concentration of the surfactant in the composition can be as low as 0.01 wt %, 0.1 wt %, 0.4 wt %, 0.6 wt %, or 0.8 wt %, or as high as 1 wt %, 5 wt %, 10 wt %, 15 wt %, or 20 wt %, of the total weight of the composition, or within any range bounded by any two of the foregoing values, for example, in some embodiments, the concentration of the surfactant in the composition can be in the range of 0.01 wt % to 20 wt %, 0.1 wt % to 15 wt %, 0.4 wt % to 10 wt %, 0.6 wt % to 5 wt %, or 0.8 wt % to 1 wt %, of the total weight of the composition.

[0038] In some embodiments, composition can also include can volatilize or decompose at high temperature to help make the organic acid of composition stable.In some embodiments, organic acid can include trifluoroacetic acid, p-toluenesulfonic acid, citric acid, formic acid or acetic acid or any combination thereof.In some embodiments, the concentration of organic acid can include as little as 0.1 % by weight, 0.2 % by weight, 0.3 % by weight or 0.4 % by weight of the gross weight of composition, or as much as 0.5 % by weight, 0.6 % by weight, 0.8 % by weight or 1 % by weight of the gross weight of composition, or in any range limited by any two values ​​in the aforementioned values, for example, in some embodiments, the concentration of organic acid in composition can be in the range of 0.1 % by weight to 1 % by weight, 0.2 % by weight to 0.8 % by weight, 0.3 % by weight to 0.6 % by weight or 0.4 % by weight to 0.5 % by weight of the gross weight of composition.

[0039] The method for preparing a planarization composition according to an embodiment of the present disclosure may include: providing a silicon-based material as described above, and dissolving the silicon-based material in one or more solvents to form a silicon-based material solution. The silicon-based material can be mixed into one or more solvents for one to four hours to promote the dissolution of the silicon-based material. A cross-linking agent as described above and a catalyst as described above can be added to the silicon-based material solution. The silicon-based material solution can be stirred for several hours (e.g., three hours) to form a composition. Then, the composition can be filtered through a 0.1 micron filter.

[0040] In use, the planarization composition according to the embodiment of the present disclosure can be applied to the semiconductor device 10 ( Figure 1 ). The coated device 10 may then be baked at a temperature in the range of about 160° C. to about 180° C. to remove substantially all of the at least one solvent and form an uncured film. Once the at least one solvent is substantially removed, the catalyst may be activated by heat to cure the film by polymerizing and crosslinking the silicon-based material and the crosslinking agent to form the planarization film 16. Residues of the crosslinking agent and the catalyst may remain after curing.

[0041] In some embodiments, the planarization film 16 may be cured at a temperature as low as 250° C., 260° C., 280° C., 300° C., or 350° C., or as high as 400° C., 410° C., 420° C., 430° C., 440° C., or 450° C., or at any temperature between any two of the foregoing temperatures. For example, in some embodiments, the planarization film 16 may be cured at a temperature in the range of 250° C. to 450° C., 260° C. to 440° C., 280° C. to 430° C., 300° C. to 420° C., or 350° C. to 410° C.

[0042] In some embodiments, the planarization film 18 may further include surfactant residues. According to any of the above embodiments, the surfactant residues include polyether-modified polydimethylsiloxane surfactants such as -Remnants of 307.

[0043] Although the present invention has been described with respect to exemplary designs, the present invention may be further modified within the spirit and scope of the present disclosure. Further, this application is intended to cover such departures from the present disclosure as come within known or customary practice in the art to which the invention pertains.

[0044] Example

[0045] Comparative Example - PTSRE50C Planarization Composition

[0046] PTSRE50C is a planarization composition purchased from Honeywell Electronic Materials, Santa Clara, Calif. PTSRE50C is a planarization composition including a poly(silsesquioxane) resin including a 3:1 molar ratio of poly(methylsilsesquioxane) blocks to poly(phenylsilsesquioxane) blocks and about 0.15 mole % of a poly(dimethylsiloxane) block, and including a catalyst and a surfactant.

[0047] The filtered planarizing composition was applied to three four-inch silicon wafers by spin coating, two of which were at 1000 RPM and one at 720 RPM. The wafers with the cast film were each baked on a series of two hot plates in an air environment for 60 seconds to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. Each of the wafers received a second coating, each of which was rotated at the same speed as their first coating and baked again on the hot plate as described above. One of the two wafers coated at 1000 RPM and the wafer coated at 720 RPM each received a third coating, each of which was rotated at the same speed as their first coating and baked again on the hot plate as described above. The thickness of the baked coating was measured for each of the wafers, and the thickness of the double-layer coating at 1000 RPM was found to be . The thickness of the three-layer coating at 1000RPM is And the thickness of the three-layer coating at 720RPM is The three wafers with the baked coating were cured at 410°C for 30 minutes in a nitrogen environment. The cured coatings were checked for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coating was observed on the wafer with the thinnest coating. Cracks were observed on the other two wafers with thicker coatings.

[0048] Example 1 - GR150F / GR950F planarization composition

[0049] In a 200 ml flask, 10 g of -307 surfactant was added to 90 g of ethanol and stirred at room temperature for 1 hour to prepare a 10 wt % surfactant solution. In another 200 ml flask, 0.5 g of tetrabutylammonium nitrate (TBAA) catalyst was added to 24.5 g of deionized water and stirred at room temperature for 1 hour, after which 0.305 g of trifluoroacetic acid was added and the mixture was stirred for another hour to prepare a 2 wt % TBAA catalyst solution. In another 200 ml flask, 11.4 g of trifluoroacetic acid and 34.15 g of 1,2-dihydro-1,4 ... A-1170 (bis-(trimethoxysilylpropyl)amine) crosslinker was added to 54.4 g of PGMEA and stirred at room temperature for 1 hour to prepare a crosslinker solution. In another 200 ml flask, 45.0 g of GR150F resin purchased from Techneglas, Perrysburg, Ohio was added to 55.0 g of PGMEA and stirred at room temperature for 1 hour to form a GR150F resin solution. GR150 is a poly(silsesquioxane) resin that includes equimolar amounts of poly(methylsilsesquioxane) blocks and poly(phenylsilsesquioxane) blocks and approximately 0.3 mol % of poly(dimethylsiloxane) blocks. In another 200 ml flask, 50.0 g of GR950F resin purchased from Techneglas, Perrysburg, Ohio was added to 45.0 g of PGMEA and stirred at room temperature for 1 hour to form a GR950F resin solution. GR950F is a poly(phenylsilsesquioxane) resin. In another 200 ml flask, 1.48 g of a 10 wt% surfactant solution, 2.25 g of a TBAA catalyst solution, and 0.45 g of a crosslinker solution were added to 50 g of a GR150F solution and 45 g of a GR950F solution along with 20 g of PGMEA and stirred at room temperature for 3 hours to form a flattening composition. The flattening composition was filtered through a 0.1 micron filter.

[0050] The filtered planarization composition was applied to a four-inch silicon wafer by spin coating at 1,500 revolutions per minute (RPM). The wafer with the cast film was baked in an air environment on a series of two hot plates for 60 seconds each to evaporate the solvent, wherein the first hot plate had a surface temperature of 160° C. and the second hot plate had a surface temperature of 180° C. A uniform coating was obtained.

[0051] Example 2 - GR650F planarization composition

[0052] In a 100 ml flask, 0.5 g of tetramethylammonium nitrate (TMAN) catalyst was added to 24.5 g of deionized water and stirred at room temperature for 1 hour to prepare a 2 wt % TMAN catalyst solution. In another 200 ml flask, 45.0 g of GR650F resin purchased from Techneglas, Perrysburg, Ohio was added to 55.0 g of PGMEA and stirred at room temperature for 1 hour to form a GR650F resin solution. GR650F is a poly(methylsilsesquioxane) resin. In another 200 ml flask, 0.25 g of a 10 wt % surfactant solution prepared as described above, 0.023 g of a TMAN catalyst solution, and 0.45 g of a crosslinker solution prepared as described above were added to 20 g of the GR650F resin solution and stirred at room temperature for 3 hours to form a leveling composition. The leveling composition was filtered through a 0.1 micron filter.

[0053] The filtered planarization composition was applied to a four-inch silicon wafer by spin coating at 1,500 RPM. The wafer with the cast film was baked in an air environment on a series of two hot plates for 60 seconds each to evaporate the solvent, wherein the first hot plate had a surface temperature of 160° C. and the second hot plate had a surface temperature of 180° C. A uniform coating was obtained.

[0054] Example 3 - PTSRE50C planarization composition

[0055] In a 50 ml flask, 0.06 g of A-1170 (bis-(trimethoxysilylpropyl)amine) crosslinker was added to 20 g of PTSRE50C and stirred at room temperature for 1 hour to form a planarization composition. The planarization composition was filtered through a 0.1 micron filter.

[0056] The filtered planarization composition was applied to a four-inch silicon wafer by spin coating at 1,000 RPM. The wafer with the cast film was baked in an air environment on a series of two hot plates for 60 seconds each to evaporate the solvent, wherein the first hot plate had a surface temperature of 160° C. and the second hot plate had a surface temperature of 180° C. The thickness of the coating after baking was measured and found to be The wafers with the baked coating were cured at 410° C. for 30 minutes in a nitrogen environment. The cured coating was inspected for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coating was observed.

[0057] Example 4 - PTSRE50C planarization composition

[0058] In a 200 ml flask, 34.15 g of A-1170 (bis-(trimethoxysilylpropyl)amine) crosslinker was added to 11.4 g of trifluoroacetic acid and 54.5 g of PGMEA and stirred at room temperature for 1 hour to form a crosslinker solution. In a 100 ml flask, 0.6 g of the crosslinker solution was added to 20 g of PTSRE50C and stirred at room temperature for 1 hour to form a leveling composition. The leveling composition was filtered through a 0.1 micron filter.

[0059] The filtered planarizing composition was applied to three four-inch silicon wafers by spin coating, two of which were at 1500 RPM and one at 1000 RPM. The wafers with the cast film were each baked on a series of two hot plates in an air environment for 60 seconds to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. One of the two wafers coated at 1500 RPM and the wafer coated at 1,000 RPM each received a second coating, each wafer being spun at the same speed as their first coating and baked again on the hot plates as described above. The thickness of the coating after baking was measured for each of the wafers, and the thickness of the single layer coating at 1500 RPM was found to be 2.5-3.5 W. The thickness of the double layer coating at 1500RPM is And the thickness of the double layer coating at 1000RPM is The three wafers with the baked coating were cured at 410° C. for 30 minutes in a nitrogen environment. The cured coating was inspected for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coating was observed on any of the wafers.

[0060] Example 5 - PTSRE50C planarization composition

[0061] In a 100 ml flask, 0.06 g of A-1170 (bis-(trimethoxysilylpropyl)amine) crosslinker and 11.4 g of trifluoroacetic acid were added to 20 g of PTSRE50C and stirred at room temperature for 1 hour to form a planarization composition. The planarization composition was filtered through a 0.1 micron filter.

[0062] The filtered planarization composition was applied to two four-inch silicon wafers by spin coating at 1,000 RPM. The wafers with the cast film were baked in an air environment on two hot plates in a series for 60 seconds each to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. One of the wafers was cured at 410°C for 30 minutes in a nitrogen environment, and the other wafer was cured at 410°C for 24 hours in a nitrogen environment. The thickness of the coating after baking was measured for each wafer, and the thickness of the wafer cured for 30 minutes was found to be And the thickness of the wafer cured for 24 hours is The cured coatings were examined for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coating was observed on the wafers cured for 30 minutes. Cracking was observed on the wafers cured for 24 hours.

[0063] Example 6 - PTSRE50C planarization composition

[0064] In a 100 ml flask, 0.06 g of 1,4-bis-(triethoxysilyl)methane crosslinker was added to 30 g of PTSRE50C and stirred at room temperature for 1 hour to form a planarization composition. The planarization composition was filtered through a 0.1 micron filter.

[0065] The filtered planarizing composition was applied to three four-inch silicon wafers by spin coating at 1,300 RPM. The wafers with the cast film were each baked on a series of two hot plates in an air environment for 60 seconds to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. Each of the four wafers received a second coating and hot plate baking, as described above. Three of the wafers each received a third coating and hot plate baking, as described above. Two of the three wafers with the third coating received a fourth coating and hot plate baking, as described above. One of the two wafers with the fourth coating received a fifth coating and hot plate baking, as described above. The thickness of the coating after baking was measured for each of the wafers, and the thickness of the double-layer coating was found to be about 100 Å. The thickness of the three-layer coating is The thickness of the four-layer coating is And the thickness of the five-layer coating is Four wafers with the baked coating were cured in a nitrogen environment at 410 ° for 30 minutes. The cured coatings were examined by optical microscopy and scanning electron microscopy to obtain cracking conditions. No cracking of the cured coating was observed on the wafers with double, triple or quadruple coatings. Cracks in the cured coating were observed on the wafers with five layers of coating.

[0066] Example 7 - PTSRE50C planarization composition

[0067] In a 100 ml flask, 0.12 g of 1,4-bis-(triethoxysilyl)methane crosslinker was added to 30 g of PTSRE50C and stirred at room temperature for 1 hour to form a planarization composition. The planarization composition was filtered through a 0.1 micron filter.

[0068] The filtered planarizing composition was applied to three four-inch silicon wafers by spin coating at 1,300 RPM. The wafers with the cast film were each baked on a series of two hot plates in an air environment for 60 seconds to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. Each of the four wafers received a second coating and hot plate baking, as described above. Three of the wafers each received a third coating and hot plate baking, as described above. Two of the three wafers with the third coating received a fourth coating and hot plate baking, as described above. One of the two wafers with the fourth coating received a fifth coating and hot plate baking, as described above. The thickness of the coating after baking was measured for each of the wafers, and the thickness of the double-layer coating was found to be about 100 Å. The thickness of the three-layer coating is The thickness of the four-layer coating is And the thickness of the five-layer coating is Four wafers with baked coatings were cured at 410° C. for 30 minutes in a nitrogen environment. The cured coatings were examined for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coatings was observed on wafers with double, triple, or quadruple coatings. Cracks of the cured coatings were observed on wafers with five layers of coating.

[0069] Example 8 - PTSRE50C planarization composition

[0070] In a 100 ml flask, 0.30 g of 1,4-bis-(triethoxysilyl)methane crosslinker was added to 30 g of PTSRE50C and stirred at room temperature for 1 hour to form a planarization composition. The planarization composition was filtered through a 0.1 micron filter.

[0071] The filtered planarizing composition was applied to three four-inch silicon wafers by spin coating at 1,300 RPM. The wafers with the cast film were each baked on a series of two hot plates in an air environment for 60 seconds to evaporate the solvent, wherein the first hot plate had a surface temperature of 160°C and the second hot plate had a surface temperature of 180°C. Each of the four wafers received a second coating and hot plate baking, as described above. Three of the wafers each received a third coating and hot plate baking, as described above. Two of the three wafers with the third coating received a fourth coating and hot plate baking, as described above. One of the two wafers with the fourth coating received a fifth coating and hot plate baking, as described above. The thickness of the coating after baking was measured for each of the wafers, and the thickness of the double-layer coating was found to be about 100 Å. The thickness of the three-layer coating is The thickness of the four-layer coating is And the thickness of the five-layer coating is Four wafers with baked coatings were cured at 410° C. for 30 minutes in a nitrogen environment. The cured coatings were examined for cracking by optical microscopy and scanning electron microscopy. No cracking of the cured coatings was observed on wafers with double, triple, or quadruple coatings. Cracks of the cured coatings were observed on wafers with five layers of coating.

Claims

1. A composition for planarizing the surface of a semiconductor device, the composition comprising: Silicon-based material, the silicon-based material includes polysiloxane resin, the polysiloxane resin is formed by monomers, and the monomers are composed of methyltriethoxysilane, dimethyldiethoxysilane and phenyltriethoxysilane; at least one solvent; catalyst; as well as A cross-linking agent, wherein the cross-linking agent comprises bis-(trimethoxysilylpropyl)amine; wherein the concentration of the cross-linking agent is from 0.01% to 4% by weight of the composition.

2. The composition of claim 1, wherein the catalyst comprises at least one of tetramethylammonium acetate, tetramethylammonium hydroxide, tetrabutylammonium acetate, hexadecyltrimethylammonium acetate, and tetramethylammonium nitrate.

3. A method for preparing a planarization composition, the method comprising: dissolving a silicon-based material in one or more solvents to form a silicon-based material solution, the silicon-based material comprising a polysiloxane resin, the polysiloxane resin being formed from monomers consisting of methyltriethoxysilane, dimethyldiethoxysilane and phenyltriethoxysilane; adding a catalyst to the silicon-based material solution; and adding a cross-linking agent to the silicon-based material solution, the cross-linking agent comprising bis-(trimethoxysilylpropyl)amine; The concentration of the crosslinking agent is 0.01 wt % to 4 wt % of the composition.

4. The method of claim 3, wherein the catalyst comprises at least one of tetramethylammonium acetate, tetramethylammonium hydroxide, tetrabutylammonium acetate, hexadecyltrimethylammonium acetate, and tetramethylammonium nitrate.

5. A planarization film for a semiconductor device, the film comprising: a cured silicon-based polymer comprising a polysiloxane resin formed from monomers consisting of methyltriethoxysilane, dimethyldiethoxysilane, and phenyltriethoxysilane; Catalyst residues; and Residues of a cross-linking agent, said residues of said cross-linking agent comprising residues of bis-(trimethoxysilylpropyl)amine.

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