Semiconductor device and method for forming the same

Abstract

The present invention provides a semiconductor device and a method for forming the same, comprising the following steps: providing a substrate, on which a first sub-fin is formed by removing a portion of the thickness of a fin; adjusting one end of the first sub-fin away from the substrate so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first fin to the substrate; and in a cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate presents a smooth transition. In a semiconductor device manufactured by the method for forming a semiconductor device, the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate is greater than or equal to the distance from its edge area to the substrate, and the contour line of the first sub-fin away from the substrate presents a smooth transition, which can reduce the probability of the bottom area of ​​the first sub-fin being subjected to voltage breakdown, thereby optimizing the performance of the semiconductor device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and in particular to a semiconductor device and a method for forming the same. Background Art

[0002] As integrated circuits develop towards very large-scale integrated circuits, the circuit density inside integrated circuits is increasing, the number of components contained is increasing, and the size of components is also decreasing. In order to further reduce the size of semiconductor devices, people have developed fin field-effect transistors. Fin field-effect transistors are three-dimensional structures, with one or more protruding fins formed on the fin field-effect transistor, insulating isolation components are provided between the fins, and the gate spans the fins and covers the top and side walls of the fins.

[0003] LDMOS (Laterally Diffused Metal Oxide Semiconductor) is an important component of FinFET (Fin Field Effect Transistor). Its drain and gate are separated by a fin-shaped cut mask, so applying high voltage on the drain side will not cause breakdown problems. For LDMOS (Laterally Diffused Metal Oxide Semiconductor), the focused current flows along the bottom area of ​​the fin cut, and the shape and uniformity control of the bottom of the fin cut is very important.

[0004] Specifically, Figure 1 , Figure 2a and Figure 2b The semiconductor device shown in the figure can be specifically an LDMOS, and the LDMOS includes a substrate 1, and a plurality of first fins 22 formed on the substrate 1, and a first sub-fin 21 is formed after etching the side of the first fin 22 away from the substrate 1, and an isolation material 6 is filled on the side of the first sub-fin 21 away from the substrate 1. The arrow in the figure is a current path, and the current passes through the drain 7 and then to the first sub-fin 21 at the bottom of the isolation material 6, and flows through the first sub-fin 21 to the source 8. The drain 7 and the gate 9 are separated by a fin-shaped cutting mask, so there will be no breakdown problem when applying high voltage on the drain 7 side. In the LDMOS structure, the area along the first sub-fin 21 is used as a current path. In the prior art, after the first sub-fin 21 is formed, the etched end of the first sub-fin 21 has different shapes, which will cause changes in the LDMOS.

[0005] Therefore, the present invention provides a semiconductor device and a method for forming the same, which can better control the shape and uniformity of the fin of the semiconductor device, thereby improving the performance of the semiconductor device. Summary of the invention

[0006] The object of the present invention is to provide a semiconductor device and a method for forming the same, so as to solve the problem in the prior art that the uniformity and shape of the surface of the fin cannot be well controlled when manufacturing the semiconductor device.

[0007] In order to solve the above technical problems, the present invention provides a method for forming a semiconductor device, comprising the following steps:

[0008] Providing a substrate, on which a first sub-fin is formed after a portion of the thickness of the fin is removed;

[0009] The end of the first sub-fin away from the substrate is adjusted so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first sub-fin to the substrate; and in a cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate side presents a smooth transition.

[0010] By adopting the above technical solution, the end of the first sub-fin away from the substrate is adjusted so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first fin to the substrate, and in the cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate side presents a smooth transition, so when the focusing current flows along the bottom area of ​​the first sub-fin, the probability of the bottom area of ​​the first sub-fin being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device.

[0011] Furthermore, after adjusting the end of the first sub-fin away from the substrate, the method further includes: performing a smoothing process on the end surface.

[0012] By adopting the above technical solution, after adjusting the end of the first sub-fin away from the substrate, the end surface is smoothed, which can make the end of the first sub-fin away from the substrate more uniform and improve the performance of the semiconductor device to adapt to different usage scenarios.

[0013] Further, the end of the first sub-fin away from the substrate is adjusted, including: performing an ion beam etching process on one end of the first sub-fin, and / or performing a deposition process on one end of the first sub-fin; making the end surface flat or a curved surface protruding from the side away from the substrate;

[0014] The above-mentioned technical solution is used to adjust the end of the first sub-fin away from the substrate, including: performing an ion beam etching process on one end of the first sub-fin, and / or performing a deposition process on one end of the first sub-fin, so that the end face is flat or protrudes from the side away from the substrate, so that there are no burrs or sharp corners on the end face, thereby improving the performance of the semiconductor device.

[0015] Further, forming the first sub-fin includes: forming a first fin on a substrate; etching and removing a portion of the first fin to form an etched groove, and using the fin between the etched groove and the substrate as the first sub-fin.

[0016] By adopting the above technical solution, the first fin is etched to form an etched groove, which facilitates the subsequent deposition of a sacrificial layer in the etched groove.

[0017] Furthermore, before adjusting the end of the first sub-fin away from the substrate, the method further includes: depositing a sacrificial layer on the sidewall of the etched groove.

[0018] By adopting the above technical solution and depositing a sacrificial layer on the sidewall of the etched groove, the inner wall of the etched groove can be made more uniform, thereby improving the performance of the first sub-fin.

[0019] Furthermore, a second fin is formed on the substrate, and when the sacrificial layer is deposited on the sidewall of the etched groove, the method further includes: depositing the sacrificial layer on the peripheral side of the second fin.

[0020] By adopting the above technical solution, a second fin is also formed on the substrate. When a sacrificial layer is deposited on the side wall of the etching groove, it also includes: depositing a sacrificial layer on the peripheral side of the second fin. By depositing the sacrificial layer on the peripheral side of the second fin, the second fin can be effectively avoided from being affected when etching the first sub-fin.

[0021] Furthermore, after adjusting the end of the first sub-fin away from the substrate, the method further includes: performing threshold voltage adjustment ion implantation on the first sub-fin.

[0022] By adopting the above technical solution, after adjusting the end of the first sub-fin away from the substrate, it also includes: performing threshold voltage adjustment ion implantation on the first sub-fin. By performing threshold voltage adjustment ion implantation on the first sub-fin, the voltage threshold of the first sub-fin can be changed accordingly to adapt to different usage scenarios.

[0023] Furthermore, after the threshold voltage adjustment ion implantation is performed on the first sub-fin, the method further includes: annealing the first sub-fin; and / or wet cleaning the first sub-fin to make the end surface of the first sub-fin smooth. Using the above technical solution, the first sub-fin is annealed; and / or wet cleaning the first sub-fin to make the end of the first sub-fin away from the substrate smooth, thereby making the end surface of the first sub-fin smooth, so that the voltage threshold of the first sub-fin changes accordingly to adapt to different usage scenarios.

[0024] Further, the ions in the ion beam etching process include any of the following inert ions, hydrogen ions, and boron ions;

[0025] The threshold voltage adjustment ions include Group III ions and / or Group V ions.

[0026] By adopting the above technical scheme, the ions in the ion beam etching process include any of the following inert ions, hydrogen ions, and boron ions, so that the ion beam etches away the burrs or sharp corners on the first sub-fin, thereby making the end face of the first sub-fin smoothly transition, and the ion beam will not affect the chemical properties of the first sub-fin.

[0027] In addition, the threshold voltage adjustment ions include group III ions and / or group V ions. After the group III ions and / or group V ions are implanted into the first sub-fin, the voltage threshold of the first sub-fin can be changed accordingly to adapt to different usage scenarios.

[0028] Furthermore, the present invention also provides a semiconductor device, which is formed based on the above-mentioned method for forming a semiconductor device.

[0029] By adopting the above technical scheme, the semiconductor device provided by the present invention is manufactured based on the above semiconductor device formation method, and a first sub-fin is formed on the substrate. In the cross-section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate side presents a smooth transition, so that the probability of the bottom area of ​​the first sub-fin being subjected to voltage breakdown is relatively small, and thus the performance of the semiconductor device is better.

[0030] The beneficial effects of the present invention are:

[0031] The present invention provides a method for forming a semiconductor device, comprising the following steps: providing a substrate, on which a first sub-fin is formed after a fin is removed from a portion of its thickness; adjusting one end of the first sub-fin away from the substrate so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first fin to the substrate; and in a cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate is smoothly transitioned. The semiconductor device manufactured by the method for forming a semiconductor device provided by the present invention adjusts one end of the first sub-fin away from the substrate so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first fin to the substrate, and the contour line of the first sub-fin away from the substrate is smoothly transitioned, so that when the focusing current flows along the bottom area of ​​the first sub-fin, the probability of the bottom area of ​​the first sub-fin being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device. The method for forming the semiconductor device effectively solves the problem in the prior art that the uniformity and shape of the fin surface cannot be well controlled when manufacturing the semiconductor device.

[0032] In addition, the present invention also provides a semiconductor device, which is manufactured based on the above-mentioned semiconductor device formation method. In the cross-section of the semiconductor device formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate side presents a smooth transition. Therefore, when the focused current flows along the bottom area of ​​the first sub-fin, the probability of the bottom area of ​​the first sub-fin suffering from voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] Figure 1 It is a schematic diagram of a top view structure of a semiconductor device in the prior art;

[0034] Figure 2a for Figure 1 A schematic diagram of a cross-sectional structure of a semiconductor device in the Y-axis direction is shown;

[0035] Figure 2b For Figure 2a A schematic diagram of the cross-sectional structure of the first sub-fin of the corresponding semiconductor device in the X-axis direction;

[0036] Figure 3 A flow chart of a method for forming a semiconductor device provided by an embodiment of the present invention;

[0037] Figure 4a-7a A schematic diagram of a manufacturing process flow of a semiconductor device provided by an embodiment of the present invention, wherein the cross-sectional direction of the semiconductor device is the Y-axis direction;

[0038] Figure 4b-7b For Figure 4a-7a A schematic diagram of a manufacturing process flow of a first sub-fin of a corresponding semiconductor device, wherein the cross-sectional direction of the semiconductor device is the X-axis direction.

[0039] Reference numerals:

[0040] 1: substrate; 21: first sub-fin; 211: end surface; 22: first fin; 23: second fin; 3: etching groove; 4: sacrificial layer; 5: semiconductor device; 6: isolation material; 7: drain; 8: source; 9: gate. DETAILED DESCRIPTION

[0041] The technical solution of the present invention is described clearly and completely below through the accompanying drawings. Obviously, the described embodiments are part of the embodiments of the present invention, but not all of them. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0042] In the description of the present invention, it should be noted that the terms "center", "up", "down", "left", "right", "vertical", "horizontal", "inside", "outside", etc. indicate directions or positional relationships based on the directions or positional relationships shown in the accompanying drawings. They are only for the convenience of describing the present invention and simplifying the description, and are not intended to indicate or imply that the device or element referred to must have a specific direction, be constructed and operated in a specific direction. Therefore, they should not be understood as limitations on the present invention.

[0043] Furthermore, the terms “first”, “second” and “third” are used for descriptive purposes only and should not be understood as indicating or implying relative importance.

[0044] In the description of the present invention, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection or a connection through an intermediate medium, or it can be the internal communication of two components. For ordinary technicians in this field, the meanings of the above terms in the present invention can be understood in specific circumstances.

[0045] The invention aims to solve the problem that the uniformity and shape of the surface of the fin cannot be well controlled when manufacturing semiconductor devices in the prior art.

[0046] like Figure 3 As shown, an embodiment of the present invention provides a method for forming a semiconductor device, which includes the following steps:

[0047] S11: providing a substrate, on which a first sub-fin is formed after a portion of the thickness of the fin is removed.

[0048] like Figure 4a , Figure 4b , Figure 5a and Figure 5b As shown, a substrate 1 is provided, on which a first sub-fin 21 is formed after a portion of the thickness of the fin is removed.

[0049] Specifically, forming the first sub-fin 21 on the substrate 1 includes: Figure 4a and Figure 4b As shown, a first fin 22 is formed on the substrate 1. Then, as shown in FIG. Figure 5a and Figure 5b As shown, a portion of the thickness of the first fin 22 is etched away to form an etched groove 3, and the fin between the etched groove 3 and the substrate 1 is used as the first sub-fin 21. Specifically, when a portion of the thickness of the first fin 22 is etched away, an etching pattern may be first formed on the first fin 22, and then the shape of the etched groove 3 to be used later and the shape of the first sub-fin 21 are etched along the shape of the etching pattern.

[0050] In addition, when etching away a portion of the first fin 22 , the specific value of the thickness can be determined according to the height of the first sub-fin 21 to be formed subsequently, and can be selected according to actual needs, which is not limited in this embodiment.

[0051] It is important to understand that Figure 5a The first sub-fin 21 in Figure 5b The fin between the etched groove 3 and the substrate 1.

[0052] S12: Adjust the end of the first sub-fin away from the substrate so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first sub-fin to the substrate; and in a cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate has a smooth transition.

[0053] like Figure 7a and Figure 7b As shown, the end of the first sub-fin 21 away from the substrate 1 is adjusted so that S1 ≥ S2, wherein S1 is the distance from the middle area of ​​the end surface 211 of one end of the first sub-fin 21 to the substrate 1, and S2 is the distance from the edge area of ​​the end surface 211 of the first sub-fin 21 to the substrate 1; and in the cross section formed perpendicular to the length direction of the first sub-fin 21, the contour line of the first sub-fin 21 away from the substrate 1 presents a smooth transition.

[0054] Furthermore, in this embodiment, the end of the first sub-fin 21 away from the substrate 1 is adjusted, including: performing an ion beam etching process on one end of the first sub-fin 21, and / or performing a deposition process on one end of the first sub-fin 21; so that the end surface 211 is a plane or a curved surface protruding from the side away from the substrate 1.

[0055] Specifically, in order to reduce the probability of voltage breakdown in the bottom area of ​​the first sub-fin 21 when the focusing current flows along the bottom area of ​​the first sub-fin 21, the end surface 211 can be flat or an arc surface protruding from the side away from the substrate 1, thereby improving the performance of the semiconductor device 5.

[0056] In this embodiment, the first method may be to perform an ion beam etching process on the end of the first sub-fin 21 away from the substrate, and to etch away the edges or spikes on the end through the ion beam, even if the end surface 211 of the end of the first sub-fin 21 away from the substrate 1 is flat or is a curved surface protruding from the side away from the substrate 1.

[0057] It should be understood that the ions in the ion beam etching process can be inert ions, hydrogen ions or boron ions. The inert ions can be argon ions, helium ions, etc., which can be used to etch away the spikes on the end face 211 of the first sub-fin 21 with the ion beam, so that the end face 211 of the first sub-fin 21 is in a planar shape or protrudes from the curved surface on one side of the substrate 1. The ions in the ion beam etching process are selected according to actual needs. In addition, the selection of ions must not only meet the requirement that after the spikes on the end face 211 of the first sub-fin 21 are etched away with the ion beam, the end face 211 of the first sub-fin 21 is in a planar shape or protrudes from the curved surface on the side away from the substrate 1; it must also meet the requirement that the electrical properties and other properties of the first sub-fin 21 will not be affected.

[0058] More specifically, in this embodiment, the second method may be to perform a deposition process on the end of the first sub-fin 21 away from the substrate 1, so that the end surface 211 of the first sub-fin 21 away from the substrate 1 is in a planar shape or protrudes from the arc surface on the side away from the substrate 1, that is, the concave points or groove points or holes on the end surface 211 of the first sub-fin 21 are filled by the deposition process, so that the side of the first sub-fin 21 away from the substrate 1 is in a planar shape or protrudes from the arc surface on the side away from the substrate 1. The deposition process may be vapor deposition or other deposition processes, which are selected according to actual needs.

[0059] Specifically, the method of making the end surface 211 a plane or a curved surface protruding from the side away from the substrate 1 is not limited to the above adjustment method given in this embodiment, and can be selected according to actual needs.

[0060] It should be understood that when the end surface 211 of the first sub-fin 21 away from one end of the substrate 21 smoothly transitions, when the focusing current flows along the bottom area of ​​the first sub-fin 21, the probability of the bottom area of ​​the first sub-fin 21 being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device 5.

[0061] like Figure 7a and Figure 7b As shown, after adjusting the end of the first sub-fin 21 away from the substrate 1 , the further step includes: performing a smoothing process on the end surface 211 .

[0062] Specifically, since the uniformity control of the end surface 211 of the first sub-fin 21 is relatively important in the manufacturing process of the semiconductor device 5, the uniformity of the first sub-fin 21 will have a relatively important impact on the performance of the semiconductor device 5. Therefore, in order to improve the performance of the semiconductor device 5. In the actual manufacturing process, it is necessary to perform a smoothing process on the end surface 211 of the first sub-fin 21 away from the substrate 1, so that the end surface 211 of the first sub-fin 21 away from the substrate 1 is smoother.

[0063] In this embodiment, the end surface 211 of the first sub-fin 21 away from the substrate 1 is smoother, that is, the end surface 211 of the entire first sub-fin 21 is highly uniform, and there are no protrusions or depressions, that is, the roughness of the end surface 211 of the entire first sub-fin 21 is relatively low, so that when the focusing current flows along the bottom area of ​​the first sub-fin 21, the probability of the bottom area of ​​the first sub-fin 21 being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device 5 to adapt it to different usage scenarios.

[0064] like Figure 6a and Figure 6b As shown, further, before adjusting the end of the first sub-fin 21 away from the substrate 1, it also includes: depositing a sacrificial layer 4 on the sidewall of the etched groove 3. The sacrificial layer 4 is deposited on the sidewall of the etched groove 3 to protect the sidewall from being affected.

[0065] like Figure 6a As shown, further, a second fin 23 is formed on the substrate 1, and when the sacrificial layer 4 is deposited on the sidewall of the etching groove 3, it also includes: depositing the sacrificial layer 4 on the peripheral side of the second fin 23. By depositing the sacrificial layer 4 on the peripheral side of the second fin 23, the second fin 23 can be effectively prevented from being affected when the first sub-fin 21 is subsequently subjected to an ion beam etching process.

[0066] Specifically, the material of the sacrificial layer 4 can be silicon carbide or silicon nitride, etc., which is selected according to the specific situation and is not specifically limited in this embodiment. In addition, the material of the substrate 1 can be polysilicon, silicon nitride, silicon oxide, etc., which is not specifically limited in this embodiment.

[0067] Furthermore, in this embodiment, an oxide film layer and a dielectric layer may be deposited in sequence above the first fin 22 and the second fin 23 . The material of the oxide film layer may be silicon oxide or silicon oxynitride, and the material of the dielectric layer may be silicon nitride or boron nitride, which is not specifically limited in this embodiment.

[0068] In addition, when etching the first fin 22 , the oxide film layer and the dielectric layer are also etched.

[0069] Furthermore, if Figure 7a and Figure 7bAs shown, after the end of the first sub-fin 21 away from the substrate 1 is adjusted, it also includes: performing threshold voltage adjustment ion implantation on the first sub-fin 21. By performing threshold voltage adjustment ion implantation on the first sub-fin 21, the voltage threshold of the first sub-fin 21 can be changed accordingly to adapt to different usage scenarios. The threshold voltage adjustment ions include group III ions and / or group V ions. After the group III ions and / or group V ions are implanted into the first sub-fin 21, the voltage threshold of the first sub-fin 21 can be changed accordingly to adapt to different usage scenarios.

[0070] In this embodiment, the corresponding change of the voltage threshold of the first sub-fin 21 may specifically be: increasing the voltage threshold of the first sub-fin 21 or decreasing the voltage threshold of the first sub-fin 21 .

[0071] It should be understood that when the threshold voltage adjustment ions are group III ions, the voltage threshold of the first sub-fin 21 is increased; when the threshold voltage adjustment ions are group V ions, the voltage threshold of the first sub-fin 21 is increased. The specific selection is based on actual needs, and this embodiment does not specifically limit this.

[0072] Furthermore, if Figure 7a and Figure 7b As shown, after the threshold voltage adjustment ion implantation is performed on the first sub-fin 21, the method further includes: annealing the first sub-fin 21; and / or, cleaning the first sub-fin 21 by wet cleaning to make the end surface 211 of the first sub-fin 21 smooth. In order to make the end surface 211 of the first sub-fin 21 away from the substrate 1 smooth, the voltage threshold of the first sub-fin 21 can be changed accordingly to adapt to different usage scenarios.

[0073] Specifically, the first sub-fin 21 may be annealed. Alternatively, the first sub-fin 21 may be cleaned by wet cleaning to make the end surface 211 of the first sub-fin 21 away from the substrate 1 smooth. Alternatively, the first sub-fin 21 may be annealed and then cleaned by wet cleaning to make the end surface 211 of the first sub-fin 21 away from the substrate 1 smooth.

[0074] like Figure 7a and Figure 7b As shown, this embodiment further provides a semiconductor device 5, which includes a substrate 1, on which a first sub-fin 21 is formed. The semiconductor device 5 is formed based on the above-mentioned method for forming the semiconductor device 5. The formation process flow of the semiconductor device 5 will be briefly introduced below.

[0075] like Figure 4a and Figure 4b As shown, a substrate 1 is provided, and a first fin 22 is formed on the substrate 1 .

[0076] like Figure 5a and Figure 5b As shown, a portion of the thickness of the first fin 22 is removed by etching to form an etched groove 3 , and the fin portion between the etched groove 3 and the substrate 1 is used as the first sub-fin 21 .

[0077] like Figure 6a and Figure 6b As shown, a sacrificial layer 4 is deposited on the sidewalls of the etched groove 3 .

[0078] Specifically, the sacrificial layer 4 is deposited on the sidewall of the etched groove 3 , and the inner wall of the etched groove 3 is relatively uniform, thereby making the performance of the first sub-fin 21 better.

[0079] like Figure 6a As shown, a second fin 23 is also formed on the substrate 1, and when the sacrificial layer 4 is deposited on the sidewall of the etching groove 3, the process further includes: depositing the sacrificial layer 4 on the peripheral side of the second fin 23. By depositing the sacrificial layer 4 on the peripheral side of the second fin 23, the second fin 23 can be effectively prevented from being affected when the first sub-fin 21 is subsequently subjected to an ion beam etching process.

[0080] like Figure 7a and Figure 7b As shown, the end of the first sub-fin 21 away from the substrate 1 is adjusted so that S1 ≥ S2, wherein S1 is the distance from the middle area of ​​the end surface 211 of one end of the first sub-fin 21 to the substrate 1, and S2 is the distance from the edge area of ​​the end surface 211 of the first sub-fin 21 to the substrate 1; and in the cross section formed perpendicular to the length direction of the first sub-fin 21, the contour line of the first sub-fin 21 away from the substrate 1 presents a smooth transition.

[0081] That is, the cross-sectional profile of the first sub-fin 21 may be as follows: Figure 7a The arc surface shown may also be a plane (not shown in the figure). As long as the contour line of the first sub-fin 21 away from the substrate 1 is smoothly transitioned, the embodiment does not specifically limit the shape of the end surface 211 of one end of the first sub-fin 21.

[0082] It should be understood that when the end surface 211 of the first sub-fin 21 away from one end of the substrate 21 smoothly transitions, when the focusing current flows along the bottom area of ​​the first sub-fin 21, the probability of the bottom area of ​​the first sub-fin 21 being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device 5.

[0083] Furthermore, if Figure 7a and Figure 7bAs shown, one end of the first sub-fin 21 may be subjected to an ion beam etching process and / or a deposition process to make the end surface 211 a plane or a curved surface protruding from a side away from the substrate 1 .

[0084] Furthermore, if Figure 7a and Figure 7b As shown, after adjusting the end of the first sub-fin 21 away from the substrate 1, the threshold voltage adjustment ion implantation is performed on the first sub-fin 21. By implanting the threshold voltage adjustment ion implantation on the first sub-fin 21, the voltage threshold of the first sub-fin 21 can be changed accordingly to adapt to different usage scenarios.

[0085] Furthermore, if Figure 7a and Figure 7b As shown, after the threshold voltage adjustment ion implantation is performed on the first sub-fin 21 , the first sub-fin 21 is annealed; and / or the first sub-fin 21 is cleaned by wet cleaning to make one end of the first sub-fin 21 smooth.

[0086] In general, the semiconductor device 5 provided in this embodiment is manufactured based on the above-mentioned method for forming the semiconductor device 5. The first sub-fin 21 of the semiconductor device 5 is in a planar shape or protrudes from an arc surface on the side away from the substrate 1. That is, along the semiconductor device 5, viewed in the vertical direction, the shape of the end face 211 of the first sub-fin 21 on the side away from the substrate 1 is continuously and smoothly transitioned without the presence of irregular shapes such as spikes and edges.

[0087] For example, the end surface 211 of the first sub-fin 21 away from the substrate 1 may be in a plane shape or a semicircular or S-shaped smooth end surface 211, and when the focusing current flows along the bottom area of ​​the first sub-fin 21, the probability of the bottom area of ​​the first sub-fin 21 being subjected to voltage breakdown can be reduced. The probability of the bottom area of ​​the first sub-fin 21 being subjected to voltage breakdown is small, and thus the performance of the semiconductor device 5 is better.

[0088] The method for forming a semiconductor device provided in this embodiment includes the following steps: providing a substrate, on which a first sub-fin is formed by removing a portion of the thickness of a fin; adjusting the end of the first sub-fin away from the substrate so that S1 ≥ S2, wherein S1 is the distance from the middle area of ​​the end surface of one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first fin to the substrate; and in a cross section formed perpendicular to the length direction of the first sub-fin, the contour line of the first sub-fin away from the substrate side presents a smooth transition.

[0089] The semiconductor device manufactured by the method for forming a semiconductor device provided in this embodiment has a first sub-fin portion with a smooth transition of the contour line away from the substrate side, so when the focusing current flows along the bottom area of ​​the first sub-fin portion, the probability of the bottom area of ​​the first sub-fin portion being subjected to voltage breakdown can be reduced, thereby optimizing the performance of the semiconductor device. In addition, the method for forming a semiconductor device provided by the present invention effectively solves the problem that the uniformity and shape of the end surface of the first sub-fin portion cannot be well controlled when manufacturing semiconductor devices in the prior art.

[0090] In addition, this embodiment also provides a semiconductor device, which is manufactured based on the above-mentioned semiconductor device formation method. The contour line of the first sub-fin of the semiconductor away from the substrate side has a smooth transition, so that the probability of the bottom area of ​​the first sub-fin being subjected to voltage breakdown is relatively small, and thus the performance of the semiconductor device is better.

[0091] The above contents are further detailed descriptions of the present invention in combination with specific implementation methods, and it cannot be determined that the specific implementation of the present invention is limited to these descriptions. For ordinary technicians in the technical field to which the present invention belongs, several simple deductions or substitutions can be made without departing from the concept of the present invention, which should be regarded as falling within the scope of protection of the present invention.

Claims

1. A method for forming a semiconductor device, comprising the following steps: A substrate is provided, on which a first sub-fin is formed after a fin is partially removed, and the first sub-fin is formed, including: A first fin is formed on the substrate; Etching and removing a portion of the thickness of the first fin to form an etched groove, and using the fin between the etched groove and the substrate as the first sub-fin; The end of the first sub-fin away from the substrate is adjusted so that S1≥S2, wherein S1 is the distance from the middle area of ​​the end surface of the one end of the first sub-fin to the substrate, and S2 is the distance from the edge area of ​​the end surface of the first sub-fin to the substrate; and In a cross section formed perpendicular to the length direction of the first sub-fin, a contour line of the first sub-fin away from the substrate presents a smooth transition; After adjusting the end of the first sub-fin away from the substrate, the method further includes: performing threshold voltage adjustment ion implantation on the first sub-fin; After the threshold voltage adjustment ion implantation is performed on the first sub-fin, the method further includes: performing an annealing treatment on the first sub-fin; and / or cleaning the first sub-fin by wet cleaning to make the end surface of the first sub-fin smooth; The step of adjusting the end of the first sub-fin away from the substrate includes: Performing an ion beam etching process on the one end of the first sub-fin, wherein ions in the ion beam etching process include at least one of inert ions, hydrogen ions, and boron ions; The end surface is made to be a plane or a curved surface protruding from a side away from the substrate.

2. The method for forming a semiconductor device according to claim 1, wherein: After adjusting the end of the first sub-fin away from the substrate, the method further includes: performing a smoothing process on the end surface.

3. The method for forming a semiconductor device according to claim 1, wherein: Before adjusting the end of the first sub-fin away from the substrate, the method further includes: depositing a sacrificial layer on the sidewall of the etched groove.

4. The method for forming a semiconductor device according to claim 3, wherein: A second fin is also formed on the substrate, and when the sacrificial layer is deposited on the sidewall of the etched groove, the method further includes: depositing a sacrificial layer on the peripheral side of the second fin.

5. The method for forming a semiconductor device according to claim 4, wherein: The threshold voltage adjustment ions include Group III ions and / or Group V ions.

6. A semiconductor device, characterized in that: The semiconductor device is formed based on the method for forming a semiconductor device according to any one of claims 1 to 5.

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