LED chip and LED chip manufacturing method

Abstract

The present invention provides an LED chip and a method for manufacturing the LED chip. The LED chip includes a substrate and an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a transparent conductive layer, an N-electrode and a P-electrode arranged thereon. The transparent conductive layer is provided with a first window area, which is arranged above the P-type semiconductor layer to expose the N-type semiconductor layer. In the first window area, a metal layer with a thickness ranging from 0.5 to 10 nm and excellent adhesion is provided on the P-type semiconductor layer, an insulating layer is arranged above the metal layer, and the metal layer is electrically connected to the transparent conductive layer. The N-electrode includes an N-electrode pad portion and an N-electrode extension portion, the N-electrode pad portion is arranged above the insulating layer, and the N-electrode extension portion is electrically connected to the N-type semiconductor layer. The light-emitting layer located below the N-electrode is retained, and a metal layer is used in the area below the insulating layer to replace the transparent conductive layer. The metal layer with excellent adhesion firmly adheres to the insulating layer and the semiconductor layer, and the metal layer with a nanometer-level thickness is transparent and has light transmittance, so that the light-emitting area below the N-electrode is effectively utilized.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor light emitting devices, and in particular to an LED chip and a method for manufacturing the LED chip. Background Art

[0002] Light Emitting Diode (LED) is a new type of energy-saving and environmentally friendly solid-state lighting source. It has the advantages of high energy efficiency, small size, light weight, fast response speed and long life, making it widely used in many fields.

[0003] In the conventional LED epitaxial structure, the P-type semiconductor layer is on the upper layer, the N-type semiconductor layer is on the lower layer, and the main reflective layer PN junction is between the P-type semiconductor layer and the N-type semiconductor layer. During chip manufacturing, the N-type semiconductor layer needs to be exposed through an etching process, and the P-type semiconductor layer and the light-emitting layer are etched away, resulting in a low utilization rate of the main light-emitting layer. To improve this problem, there is a technical solution that involves making a silicon dioxide passivation insulating layer on the P-type semiconductor layer, then performing a small area etching in a specific area to expose the N-type semiconductor layer, making an N-negative electrode pad on the insulating layer, and using a metal electrode wire to connect the small exposed area and the N-negative electrode pad.

[0004] However, in the above technical solution, although the light-emitting layer is retained, due to the poor adhesion between the transparent conductive layer, silicon dioxide and the metal electrode, a transparent conductive layer cannot be set under the silicon dioxide layer under the N negative electrode pad for current expansion. The luminous efficiency of the area without the transparent conductive layer is extremely low, resulting in that although the light-emitting area is retained, the light emission is almost ineffective, which also causes low utilization of the light-emitting layer and waste of effective area. Summary of the invention

[0005] The object of the present invention is to provide an LED chip and a method for manufacturing the LED chip.

[0006] The present invention provides an LED chip, comprising a substrate and an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a transparent conductive layer, an N-electrode and a P-electrode arranged thereon, wherein the transparent conductive layer is provided with a first window area, and the first window area is arranged above the N-type semiconductor layer to expose the N-type semiconductor layer;

[0007] In the first window region, a metal layer is disposed on the N-type semiconductor layer, an insulating layer is disposed above the metal layer, and the metal layer is electrically connected to the transparent conductive layer;

[0008] The N-electrode includes an N-electrode pad portion and an N-electrode extension portion, the N-electrode pad portion is disposed above the insulating layer, and the N-electrode extension portion is electrically connected to the N-type semiconductor layer.

[0009] As a further improvement of the present invention, the P-type semiconductor layer and the light-emitting layer form a through N-electrode connection region to expose the N-type semiconductor layer, and the transparent conductive layer is provided with a second window region exposing the N-electrode connection region.

[0010] As a further improvement of the present invention, the N-electrode further includes an N-electrode extension portion connected to the N-electrode pad portion, and the N-electrode extension portion extends into the N-electrode connection region and is electrically connected to the N-type semiconductor layer.

[0011] As a further improvement of the present invention, the insulating layer also covers a portion of the side wall surfaces of the N-type semiconductor layer and the N-electrode connection region located below the N-electrode extension portion.

[0012] As a further improvement of the present invention, the material of the metal layer is chromium, titanium, aluminum, nickel, platinum, gold or an alloy formed by the above metals, and the thickness ranges from 0.5 to 10 nm.

[0013] As a further improvement of the present invention, the insulating layer is made of silicon dioxide.

[0014] The present invention also provides a method for manufacturing an LED chip, characterized in that it comprises the steps of:

[0015] Providing a substrate, growing an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer on the substrate, etching a portion of the light-emitting layer and the P-type semiconductor layer to form an N-electrode connection region, and exposing the N-type semiconductor layer;

[0016] forming a metal layer on the P-type semiconductor layer;

[0017] Forming a transparent conductive layer on the P-type semiconductor layer, and forming a first window region exposing the metal layer and a second window region exposing the N-electrode connection region in the transparent conductive layer;

[0018] forming an insulating layer on the metal layer;

[0019] A P electrode is formed on the transparent conductive layer, an N electrode pad portion is formed on the insulating layer, and an N electrode extension portion connected to the N electrode pad portion is formed in the N electrode connection region.

[0020] As a further improvement of the present invention, the insulating layer is also formed on a portion of the sidewall surface of the N-type semiconductor layer and the N-electrode connection region below the N-electrode extension portion.

[0021] As a further improvement of the present invention, the material of the metal layer is chromium, titanium, aluminum, nickel, platinum, gold or an alloy formed by the above metals, and the thickness ranges from 0.5 to 10 nm.

[0022] As a further improvement of the present invention, the insulating layer is made of silicon dioxide.

[0023] The beneficial effects of the present invention are as follows: by arranging the pad portion of the N electrode on the insulating layer and connecting it to the N-type semiconductor layer through the N-electrode extension portion, the light-emitting layer below the N electrode can be retained, thereby improving the light-emitting efficiency; and a metal layer is used in the area below the insulating layer to replace the transparent conductive layer. The metal layer with excellent adhesion can firmly adhere to the insulating layer and the semiconductor layer, and the metal layer with a nanometer-level thickness is transparent and light-transmitting, thereby enabling the light-emitting area below the N electrode to be effectively utilized, thereby improving the utilization rate of the light-emitting layer. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] Figure 1 It is a top view of the LED chip in the first embodiment of the present invention.

[0025] Figure 2 yes Figure 1 Cross-sectional view at AA in the middle.

[0026] Figure 3 yes Figure 1 Cross-sectional view at the middle BB.

[0027] Figure 4 It is a schematic flow chart of a method for manufacturing an LED chip in the present invention.

[0028] Figures 5 to 9 It is a schematic diagram of each step of a method for manufacturing an LED chip in the present invention. DETAILED DESCRIPTION

[0029] In order to make the purpose, technical solutions and advantages of this application clearer, the technical solutions of this application will be clearly and completely described below in combination with the specific implementation methods of this application and the corresponding drawings. Obviously, the described implementation methods are only part of the implementation methods of this application, not all of the implementation methods. Based on the implementation methods in this application, all other implementation methods obtained by ordinary technicians in this field without making creative work are within the scope of protection of this application.

[0030] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and cannot be understood as limiting the present invention.

[0031] For ease of explanation, this document uses terms that represent relative positions in space for description, such as "above", "below", "back", "front", etc., to describe the relationship of one unit or feature shown in the drawings relative to another unit or feature. Terms of relative positions in space can include different orientations of the device in use or operation other than the orientation shown in the figure. For example, if the device in the figure is turned over, the unit described as being "below" or "above" other units or features will be located "below" or "above" the other units or features. Therefore, the exemplary term "below" can encompass both the spatial orientations of below and above.

[0032] like Figure 1 and Figure 2 As shown, the present invention provides an LED chip, which includes a substrate 1 and an N-type semiconductor layer 2, a light-emitting layer 3, a P-type semiconductor layer 4, a transparent conductive layer 5, an N-electrode 6 and a P-electrode 7 arranged thereon.

[0033] The substrate is a sapphire substrate, a silicon-based substrate, a silicon carbide substrate, or a composite substrate composed of the above substrates, or other common LED substrate materials.

[0034] The N-type semiconductor layer 2 and the P-type semiconductor layer 4 may be an N-type gallium nitride epitaxial layer and a P-type gallium nitride epitaxial layer, respectively, or other common LED epitaxial layer materials.

[0035] The transparent conductive layer 5 is provided with a first window region 51 . The first window region 51 is provided above the P-type semiconductor layer 4 to expose the P-type semiconductor layer 4 .

[0036] In this embodiment, the material of the transparent conductive layer 5 is indium tin oxide. In other embodiments, the current blocking layer 53 may also be other transparent conductive oxide materials such as aluminum-doped zinc oxide.

[0037] A current blocking layer 53 is further provided between the P-type semiconductor layer 4 and the transparent conductive layer 5 . The current blocking layer 53 is located in a region below the P-electrode 7 .

[0038] Furthermore, the first window area 51 is located at one end of the LED chip and is the area where the N electrode 6 is formed. The P electrode 7 is provided at the other end of the LED chip, and the P electrode 7 includes a circular P electrode pad area 71 and a P electrode extension area 72 symmetrically provided at both ends of the P electrode pad area 71 and extending toward the first window area 51. By providing the P electrode extension area 72, the current can be extended along it, and a more uniform current distribution can be achieved inside the LED chip.

[0039] Specifically, in this embodiment, the shape of the first window area 51 is a rounded rectangle with one side facing the P electrode 7 being arc-shaped. In other embodiments, the shape of the first window area 51 can also be adaptively adjusted according to the shape of the N electrode 6 in different LED chips.

[0040] In the first window region 51 , the metal layer 8 is disposed on the P-type semiconductor layer 4 , the insulating layer 9 is disposed above the metal layer 8 , and the metal layer 8 is electrically connected to the transparent conductive layer 5 .

[0041] Preferably, the material of the metal layer 8 is a metal material with good adhesion such as chromium, titanium, aluminum, nickel, platinum, or gold, or an alloy formed by the above metals, and its thickness ranges from 0.5 to 10 nm. By using the metal layer 8 formed by a metal material with good adhesion to replace the transparent conductive layer 5 provided here in the prior art, it can be more firmly connected to the insulating layer 9 formed thereon, and the insulating layer 9 and the N electrode 6 will not fall off due to poor adhesion. By controlling the thickness of the metal layer 8 to a nanometer level in the range of 0.5-10 nm, the metal layer 8 can be made close to transparent and light-transmitting, and it can be electrically connected to the surrounding transparent conductive layer 5, so that the light-emitting area below the N electrode 6 can be effectively utilized, the utilization rate of the light-emitting layer 3 is improved, and the light-emitting efficiency of the LED is improved.

[0042] In this embodiment, the insulating layer 9 is made of silicon dioxide. In other embodiments, the insulating layer 9 may also be made of insulating materials such as silicon nitride.

[0043] The N-electrode 6 includes an N-electrode pad portion 61 and an N-electrode extension portion 62, wherein the N-electrode pad portion 61 is disposed above the insulating layer 9, and the N-electrode extension portion 62 is electrically connected to the N-type semiconductor layer 2. The N-electrode pad portion 61 is located inside the first window region 51, and a distance is provided between its side wall and the inner wall of the first window region 51 to prevent the N-electrode 6 from contacting the transparent conductive layer 5 and causing a short circuit.

[0044] The material of the P electrode 7 and the N electrode 6 is chromium, titanium, aluminum, nickel, platinum, gold, or an alloy material formed by multiple of the above materials, or a composite material formed by multiple of the above materials, and the thickness of the P electrode 7 and the N electrode 6 ranges from 1 to 3000 nm.

[0045] like Figure 3 As shown, the P-type semiconductor layer 4 and the light-emitting layer 3 form a through N-electrode connection area 41 to expose the N-type semiconductor layer 2 , and the transparent conductive layer 5 is provided with a second window area 52 exposing the N-electrode connection area 41 .

[0046] Furthermore, the N-electrode 6 further includes an N-electrode extension portion 62 connected to the N-electrode pad portion 61 , and the N-electrode extension portion 62 extends into the N-electrode connection region 41 and is electrically connected to the N-type semiconductor layer 2 .

[0047] Specifically, in this embodiment, the N-electrode connection area 41 is arranged at the middle position of the LED chip and is arranged adjacent to the N-electrode pad portion 61, and the cross section is approximately ellipsoidal. The N-electrode connection area 41 is arranged in the above area, which can facilitate the N-electrode extension portion 62 to be led out from the N-electrode pad portion 61 to achieve electrical connection with the N-type semiconductor layer 2. By connecting the N-electrode extension portion 62 to the N-electrode connection area 41, it is only necessary to etch the N-electrode connection area 41, which has a relatively small area, so that the area below the N-electrode pad portion 61, which is the main part of the N-electrode 6, does not need to be etched, and the light-emitting area therein is retained, thereby improving the utilization rate of the light-emitting layer 3 and the light-emitting efficiency of the LED chip.

[0048] Of course, in other embodiments of the present invention, the shape and position of the N-electrode connection area 41 may also be adaptively adjusted according to the actual size of the LED chip and the distribution positions of the P-electrode 7 and the N-electrode 6 .

[0049] The insulating layer 9 also covers the N-type semiconductor layer 2 and a portion of the sidewall surface of the N-electrode connection region 41 below the N-electrode extension portion 62 , thereby preventing the N-electrode 6 from being short-circuited.

[0050] In some embodiments of the present invention, the LED chip is further provided with an insulating protective layer on the transparent conductive layer 5, the P electrode 7 and the N electrode 6, and the insulating protective layer exposes the pad areas of the P electrode 7 and the N electrode 6 and covers other parts, thereby protecting the LED chip.

[0051] The present invention also provides a method for manufacturing the LED chip, comprising the steps of:

[0052] S1: providing a substrate 1, growing the N-type semiconductor layer 2, the light-emitting layer 3 and the P-type semiconductor layer 4 on the substrate 1, etching a portion of the light-emitting layer 3 and the P-type semiconductor layer 4 to form an N-electrode connection region 41, and exposing the N-type semiconductor layer 2.

[0053] Specifically, in this embodiment, the N-electrode connection area 41 is located in the middle area of ​​the surface of the LED chip, is an ellipsoidal area, and is adjacent to the area where the N-electrode 6 is set in the subsequent process.

[0054] Of course, in other embodiments of the present invention, the shape and position of the N-electrode connection area 41 may also be adaptively adjusted according to the actual size of the LED chip and the distribution positions of the P-electrode 7 and the N-electrode 6 .

[0055] S2: forming a metal layer 8 on the P-type semiconductor layer 4.

[0056] Specifically, in this embodiment, forming the metal layer 8 specifically includes: depositing a layer of metal with a thickness ranging from 0.5 to 10 nm on the P-type semiconductor layer 4, coating a photoresist negative resist, exposing and developing to form a pattern of the metal layer 8, and stripping and removing the resist to form the metal layer 8. The material of the metal layer 8 is a metal material with good adhesion such as chromium, titanium, aluminum, nickel, platinum, or gold, or an alloy formed by the above metals.

[0057] The shape of the metal layer 8 matches the shape of the N-electrode 6 .

[0058] S3: forming the transparent conductive layer 5 on the P-type semiconductor layer 4 , and forming the first window region 51 exposing the metal layer 8 and the second window region 52 exposing the N-electrode connecting region 41 in the transparent conductive layer 5 .

[0059] Before forming the transparent conductive layer 5 , a current blocking layer 53 is deposited on the P-type semiconductor layer 4 . The position of the current blocking layer 53 corresponds to the position where the P-electrode 7 is formed in the subsequent process.

[0060] Specifically, in this embodiment, forming the transparent conductive layer 5 includes: depositing indium tin oxide on the P-type semiconductor layer 4 and on the current blocking layer 53, coating the surface of the indium tin oxide layer with photoresist, exposing and developing to form the pattern of the transparent conductive layer 5, and forming the transparent conductive layer 5 after etching and de-gumming.

[0061] S4: forming the insulating layer 9 on the metal layer 8 .

[0062] Specifically, in this embodiment, forming the insulating layer 9 includes: depositing a silicon dioxide layer on the P-type semiconductor layer 4 and the metal layer 8, coating a photoresist on the surface of the silicon dioxide layer, exposing and developing to form a pattern of the insulating layer 9, and forming the insulating layer 9 after etching and stripping.

[0063] In addition to being formed on the metal layer 8, the insulating layer 9 is also deposited on part of the side wall surface of the N-electrode connection area 41 and on a part of the area where the N-electrode connection area 41 is connected to the metal layer 8, so that in the subsequent process, the N-electrode 6 can be formed thereon by vapor deposition.

[0064] In this embodiment, the insulating layer 9 is made of silicon dioxide. In other embodiments, the insulating layer 9 may also be made of insulating materials such as silicon nitride.

[0065] S5: forming a P electrode 7 on the transparent conductive layer 5 , forming an N electrode pad portion 61 on the insulating layer 9 , and forming an N electrode extension portion 62 connected to the N electrode pad portion 61 in the N electrode connection region 41 .

[0066] Specifically, in this embodiment, forming the electrode includes: depositing metal, coating a negative photoresist, exposing and developing to form the pattern of the electrode, and stripping and removing the photoresist to form the P electrode 7 layer and the N electrode 3 .

[0067] In summary, the present invention arranges the pad portion of the N electrode on the insulating layer and connects it to the N-type semiconductor layer through the N-electrode extension portion, thereby retaining the light-emitting layer below the N electrode, thereby improving the light-emitting efficiency, and adopts a metal layer to replace the transparent conductive layer in the area below the insulating layer. The metal layer with excellent adhesion can firmly adhere to the insulating layer and the semiconductor layer, and the metal layer with nanometer-level thickness is transparent and light-transmitting, so that the light-emitting area below the N electrode can be effectively utilized, thereby improving the utilization rate of the light-emitting layer.

[0068] It should be understood that although this specification is described according to implementation modes, not every implementation mode contains only one independent technical solution. This description of the specification is only for the sake of clarity. Those skilled in the art should regard the specification as a whole. The technical solutions in each implementation mode may also be appropriately combined to form other implementation modes that can be understood by those skilled in the art.

[0069] The series of detailed descriptions listed above are only specific descriptions of feasible implementation methods of the present invention and are not intended to limit the scope of protection of the present invention. All equivalent implementation methods or changes that do not deviate from the technical spirit of the present invention should be included in the scope of protection of the present invention.

Claims

1. An LED chip, comprising a substrate and an N-type semiconductor layer, a light-emitting layer, a P-type semiconductor layer, a transparent conductive layer, an N-electrode and a P-electrode arranged thereon, characterized in that: The transparent conductive layer is provided with a first window region, and the first window region is provided above the P-type semiconductor layer to expose the P-type semiconductor layer; In the first window region, a metal layer with a thickness ranging from 0.5 to 10 nm and good adhesion is provided on the P-type semiconductor layer, an insulating layer is provided above the metal layer, and the metal layer is electrically connected to the transparent conductive layer; The N-electrode includes an N-electrode pad portion and an N-electrode extension portion, the N-electrode pad portion is disposed above the insulating layer, and the N-electrode extension portion is electrically connected to the N-type semiconductor layer.

2. The LED chip according to claim 1, characterized in that: The P-type semiconductor layer and the light-emitting layer form a through N-electrode connection region, exposing the N-type semiconductor layer, and the transparent conductive layer is provided with a second window region exposing the N-electrode connection region.

3. The LED chip according to claim 2, characterized in that: The N-electrode further includes an N-electrode extension portion connected to the N-electrode pad portion, and the N-electrode extension portion extends into the N-electrode connection region and is electrically connected to the N-type semiconductor layer.

4. The LED chip according to claim 3, characterized in that: The insulating layer also covers a portion of the side wall surface of the N-type semiconductor layer and the N-electrode connection region located below the N-electrode extension portion.

5. The LED chip according to claim 1, characterized in that: The material of the metal layer is chromium, titanium, aluminum, nickel, platinum, gold or an alloy of the above metals.

6. The LED chip according to claim 1, characterized in that: The insulating layer is made of silicon dioxide.

7. A method for manufacturing an LED chip, characterized in that: Includes steps: Providing a substrate, growing an N-type semiconductor layer, a light-emitting layer and a P-type semiconductor layer on the substrate, etching a portion of the light-emitting layer and the P-type semiconductor layer to form an N-electrode connection region, and exposing the N-type semiconductor layer; Forming a metal layer with a thickness ranging from 0.5 to 10 nm and having good adhesion on the P-type semiconductor layer; the shape of the metal layer matches the shape of the N-electrode; Forming a transparent conductive layer on the P-type semiconductor layer, and forming a first window region exposing the metal layer and a second window region exposing the N-electrode connection region in the transparent conductive layer; The metal layer is electrically connected to the transparent conductive layer; forming an insulating layer on the metal layer; A P electrode is formed on the transparent conductive layer, an N electrode pad portion is formed on the insulating layer, and an N electrode extension portion connected to the N electrode pad portion is formed in the N electrode connection region.

8. The method for manufacturing an LED chip according to claim 7, characterized in that: The insulating layer is also formed on a portion of the sidewall surface of the N-type semiconductor layer and the N-electrode connection region below the N-electrode extension.

9. The method for manufacturing an LED chip according to claim 7, characterized in that: The material of the metal layer is chromium, titanium, aluminum, nickel, platinum, gold or an alloy of the above metals.

10. The method for manufacturing an LED chip according to claim 7, characterized in that: The insulating layer is made of silicon dioxide.

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