Protective coating for electrostatic chuck

Abstract

An electrostatic chuck (ESC) includes a chucking surface having at least a portion covered with silicon oxide (SiO2), silicon nitride (Si3N4), or a combination of both. The coating can be applied in situ in a processing chamber of a substrate processing tool and periodically removed and reapplied in situ to produce a fresh coating.

Description

[0001] Cross-reference to related applications

[0002] This application claims the benefit of U.S. Application No. 15 / 926,349, filed March 20, 2018, which is incorporated herein by reference for all purposes. Background Technology

[0003] Electrostatic chucks (ESCs) are widely used in various manufacturing tools, such as for thin film deposition, plasma etching, photoresist stripping, substrate cleaning, photolithography, and ion implantation.

[0004] ESC operates by applying a charge of one polarity to the chucking surface and a charge of the opposite polarity to the substrate. Due to the attraction of opposite charges, the substrate is held or clamped in place by the resulting electrostatic force.

[0005] Coulombic and Johansen-Rahbek (JR) chucks are two well-known types of ESCs. Both have a holding surface comprising a dielectric material formed over the electrodes. For coulombic ESCs, the dielectric is an insulator, while for JR-type chucks, the dielectric has a finite resistance (e.g., a volume resistivity of 5.0 at room temperature). e+15 To 0 e+16 The volume resistivity is 5.0 ohm-cm at 550℃. e+8 Up to 5.0 e+9 ohm-cm). Summary of the Invention

[0006] An electrostatic chuck (ESC) is disclosed. The ESC includes a base having a holding surface arranged as a holding substrate. The holding surface includes at least a portion covered with a coating of silicon oxide (SiO2), silicon nitride (Si3N4), or a combination of both.

[0007] A method for depositing a coating onto the holding surface of an ESC within a processing chamber of a substrate processing tool is also disclosed. In a non-exclusive variation of this method, the deposited coating is silicon oxide or silicon nitride, or a combination of both.

[0008] A method is further disclosed that (a) removes a first coating formed on the retaining surface of an ESC base using a halogen-based cleaning agent, and (b) deposits a second coating formed on the retaining surface of the ESC base. By removing the first coating and replacing it with the second coating, the worn first coating can be refreshed with a new second coating. In a non-exclusive variation of this method, the deposited coating is silicon oxide or silicon nitride, or a combination of both.

[0009] In yet another embodiment, the foregoing cleaning and coating can be performed in situ in the processing chamber. For example, during routine maintenance, a halogen-based cleaning agent can be used to remove unwanted deposits and particles that have collected on the surfaces inside the processing chamber as a byproduct of substrate processing. Following cleaning, a coating of silicon oxide and / or silicon nitride is typically applied to the cleaned surfaces in a subsequent plasma deposition step. Since the sequence of cleaning and re-coating of the chuck surface and the processing chamber are substantially the same, the chuck surface can be cleaned and re-coated in situ in the processing chamber at the same time as the processing chamber.

[0010] There are many advantages to using silicon oxide and silicon nitride formed on the chuck surface of an ESC. The coating can be used to protect the chuck surface from degradation and wear due to lateral shear forces caused by differential thermal expansion rates between the substrate and the chuck surface. The coating of silicon oxide and silicon nitride can be easily deposited on the chuck surface in situ in the processing chamber and removed. As a result, the old worn coating can be removed and replaced with a new coating as needed or at fixed time intervals, all inside the processing chamber.

[0011] In other non-exclusive embodiments, the coating applied to the chuck of an ESC can be silicon oxide, silicon nitride, a combination of both silicon oxide and silicon nitride, or a multi-layer structure comprising one or more layers, each being silicon oxide and silicon nitride. BRIEF DESCRIPTION OF DRAWINGS

[0012] The application can best be understood by referring to the following description in conjunction with the accompanying drawings.

[0013] Figure 1 is a block diagram of a substrate manufacturing tool for processing substrates in accordance with non-exclusive embodiments.

[0014] Figure 2 is a perspective view of a cross-section of an electrostatic pedestal in accordance with non-exclusive embodiments.

[0015] Figure 3 is a flowchart showing steps for periodically applying a coating in situ to a chuck surface of an ESC inside a processing chamber in accordance with non-exclusive embodiments.

[0016] Figure 4A and Figure 4B are enlarged cross-sectional views of substrates having different protective coatings in accordance with non-exclusive embodiments.

[0017] Figure 5 is a block diagram of a computing system that can be configured as a controller for controlling a substrate manufacturing tool in accordance with non-exclusive embodiments.

[0018] In the drawings, like reference numerals will be used to refer to like elements throughout the several views. DETAILED DESCRIPTION

[0019] The present application will now be described in detail by way of reference only to some non-exclusive embodiments thereof, as illustrated in the accompanying drawings. In the following description, numerous specific details are set forth in order to provide a thorough understanding of the present disclosure. It will be apparent, however, to one skilled in the art, that the present disclosure can be practiced without some or all of these specific details. In other instances, well known process steps and / or structures have not been described in detail in order not to unnecessarily obscure the present disclosure.

[0020] ESCs, regardless of type, have several limitations. Fluorine is often used in the process of depositing substrates, such as semiconductor wafers. Exposure of the clamping surface of the ESC to fluorine can introduce charge traps in the dielectric, thereby negatively affecting its electrical performance, reducing the ability to clamp with sufficient force. Also, residual carbon, which is a byproduct of many CVD processes, can also form on the clamping surface. Since carbon is an insulator, its presence on the clamping surface can interfere with J-R type ESCs, also reducing the clamping strength.

[0021] It is known to use an electrostatic protective cap (PEC) on the clamping surface of an ESC to prevent exposure to fluorine and / or residual carbon. However, the use of a PEC introduces many complications. When not in use, a storage location within or near the process chamber is required. Additionally, a mechanism is required to move and position the PEC between its storage location and the ESC substrate. Such a mechanism tends to generate undesirable particles, requires regular maintenance, and often breaks. Additionally, control software is required to control the operation of the mechanism. This control software tends to increase the complexity of the tool and increase development costs.

[0022] Figure 1 is a block diagram of a substrate processing tool 100 that can be used in non-exclusive embodiments. In this example, the substrate processing tool 100 includes a process chamber 102, a gas source 104, a radio frequency (RF) source 106, a bias source 108, an exhaust pump 110, a temperature controller 112, a vacuum source 114, and a controller 116. The process chamber 102 includes an electrode 118 coupled to the RF source 106, and an electrostatic chuck (ESC) pedestal 120 for holding a substrate 122.

[0023] During operation of the tool 100, a substrate 122 is clamped to the ESC pedestal 120 within the processing chamber 102, which contains a gas provided by the gas source 104. When RF power from the RF source 106 is applied to the electrode 118, a plasma is generated within the processing chamber 102 for processing the substrate 122. Depending on the type of tool, the plasma can be used in a variety of ways to process the substrate 122, including thin film deposition, etching, etc.

[0024] Although not shown, it should be noted that in an alternative embodiment, the RF source 106 can instead be coupled to the pedestal 120. In this alternative embodiment, the pedestal 120 also functions as an electrode for generating a plasma within the processing chamber 102.

[0025] Also during operation, the controller 116 can selectively control a number of operations within the processing chamber 102, such as applying a bias to the substrate 122 via the bias source 108, exhausting plasma or other gases from the processing chamber 102 via the exhaust pump 110, controlling the temperature of the pedestal 120 and / or the substrate 122 via the temperature controller 112 and the vacuum source 114. Since each of these elements and their operation are well known, detailed descriptions are not provided herein for the sake of brevity.

[0026] In Figure 1 In various components 108-116 are provided between the processing chamber 102 and / or the pedestal 120. It should be noted that in order not to overly complicate the details of the drawing, the various electrical and / or plumbing connections are simplified as a single connection 124. It is well understood that the routing of the various electrical and / or plumbing into and out of the processing chamber 102 and / or to the pedestal 120 is quite complex, but for the sake of brevity, is not described herein.

[0027] In one non-exclusive embodiment, the tool 100 can include or operate in conjunction with a remote plasma source 126. A plasma generated in the remote plasma source 126 is supplied to the processing chamber 102. One possible reason for using a remote plasma generator would be to reduce or eliminate the undesirable ion bombardment of various surfaces within the processing chamber 102. For example, in a non-exclusive embodiment, the remote plasma source 126 can be used to clean the processing chamber 102, which tends to increase the useful life of the various surfaces and / or components within the processing chamber 102 by reducing their exposure to ion bombardment, which typically accelerates degradation.

[0028] In an alternative embodiment, the pedestal 120 is a Coulomb and Johnson- Laben ("J-R") type ESC.

[0029] In other embodiments, the susceptor 120 can be made of a variety of thermally conductive materials. Such materials can include, but are not limited to, aluminum nitride, aluminum oxide, ceramic, other thermally conductive materials, or any combination thereof.

[0030] The tool 100 can be one of several different types of chemical vapor deposition (CVD) tools, such as low pressure CVD (LPCVD), ultra-high vacuum CVD (UHVCVD), plasma-enhanced CVD (PECVD), remote plasma-enhanced CVD (RPECVD), or atomic layer deposition (ALDCVD). As each of these tools is well known, a detailed explanation is not provided herein for the sake of brevity. Regardless of the type of CVD tool, however, the substrate 122 is generally exposed to one or more precursors that react or decompose on the surface of the substrate 122, thereby forming a desired deposition layer. By repeating this process multiple times, multiple layers can be formed on the surface of the substrate 122. It should be appreciated that this list of CVD tools provided herein is not exhaustive and should not be interpreted as limiting. Rather, the susceptor 120 described herein can be used with any type of CVD tool or tool for processing a substrate.

[0031] Referring to Figure 2 A perspective cutaway view of the ESC susceptor 120 is shown. The ESC susceptor 120 includes an ESC chuck 202 having a chucking surface 204 for chucking a substrate (not shown); a susceptor stem 206 arranged to support the ESC chuck 202 when mounted to a recess provided in a susceptor base 208.

[0032] The chucking surface 204 includes a plurality of raised minimum contact areas (MCAs) 210. In a non-exclusive embodiment, the ESC chuck 202, the chucking surface 204, and the MCAs are made of aluminum nitride. Aluminum nitride has a limited electrical resistance at operating temperatures typically used in CVD processing chambers, such as the processing chamber 102 (e.g., 400 to 650 °C). As such, the ESC susceptor 120 in this particular embodiment is a JR-type ESC. In other embodiments, other materials can be used. For materials that are electrical insulators, the ESC susceptor would be a Coulomb-type ESC.

[0033] The MCAs 210 perform a number of functions. First, the MCAs 210 define the surface area that physically contacts the backside of the substrate 122 when chucked on the surface 204. As a result, the charge transfer required to generate the chucking electrostatic force is concentrated at these locations. Second, the MCAs 210 reduce the surface area of the backside of the substrate 122 that is in contact with the chucking surface 204. As a result, both metal contamination and current leakage are reduced.

[0034] In one particular embodiment, the MCAs 210 are circular, have a height of approximately 1 millimeter (0.001 inch), a diameter of approximately 0.028 inch (0.7112 millimeter), and a pitch of 0.015 inch (3.81 millimeter). It should be noted that Figure 2 Not drawn to scale. The MCAs 210 are shown significantly larger relative to the holding surface 204 for clarity. In actual embodiments, the MCAs 210 will typically be smaller than the MCAs 210 shown.

[0035] Figure 2 Embodiments of the MCA 210 are merely exemplary and should not be interpreted as limiting. In various other embodiments, the MCAs 210 can take on various shapes (e.g., square, rectangular, oval, polygonal, etc.), can have a higher or lower height, can vary in size and pitch, and can occupy a greater or lesser percentage of the holding surface 204. Additionally, the MCAs 210 can be arranged in various arrangements (e.g., rows, columns, specific patterns, etc.) on the holding surface 204. In actual embodiments, the shape, height, pitch, surface area, and pattern of the holding surface 204 can vary widely and are determined, at least in part, by a number of design constraints, such as the size of the substrate 122, the amount of clamping force required, the type of tool 100, and a number of other engineering considerations.

[0036] The MCAs 210 and the substrate 122, such as a silicon wafer, are typically made of different materials. As a result, the MCAs 210 and the backside of the substrate 122 will typically expand / contract at different rates as temperatures change during clamping within the processing chamber 102. The different expansion / contraction rates create lateral shear forces on the top surface of the MCAs 210. Over time, these forces are known to degrade the quality of the MCAs 210, change the surface roughness, lower the height, and change their electrical properties, all of which degrade the degree of electrostatic clamping force generated on the holding surface 204.

[0037] Conventional practice dictates that no material be deposited on the holding surface 204 and / or the MCAs 210 of the ESC 120. If such material is present, charge traps typically occur on or near the holding surface, adversely affecting its electrical performance. And interfering with the electrostatic charge clamping effect. Thus, in general, it is common practice not to apply a material or coating to the holding surface or otherwise dispose it on the holding surface with a conventional ESC.

[0038] In contrast to conventional practice, the applicants propose the use of silicon oxide (Si02) or silicon nitride (Si3N4) as a coating on the clamping surface 204 of the ESC 120. Electrons in both silicon oxide and silicon nitride are more excited at elevated temperatures. As a result, either of these materials (or a combination of both) becomes more conductive at elevated temperatures of 450 to 600 °C, and tends to behave more like a dielectric with limited resistance. Since this temperature range is commonly used in certain processing chambers of substrate processing tools, such as CVD tools, the applicants have found that it is actually possible to advantageously use silicon oxide and / or silicon nitride on the clamping surface of an ESC.

[0039] There are many advantages to using silicon oxide and silicon nitride formed on the clamping surface 204 (including the MCA 210):

[0040] (1) As mentioned above, the coating can be used to protect the MCA 210 from degradation and wear due to lateral shear forces caused by different thermal expansion rates of the substrate 122;

[0041] (2) The coating of silicon oxide and silicon nitride can be easily deposited on the clamping surface 204 and / or the MCA 210 in situ in the processing chamber 102 and removed. As a result, the old worn coating can be removed and replaced with a new coating as needed or at fixed time intervals, all within the processing chamber 102; and

[0042] (3) In addition, the particle performance of the processing chamber 102 can be improved by applying a coating on the surfaces of the susceptor 120 and the processing chamber 102. The coating adheres particles to these surfaces, reducing the likelihood of particle contamination on the substrate 122. Additionally, the coating provides a protective layer against any metal contamination on the clamping surface 204 of the susceptor 120, thereby minimizing metal contamination transferred to the substrate.

[0043] Referring now to Figure 3 , a flowchart 300 is shown that illustrates steps for periodically applying a coating to the clamping surface 204 of the ESC 120 in situ in the processing chamber 102.

[0044] In an initial step 302, a coating of silicon oxide or silicon nitride (or a combination of both) is formed at least partially on the clamping surface 204 of the ESC chuck 202 (including on the MCA 210). The coating is formed by introducing a silicon precursor and a reactant into the processing chamber 102. Then, a chemical vapor deposition (CVD) plasma is generated while the silicon precursor and the reactant are in the processing chamber. As a result, the coating is deposited or formed on the clamping surface 204.

[0045] In one embodiment, the coating is formed across the entire carding surface 204, including the MCA 210. In other embodiments, a mask can be applied to portions of the carding surface 204, and then removed after the coating is formed. As a result, the coating is provided only on the portions of the carding surface 204 that were not masked.

[0046] In various embodiments, the silicon precursor or silicon source is selected from the group consisting of: (a) silane, (b) tetraethyl orthosilicate (TEOS), or a combination of (a) and (b). The reactant is selected from the group consisting of: (a) oxygen (O2), (b) nitrous oxide (N2O), (c) ammonia (NH3), (d) nitrogen (N2), or any combination of (a) through (c). During the CVD process, the coating can be deposited once the precursor and reactant are present in the processing chamber 102.

[0047] The material composition of the coating depends on the type of reactant used. When silane or TEOS is used as the precursor, a silicon coating grows or is deposited on the carding surface 204. If the reactant is an oxidizing agent, such as oxygen or nitrous oxide, then the silicon coating is oxidized, resulting in silicon oxide. On the other hand, if the reactant is ammonia or nitrogen, then silicon nitride is produced.

[0048] If both ammonia and oxygen and / or nitrous oxide are used as reactants, then the resulting coating is a mixture of both silicon oxide and silicon nitride.

[0049] Alternatively, a multi-layer coating can be formed by first using one reactant, and then subsequently using another reactant. For example, by first using oxygen and / or nitrous oxide, and then using ammonia, a multi-layer coating is formed with a bottom layer of silicon oxide and a top layer of silicon nitride. By changing the order of the reactants, a complementary multi-layer structure can be produced.

[0050] In step 304, once the coating of the desired material and thickness has been formed in the previous steps, the substrate 122 is loaded into the substrate processing tool 100.

[0051] In step 306, the substrate 122 is processed in the processing chamber 102. The processing typically includes carding the substrate 122 onto the carding surface 204 of the ESC 120, and maintaining the temperature within the processing chamber within a predetermined range. As described above, in one embodiment, the range can be 400 to 650 °C. In other embodiments, other ranges with higher or lower temperatures can be used. Once carded, the substrate 122 is processed within the processing chamber 102. As described above, the processing can include thin film layer deposition, etching, photoresist stripping, substrate cleaning, and lithography, ion implantation, etc.

[0052] In step 308, a decision is made as to whether the process chamber 102 needs to be cleaned. A number of factors can be used in making this decision. The decision can be based on the cumulative amount of processing that has occurred within the process chamber 102 over a period of time. For example, if the tool 102 is a CVD tool, the cleaning interval can be determined based on a specified amount of deposition material that has been deposited on the substrates 122 since the previous cleaning. Other determinants can include time (e.g., cleaning the tool at periodic, fixed time intervals) or after a predetermined number of substrates 122 have been processed, or any combination of these or other factors. If it is determined that the process chamber 102 is not to be cleaned, steps 304 and / or 306 are repeated.

[0053] If it is determined that it is time to clean the process chamber 102, a cleaning operation is performed within the process chamber 102 including the chuck surface 204 as shown in step 310. The cleaning process typically includes the use of a halogen-based cleaning agent to remove the coating that has formed in situ on the chuck surface 204 of the ESC 120 within the process chamber 102. A halogen-based cleaning agent (e.g., fluorine, nitrogen trifluoride, or other fluorine-containing gas) is introduced into the process chamber 102. A plasma is then generated which removes or etches away the coating on the chuck surface 204 and MCA 210 and other exposed surfaces as is well known in the art.

[0054] Once the coating is removed, a new coating is formed on the chuck surface 204 and MCA 210 as provided above in step 302. Thereafter, steps 304 through 310 can be repeated. In each cycle, the old, worn coating is removed in step 310 and a new, fresh coating is applied in step 302.

[0055] In yet another embodiment, the cleaning and coating described above can be performed in situ on the substrate processing tool during routine maintenance of the process chamber 102. For example, a halogen-based cleaning agent can be used from time to time to remove unwanted deposits and particles that have collected on the various surfaces inside the process chamber 102 as a byproduct of the substrate processing. Following the cleaning, a coating of silicon oxide and / or silicon nitride is typically deposited onto the cleaned surfaces within the process chamber 102 in a subsequent plasma deposition step. Since the cleaning and re-coating sequence for the chuck surface 204 of the susceptor 120 and the process chamber 102 are essentially the same, the same cleaning and deposition sequence can be used to clean and re-coat both the chuck surface 204 and the process chamber 102 in situ in the process chamber 120.

[0056] Referring to Figure 4AThe image shows an enlarged cross-sectional view of the substrate 122 on the holding surface 204 of the ESC chuck 202. In this embodiment, a coating 402 covering the entire holding surface 204 is provided above and between the MCA 210. As previously mentioned, the coating 402 may be silicon oxide, silicon nitride, or a combination of both.

[0057] Reference Figure 4B This image shows another enlarged cross-sectional view of the substrate 122 on the holding surface 204 of the ESC chuck 202. In this embodiment, a multilayer coating 404 is disposed on and between the MCA, including a top layer 406 and a bottom layer 408. As previously mentioned, the top layer 406 may be silicon oxide, and the bottom layer 408 may be silicon nitride, or vice versa.

[0058] although Figure 4A and Figure 4B Two embodiments are shown with coatings 402 / 404 on the entire retaining surface 204 including MCA 210, as depicted in these figures, which should not be limiting. Rather, coatings 402 / 404 may only be formed partially on the retaining surface 204, for example, only on the top of MCA 210.

[0059] In other embodiments, the coating, whether single-layer (e.g., Figure 4A ) or multi-layered (e.g., Figure 4B The thickness of the coating is approximately 2.5 micrometers. In alternative embodiments, the coating thickness can range from 1.0 to 5.0 micrometers or from 50 nanometers to 30 micrometers. For thicker coatings (e.g., 1.0 or more), thicker coatings in the range of 1.0 to 5.0 micrometers are typically applied using conventional CVD tools. Extremely thin coatings of approximately 50 nanometers can be applied using other tools, such as atomic layer deposition (ALDCVD) tools.

[0060] For including remote plasma source 126 (such as Figure 1 (As shown) or certain substrate processing tools 100 operating in conjunction with the remote plasma source 126, for forming or removing various plasmas of coating 402 / 404, as described above with respect to steps 302 and 310, can be remotely generated in the remote plasma source 126 and then provided to the processing chamber 102 including ESC 120. Otherwise, the steps of removing the old coating and replacing it with a new coating described above are substantially the same as those described above.

[0061] Silicon oxide and silicon nitride (or a combination of both) can be used on the clamping surface 204 at elevated temperatures without adversely affecting the electrostatic forces required to clamp the substrate 122. Although specific ranges have been indicated above, it should be understood that these temperatures are not to be construed as limiting. Rather, any temperature can be applied so long as the electrical conductivity of the silicon oxide or silicon nitride is increased to a level such that at least a portion of the clamping surface 204 coated with silicon oxide or silicon nitride generates sufficient electrostatic force to clamp the substrate.

[0062] The coatings 402 / 404 also help improve substrate clamping by addressing many of the issues that cause conventional electrostatic substrate chucks to develop patches. For example, the presence of carbon on the clamping surface of an electrostatic chuck is known to cause electrical shorts, which tend to reduce the electrostatic clamping force between the clamping surface and the substrate. However, the coating process described above tends to remove the presence of carbon from the clamping surface. As a result, the incidence of electrical shorts is significantly reduced. In addition, the presence of fluorine in the processing chamber is known to penetrate certain types of clamping surfaces, such as those made of ceramic, thereby creating charge traps. However, applicants have found that at processing temperatures of 450 to 600 °C as described herein, the incidence of charge traps is reduced. As a result, the electrostatic clamping force is not adversely affected.

[0063] Referring to Figure 5 a block diagram of a computing system that can be configured as the controller 116 for controlling the substrate processing tool 100, in accordance with non-exclusive embodiments, is shown.

[0064] The controller 116 can have many physical forms ranging from a computer, a server, a small handheld device, to a large supercomputer. The controller 116 includes one or more processors 502 and can further include an electronic display device 504 (for displaying graphics, text, and other data), a main memory 506 [e.g., random access memory (RAM)], a storage device 508 (e.g., a hard disk drive), a removable storage device 510 (e.g., an optical disk drive), a user interface device 512 (e.g., a keyboard, a touchscreen, a keypad, a mouse, or other pointing device, etc.), and a communications interface 514 (e.g., a wireless network interface). The communications interface 514 allows software and data to be transferred between the controller 116 and external devices via a link. The controller 116 can also include a communications infrastructure 516 (e.g., a communications bus, cross-over bar, or network) to which the aforementioned devices / modules are connected.

[0065] Information transferred via communications interface 514 can be in the form of signals such as electronic, electromagnetic, optical, or other signals capable of being received by communications interface 514, via a communication link that carries signals and can be implemented using wire or cable, fiber optics, phone lines, cellular lines, radio frequencies, or other communication channels. With such a communications interface, it is contemplated that the one or more processors 502 might receive information from the network, or might output information to the network in the course of performing the above-described method steps. Furthermore, method embodiments can be implemented by one or more processors 502 under the control of software

[0066] The term "non-transitory computer-readable medium" is generally used herein to refer to media such as main memory, secondary memory, removable memory, and storage devices, which are used to store computer code that, when executed by a processor, causes the processor to perform various methods and processes described herein. The term "non-transitory computer-readable media" specifically excludes transitory forms of signals, such as radio waves, traveling through space. Examples of computer code include machine code, such as produced by a compiler, and files containing higher-level code that is executed by a computer using an interpreter. Computer-readable media also can be computer data signals embodied in a carrier wave, sent over a communication medium.

[0067] It should be understood that, although described in the context of various deposition tools, this application is by no means limited thereto. Rather, the ESC pedestal 120 described herein can be used in a variety of substrate processing tools, including, but not limited to, photolithography tools, plasma etching or chemical etching tools, ion implantation tools, substrate cleaning tools, and the like.

[0068] Although only a few embodiments have been described in detail, it should be appreciated that the application can be implemented in many other forms without departing from the spirit or scope of the disclosure provided herein. For example, the substrate can be a semiconductor wafer, a discrete semiconductor device, a flat panel display, or any other type of workpiece.

[0069] Therefore, embodiments of the present application should be considered in all respects as illustrative and not restrictive, and are not limited to the details given herein, but can be modified within the scope and spirit of the appended claims.

Claims

1. An electrostatic chuck comprising a base having a chucking surface arranged to chuck a substrate, wherein the electrostatic chuck is configured to generate electrostatic forces at the chucking surface to clamp a substrate, wherein the chucking surface has a multi-layer coating comprising a top layer and a bottom layer, wherein the top and bottom layers comprise at least one of silicon oxide or silicon nitride, wherein the multi-layer coating reduces charge trapping in the chucking surface, wherein a thickness of the multi-layer coating is 50 nanometers to 30 micrometers, wherein the electrostatic chuck is further arranged to operate within a substrate processing chamber maintained at an elevated temperature such that the electrical conductivity of the silicon oxide or silicon nitride increases to a level such that the chucking surface coated with the silicon oxide or silicon nitride generates sufficient electrostatic forces to clamp the substrate.

2. The electrostatic chuck of claim 1, wherein the multi-layer coating comprises a top layer of silicon oxide and a bottom layer of silicon nitride.

3. The electrostatic chuck of claim 1, wherein the multi-layer coating comprises a top layer of silicon nitride and a bottom layer of silicon oxide.

4. The electrostatic chuck of claim 1, wherein the multi-layer coating has a thickness in a range of 1.0 micrometers to 5.0 micrometers.

5. The electrostatic chuck of claim 1, further arranged to operate in a temperature range of 450 to 600 °C when chucking a substrate to the chucking surface within a substrate processing chamber.

6. The electrostatic chuck of claim 1, wherein the chucking surface having the coating of the silicon oxide or the silicon nitride comprises one or more minimum contact areas formed on the chucking surface.

7. The electrostatic chuck of claim 1, wherein the electrostatic chuck is a Coulomb-type electrostatic chuck or a Johnsen-Rahbeck (J-R) type electrostatic chuck.

8. A method of cleaning an electrostatic chuck chucking surface and depositing a coating, comprising: (a) removing a first coating formed on an electrostatic chuck chucking surface of a base within a processing chamber using a halogen-based cleaning agent, wherein the electrostatic chuck chucking surface is configured to generate electrostatic forces to clamp a substrate; and (b) depositing a second coating in-situ within the processing chamber, the second coating formed on the electrostatic chuck chucking surface of the base, wherein depositing a second coating comprises: providing a plasma within the processing chamber, the plasma comprising a silicon precursor and a reactant; and exposing surfaces and the electrostatic chuck chucking surface within the processing chamber to the plasma, the exposure resulting in the formation of a second coating on the surfaces of the processing chamber and the electrostatic chuck chucking surface, wherein the second coating is a multi-layer coating comprising a top layer and a bottom layer, wherein the top and bottom layers comprise at least one of silicon oxide and silicon nitride, wherein the multi-layer coating has a thickness of 50 nanometers to 30 micrometers, wherein the electrostatic chuck is further arranged to operate within a substrate processing chamber maintained at an elevated temperature such that the electrical conductivity of the silicon oxide or silicon nitride increases to a level such that the chucking surface generates sufficient electrostatic forces to clamp the substrate.

9. The method of claim 8, further comprising repeating (a) and (b) such that the electrostatic chuck chucking surface of the base is refreshed, each repetition utilizing a new second coating.

10. The method of claim 9, repeating (a) and (b), and the start of each repetition is determined by having deposited a particular amount of deposition material on one or more substrates that are clamped to the electrostatic chuck clamping surface of the susceptor in the processing chamber.

11. The method of claim 10, wherein the processing chamber is a chemical vapor processing chamber.

12. The method of claim 10, wherein the processing chamber is an atomic layer deposition chamber.

13. The method of claim 8, wherein the halogen-based cleaning agent is fluorine.

14. The method of claim 8, wherein the first coating and the second coating are each selected from the group comprising silicon oxide, silicon nitride, or a combination of both silicon oxide and silicon nitride.

15. The method of claim 8, wherein the second coating has a thickness in the range of 1.0 microns to 5.0 microns.

16. The method of claim 8, wherein the electrostatic chuck clamping surface of the susceptor comprises at least one of a Coulomb-type or a Jahn-Hartell-type clamping surface.

17. A substrate processing tool for cleaning an electrostatic chuck clamping surface and depositing a coating, comprising: a processing chamber; an electrostatic chuck susceptor disposed within the processing chamber having an electrostatic chuck clamping surface for clamping a substrate, wherein the electrostatic chuck is configured to generate electrostatic forces at the clamping surface to clamp a substrate; wherein the substrate processing tool is further arranged to perform routine maintenance comprising: (a) cleaning deposits formed on surfaces within the processing chamber and the electrostatic chuck clamping surface using a cleaning agent provided in the processing chamber; and (b) coating the surfaces within the processing chamber and the electrostatic chuck clamping surface after the cleaning, wherein the cleaning and the coating of the electrostatic chuck clamping surface are performed in situ in the processing chamber while cleaning and coating the surfaces within the processing chamber, respectively, wherein coating the surfaces within the processing chamber and the electrostatic chuck clamping surface after cleaning comprises: providing a plasma within the processing chamber, the plasma comprising a silicon precursor and a reactant; and exposing surfaces within the processing chamber and the electrostatic chuck clamping surface to the plasma, the exposure resulting in a multi-layer coating formed on the surfaces of the processing chamber and the electrostatic chuck clamping surface, the multi-layer coating comprising a top layer and a bottom layer, wherein the top layer and the bottom layer comprise at least one of silicon oxide and silicon nitride, wherein the multi-layer coating has a thickness of 50 nanometers to 30 microns, wherein the electrostatic chuck is further arranged to operate within a substrate processing chamber that is maintained at an elevated temperature such that the electrical conductivity of the silicon oxide or silicon nitride increases to a level that the electrostatic forces generated by the clamping surface are sufficient to clamp the substrate.

18. The substrate processing tool of claim 17, wherein the electrostatic chuck comprises at least one of a Coulomb-type or a Jahn-Hartell (J-R) type electrostatic chuck.

19. The substrate processing tool of claim 17, wherein the multi-layer coating on the electrostatic chuck chucking surface has a thickness in a range of 1.0 microns to 5.0 microns.

20. The substrate processing tool of claim 17, wherein the multi-layer coating on the electrostatic chuck chucking surface has a thickness in a range of 50 nanometers to 30 microns.

21. The substrate processing tool of claim 17, wherein the substrate processing chamber is one of: (a) a chemical vapor processing chamber; (b) an atomic layer deposition chamber.

22. The substrate processing tool of claim 17, wherein the cleaning agent is a halogen-based cleaning agent including fluorine.

23. The substrate processing tool of claim 17, wherein the plasma is provided by one of: generating the plasma remotely and supplying the plasma to the processing chamber; or generating the plasma within the processing chamber.

24. The substrate processing tool of claim 17, further arranged to periodically repeat (a) and (b) such that a new coating of silicon oxide or silicon nitride is formed on the electrostatic chuck chucking surface in situ in the processing chamber after each repetition, respectively.

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