Input sensor and display device having the same

Abstract

The present application provides an input sensor and a display device having the same. The input sensor includes: a first pattern and a second pattern overlapping the first pattern, with an intermediate insulating layer interposed between the first pattern and the second pattern. The second pattern is disposed on the intermediate insulating layer and connected to the first pattern via a contact hole defined through the intermediate insulating layer. The first pattern includes a first grid line extending along a reference direction, and the second pattern includes a second grid line extending along the reference direction and overlapping the first grid line. The edges of the first grid line and the second grid line are not aligned with each other along a direction perpendicular to the line width direction and the reference direction.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority benefit of Korean Patent Application No. 10-2019-0054680 filed on May 10, 2019, in the Korean Intellectual Property Office, the contents of which are incorporated herein by reference in their entirety. Technical Field

[0003] The present disclosure relates to an input sensor and a display device having the same, and more particularly, to an input sensor having sensing electrodes in a grid shape and a display device having the same. Background Art

[0004] Various display devices are being developed for multimedia devices such as televisions, mobile phones, tablet computers, navigation devices, and gaming devices. Display devices use keyboards, mice, or remote controllers as their input devices. In addition, a display device may include a display panel that displays an image and a touch panel (or input sensing layer) that is used as an input device, wherein the touch panel generates an input signal when a user touches the touch panel.

[0005] In recent years, curved display devices, rolled display devices, foldable display devices, and rollable display devices are being developed. When any of these devices is bent, stress may be applied to the bent portion, and cracks may occur at certain weak points within the device, such as stress concentration areas in a touch panel within the device, thereby causing various defects in the device. Summary of the invention

[0006] The present disclosure provides an input sensor capable of preventing an insulating layer from being damaged.

[0007] The present disclosure provides a display device having an input sensor.

[0008] An exemplary embodiment of the present disclosure provides a display device, which includes a display panel providing a base surface and an input sensor disposed on the base surface. The input sensor includes an intermediate insulating layer, a first sensing electrode, and a second sensing electrode insulated from the first sensing electrode and intersecting the first sensing electrode. The first sensing electrode includes a first pattern having grid lines and a second pattern having grid lines. The second pattern overlaps the first pattern, an intermediate insulating layer is interposed between the second pattern and the first pattern, and the second pattern is connected to the first pattern through a contact hole defined by passing through the intermediate insulating layer. The grid lines of the first pattern include first grid lines extending in a reference direction, and the grid lines of the second pattern include second grid lines extending in the reference direction and overlapping with the first grid lines. The edges of the first grid lines and the edges of the second grid lines are not aligned with each other in a direction orthogonal to the base surface.

[0009] A distance between an edge of the first grid line and an edge of the second grid line in a reference direction is in a range from about 1.5 μm to about 5 μm.

[0010] A distance between an edge of the first grid line and an edge of the second grid line in a reference direction is greater than a distance between an edge of the first grid line and an edge of the second grid line in a line width direction perpendicular to the reference direction.

[0011] The line width of the first grid lines and the line width of the second grid lines are substantially the same as each other.

[0012] The second sensing electrode includes a third pattern and a fourth pattern, wherein the third pattern includes grid lines, is disposed on the same layer as the first pattern, and is spaced apart from the first pattern; the fourth pattern is disposed on the same layer as the second pattern, is spaced apart from the second pattern, overlaps the third pattern, is connected to the third pattern through a contact hole defined through the intermediate insulating layer, and includes grid lines.

[0013] The first pattern includes first sensor areas and first bridge areas connecting the first sensor areas, and the second pattern includes second sensor areas overlapping the first sensor areas.

[0014] The third pattern includes a third sensor area and a dummy area spaced apart from the third sensor area. The fourth pattern includes a fourth sensor area overlapping the third sensor area and the first bridge area, and a second bridge area connecting the fourth sensor area and overlapping the dummy area. The direction in which the first sensor area is arranged is the same as the direction in which the second sensor area is arranged, the direction in which the third sensor area is arranged is the same as the direction in which the fourth sensor area is arranged, and the direction in which the first sensor area is arranged intersects with the direction in which the third sensor area is arranged.

[0015] The size of the fourth sensor area is larger than the size of the third sensor area.

[0016] The grid lines of the third pattern include third grid lines extending along the reference direction. A distance between an edge of the first grid line and an edge of the third grid line in the reference direction is in a range of about 1 μm to about 5 μm or in a range of about 6 μm to about 15 μm.

[0017] The intermediate insulating layer includes a silicon oxide layer, a silicon nitride layer or a silicon oxynitride layer.

[0018] The input sensors are arranged directly on the base surface.

[0019] The input sensor further includes a lower insulating layer disposed under the intermediate insulating layer and supporting the first pattern and an upper insulating layer covering the second pattern and disposed on the intermediate insulating layer. The lower insulating layer and the intermediate insulating layer each include an inorganic layer, and the upper insulating layer includes an organic layer.

[0020] An exemplary embodiment of the present disclosure provides an input sensor, which includes a first grid pattern, an insulating layer covering the first grid pattern, and a second grid pattern disposed on the insulating layer. The first grid pattern includes a first sensing area and a second sensing area, and when viewed in a plan view, the first sensing area and the second sensing area are separated from each other. The second grid pattern includes a third sensing area and a fourth sensing area, and when viewed in a plan view, the third sensing area and the fourth sensing area are separated from each other. The grid lines arranged in the first sensing area overlap with the grid lines arranged in the third sensing area, the grid lines arranged in the second sensing area overlap with the grid lines arranged in the fourth sensing area, and the first boundary distance between the grid lines arranged in the first sensing area and the grid lines arranged in the second sensing area is different from the second boundary distance between the grid lines arranged in the third sensing area and the grid lines arranged in the fourth sensing area.

[0021] One of the first boundary distance and the second boundary distance is greater than the other of the first boundary distance and the second boundary distance by about 3 μm to about 10 μm.

[0022] The grid lines arranged in the first sensing area include first grid lines extending along a reference direction, the grid lines arranged in the third sensing area include second grid lines extending along the reference direction and overlapping with the first grid lines, and edges of the first grid lines and edges of the second grid lines are not aligned with each other along a direction perpendicular to the line width direction and the reference direction.

[0023] A distance between an edge of the first grid line and an edge of the second grid line in a reference direction is in a range from about 1.5 μm to about 5 μm.

[0024] A distance between an edge of the first grid line and an edge of the second grid line in a reference direction is greater than a distance between an edge of the first grid line and an edge of the second grid line in a line width direction perpendicular to the reference direction.

[0025] An exemplary embodiment of the present disclosure provides a display device, which includes a display panel and an input sensor disposed on the display panel. The input sensor includes an intermediate insulating layer, a sensing electrode, and a floating electrode disposed inside the sensing electrode. The floating electrode includes a first floating pattern and a second floating pattern, the first floating pattern includes a grid line, the second floating pattern overlaps the first floating pattern, an intermediate insulating layer is disposed between the first floating pattern and the second floating pattern, and the second floating pattern includes a grid line. The grid lines of the first floating pattern include a first grid line extending in a reference direction, and the grid lines of the second floating pattern include a second grid line extending in the reference direction and overlapping the first grid line. The edges of the first grid line and the second grid line are not aligned with each other along a direction perpendicular to the line width direction and the reference direction.

[0026] The sensing electrode includes a first pattern and a second pattern, wherein the first pattern includes grid lines and is disposed on the same layer as that of the first floating pattern; the second pattern is disposed on the same layer as that of the second floating pattern, overlaps the first pattern, is connected to the first pattern via a contact hole defined through the intermediate insulating layer, and includes grid lines.

[0027] A distance between an edge of the first grid line and an edge of the second grid line in a reference direction is greater than a distance between an edge of the first grid line and an edge of the second grid line in a line width direction perpendicular to the reference direction.

[0028] An exemplary embodiment of the present disclosure provides an input sensor, which includes an intermediate insulating layer, a first sensing electrode, and a second sensing electrode, the second sensing electrode being separated from the first sensing electrode along a boundary line and crossing the first sensing electrode. The first sensing electrode includes a first pattern and a second pattern, the first pattern includes a grid line having a first grid line extending in a reference direction, and the second pattern overlaps the first pattern, an intermediate insulating layer is interposed between the second pattern and the first pattern, the second pattern is connected to the first pattern via a contact hole defined through the intermediate insulating layer, and the second pattern includes a grid line having a second grid line extending in the reference direction and overlapping the first grid line. The first grid line and the second grid line together form a step structure or an overhang structure around the boundary line in the reference direction.

[0029] The length of the step portion of the first grid line that does not overlap with the second grid line measured in the reference direction or the length of the overhang portion of the second grid line that does not overlap with the first grid line measured in the reference direction is in the range of about 1.5 μm to about 5 μm, and is greater than the range of normal process errors.

[0030] According to the above, the combined resistance of the sensing electrode is reduced due to its double-layer structure, and thus the sensitivity can be improved. Since the sensing electrode has a double-layer structure as a whole, the optical characteristics can be enhanced.

[0031] Since the edges of the grid lines of the first pattern are not aligned with the edges of the grid lines of the second pattern, the stress applied to the insulating layer in the bending region of the input sensor is reduced, thereby preventing the insulating layer from being damaged. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] These and other aspects of the present disclosure will become readily apparent from the following detailed description taken in conjunction with the accompanying drawings, in which:

[0033] Figure 1 is a perspective view showing a display device according to an exemplary embodiment of the present disclosure;

[0034] FIG. 2A to FIG. 2D is shown along with Figure 1 A cross-sectional view of the display device corresponding to a cross section taken along line II';

[0035] Figure 3A and Figure 3B is a cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure;

[0036] Figure 3C is a plan view showing a display panel according to an exemplary embodiment of the present disclosure;

[0037] Figure 3D is an enlarged cross-sectional view showing a display panel according to an exemplary embodiment of the present disclosure;

[0038] Figure 4A is a cross-sectional view showing an input sensor according to an exemplary embodiment of the present disclosure;

[0039] Figure 4B is a plan view showing an input sensor according to an exemplary embodiment of the present disclosure;

[0040] Figure 5A and Figure 5B It is shown Figure 4B An enlarged plan view of area AA;

[0041] Figure 5C It is shown along Figure 5A and Figure 5B A cross-sectional view of the input sensor taken along line II-II';

[0042] Figure 5D to Figure 5G It is shown along Figure 5A and Figure 5B A cross-sectional view of the input sensor taken along line III-III';

[0043] Figure 5H It is shown along Figure 5A and Figure 5BA cross-sectional view of the input sensor taken along line IV-IV';

[0044] Fig.5I is a SEM image showing cracks occurring in the insulating layer of the input sensor;

[0045] Fig. 6A It is shown Figure 4B An enlarged plan view of area BB;

[0046] FIG. 6B to FIG. 6D It is along Fig. 6A A cross-sectional view taken along line V-V';

[0047] Fig. 7A and Figure 7B is a partially enlarged plan view showing an input sensor according to an exemplary embodiment of the present disclosure; and

[0048] FIG. 8A to FIG. 8C is a perspective view showing a display apparatus according to an exemplary embodiment of the present disclosure.

[0049] because Figures 1 to 8C The figures in the drawings are intended for illustrative purposes, and the elements in the drawings are not necessarily drawn to scale. For example, some of the elements may be enlarged or exaggerated for clarity. DETAILED DESCRIPTION

[0050] In the present disclosure, it will be understood that when an element or layer is referred to as being on, connected to or coupled to another element or layer, it can be directly on, directly connected to or directly coupled to the other element or layer, or intervening elements or layers may be present.

[0051] Like reference numerals refer to like elements throughout.As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0052] It should be understood that although the terms "first", "second", etc. may be used herein to describe various elements, components, regions, layers and / or parts, these elements, components, regions, layers and / or parts should not be limited by these terms. These terms are only used to distinguish one element, component, region, layer or part from another element, component, region, layer or part. Therefore, without departing from the teachings of the present disclosure, the first element, component, region, layer or part discussed below may be referred to as a second element, component, region, layer or part.

[0053] As used herein, the singular forms "a", "an", and "the" are intended to include the plural meaning as well, unless the context clearly indicates otherwise. In addition, "about" as used herein is inclusive of the stated value and means within an acceptable range of deviation of the particular value as determined by one of ordinary skill in the art, taking into account the measurement in question and the errors associated with the measurement of the particular quantity (i.e., the limitations of the measurement system). For example, "about" can mean within one or more standard deviations of the stated value, or within ±30%, ±20%, ±10%, ±5%.

[0054] Spatially relative terms, such as "under", "below", "lower", "above", "upper", etc., may be used herein for ease of description to describe the relationship of one element or feature to another element or feature as shown in the figures. These terms are described as relative concepts based on the directions shown in the figures, and it should be understood that in addition to the orientations shown in the figures, these spatially relative terms are intended to include different orientations in use or operation of the device.

[0055] It should also be understood that when used in this specification, the terms “includes” and / or “including” specify the presence of stated features, wholes, steps, operations, elements, components and / or groups, but do not exclude the presence or addition of one or more other features, wholes, steps, operations, elements, components and / or groups.

[0056] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the present invention belongs. It will be further understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant technology, and will not be interpreted in an idealized or overly formal sense unless clearly defined in this disclosure.

[0057] Hereinafter, exemplary embodiments of the present disclosure will be described with reference to the accompanying drawings.

[0058] Figure 1 is a perspective view showing a display device DD according to an exemplary embodiment of the present disclosure. Figure 1 As shown in , the display device DD displays an image through a display surface DD-IS (or a front surface). The display surface DD-IS includes a display area DD-DA through which the image is displayed and a non-display area DD-NDA defined adjacent to the display area DD-DA. For example, a photo, an image, or a dynamic image may be displayed through the display area DD-DA, and may not be displayed through the non-display area DD-NDA.

[0059] like Figure 1As shown in , the non-display area DD-NDA may surround the display area DD-DA. The display area DD-DA of the display device DD may approximately have a quadrilateral shape. The four corners of the display area DD-DA may have a rounded shape with a predetermined curvature. However, the present disclosure is not limited thereto. The shape of the display area DD-DA and the shape of the non-display area DD-NDA may be designed relatively.

[0060] In an exemplary embodiment of the present disclosure, the non-display area DD-NDA may have an island shape disposed inside the display area DD-DA. The size of the non-display area DD-NDA disposed inside the display area DD-DA may be relatively smaller than the size of the display area DD-DA, and may overlap with the camera module, the light sensor, and the infrared sensor. A hole for the passage of a light signal may be defined through the non-display area DD-NDA. The non-display area DD-NDA having an island shape disposed inside the display area DD-DA may be one and may have a circular shape, but the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the number of non-display areas DD-NDA disposed inside the display area DD-DA may be equal to or greater than 2, and / or the shape of each non-display area DD-NDA may be changed in various ways, such as, for example, a circle, an ellipse, a polygon, a star, or a diamond.

[0061] The display surface DD-IS may include a flat area FA and a rolled area CA. Figure 1 A display surface DD-IS in which the curling area CA is disposed at both sides of the flat area FA is shown as a representative example. The flat area FA is substantially parallel to a surface defined by the first direction axis DR1 and the second direction axis DR2. The third direction axis DR3 indicates a direction orthogonal to the display surface DD-IS, i.e., a thickness direction of the display device DD.

[0062] The front (or upper) and rear (or lower) surfaces of each component or each unit described below are distinguished from each other by the third directional axis DR3. However, the directions indicated by the first directional axis DR1, the second directional axis DR2, and the third directional axis DR3 are merely exemplary. Hereinafter, the first direction, the second direction, and the third direction correspond to the directions indicated by the first directional axis DR1, the second directional axis DR2, and the third directional axis DR3, respectively, and are given the same reference numerals as the first directional axis DR1, the second directional axis DR2, and the third directional axis DR3.

[0063] In this exemplary embodiment, a display device DD including three mutually distinguished regions is shown as a representative example, however, the present disclosure is not limited thereto. The present disclosure may be applied to, for example, a flat rigid display device, a bendable display device, a foldable display device, a rollable display device, or a display device including a three-dimensional display surface having more than three different regions. For example, a three-dimensional display surface in which an image is generated within a display volume rather than on a stationary surface may include multiple display regions, such as a multi-prism surface. Multiple display regions may be oriented in different directions.

[0064] In this exemplary embodiment, a display device DD applicable to a mobile phone terminal is shown as a representative example. The electronic module, camera module, and power module mounted on the main board can be placed on a bracket / housing together with the display device DD to form a mobile phone terminal. The display device DD according to the exemplary embodiment of the present disclosure can be applied to large electronic products such as, for example, televisions and monitors, and small and medium-sized electronic products such as, for example, tablet computers, car navigation units, game units, and smart watches.

[0065] FIG. 2A to FIG. 2D is shown along with Figure 1 A cross section taken along line II' corresponds to a cross-sectional view of the display device DD. FIG. 2A to FIG. 2D A cross section defined by the second direction DR2 and the third direction DR3 is shown. FIG. 2A to FIG. 2D Components of the display device DD are schematically shown in FIG. 1 to illustrate their stacking relationship.

[0066] The display device DD according to an exemplary embodiment of the present disclosure may include a display panel, an input sensor, an anti-reflector, and a window. At least some components of the display panel, the input sensor, the anti-reflector, and the window may be formed by a continuous process or may be connected to each other by an adhesive member. FIG. 2A to FIG. 2D An optically transparent adhesive layer OCA is shown as a representative example of an adhesive member. The adhesive layer described below may include a conventional adhesive or a pressure-sensitive adhesive. The optically transparent adhesive layer OCA may be formed by a pre-coated film or by a liquid paste. Generally, the optically transparent adhesive layer OCA may be required to have optical transparency, and the optically transparent adhesive layer OCA may provide impact resistance. In exemplary embodiments of the present disclosure, the anti-reflector may be replaced by another component, or the anti-reflector may be omitted.

[0067] exist FIG. 2A to FIG. 2DIn the present invention, among the input sensor, anti-reflector and window, a component formed by a process continuous with another component is called a "layer". Among the input sensor, anti-reflector and window, a component coupled to another component by an adhesive layer is called a "panel". The panel includes a base layer providing a base surface, such as a synthetic resin film, a composite film or a glass substrate, however, the base layer may be omitted from the component called a "layer". In other words, the component called a "layer" is provided on a base surface provided by another component.

[0068] Hereinafter, depending on the presence or absence of a base layer, the input sensor, anti-reflector and window may be referred to as “input sensing panel ISP”, “anti-reflection panel RPP” and “window panel WP”, respectively, or referred to as “input sensing layer ISL”, “anti-reflection layer RPL” and “window layer WL”.

[0069] like FIG. 2A to FIG. 2D As shown in FIG. , the display device DD may include Figure 1 The flat area FA and the curled area CA shown in FIG. Figure 2A The bending area BA is a portion adjacent to both sides of the non-bending area NBA and may be a portion bent downward from the non-bending area NBA. For each of the display panel, the input sensor, the anti-reflector, and the window, the non-bending area NBA and the bending area BA may be defined identically or differently.

[0070] refer to Figure 2A , the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection panel RPP and a window panel WP. The input sensing layer ISL is directly disposed on the display panel DP. In the present disclosure, the expression "component 'B' is directly disposed on component 'A'" means that there are no intervening elements, such as an adhesive layer / adhesive member, between component "B" and component "A". After forming component "A", component "B" is formed on the base surface provided by component "A" through a continuous process. For example, the input sensing layer ISL is disposed on the base surface of the display panel DP.

[0071] The display panel DP and the input sensing layer ISL disposed directly on the display panel DP are defined as a display module DM. An optically transparent adhesive layer OCA is disposed between the display module DM and the anti-reflection panel RPP and between the anti-reflection panel RPP and the window panel WP, respectively.

[0072] The display panel DP generates an image, and the input sensing layer ISL obtains coordinate information of an external input (e.g., a touch event). The display module DM according to an exemplary embodiment of the present disclosure may further include a protective member disposed on a lower surface (e.g., a rear surface) of the display panel DP. The protective member and the display panel DP are coupled to each other by an adhesive layer. FIG. 2B to FIG. 2D The described display device DD may also further include a protective member.

[0073] The display panel DP according to the exemplary embodiment of the present disclosure may be a light-emitting display panel, however, the present disclosure is not limited thereto. For example, the display panel DP may be an organic light-emitting display panel or a quantum dot light-emitting display panel. The light-emitting layer of the organic light-emitting display panel may include an organic light-emitting material. The light-emitting layer of the quantum dot light-emitting display panel may include quantum dots and / or quantum rods. Quantum dots and quantum rods may be small semiconductor particles with a size of several nanometers. Hereinafter, an organic light-emitting display panel will be described as a representative example of the display panel DP.

[0074] The anti-reflection panel RPP reduces the reflectivity of external light incident thereon from above the window panel WP. The anti-reflection panel RPP according to an exemplary embodiment of the present disclosure may include a retarder and a polarizer. The retarder may be a film type or a liquid crystal coating type and may include a λ / 2 retarder and / or a λ / 4 retarder. In an exemplary embodiment of the present disclosure, the anti-reflection panel RPP may include a two-layer retarder, wherein the first retarder has a λ / 2 retardation value, and the second retarder is located below the first retarder and has a λ / 4 retardation value. The polarizer may be a film type or a liquid crystal coating type. The film-type polarizer may include a stretched synthetic resin film, and the liquid crystal coating type polarizer may include liquid crystals arranged in a predetermined arrangement. The film-type polarizer may be a uniaxially stretched film or a biaxially stretched film. The retarder and the polarizer may also include a transparent protective film. For example, the polarizer or the retarder may be inserted between two transparent protective films. The retarder and the polarizer or the transparent protective film may be defined as the base layer of the anti-reflection panel RPP.

[0075] The anti-reflection panel RPP according to an exemplary embodiment of the present disclosure may include a color filter. The color filter may have a predetermined arrangement. The arrangement of the color filter may be determined by considering the emission color of the pixels included in the display panel DP. Therefore, the desired color may be achieved by filtering the light emitted by each of the pixels with the color filter. The anti-reflection panel RPP may further include a black matrix disposed adjacent to the color filter. The anti-reflection panel RPP may further include an insulating layer.

[0076] In the case where the pixels of the organic light-emitting display panel generate monochromatic light, the anti-reflection panel RPP may further include a color conversion layer. The color conversion layer may include wavelength conversion particles that convert the wavelength of at least a portion of the incident light. For example, the wavelength conversion particles may include first wavelength conversion particles that convert incident light having a specific wavelength into light having a first wavelength and emit it, and second wavelength conversion particles that convert incident light having a specific wavelength into light having a second wavelength and emit it. The color conversion layer may include quantum dots and / or quantum rods. In the case where the organic light-emitting display panel generates blue light, the anti-reflection panel RPP may include a blue color filter, a first color conversion layer that converts blue light into red light, and a second color conversion layer that converts blue light into green light.

[0077] The anti-reflection panel RPP according to an exemplary embodiment of the present disclosure may include a destructive interference structure. For example, the destructive interference structure may include a first reflection layer and a second reflection layer located on different layers. The first reflected light and the second reflected light respectively reflected by the first reflection layer and the second reflection layer may destructively interfere with each other, and thus the reflectivity of the external light may be reduced.

[0078] The window panel WP according to an exemplary embodiment of the present disclosure includes a base film WP-BS and a frame pattern WP-BZ. The base film WP-BS may include, for example, a glass substrate and / or a synthetic resin film. The base film WP-BS should not be limited to a single-layer structure. For example, the base film WP-BS may include two or more films coupled to each other by an adhesive member.

[0079] The frame pattern WP-BZ partially overlaps with the base film WP-BS. In the present application, the word "overlap" always means the overlap of one object with another object in the third direction DR3 when the display device DD is in a stretched state. The frame pattern WP-BZ is provided on the rear surface of the base film WP-BS to define a frame area of ​​the display device DD, that is, a non-display area DD-NDA.

[0080] The border pattern WP-BZ may be a colored organic layer and may be formed by a coating process. The border pattern WP-BZ may include a plurality of organic layers. Some of the organic layers may be provided with predetermined patterns formed therein. The border pattern WP-BZ may have a predetermined color. When the base film WP-BS is provided as a glass substrate or a plastic substrate, the border pattern WP-BZ may be one or more color layers printed or deposited on one side of the glass substrate or the plastic substrate. In an exemplary embodiment of the present disclosure, the window panel WP may further include a functional coating provided on the front surface of the base film WP-BS. The functional coating may include an anti-fingerprint layer, an anti-reflection layer, and a hard coating layer.

[0081] exist FIG. 2B to FIG. 2D, the window panel WP and the window layer WL are schematically shown without distinguishing between the base film WP-BS and the frame pattern WP-BZ.

[0082] like Figure 2B As shown in , the display device DD may include a display panel DP, an input sensing layer ISL, an anti-reflection layer RPL, and a window layer WL. The bonding member may be omitted from the display device DD, and the input sensing layer ISL, the anti-reflection layer RPL, and the window layer WL may be formed on the base surface of the display panel DP by a continuous process. For example, the window layer WL, the anti-reflection layer RPL, the input sensing layer ISL, and the display panel DP may be integrated into a single base substrate within the display device DD. Therefore, the thickness of the display device DD may be reduced. The stacking order of the input sensing layer ISL and the anti-reflection layer RPL may be changed. For example, in an exemplary embodiment of the present disclosure, the input sensing layer ISL may be located above the anti-reflection layer RPL and inserted between the window layer WL and the anti-reflection layer RPL.

[0083] In an exemplary embodiment of the present disclosure, one of the anti-reflection layer RPL and the window layer WL may be changed to a panel type. Figure 2C As shown in , the window panel WP can be connected to the anti-reflection layer RPL by an optically transparent adhesive layer OCA. Figure 2D As shown in , an optically transparent adhesive layer OCA may be further disposed between the anti-reflection panel RPP and the input sensing layer ISL.

[0084] In an exemplary embodiment of the present disclosure, the display device DD may include two types of anti-reflectors. For example, the display device DD may include an anti-reflection layer RPL directly disposed on the input sensing layer ISL, and may also include an anti-reflection panel RPP coupled to the anti-reflection layer RPL through an optically transparent adhesive layer OCA.

[0085] exist FIG. 2A to FIG. 2D , the input sensing layer ISL and the input sensing panel ISP are shown as completely overlapping the display panel DP, however, the present disclosure is not limited thereto. For example, the input sensing layer ISL and the input sensing panel ISP may overlap only the display area DD-DA. In an exemplary embodiment of the present disclosure, the input sensing layer ISL and the input sensing panel ISP may overlap a portion of the display area DD-DA, or may overlap only the non-display area DD-NDA.

[0086] Figure 3A and Figure 3B is a cross-sectional view showing a display panel DP according to an exemplary embodiment of the present disclosure. Figure 3C is a plan view showing a display panel DP according to an exemplary embodiment of the present disclosure. Figure 3D1 is an enlarged cross-sectional view showing a display panel DP according to an exemplary embodiment of the present disclosure. FIG. 3A to FIG. 3D The display panel DP described can be applied to the reference FIG. 2A to FIG. 2D A display device DD is described.

[0087] Figure 3A and Figure 3B FIG. 4 shows a cross section of a display panel DP in a stretched state. Figure 3A As shown in FIG. 1 , the display panel DP includes a base layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, and an upper insulating layer TFL, and the circuit element layer DP-CL, the display element layer DP-OLED, and the upper insulating layer TFL are disposed on the base layer BL. Figure 1 A display area DP-DA and a non-display area DP-NDA corresponding to the display area DD-DA and the non-display area DD-NDA of the display surface DD-IS shown in FIG. 4 may be defined in the display panel DP. The display area DP-DA may be an area in which pixels are arranged. The non-display area DP-NDA may be an area in which pixels are not arranged and signal lines supporting the operation of the pixels are arranged. Each of the pixels may include a light emitting element, such as an organic light emitting diode OLED, as a display element to be described (see FIG. 4 ). Figure 3D ). In the present disclosure, the expression “a region corresponds to a region” means “the regions overlap each other”, but is not limited to “the regions have the same size”.

[0088] The base layer BL may include at least one plastic film. The base layer BL may include, for example, a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate. In the present exemplary embodiment, the base layer BL may be a thin film glass substrate having a thickness ranging from tens of micrometers to hundreds of micrometers.

[0089] The circuit element layer DP-CL includes at least one insulating layer and a circuit element. The insulating layer includes at least one inorganic layer and at least one organic layer. The circuit element includes a signal line and a driving circuit of a pixel. The circuit element layer DP-CL may also include a buffer layer located above the base layer BL. The circuit element layer DP-CL will be described in detail later.

[0090] The display element layer DP-OLED includes at least an organic light emitting diode OLED. The display element layer DP-OLED may further include an organic layer such as a pixel defining layer.

[0091] The upper insulating layer TFL includes a plurality of thin layers. Some layers are provided to improve optical efficiency, and some layers are provided to protect the organic light emitting diode OLED. In an exemplary embodiment of the present disclosure, the upper insulating layer TFL may include at least one inorganic layer and at least one organic layer, and may be provided on a light emitting element such as an organic light emitting diode OLED to protect the organic light emitting diode OLED.

[0092] like Figure 3B As shown in , the display panel DP includes a base layer BL, a circuit element layer DP-CL, a display element layer DP-OLED, an encapsulation substrate ES and a sealant SM, wherein the circuit element layer DP-CL, the display element layer DP-OLED, and the encapsulation substrate ES are arranged on the base layer BL, and the sealant SM connects the base layer BL and the encapsulation substrate ES to each other. The encapsulation substrate ES can be separated from the display element layer DP-OLED by a predetermined gap GP, and the gap GP can be maintained by the sealant SM. For example, the combination of the display substrate DS, the sealant SM and the encapsulation substrate ES can form a closed space including a gap GP, wherein the display substrate DS includes a base layer BL, a circuit element layer DP-CL and a display element layer DP-OLED. The base layer BL and the encapsulation substrate ES may include, for example, a plastic substrate, a glass substrate, a metal substrate or an organic / inorganic composite substrate. The sealant SM may include an organic adhesive or glass material, or may include both. The glass material may include a crystallized (completely and / or partially crystallized) substrate or mother glass. In an exemplary embodiment of the present disclosure, the sealant SM may include a glass material sealing member and an organic sealing member.

[0093] like Figure 3C As shown in FIG. 1 , the display panel DP includes a drive circuit GDC, a plurality of signal lines SGL (hereinafter referred to as “signal lines”), and a plurality of pixels PX (hereinafter referred to as “pixels”). Each of the pixels PX includes a light emitting element and a pixel drive circuit connected to the light emitting element. The drive circuit GDC, the signal lines SGL, and the pixel drive circuit may include Figure 3A and Figure 3B The circuit element layer DP-CL is shown in FIG.

[0094] The drive circuit GDC includes a scan drive circuit. The scan drive circuit generates a plurality of scan signals (hereinafter referred to as "scan signals") and sequentially outputs the scan signals to a plurality of scan lines GL (hereinafter referred to as "scan lines") described later. For example, the drive circuit GDC connected to the scan lines GL may be disposed in the non-display area DP-NDA. The scan drive circuit may also output other control signals to the drive circuit of the pixel PX.

[0095] The signal lines SGL include scan lines GL, data lines DL, power lines PL, and control signal lines CSL. Each of the scan lines GL is connected to a corresponding pixel PX among the pixels PX, and each of the data lines DL is connected to a corresponding pixel PX among the pixels PX. The scan lines GL may be spaced apart from each other in a first direction DR1 and extend in a second direction DR2, and the data lines DL may be spaced apart from each other in a second direction DR2 and extend in the first direction DR1. The power lines PL are connected to the pixels PX. The control signal lines CSL provide control signals to the scan drive circuit. Each of the control signals provided by the control signal lines CSL may include a vertical start signal for controlling the operation of the drive circuit GDC and at least one clock signal for determining the output timing of the signal.

[0096] The signal line SGL may be connected to the circuit board and, for example, may be connected to a timing control circuit provided in the form of an integrated chip and mounted on the circuit board. In an exemplary embodiment of the present disclosure, the integrated chip may be disposed in the non-display area DP-NDA and may be connected to the signal line SGL.

[0097] Figure 3D A cross section of the display panel DP corresponding to one pixel PX is shown. Figure 3D A cross section corresponding to the organic light emitting diode OLED and a first transistor T1 (or a switching transistor) and a second transistor T2 (or a driving transistor) driving the organic light emitting diode OLED is shown.

[0098] The circuit element layer DP-CL includes at least one insulating layer and circuit elements. The circuit elements include signal lines and driving circuits of pixels. The circuit element layer DP-CL can be formed by coating and deposition processes for forming insulating layers, semiconductor layers and conductive layers, and photolithography processes and / or etching processes for patterning insulating layers, semiconductor layers and conductive layers.

[0099] In the present exemplary embodiment, the circuit element layer DP-CL includes a buffer layer BFL, a first inorganic layer 10, and a second inorganic layer 20. In addition, the circuit element layer DP-CL includes an intermediate organic layer 30. The materials of the inorganic layer and the organic layer are not particularly limited, and the buffer layer BFL may be selectively provided or omitted. The buffer layer BFL includes a plurality of inorganic layers stacked on each other.

[0100] As a representative example, Figure 3DThe arrangement relationship between the first semiconductor pattern OSP1, the second semiconductor pattern OSP2, the first control electrode GE1, the second control electrode GE2, the first input electrode DE1, the first output electrode SE1, the second input electrode DE2, and the second output electrode SE2 forming the first transistor T1 and the second transistor T2 is shown. The first through holes CH1 to the fifth through holes CH5 are also shown by way of example.

[0101] The display element layer DP-OLED includes a light emitting element. The display element layer DP-OLED includes an organic light emitting diode OLED as a light emitting element. The display element layer DP-OLED includes a pixel defining layer PDL. For example, the pixel defining layer PDL may be an organic layer.

[0102] The first electrode AE ​​is disposed on the intermediate organic layer 30 and is connected to the second output electrode SE2 of the second transistor T2 through a fifth through hole CH5 defined through the intermediate organic layer 30. The pixel defining layer PDL is provided with an opening OP defined therethrough. At least a portion of the first electrode AE ​​is exposed through the opening OP of the pixel defining layer PDL. The opening OP of the pixel defining layer PDL is named as a "light emitting opening" to distinguish it from other openings.

[0103] like Figure 3D As shown in FIG. 3A to FIG. 3C The display area DP-DA shown in the figure includes a light emitting area PXA and a non-light emitting area NPXA disposed adjacent to the light emitting area PXA. The non-light emitting area NPXA surrounds the light emitting area PXA and is configured to prevent light from being emitted therefrom. In the present exemplary embodiment, the light emitting area PXA is defined as a portion corresponding to the first electrode AE ​​exposed by the opening OP.

[0104] In the present exemplary embodiment, the light emitting region PXA may overlap at least one of the first transistor T1 and the second transistor T2. The opening OP may be widened, and the first electrode AE ​​and the light emitting layer EML described later may be widened.

[0105] The hole control layer HCL is commonly disposed on the light emitting region PXA and the non-light emitting region NPXA. A common layer such as the hole control layer HCL may be commonly formed in the pixel PX (refer to Figure 3C ). The hole control layer HCL may include a hole transport layer and may further include a hole injection layer.

[0106] The light emitting layer EML may be disposed on the hole control layer HCL and may be disposed in a region corresponding to the opening OP. For example, the light emitting layer EML may be formed in each of the pixels PX after being divided into a plurality of parts, and may generate colored light corresponding to the pixel. The light emitting layer EML may include an organic material and / or an inorganic material. Some of the pixels PX may generate red light, some other pixels PX may generate green light, and some other pixels may generate blue light. In the case where the pixel PX generates monochromatic light, the light emitting layer EML may be formed together in the pixel PX.

[0107] The electron control layer ECL may be disposed on the light emitting layer EML and may be formed together in the pixel PX. Therefore, the light emitting layer EML may be interposed between the hole control layer HCL and the electron control layer ECL. The electron control layer ECL may include an electron transport layer and may further include an electron injection layer. The second electrode CE may be disposed on the electron control layer ECL and may be disposed together in the pixel PX. Therefore, the second electrode CE may have a larger area than the first electrode AE.

[0108] The upper insulating layer TFL is disposed on the second electrode CE and includes a plurality of thin layers. As in the present exemplary embodiment, the thin layers may include a thin film encapsulation layer and a capping layer, which are different in function from each other.

[0109] In this exemplary embodiment, the thin film encapsulation layer is arranged with Figure 3A and Figure 3C The thin film encapsulation layer may be arranged in a non-display area DP-NDA and may be arranged in a part of the non-display area DP-NDA. In addition, the thin film encapsulation layer may include at least one organic encapsulation layer.

[0110] In an exemplary embodiment of the present disclosure, the organic light emitting diode OLED may further include a resonant structure to control the resonant distance of the light generated by the light emitting layer EML. The resonant structure is disposed between the first electrode AE ​​and the second electrode CE, and the thickness of the resonant structure may be determined according to the wavelength of the light generated by the light emitting layer EML.

[0111] Figure 4A is a cross-sectional view illustrating an input sensor according to an exemplary embodiment of the present disclosure. Figure 4B is a plan view showing an input sensor according to an exemplary embodiment of the present disclosure. Figure 4A and Figure 4B In the present invention, the input sensing layer ISL will be described as a representative example of the input sensor. Figure 4A and Figure 4BThe input sensing layer ISL shown in FIG. 5 is in a stretched state.

[0112] Figure 4A The input sensing layer ISL is schematically shown to explain the stacking relationship of the input sensing layer ISL. Figure 4A As shown in , the input sensing layer ISL according to an exemplary embodiment of the present disclosure may include a first insulating layer IS-IL1, a first conductive layer IS-CL1, a second insulating layer IS-IL2, a second conductive layer IS-CL2, and a third insulating layer IS-IL3. The first insulating layer IS-IL1 may be directly disposed on the upper insulating layer TFL. In an exemplary embodiment of the present disclosure, the first insulating layer IS-IL1 may be omitted. The first insulating layer IS-IL1, the second insulating layer IS-IL2, and the third insulating layer IS-IL3 may be respectively referred to as a lower insulating layer IS-IL1, an intermediate insulating layer IS-IL2, and an upper insulating layer IS-IL3 reflecting their stacking order. For example, the input sensing layer ISL may include a first conductive layer IS-CL1 disposed on the first insulating layer IS-IL1, a second conductive layer IS-CL2 disposed above the first conductive layer IS-CL1, a second insulating layer IS-IL2 disposed between the first conductive layer IS-CL1 and the second conductive layer IS-CL2, and a third insulating layer IS-IL3 disposed on the second conductive layer IS-CL2.

[0113] Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a single-layer structure or a multilayer structure in which layers are stacked in the third direction DR3. The conductive layer having a single-layer structure (e.g., the first conductive layer IS-CL1 or the second conductive layer IS-CL2) may include a metal layer or a transparent conductive layer. The conductive layer having a multilayer structure may include at least two layers of a transparent conductive layer and a metal layer. The conductive layer having a multilayer structure may include a metal layer, which includes metals different from each other. The transparent conductive layer may include, for example, indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium tin zinc oxide (ITZO), poly (3,4-ethylenedioxythiophene) (PEDOT), metal nanowires, or graphene. The metal layer may include, for example, molybdenum (Mo), silver (Ag), titanium (Ti), copper (Cu), aluminum (Al), or an alloy thereof. According to an exemplary embodiment of the present disclosure, each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may have a three-layer structure of titanium / aluminum / titanium (Ti / Al / Ti). In an exemplary embodiment of the present disclosure, the conductive layer of the multi-layer structure may include at least one metal layer and at least one transparent conductive layer.

[0114] Each of the first conductive layer IS-CL1 and the second conductive layer IS-CL2 may include a plurality of conductive patterns. The conductive pattern may include a sensing electrode and a signal line connected to the sensing electrode. Compared with the sensing electrode including the metal layer, the sensing electrode including the transparent conductive layer is not observed by the user. Therefore, in order to prevent the sensing electrode including the metal layer from being observed by the user, the sensing electrode including the metal layer may have a grid shape. The sensing electrode in the grid shape may increase flexibility and reduce noise on the display panel DP. Some of the conductive patterns may be connected to each other to form a sensing electrode (hereinafter referred to as a "first sensing electrode"). The first sensing electrode may be provided in a plurality of numbers. Some of the conductive patterns may be connected to each other to form another sensing electrode (hereinafter referred to as a "second sensing electrode"). The conductive pattern may include a plurality of second sensing electrodes. The first sensing electrode is insulated from (e.g., not in contact with) the second sensing electrode while crossing the second sensing electrode.

[0115] Each of the first insulating layer IS-IL1, the second insulating layer IS-IL2, and the third insulating layer IS-IL3 may include an inorganic material or an organic material. In the present exemplary embodiment, each of the first insulating layer IS-IL1 and the second insulating layer IS-IL2 may be an inorganic layer. The inorganic layer may include, for example, aluminum oxide (Al 2 O 3 ), titanium oxide (TiO 2 ), silicon oxide (SiO 2 ), silicon nitride (Si 3 N 4 )、Silicon Oxynitride (SiON), Zirconium Oxide (ZrO 2 ) and hafnium oxide (HfO 2 ). The inorganic layer may have a thickness in the range of about 1000 angstroms to about 4000 angstroms. In an exemplary embodiment of the present disclosure, the second insulating layer IS-IL2 (ie, the intermediate insulating layer) may include silicon oxide (SiO 2 ) layer, silicon nitride (Si 3 N 4 ) layer or silicon oxynitride (SiON) layer.

[0116] The third insulating layer IS-IL3 may include an organic layer, which may include at least one of acrylic resin, methacrylic resin, polyisoprene, vinyl resin, epoxy resin, urethane resin, cellulose resin, siloxane resin, polyimide resin, polyamide resin, and perylene resin.

[0117] like Figure 4BAs shown in , the input sensing layer ISL may include first sensing electrodes IE1-1 to IE1-5, first signal lines SL1-1 to SL1-5 respectively connected to the first sensing electrodes IE1-1 to IE1-5, second sensing electrodes IE2-1 to IE2-4, and second signal lines SL2-1 to SL2-4 respectively connected to the second sensing electrodes IE2-1 to IE2-4. Figure 4B As shown in FIG. 1 , the first sensing electrodes IE1 - 1 to IE1 - 5 and the second sensing electrodes IE2 - 1 to IE2 - 4 may each have a mesh shape.

[0118] The first sensing electrodes IE1-1 to IE1-5 and the second sensing electrodes IE2-1 to IE2-4 may cross each other. The first sensing electrodes IE1-1 to IE1-5 may be arranged along the first direction DR1 and may extend along the second direction DR2, and the second sensing electrodes IE2-1 to IE2-4 may be arranged along the second direction DR2 and may extend along the first direction DR1. The external input may be sensed by a mutual capacitance method and / or a self-capacitance method. The coordinates of the external input may be calculated by the mutual capacitance method during the first period, and the coordinates of the external input may be recalculated by the self-capacitance method during the second period.

[0119] The first signal lines SL1-1 to SL1-5 are respectively connected to one end of the first sensing electrodes IE1-1 to IE1-5. The second signal lines SL2-1 to SL2-4 are respectively connected to both ends of the second sensing electrodes IE2-1 to IE2-4. Since the second sensing electrodes IE2-1 to IE2-4 are longer than the first sensing electrodes IE1-1 to IE1-5, a voltage drop of the detection signal (or transmission signal) may occur, and thus the sensing sensitivity may be reduced. According to the present exemplary embodiment, by providing the detection signal (or transmission signal) through the second signal lines SL2-1 to SL2-4 connected to the two opposite ends of the second sensing electrodes IE2-1 to IE2-4, the voltage drop of the detection signal (or transmission signal) can be prevented, and thus the reduction of the sensing sensitivity can be prevented. In an exemplary embodiment of the present disclosure, the first signal lines SL1-1 to SL1-5 may be connected to both ends of the first sensing electrodes IE1-1 to IE1-5. In an exemplary embodiment of the present disclosure, the second signal lines SL2-1 to SL2-4 may be connected only to one end of the second sensing electrodes IE2-1 to IE2-4.

[0120] Each of the first signal lines SL1-1 to SL1-5 and the second signal lines SL2-1 to SL2-4 may include a line portion SL-L and a pad portion SL-P connected to one end of the line portion SL-L. The pad portion SL-P may be connected in the pad area NDA-PD within the non-display area DD-NDA.

[0121] Figure 5A and Figure 5B It is shown Figure 4B An enlarged plan view of area AA. Figure 5C It is shown along Figure 5A and Figure 5B A cross-sectional view of the input sensor taken along line II-II'. Figure 5D to Figure 5G It is shown along Figure 5A and Figure 5B A cross-sectional view of the input sensor taken along line III-III'. Figure 5H It is shown along Figure 5A and Figure 5B A cross-sectional view of the input sensor taken along line IV-IV'. Fig.5I is a SEM image showing cracks occurring in an insulating layer of an input sensor. Hereinafter, an input sensing layer ISL will be described as an input sensor.

[0122] Figure 5A and Figure 5B An intersection region where one of the first sensing electrodes IE1 - 2 and one of the second sensing electrodes IE2 - 3 cross each other is shown. Figure 5A The conductive pattern of the first conductive layer IS-CL1 corresponding to the intersection region (hereinafter referred to as the “first conductive pattern”) is shown. Figure 5B A conductive pattern of the second conductive layer IS-CL2 corresponding to the intersection region (hereinafter referred to as a “second conductive pattern”) is shown.

[0123] Each of the first conductive pattern and the second conductive pattern includes a plurality of mesh lines MSL. The mesh lines MSL cross each other to define meshes MH. Some of the mesh lines MSL extend in a first diagonal direction CDR1, and some other mesh lines MSL extend in a second diagonal direction CDR2.

[0124] Some of the first conductive patterns of the first conductive layer IS-CL1 are connected to some of the second conductive patterns of the second conductive layer IS-CL2 to form Figure 4B The first sensing electrodes IE1-1 to IE1-5 shown in FIG. Other ones of the first conductive patterns are connected to other ones of the second conductive patterns to form Figure 4B By using two layers (eg, first conductive layer IS-CL1 and second conductive layer IS-CL2) of sensing electrodes such as first sensing electrodes IE1-1 to IE1-5 and second sensing electrodes IE2-1 to IE2-4, the resistance of each of the sensing electrodes can be reduced.

[0125] Some of the first conductive patterns forming the first sensing electrode IE1-2 may be defined as the first pattern, and some of the second conductive patterns forming the first sensing electrode IE1-2 may be defined as the second pattern. In this case, some of the other first conductive patterns forming the second sensing electrode IE2-3 may be defined as the third pattern, and some of the second conductive patterns forming the second sensing electrode IE2-3 may be defined as the fourth pattern. However, the above definition is a relative concept. That is, some of the first conductive patterns forming the second sensing electrode IE2-3 may be defined as the first pattern, and some of the second conductive patterns forming the second sensing electrode IE2-3 may be defined as the second pattern. In addition, some of the other first conductive patterns forming the first sensing electrode IE1-2 may be defined as the third pattern, and some of the other second conductive patterns forming the first sensing electrode IE1-2 may be defined as the fourth pattern. Hereinafter, the latter will be described.

[0126] like FIG. 5A to FIG. 5B As shown in , the second sensing electrode IE2-3 includes a first pattern CP1 formed by a first conductive layer IS-CL1 and a second pattern CP2 formed by a second conductive layer IS-CL2. The first pattern CP1 and the second pattern CP2 are electrically connected to each other via a contact hole CNT-I defined by the second insulating layer IS-IL2. When viewed in a plan view, the first pattern CP1 and the second pattern CP2 overlap each other. The first pattern CP1 and the second pattern CP2 should not be limited to a structure in which the first pattern CP1 and the second pattern CP2 completely overlap each other. For example, at least a portion of the first pattern CP1 may not overlap with the second pattern CP2, and / or at least a portion of the second pattern CP2 may not overlap with the first pattern CP1. In an exemplary embodiment of the present disclosure, the second pattern CP2 may completely overlap with the first pattern CP1, and at least a portion of the first pattern CP1 may not overlap with the second pattern CP2.

[0127] The first pattern CP1 includes the first sensor areas SA1 and the first bridge area BRA1 connecting the first sensor areas SA1. The two first sensor areas SA1 are disposed to be spaced apart from each other in the first direction DR1. Figure 4B Each of the second sensing electrodes IE2-1 to IE2-4 shown in FIG. 1 includes a plurality of intersection regions arranged in the first direction DR1. Two first sensor regions SA1 are disposed as a group at each intersection region. Each of the first bridge regions BRA1 connects the two first sensor regions SA1. The two first bridge regions BRA1 are disposed spaced apart from each other in the second direction DR2.

[0128] The second pattern CP2 includes a second sensor area SA2 overlapping the first sensor area SA1. The two second sensor areas SA2 are arranged to be spaced apart from each other in the first direction DR1. Therefore, the direction in which the first sensor areas SA1 are arranged (e.g., the first direction DR1) is the same as the direction in which the second sensor areas SA2 are arranged (e.g., the first direction DR1). Figure 4B Each of the second sensing electrodes IE2-1 to IE2-4 shown in FIG. 1 includes a plurality of crossing regions arranged in the first direction DR1. Two second sensor regions SA2 are disposed as a set at each crossing region.

[0129] The size of the first sensor area SA1 is substantially the same as that of the one second sensor area SA2 overlapping therewith. However, since the grid lines MSL of the first sensor area SA1 and the grid lines MSL of the second sensor area SA2 may have different line widths, the first pattern CP1 may have a different size from that of the one second pattern CP2 overlapping therewith. Figure 5A and Figure 5B As shown in FIG. 1 , the size of the first pattern CP1 including both the first sensor area SA1 and the first bridge area BRA1 is larger than the size of the second pattern CP2 including only the second sensor area SA2 .

[0130] like FIG. 5A to FIG. 5C As shown in , the first sensing electrode IE1-2 includes a third pattern CP3 formed by a first conductive layer IS-CL1 and a fourth pattern CP4 formed by a second conductive layer IS-CL2. The third pattern CP3 and the fourth pattern CP4 are electrically connected to each other via a contact hole CNT-I defined by passing through the second insulating layer IS-IL2. When viewed in a plan view, the third pattern CP3 and the fourth pattern CP4 overlap each other. The third pattern CP3 and the fourth pattern CP4 should not be limited to a structure in which the third pattern CP3 and the fourth pattern CP4 completely overlap each other. For example, at least a portion of the third pattern CP3 may not overlap with the fourth pattern CP4, and / or at least a portion of the fourth pattern CP4 may not overlap with the third pattern CP3. In an exemplary embodiment of the present disclosure, the third pattern CP3 may completely overlap with the fourth pattern CP4, and at least a portion of the fourth pattern CP4 may not overlap with the third pattern CP3.

[0131] The third pattern CP3 includes a third sensor area SA3 and a dummy area DDA. The dummy area DDA is spaced apart from the first and third sensor areas SA1 and SA3 in the second direction DR2 and disposed between the third sensor areas SA3. In addition, the dummy area DDA is disposed between the two first bridge areas BRA1 in the second direction DR2.

[0132] The fourth pattern CP4 includes a fourth sensor area SA4 and a second bridge area BRA2. The fourth sensor area SA4 overlaps the third sensor area SA3 and the first bridge area BRA1. The second bridge area BRA2 overlaps the dummy area DDA. Therefore, the direction in which the third sensor area SA3 is arranged (e.g., the second direction DR2) is the same as the direction in which the fourth sensor area SA4 is arranged (e.g., the second direction DR2), and the direction in which the first sensor area SA1 is arranged (e.g., the first direction DR1) crosses the direction in which the third sensor area SA3 is arranged (e.g., the second direction DR2).

[0133] The size of the fourth sensor area SA4 is relatively larger than the size of the third sensor area SA3 that overlaps with it. Figure 5A As shown in FIG. 1 , the third sensor area SA3 is relatively reduced in order to ensure an area where the first bridging area BRA1 is to be arranged.

[0134] Since the first pattern CP1 is connected to the second pattern CP2 and the third pattern CP3 is connected to the fourth pattern CP4, the resistance of each of the first sensing electrode IE1-2 and the second sensing electrode IE2-3 can be reduced. The reduction in the combined resistance can enhance the sensitivity. For example, when the combined resistance is reduced, the bandwidth of the AC signal may increase. As the bandwidth of the AC signal increases, the sensitivity of the input sensor using a sinusoidal signal as a drive signal can be enhanced.

[0135] Since the sensing electrode has a two-layer structure as a whole, optical characteristics can be enhanced. Since a similar amount of light is reflected from the conductive pattern having the two-layer structure throughout the input sensor, a difference in visibility according to area is minimized.

[0136] Figure 5D to Figure 5G Shown along Figure 5A and Figure 5B The cross section is taken along line III-III'. Figure 5D to Figure 5G, the grid lines MSL1 of the first pattern CP1 (hereinafter referred to as "first grid lines") and the grid lines MSL2 of the second pattern CP2 (hereinafter referred to as "second grid lines") overlap with each other. The first grid lines MSL1 and the second grid lines MSL2 extend along the reference direction. An edge is defined as one end of a grid line in the reference direction and may correspond to a side surface of the grid line at the same time. An edge MSL1-E of the first grid line MSL1 disposed in the reference direction and an edge MSL2-E of the second grid line MSL2 disposed in the reference direction are not aligned with each other in a direction (i.e., a third direction DR3) orthogonal to the display surface DD-IS. In the present exemplary embodiment, the first diagonal direction CDR1 corresponds to the reference direction. For example, an edge MSL1-E of the first grid line MSL1 disposed in the reference direction and an edge MSL2-E of the second grid line MSL2 disposed in the reference direction are not aligned with each other in a direction (i.e., a third direction DR3) perpendicular to the line width direction (i.e., the second diagonal direction CDR2) and the reference direction (i.e., the first diagonal direction CDR1).

[0137] Since the edge MSL1 -E of the first grid line MSL1 and the edge MSL2 -E of the second grid line MSL2 are not aligned with each other, the voltage applied to the input sensor (reference FIG. 2A to FIG. 2D The bending area BA (reference FIG. 2A to FIG. 2D ). Therefore, the second insulating layer IS-IL2 can be prevented from being damaged. For example, the display device DD can therefore resist cracking during bending and handling.

[0138] Fig.5I 1 shows a crack occurring in an input sensor in which an edge MSL1-E of a first grid line MSL1 and an edge MSL2-E of a second grid line MSL2 are aligned with each other. The crack occurs in the region adjacent to the bending area BA (reference FIG. 2A to FIG. 2D ) in the inorganic layer corresponding to the second insulating layer IS-IL2. It is assumed that the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 apply a large stress to the region of the inorganic layer.

[0139] refer to Figure 5D, a distance DT between an edge MSL1-E of the first grid line MSL1 and an edge MSL2-E of the second grid line MSL2 in the first diagonal direction CDR1 may be in a range of about 1.5 μm to about 5 μm. The first grid line MSL1 and the second grid line MSL2 may have a thickness in a range of about 1000 angstroms to about 2000 angstroms. In the grid lines MSL1 and MSL2 having a three-layer structure of titanium / aluminum / titanium (Ti / Al / Ti), the thickness of the titanium (Ti) layer may be in a range of about 150 angstroms to about 300 angstroms, and the thickness of the aluminum (Al) layer may be in a range of about 1000 angstroms to about 1500 angstroms.

[0140] Although the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 are designed as Figure 5D As shown and described above, they are not aligned with each other, but due to errors in the manufacturing process (e.g., etching process), the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 may be slightly shifted from each other. Most of the shifted values ​​are about 1 μm or less, and the maximum value of the shifted value is about 1.35 μm. The error value may vary depending on the process conditions.

[0141] Figure 5H The process error WE of the first grid line MSL1 and the second grid line MSL2 is shown. Even if the first grid line MSL1 and the second grid line MSL2 are designed to have the same line width W, the edge of the first grid line MSL1 and the edge of the second grid line MSL2 arranged in the second diagonal direction CDR2 may be shifted from each other. The process error WE is about 1 μm or less, and the maximum value of the process error WE is about 1.35 μm. For example, the edge MSL1-E of the first grid line MSL1 may be shifted relative to the edge MSL2-E of the second grid line MSL2 in the line width direction (i.e., the second diagonal direction CDR2) by a distance corresponding to the process error WE.

[0142] According to the present exemplary embodiment, since the distance DT between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 is designed to be greater than the range of the process error WE, the stress applied to the second insulating layer IS-IL2 can be dispersed. That is, when the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 are spaced apart from each other by a predetermined distance or more, a large stress can be prevented from being applied to a narrow area of ​​the second insulating layer IS-IL2. Since the edges of the first grid line MSL1 and the second grid line MSL2 arranged in the second diagonal direction CDR2 may be shifted from each other in the line width direction (i.e., the second diagonal direction CDR2) by the range of the process error WE, and the distance DT between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 in the reference direction (i.e., the first diagonal direction CDR1) is designed to be greater than the range of the process error WE, the distance between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 in the reference direction (i.e., the first diagonal direction CDR1) is greater than the distance between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 in the line width direction (i.e., the second diagonal direction CDR2) perpendicular to the reference direction (i.e., the first diagonal direction CDR1).

[0143] When the general Figure 5D The measured value of the distance DT shown in Figure 5H When the measured value of the process error WE shown in FIG. 1 is compared with the measured value of the process error WE shown in FIG. 1 , the design value of the distance DT excluding the process error WE can be checked. When the process error WE is about 0 μm, the actually measured distance DT corresponds to the design value. In the case where the process error WE is about 1 μm and the actually measured distance DT is about 4 μm, the design value of the distance DT is about 3 μm.

[0144] refer to Figure 5D to Figure 5G , the grid line MSL3 of the third pattern CP3 (hereinafter referred to as the "third grid line") and the grid line MSL4 of the fourth pattern CP4 (hereinafter referred to as the "fourth grid line") overlap each other. The line width, material, stacking structure and distance DT of the first grid line MSL1 and the second grid line MSL2 can be equally applied to the third grid line MSL3 and the fourth grid line MSL4. However, the distance DT between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 should not be limited to the same as the distance between the edge MSL3-E of the third grid line MSL3 and the edge MSL4-E of the fourth grid line MSL4.

[0145] In an exemplary embodiment of the present disclosure, the first grid line MSL1, the second grid line MSL2, the third grid line MSL3, and the fourth grid line MSL4 may have their edges MSL1-E, MSL2-E, MSL3-E, and MSL4-E misaligned with each other in the third direction DR3, and may form a step structure (refer to Figure 5D ), overhanging structure (reference Figure 5E ) and their combinations (reference Fig. 5F and Figure 5G ) to reduce the stress applied to the second insulating layer IS-IL2. Therefore, the second insulating layer IS-IL2 can be prevented from being damaged. For example, the display device DD can therefore resist cracking during bending and handling. Therefore, the length of the step portion of the first grid line MSL1 that does not overlap with the second grid line MSL2 measured in the reference direction (i.e., the first diagonal direction CDR1) or the length of the overhang portion of the second grid line MSL2 that does not overlap with the first grid line MSL1 measured in the reference direction (i.e., the first diagonal direction CDR1) is in the range of about 1.5 μm to about 5 μm, and is greater than the range of the normal process error WE.

[0146] The distance DT-B1 between the edge MSL1-E of the first grid line MSL1 and the edge MSL3-E of the third grid line MSL3 (hereinafter referred to as the "first boundary distance") may be different from the distance DT-B2 between the edge MSL2-E of the second grid line MSL2 and the edge MSL4-E of the fourth grid line MSL4 (hereinafter referred to as the "second boundary distance"). The relatively large distance of each of the first boundary distance DT-B1 and the second boundary distance DT-B2 may be in the range of about 6 μm to about 15 μm. The relatively small distance of each of the first boundary distance DT-B1 and the second boundary distance DT-B2 may be in the range from about 1 μm to about 5 μm. The difference between the first boundary distance DT-B1 and the second boundary distance DT-B2 may be in the range of about 3 μm to about 10 μm. The above values ​​are values ​​obtained by excluding the value of the process error WE. For example, the actually measured value may need to be Figure 5H The value of the process error WE shown is added to the above value. Figure 5D An exemplary embodiment is shown in which the second boundary distance DT-B2 is greater than the first boundary distance DT-B1. The first boundary distance DT-B1 and the second boundary distance DT-B2 each correspond to the shortest distance crossing the boundary line BDL.

[0147] refer to FIG. 5A to FIG. 5D The first pattern CP1 and the third pattern CP3 correspond to a mesh pattern (hereinafter referred to as a "first mesh pattern") provided on the same layer (eg, the first conductive layer IS-CL1) and are divided into different patterns by a boundary line BDL (refer to Figure 5A , Figure 5B and Figure 5D ). In other words, by patterning the first grid pattern along the boundary line BDL, the first pattern CP1 and the third pattern CP3 are divided into different sensing areas. The first pattern CP1 may be defined as a first sensing area, or specifically defined as a first sensor area SA1 and a first bridging area BRA1, and the third pattern CP3 may be defined as a second sensing area, or specifically defined as a third sensor area SA3 and a dummy area DDA. Therefore, the first grid pattern may include a first sensing area and a second sensing area, and the first sensing area and the second sensing area are separated from each other when viewed in a plan view.

[0148] The second pattern CP2 and the fourth pattern CP4 correspond to a second grid pattern that is disposed on a layer different from that of the first grid pattern and is divided into different patterns by a boundary line BDL. The second pattern CP2 may be defined as a third sensing area, or specifically as a second sensor area SA2, and the fourth pattern CP4 may be defined as a fourth sensing area, or specifically as a fourth sensor area SA4 and a second bridging area BRA2. Therefore, the second grid pattern may include a third sensing area and a fourth sensing area that are separated from each other when viewed in a plan view.

[0149] In the present exemplary embodiment, the first boundary distance DT-B1 may be about 3 μm to about 10 μm smaller than the second boundary distance DT-B2.

[0150] The first to fourth sensing regions are described with respect to two types of sensing electrodes IE1-2 and IE2-3, however, the present disclosure is not limited thereto. For example, in an exemplary embodiment of the present disclosure, the first to fourth sensing regions may be applied to an input sensor including only one type of sensing electrodes arranged in a matrix form. In an exemplary embodiment of the present disclosure, the first to fourth sensing regions may be similarly applied to two types of sensing electrodes IE1-2 and IE2-3.

[0151] refer to Figure 5E , the first boundary distance DT-B1 may be greater than the second boundary distance DT-B2. In the present exemplary embodiment, the first boundary distance DT-B1 may be greater than the second boundary distance DT-B2 by about 3 μm to about 10 μm. Fig. 5F and 5G An exemplary embodiment is shown in which the difference between the first boundary distance DT-B1 and the second boundary distance DT-B2 is less than about 2 μm. Figure 5D to Figure 5GAs shown in FIG. 1 , the first mesh line MSL1 , the second mesh line MSL2 , the third mesh line MSL3 , and the fourth mesh line MSL4 may form a stepped structure and / or an overhanging structure around the boundary line BDL. Fig. 5F and Figure 5G In the structure, there are both a step structure and an overhang structure, and therefore, the difference between the first boundary distance DT-B1 and the second boundary distance DT-B2 can be small, while the distance DT between the first grid line MSL1 and the second grid line MSL2 and the distance DT between the third grid line MSL3 and the fourth grid line MSL4 can be kept large.

[0152] Fig. 6A It is shown Figure 4B An enlarged plan view of area BB. FIG. 6B to FIG. 6D It is along Fig. 6A A cross-sectional view taken along line V-V'.

[0153] Fig. 6A An enlarged view of a portion of the second sensing electrode IE2-3 in a mesh shape is shown. The mesh lines of the first pattern CP1 and the second pattern CP2 of the second sensing electrode IE2-3 forming the second sensing electrode IE2-3 are shown to overlap each other.

[0154] Three types of meshes MH-R, MH-G, and MH-B are defined through the second sensing electrode IE2-3. The meshes MH-R, MH-G, and MH-B are defined through each of the first pattern CP1 and the second pattern CP2. However, reference numerals are only assigned to Fig. 6A Meshes MH-R, MH-G and MH-B of the second pattern CP2 in FIG.

[0155] The three types of meshes MH-R, MH-G and MH-B correspond to the three types of light emitting openings. The three types of light emitting openings are defined as Figure 3D The opening OP of the pixel defining layer PDL shown in FIG. is the same. The three types of light-emitting openings are distinguished from each other according to their sizes, and the size of each of the first type of opening, the second type of opening, and the third type of opening is proportional to the size of the light-emitting area of ​​the corresponding pixel. For example, each of the three types of light-emitting openings can be proportional to the size of each of the three light-emitting areas PXA-G, PXA-R, and PXA-B, respectively. In this exemplary embodiment, the pixel PX of the light-emitting area PXA-R can generate red light, the pixel PX of the light-emitting area PXA-G can generate green light, and the pixel PX of the light-emitting area PXA-B can generate blue light.

[0156] and FIG. 5A to FIG. 5G The grid lines shown in the straight lines are different, in Fig. 6AInflection points are arranged in the grid lines shown in FIG. This is because the grid lines define multiple types of meshes MH-R, MH-G and MH-B.

[0157] refer to Figure 6B and Figure 6C , the first mesh line MSL1 and the second mesh line MSL2 have line widths different from each other. The difference between the line width W1 of the first mesh line MSL1 and the line width W2 of the second mesh line MSL2 is in the reference Figure 5H The value outside the range of the process error WE described above is set, and the line width W1 of the first mesh line MSL1 and the line width W2 of the second mesh line MSL2 are intentionally designed to be different from each other. Figure 6B In the embodiment, the line width W1 of the first grid line MSL1 is greater than the line width W2 of the second grid line MSL2, and Figure 6C , the line width W1 of the first grid line MSL1 is smaller than the line width W2 of the second grid line MSL2.

[0158] refer to Fig.6D , the first grid line MSL1 and the second grid line MSL2 have substantially the same line width as each other. For example, the line width W1 of the first grid line MSL1 and the line width W2 of the second grid line MSL2 are substantially the same. The difference between the line width W1 of the first grid line MSL1 and the line width W2 of the second grid line MSL2 can be obtained by referring to Figure 5H Here, the process error WE may be about 1 μm or less, or may be about 0 μm.

[0159] Fig. 7A and Figure 7B is a partially enlarged plan view showing an input sensor according to an exemplary embodiment of the present disclosure. Fig. 7A and Figure 7B Corresponding to Figure 5A and Figure 5B . In the following, references to Figures 1 to 6D Detailed description of elements identical to those described above.

[0160] With reference FIG. 5A to FIG. 5I Compared with the input sensing layer ISL described above, the input sensing layer ISL according to this exemplary embodiment may further include a floating electrode. Figure 5A and Figure 5B The first sensing electrodes IE1 - 2 and the second sensing electrodes IE2 - 3 shown in FIG. 1 are spaced apart and electrically separated.

[0161] The floating electrode may include a plurality of floating patterns. Fig. 7A The first floating pattern FP-1 of the floating electrode disposed inside the first pattern CP1 is shown. Figure 7BThe second floating pattern FP-2 of the floating electrode disposed inside the second pattern CP2 is shown.

[0162] As a representative example, two first floating patterns FP-1 disposed inside two first sensor areas SA1 and two second floating patterns FP-2 disposed inside two second sensor areas SA2 are shown. In an exemplary embodiment of the present disclosure, the floating pattern may be disposed inside the third pattern CP3 and / or the fourth pattern CP4.

[0163] Along Fig. 7A and Figure 7B The cross section taken along line VI-VI' can be substantially the same as Figure 5D to Figure 5G The same as those in one. Figure 5D to Figure 5G The line width, material, stacking structure, and distance DT of the first grid line MSL1 and the second grid line MSL2 described may be equally applied to the grid lines of the first floating pattern FP-1 and the grid lines of the second floating pattern FP-2. For example, the first grid line MSL1 of the first floating pattern FP-1 and the second grid line MSL2 of the second floating pattern FP-2 may overlap each other. In addition, the first grid line MSL1 of the first floating pattern FP-1 and the second grid line MSL2 of the second floating pattern FP-2 may extend along a reference direction. An edge MSL1-E of the first grid line MSL1 of the first floating pattern FP-1 disposed in the reference direction and an edge MSL2-E of the second grid line MSL2 of the second floating pattern FP-2 disposed in the reference direction may be misaligned with each other along a direction (i.e., a third direction DR3) perpendicular to the line width direction (i.e., the second diagonal direction CDR2) and the reference direction (i.e., the first diagonal direction CDR1).

[0164] When the edge MSL1-E of the first grid line MSL1 of the first floating pattern FP-1 and the edge MSL2-E of the second grid line MSL2 of the second floating pattern FP-2 are aligned, stress is concentrated in the second insulating layer IS-IL2, and thus damage to the second insulating layer IS-IL2, such as cracking of the inorganic layer, may occur. Since the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 are not aligned with each other, the stress applied to the second insulating layer IS-IL2 can be reduced. The distance DT between the edge MSL1-E of the first grid line MSL1 and the edge MSL2-E of the second grid line MSL2 in the first diagonal direction CDR1 can be greater than the reference Figure 5H The process error WE described may be in the range of about 1.5 μm to about 5 μm. Therefore, the second insulating layer IS-IL2 may be prevented from being damaged. For example, the display device DD may thus resist cracking during bending and handling.

[0165] refer to Figure 5D to Figure 5G The first boundary distance DT-B1 described above may be equally applied to the grid lines of the first pattern CP1 and the grid lines of the first floating pattern FP-1, and with reference to Figure 5D to Figure 5G The described second boundary distance DT-B2 may be equally applied between the grid lines of the second pattern CP2 and the grid lines of the second floating pattern FP-2.

[0166] FIG. 8A to FIG. 8C is a perspective view showing a display device DD according to an exemplary embodiment of the present disclosure. Figures 1 to 7B The described input sensor may be applied to a display device DD.

[0167] like FIG. 8A to FIG. 8C As shown in , the display device DD may include a plurality of areas defined according to its operation mode. The display device DD may include a first area NBA1, a second area NBA2, and a third area BA disposed between the first area NBA1 and the second area NBA2. The third area BA is bent based on a bending axis BX to substantially form a curvature. Hereinafter, the first area NBA1, the second area NBA2, and the third area BA may be referred to as a first non-bending area NBA1, a second non-bending area NBA2, and a bending area BA, respectively.

[0168] like Figure 8B As shown in , the display device DD may be bent inward (inwardly bent) such that the display surface DD-IS of the first non-bending area NBA1 faces the display surface DD-IS of the second non-bending area NBA2. Figure 8C As shown in , the display device DD can be bent outward (outward bending) so that the display surface DD-IS is exposed to the outside.

[0169] The display device DD according to an exemplary embodiment of the present disclosure may include a plurality of bending areas BA. In addition, the bending area BA may be defined to correspond to the way in which the user operates the display device DD. For example, Figure 8B and Figure 8C Variously, the bending area BA may be defined to be substantially parallel to the first direction axis DR1, or may be defined in a diagonal direction. The bending area BA may have a size determined according to a radius of curvature, rather than being fixed.

[0170] In an exemplary embodiment of the present disclosure, the display device DD may only repeat Fig. 8A and Figure 8B The operating mode shown in , or you can just repeat Fig. 8A and Figure 8C The operating mode shown in .

[0171] refer to FIG. 5A to FIG. 7B The input sensor described can be applied to FIG. 8A to FIG. 8C The foldable display device DD shown in FIG. 1 can reduce cracks occurring in the inorganic layer of the bending area BA.

[0172] Although exemplary embodiments of the present disclosure have been described, it is to be understood that the present disclosure should not be limited to these exemplary embodiments but various changes and modifications may be made by one of ordinary skill in the art without departing from the spirit and scope of the present disclosure as claimed hereto.

[0173] Accordingly, the disclosed subject matter should not be limited to any single exemplary embodiment described herein, and the scope of the inventive concept should be determined in accordance with the appended claims.

Claims

1. Display equipment, including: display panel, providing the base surface; as well as An input sensor is disposed on the base surface, and the input sensor comprises: Intermediate insulation layer; a first sensing electrode; and The second sensing electrode is insulated from the first sensing electrode and crosses the first sensing electrode, wherein the first sensing electrode comprises: a first pattern comprising grid lines; and a second pattern, overlapping the first pattern, the intermediate insulating layer interposed between the second pattern and the first pattern, the second pattern connected to the first pattern via a contact hole defined through the intermediate insulating layer, and comprising grid lines, wherein the grid lines of the first pattern include first grid lines extending in a reference direction, The grid lines of the second pattern include second grid lines extending in the reference direction and overlapping the first grid lines, and The edges of the first grid lines and the edges of the second grid lines are not aligned with each other in a direction orthogonal to the base surface; The distance between the edge of the first grid line and the edge of the second grid line in the reference direction is greater than the distance between the edge of the first grid line and the edge of the second grid line in a line width direction perpendicular to the reference direction.

2. The display device according to claim 1, wherein: A distance between the edge of the first grid line and the edge of the second grid line in the reference direction is in a range of 1.5 μm to 5 μm.

3. The display device according to claim 1, wherein: The line width of the first grid lines and the line width of the second grid lines are the same as each other.

4. The display device according to claim 1, wherein: The second sensing electrode comprises: a third pattern including grid lines disposed on the same layer as the first pattern and spaced apart from the first pattern; and A fourth pattern is disposed on the same layer as that of the second pattern, is spaced apart from the second pattern, overlaps the third pattern, is connected to the third pattern via a contact hole defined through the intermediate insulating layer, and includes a grid line.

5. The display device according to claim 4, wherein: The first pattern includes first sensor areas and first bridge areas connecting the first sensor areas, and the second pattern includes second sensor areas overlapping the first sensor areas.

6. The display device according to claim 5, wherein: the third pattern includes a third sensor area and a dummy area spaced apart from the third sensor area, The fourth pattern includes a fourth sensor area overlapping the third sensor area and the first bridge area, and a second bridge area connecting the fourth sensor area and overlapping the dummy area. The direction in which the first sensor regions are arranged is the same as the direction in which the second sensor regions are arranged, The direction in which the third sensor regions are arranged is the same as the direction in which the fourth sensor regions are arranged, and The direction in which the first sensor regions are arranged intersects the direction in which the third sensor regions are arranged.

7. The display device according to claim 6, wherein: The fourth sensor region has a size greater than that of the third sensor region.

8. The display device according to claim 4, wherein: The grid lines of the third pattern include third grid lines extending along the reference direction, and A distance between the edge of the first grid line and an edge of the third grid line in the reference direction is in the range of 1 μm to 5 μm or in the range of 6 μm to 15 μm.

9. The display device according to claim 1, wherein: The intermediate insulating layer includes a silicon oxide layer, a silicon nitride layer or a silicon oxynitride layer.

10. The display device according to claim 1, wherein: The input sensor is disposed directly on the base surface.

11. The display device according to claim 1, wherein: The input sensor also includes: a lower insulating layer disposed below the intermediate insulating layer and supporting the first pattern; and an upper insulating layer, covering the second pattern and disposed on the middle insulating layer, wherein the lower insulating layer and the intermediate insulating layer each include an inorganic layer, and The upper insulating layer includes an organic layer.

12. Input sensors, including: a first grid pattern; an insulating layer, covering the first grid pattern; a second grid pattern, disposed on the insulating layer, wherein the first grid pattern includes a first sensing region and a second sensing region, and when viewed in a plan view, the first sensing region and the second sensing region are separated from each other, The second grid pattern includes a third sensing region and a fourth sensing region, the third sensing region and the fourth sensing region being separated from each other when viewed in the plan view, The grid lines arranged in the first sensing area overlap with the grid lines arranged in the third sensing area, The grid lines arranged in the second sensing area overlap with the grid lines arranged in the fourth sensing area, and A first boundary distance between the grid lines arranged in the first sensing area and the grid lines arranged in the second sensing area is different from a second boundary distance between the grid lines arranged in the third sensing area and the grid lines arranged in the fourth sensing area; The grid lines arranged in the first sensing area include first grid lines extending along a reference direction, The grid lines arranged in the third sensing area include second grid lines extending along the reference direction and overlapping with the first grid lines, The distance between the edge of the first grid line and the edge of the second grid line in the reference direction is greater than the distance between the edge of the first grid line and the edge of the second grid line in a line width direction perpendicular to the reference direction.

13. The input sensor of claim 12, wherein: One of the first boundary distance and the second boundary distance is larger than the other of the first boundary distance and the second boundary distance by 3 μm to 10 μm.

14. The input sensor of claim 12, wherein: Edges of the first grid lines and edges of the second grid lines are not aligned with each other along a direction perpendicular to a line width direction and the reference direction.

15. The input sensor of claim 14, wherein: A distance between the edge of the first grid line and the edge of the second grid line in the reference direction is in a range of 1.5 μm to 5 μm.

16. Display equipment, including: Display panel; as well as An input sensor is arranged on the display panel, and the input sensor comprises: Intermediate insulation layer; sensing electrodes; and A floating electrode is arranged inside the sensing electrode, and the floating electrode comprises: a first floating pattern comprising grid lines; and a second floating pattern, overlapping the first floating pattern, the intermediate insulating layer being disposed between the second floating pattern and the first floating pattern, and the second floating pattern comprising grid lines, wherein the grid lines of the first floating pattern include first grid lines extending in a reference direction, The grid lines of the second floating pattern include second grid lines extending in the reference direction and overlapping the first grid lines, and edges of the first grid lines and edges of the second grid lines are not aligned with each other along a direction perpendicular to a line width direction and the reference direction; The distance between the edge of the first grid line and the edge of the second grid line in the reference direction is greater than the distance between the edge of the first grid line and the edge of the second grid line in the line width direction perpendicular to the reference direction.

17. The display device according to claim 16, wherein: The sensing electrode comprises: a first pattern including grid lines and disposed on the same layer as that of the first floating pattern; and A second pattern is disposed on the same layer as that of the second floating pattern, overlaps the first pattern, is connected to the first pattern via a contact hole defined through the intermediate insulating layer, and includes a grid line.

18. Input sensors, including: Intermediate insulation layer; a first sensing electrode; as well as A second sensing electrode is separated from the first sensing electrode along a boundary line and intersects the first sensing electrode, wherein the first sensing electrode comprises: a first pattern comprising grid lines including first grid lines extending in a reference direction; and a second pattern, overlapping the first pattern, the intermediate insulating layer interposed between the second pattern and the first pattern, the second pattern connected to the first pattern via a contact hole defined through the intermediate insulating layer, and the second pattern including grid lines, the grid lines including second grid lines extending in the reference direction and overlapping the first grid lines, Wherein, the first grid lines and the second grid lines together form a step structure or an overhang structure around the boundary line in the reference direction; Wherein, the length of the step portion of the first grid line that does not overlap with the second grid line measured in the reference direction or the length of the overhang portion of the second grid line that does not overlap with the first grid line measured in the reference direction is greater than the range of normal process errors in the line width direction perpendicular to the reference direction.

19. The input sensor of claim 18, wherein: A length of a stepped portion of the first grid line not overlapping the second grid line measured in the reference direction or a length of an overhang portion of the second grid line not overlapping the first grid line measured in the reference direction ranges from 1.5 μm to 5 μm.

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