Memory systems using quantum convolutional codes

Abstract

The present invention relates to a memory system using quantum convolutional codes. The memory system includes a qubit array, the qubit array being configured to store therein one or more entangled qubit states encoded using a quantum stabilizer code. The memory system further includes a quantum state refresh module, the quantum state refresh module being configured to refresh the entangled qubit states in the qubit array when a degradation error is detected therein. The quantum state refresh module is further configured to detect the degradation error by performing a redundant measurement on a set of syndrome values ​​corresponding to the quantum stabilizer code. The redundant measurement is based on an error correction code defined using a generator matrix and a corresponding supplementary parity check matrix of the quantum stabilizer code. In an example embodiment, each of the generator matrix and the supplementary parity check matrix has a corresponding inclined stripe form.

Description

Technical Field

[0001] Various example embodiments relate to quantum computing and more particularly, but not exclusively, to memory systems for quantum computing devices. Background Art

[0002] This section introduces aspects that may help promote a better understanding of the present invention. Therefore, the statements in this section are to be read in this light and should not be understood as admissions about things that are or are not in the prior art.

[0003] Quantum computing devices have been manufactured or proposed based on various technologies, such as superconducting junction devices, ion trap devices, quantum well devices, fractional quantum Hall effect (FQHE) devices, etc. Quantum computing devices typically use quantum memories to store states, and use hardware to write states to and read states from the memory. Reliable methods for writing to and reading from quantum memories can be used for various types of quantum computing devices. Some quantum computing applications rely on quantum memories to store qubit states with sufficiently high fidelity for relatively long periods of time. However, quantum states or ensembles of quantum states may exhibit relatively high fidelity loss rates or degradation rates, for example, due to decoherence in quantum gate devices, processing, and / or transmission through quantum channels. Summary of the invention

[0004] Various embodiments of a memory system are disclosed herein, comprising a qubit array configured to store therein one or more entangled qubit states encoded using a quantum stabilizer code. The memory system further comprises a quantum state refresh module configured to refresh the entangled qubit states in the qubit array if a degradation error is detected therein. The quantum state refresh module is further configured to detect degradation errors by performing redundancy measurements on a set of syndrome values ​​corresponding to the quantum stabilizer code. The redundancy measurements are based on an error correction code defined using a generator matrix and a corresponding supplemental parity check matrix of the quantum stabilizer code. In an example embodiment, each of the generator matrix and the supplemental parity check matrix may have a slanted stripe form

[0005] At least some embodiments provide improvements in the reliability of the measured syndrome values, which can be advantageously used to significantly slow the effective degradation rate of entangled qubit states stored in a corresponding quantum memory system.

[0006] According to one embodiment, a device is provided, comprising: a register configured to store an encoded entangled qubit state encoded using a quantum stabilizer code; a measurement circuit configured to perform redundant measurements of a set of syndrome values ​​corresponding to the encoded entangled qubit state, the redundant measurements being performed based on an error correction code defined using a set of ordered generator vectors of the quantum stabilizer code and a plurality of linearly independent combinations of the generator vectors; and an electronic decoder configured to use the error correction code to correct measurement errors in the set of syndrome values ​​for which the redundant measurements have been performed; and wherein a generator matrix defined by the set of ordered generator vectors has a first slanted stripe form. BRIEF DESCRIPTION OF THE DRAWINGS

[0007] Other aspects, features and advantages of the various disclosed embodiments will become more fully apparent from the following detailed description and the accompanying drawings, in which, by way of example:

[0008] Figure 1 A block diagram showing a memory system according to an embodiment;

[0009] Figures 2A to 2C Demonstrate that the invention can be used according to the embodiment Figure 1 A block diagram of a syndrome measurement circuit in a memory system;

[0010] Figure 3 Demonstrate that the invention can be used according to the embodiment Figure 1 A flowchart of a memory refresh method in a memory system; and

[0011] Figure 4 Compare graphically Figure 3 The performance of an embodiment of a memory refresh method is compared to the performance of a comparably configured prior art method. DETAILED DESCRIPTION

[0012] Some embodiments may benefit from at least some of the features disclosed in U.S. Patent Nos. 8,324,120, 8,633,092, 8,987,703, 9,286,154, 9,762,262, and 9,944,520, all of which are incorporated herein by reference in their entirety.

[0013] Conventional convolutional codes generate error correction codes for encoded symbols by slidingly applying a Boolean polynomial function to a data stream. The sliding application represents the "convolution" of the encoder on the data, which is reflected in the code name (i.e., "convolutional code"). The sliding nature of convolutional codes facilitates trellis decoding, where the corresponding trellis is time-invariant. The time-invariant trellis allows convolutional codes to be decoded using maximum likelihood soft decision decoding that employs practical circuit implementations with tractable complexity.

[0014] In contrast, block error correction codes are typically represented by a time-varying trellis and thus, are typically hard-decision decoded.

[0015] Convolutional codes further differ from block codes in that the convolutional encoder has memory, thereby generating a corresponding impulse response that is spread over time. For example, an (m, k, M) convolutional code can be implemented using a linear circuit with k inputs, m outputs, and a sequential memory of length M (e.g., a shift register), where m, k, and M are positive integers and m>k. In the special case of k=1, the input sequence does not need to be divided into blocks and can be processed continuously. The memory length M is usually chosen to be large enough to support the desired error correction capability. Due to the code memory, the m encoder outputs at any given time depend not only on the k inputs at that particular time, but also on the ceil(M / k) previous input blocks (for each of the k inputs).

[0016] In most practical systems, codewords of infinite length are not used. For example, to generate a codeword of finite length, a convolutional encoder may be configured to input a selected block of ceil(M / k) inputs so that zeros are obtained in all M memory elements and at m outputs at an appropriate time after encoding the K inputs, where K=rk and r is a positive integer. The encoder may then terminate the codeword. It is not difficult to see that the length n of the obtained codeword is an integer multiple of m, i.e., n=cm, where c is a positive integer. In this case, the number n may be referred to as the total length of the code.

[0017] Various embodiments disclosed herein adapt traditional convolutional codes for use with quantum stable subcodes. Such adapted codes may be referred to herein as quantum convolutional codes.

[0018] An overview of quantum stabilizer codes can be found, for example, in A. Ashikhmin, S. Litsyn, "Foundations of Quantum Error Correction", AMS / IP Studies in Advanced Mathematics, Vol. 41: Recent Trends in Coding Theory and its Applications, 2007, pp. 151-185, which is incorporated herein by reference in its entirety.

[0019] Figure 1A block diagram of a memory system 100 according to an embodiment is shown. The memory system 100 includes a qubit array 110 configured to store one or more quantum states therein. The quantum states may be written to and read from the qubit array 110 via an input / output (I / O) interface 120. The memory system 100 further includes a quantum state refresh (QSR) module 130 that operates to effectively protect quantum states stored in the qubit array 110 from accumulating errors, thereby enabling the memory system 100 to store quantum states with relatively high fidelity for a relatively long time.

[0020] As used herein, the term "qubit" refers to a device that includes a two-state quantum mechanical system. Examples of suitable two-state quantum mechanical systems include, but are not limited to: (i) two spin states of a particle with 1 / 2 spin; (ii) the ground state and excited state of an atom; (iii) two polarization states of a photon; (iv) edge states of a FQHE (fractional quantum Hall effect) droplet; and (v) the state of a superconducting junction.

[0021] The two states with respect to which a qubit state can be measured are referred to as basis states. A non-entangled qubit state is a linear superposition of the basis states. Multi-qubit states differ from traditional multi-bit states in that the former can be formed to exhibit entanglement. Entangled qubit states cannot be decomposed into a simple product of single-qubit basis states, but can be expressed as a linear combination or superposition of different products of single-qubit basis states. QSR module 130 is configured to use the entangled nature of multi-qubit states, e.g., as further described below, to effectively protect qubit array 110 from accumulating errors in the qubit states therein.

[0022] According to an example embodiment, each entangled qubit state stored in qubit array 110 is encoded using a quantum convolutional code (QCC) Q. The QCC code Q of total length n and dimension K is encoded in the complex space S D Middle Dimension 2 K The linear subspace of n . The parameters n and K of the QCC code Q correspond directly to the parameters n and K, respectively, of a conventional (n, K, M) convolutional code. When applied to qubits, the QCC code Q encodes a K qubit state into an n qubit state, thereby providing redundancy that can be used to correct qubit state errors in memory system 100 that occur for one or more of the causes indicated above. Example embodiments of the QCC code Q are described in more detail below with reference to equations (1)-(3) and (9)-(11).

[0023] In operation, QSR module 130 is configured to continuously subject different n-qubit states stored in qubit array 110 to processing. Corresponding groups of qubits may be transferred to QSR module 130 one group at a time based on a preset schedule, e.g., in a cyclic sequence. If a qubit state error is detected, QSR module 130 is further configured to subject each group of received qubits to error correction processing, e.g., as described further below.

[0024] In an example embodiment, the error correction process in QSR module 130 may include the following steps: (i) determining whether the received set of qubits corresponding to the entangled quantum state has an error, and (ii) if an error is detected, changing the qubit state to correct the detected error. The set of qubits, now in the changed and presumably error-free entangled quantum state, is transferred back to qubit array 110. If QSR module 130 does not detect an error in the qubit state, the corresponding entangled quantum state is assumed to be error-free, and the set of qubits may be transferred back to qubit array 110 without changing the qubit state.

[0025] In an example embodiment, the QSR module 130 includes Figure 1 134, error detection circuit 138, and quantum state recovery circuit 148 are interconnected as indicated. Qubit buffer 134 includes suitable qubit registers configured to hold received qubits for the duration of a corresponding error correction process. Error detection circuit 138 is configured to implement the above-specified step (i) of the error correction process. Quantum state recovery circuit 148 is configured to act on the entangled quantum states in qubit buffer 134 to implement the above-specified step (ii) of the error correction process.

[0026] In an example embodiment, the error detection circuit 138 includes the following: Figure 1 Syndrome measurement circuit 140 and electronic decoder 144 are coupled to each other and to other circuits in QSR module 130 as indicated.

[0027] Syndrome measurement circuit 140 is a quantum circuit configured to perform redundant measurements of a set of syndrome values ​​on the n-qubit states in qubit buffer 134. The result of this measurement is a binary vector v=(s1, ..., s n-K , p1, …, p N ), where N is a positive integer. The first nK binary values ​​(s1, ..., s n-K ) carries the syndrome bits corresponding to the QCC code Q, such as the syndrome value. The next N binary values ​​(p1, ..., p N) carries parity bits that can be used to detect possible errors in the measurement of the syndrome bits.

[0028] The above indicated measurement of the set of syndrome values ​​is a "redundant" measurement because the result of the measurement (eg, binary vector v) contains measured values ​​greater than the number of independent syndrome values ​​in the measured set, eg, (n-K+N)>(nK).

[0029] As already indicated above, quantum gates in quantum circuits such as the syndrome measurement circuit 140 have relatively high intrinsic error levels, which results in a correspondingly relatively high probability of erroneous syndrome measurements. Therefore, the syndrome measurement circuit 140 is configured to perform redundant measurements according to an error correction code C constructed based on a QCC code Q. For this purpose, the syndrome measurement circuit 140 comprises a quantum circuit that results in that all binary values ​​s1, ..., s n-K , p1, …, p N The generated binary vector v becomes the codeword of the error correction code C. An example embodiment of the error correction code C is described in more detail below with reference to equations (1) to (15). Figures 2A to 2C Example embodiments of corresponding quantum circuits for implementing circuit 140 are described in more detail.

[0030] If the vector v generated by the syndrome measurement circuit 140 is a codeword of the error correction code C, the decoder 144 truncates the vector v to remove the parity values ​​p1, ..., p N And the measured syndrome values ​​s1, ..., s n-K Passed to the quantum state recovery circuit 148.

[0031] If it is determined that the vector v generated by the syndrome measurement circuit 140 is not a valid codeword of the error correction code C, then the binary values ​​s1, . . . , s n-K , p1, …, p N is not accurately measured. In this case, the decoder 144 is configured to process the measured vector v according to the error correction code C to determine the most likely valid codeword corresponding to the measured vector v. After this processing, the decoder 144 truncates the determined most likely codeword and converts the corresponding most likely syndrome values ​​s1, ..., s n-K Passed to the quantum state recovery circuit 148.

[0032] The quantum state recovery circuit 148 uses the syndrome values ​​s1, ..., s received from the decoder 144 n-K To correct errors (if any) in the n-qubit state stored in qubit buffer 134. More specifically, if the syndrome values ​​s1, ..., s received from decoder 144 n-KIf all are zero, then the n-qubit state in qubit buffer 134 is assumed to be error-free and quantum state recovery circuit 148 performs no error correction on it. However, if the syndrome values ​​s1, ..., s received from decoder 144 are n-K If any of is not zero, then it is assumed that the n-qubit state in qubit buffer 134 has an error. In this case, quantum state recovery circuit 148 uses the syndrome values ​​s1, ..., s received from decoder 144 n-K To determine the most likely error operator E that has caused the corresponding original entangled quantum state to transform into an entangled quantum state exhibiting these syndrome values. A suitable algorithm for this determination that can be used in the quantum state recovery circuit 148 according to an embodiment is disclosed in the book entitled "Quantum Error Correction and Fault Tolerant Quantum Computing" by Frank Gaitan, Taylor & Francis, 2008. The entire text of Frank Gaitan's book is incorporated herein by reference. In an alternative embodiment, syndrome values ​​s1, ..., s based on the quantum stabilizer code Q may be similarly used. n-K Other suitable algorithms for determining the error operator E.

[0033] In one embodiment, the error operator E can be represented as a square complex-valued matrix. To correct the error corresponding to the error operator E, the quantum state recovery circuit 148 is first configured to find the inverse error operator E, for example, using a suitable conventional matrix inversion algorithm. -1 The resulting inverse matrix is ​​denoted by E -1 Based on E -1 , quantum state recovery circuit 148 operates to generate stimulus 150 that changes the n-qubit state held in qubit buffer 134 in a manner that corrects the error caused by error operator E. If error correction is performed properly, the corrected entangled quantum state in qubit buffer 134 will most likely have an all-zero syndrome.

[0034] In an example embodiment, the QCC code Q may be represented by a generator matrix G(Q).

[0035] The general formula of the generator matrix G(Q) is given by equation (1):

[0036]

[0037] where g i (i=1, 2, ..., nK) is a generator vector having n elements. Thus, the generator matrix G(Q) has a size of (nK)×n matrix elements.

[0038] In the example embodiment, the generator vector g is selected i So that the generator matrix G(Q) has the form shown in equation (2):

[0039]

[0040] Each G j (j=1, 2,...,ν) is GF(4)={0, 1, w, w 2} (where GF(4) denotes a Galois field of size 4). The parameters r and m are usually small positive integers. The parameter ν is called the constraint length and is also usually a small positive integer.

[0041] According to equation (2), the generator matrix G(Q) has a "slanted stripe" form. In this article, the slanted stripe form means that each row block of G(Q) has v sequential non-zero elements, each of which is a corresponding matrix G j . In this form, the remaining matrix elements of G(Q) are all zero. Also, in this form, at each next block row, the first non-zero element is shifted by a fixed number of columns from the first non-zero element of the previous block row. For example, in the example corresponding to equation (2), each row block has r rows. In the first row block of G(Q), the first v elements are the matrix G j , where j = 1, 2, ..., ν. In each subsequent row block, the matrix block [G1 ... G v ] is shifted right by m columns relative to its previous position. These shifts produce a slanted stripe of non-zero elements in G(Q), as indicated in equation (2).

[0042] The generator matrix G(Q) of equation (2) is also self-orthogonal. Mathematically, this property of G(Q) can be expressed using equation (3):

[0043] G*G T =0 (3)where the “*” symbol denotes the trace inner product; and the superscript T means transpose.

[0044] The following table gives the set {0, 1, w, w 2 Multiplication rule for elements of}:

[0045] × 0 1 w <![CDATA[w 2 ]]> 0 0 0 0 0 1 0 1 w <![CDATA[w 2 ]]> w 0 w <![CDATA[w 2 ]]> 1 <![CDATA[w 2 ]]> 0 <![CDATA[w 2 ]]> 1 w

[0046] The following table gives the set {0, 1, w, w 2 The summation rule for the elements of} is:

[0047] + 0 1 w <![CDATA[w 2 ]]> 0 0 1 w <![CDATA[w 2 ]]> 1 1 0 <![CDATA[w 2 ]]> w w w <![CDATA[w 2 ]]> 0 1 <![CDATA[w 2 ]]> <![CDATA[w 2 ]]> w 1 0

[0048] In an example embodiment, the error correction code C corresponding to the generator matrix G(Q) of equation (2) may be constructed as follows.

[0049] First, we use the generator vector g i (See Equation (1)) constructs N vectors f1, f2, ..., f N Equation (4) gives the vector f q (where q = 1, 2, ..., N) is the general mathematical expression:

[0050]

[0051] The coefficient a iq Each of can be 0 or 1, that is, a iq ∈{0,1}. Coefficient a iq Define an N×(nK) matrix A, whose general form is given by equation (5):

[0052] A=[A1 A2 ... A n-K ] (5)

[0053] Among them A i (where i = 1, 2, ..., nK) is a column vector with N elements defined by equation (6):

[0054]

[0055] Matrix A may be referred to herein as a complementary parity-check matrix corresponding to the generator matrix G(Q).

[0056] In the example embodiment, the coefficient a is selected iq The matrix A has a slanted stripe form. More specifically, the first column A1 of the matrix A has the form of two concatenated vectors, as shown in equation (7):

[0057] A1=[a0 0] T (7)

[0058] Where a0 is a first vector having mv elements therein; zero denotes a second vector having (N-mv) zeros as its elements; and the T in the superscript means transpose. Some but not all elements of vector a0 may be zero. Other columns of matrix A may be obtained from the column by incrementally shifting the position of vector a0 down along column A1 (where the shift increment is, for example, r rows) and also cyclically shifting zeros to fill in the empty positions previously occupied by vector a0. For example, the second column A2 has the form of three concatenated vectors, as shown in equation (8):

[0059] A2=[0 a0 0]T (8)

[0060] where the first 0 indicates an all-zero vector having r zeros as its elements; and the second 0 indicates an all-zero vector having (N-mv-r) zeros as its elements. Thus, the position of vector a0 in column A2 is shifted down by r rows along the column relative to its position in column A1. The third column A3 has a form qualitatively similar to that shown in equation (8), except that there are 2r zeros before vector a0 and (N-mv-2r) zeros after vector a0. Thus, the position of vector a0 in column A3 is shifted down by r rows along the column relative to its position in column A2, and so on.

[0061] It should be noted that the above-mentioned slanted stripe form of the matrix A is somewhat different from the slanted stripe form of the generator matrix G(Q) (Equation (2). More specifically, the slanted stripe form of the generator matrix G(Q) is due to the matrix block [G1…G v ] is incrementally shifted to the right as the row index increases. In contrast, the slanted stripe form of the supplementary parity check matrix A is due to the vector a0 being incrementally shifted downward as the column index increases. This qualitative difference can be indicated, for example, by referring to the supplementary parity check matrix A having a transposed slanted stripe form relative to the slanted stripe form of the generator matrix G(Q). In fact, the matrix A T and G(Q) have qualitatively similar inclined stripe forms.

[0062] For purposes of illustration and without any implied limitation, the subsequent description of some embodiments is given with reference to example matrices G(Q) and A defined using equations (9) to (12). Based on the description provided, one of ordinary skill in the art will understand how to construct matrices G(Q) and A and alternative embodiments of corresponding quantum circuits for syndrome measurement circuit 140.

[0063] In an example embodiment, the generator matrix G(Q) may have the slanted stripe form shown in equation (9):

[0064]

[0065] This embodiment corresponds to r = 2, m = 3 and ν = 2. The corresponding matrices G1 and G2 are given by equations (10) and (11), respectively:

[0066]

[0067]

[0068] An example embodiment of a complementary parity check matrix A corresponding to the generator matrix G(Q) of equation (9) is shown in equation (12):

[0069]

[0070] Herein, vector a0 is (1 1 0 1 1 1), and the zeros that do not belong to the shown copy of vector a0 are not explicitly shown in order to more clearly present the transposed slanted stripe form of this matrix A.

[0071] Figures 2A to 2C The syndrome measurement circuit 140 ( Figure 1 ). More specifically, Figure 2A A general block diagram of syndrome measurement circuit 140 is shown. Each of modules 210 of circuit 140 is designed to perform measurements according to a corresponding row of generator matrix G(Q). Each of modules 220 of circuit 140 is designed to perform measurements according to a corresponding row of supplementary parity check matrix A.

[0072] As an example, Figure 2B A block diagram of a module 2103 in the circuit 140 is shown, which is configured to measure the value of the syndrome bit s3. This module 2103 is designed to perform the measurement according to the third row of the generator matrix G(Q) shown in equation (9). Figure 2C A block diagram of a module 2204 in circuit 140 is shown, which is configured to measure the value of parity bit p4. This particular module 2204 is designed to perform the measurement based on the fourth row of the supplementary parity check matrix A shown in equation (12). Figure 2B and 2C , and the corresponding description provided below, a person of ordinary skill in the art will be able to make and use each and any of the modules 210 and 220 in the corresponding embodiments of the circuit 140 without undue experimentation.

[0073] refer to Figure 2A The syndrome measurement circuit 140 is configured to measure the qubits q1 to q n The syndrome measurement is performed on the n-qubit state encoded in . This measurement is performed by generating a vector v = (s1, ..., s n-K , p1, ..., p N Each component value of the vector v is measured by the measurement modules 2101 to 210 n-K and 2201 to 220 N The corresponding one of the measurement modules 2101 to 210 n-K is configured to generate vector components s1 to s respectively n-K , and the measuring modules 2201 to 220 N is configured to generate vector components p1 to p respectively N .

[0074] Measurement modules 2101 to 210 n-K Each of is configured to N The corresponding subgroups of the n-K The measurement is based on a generator vector g representing a quantum stable subcode Q. i As indicated above, the generator vector g i Located in the i-th row of the generator matrix G(Q) (see equation (1)). Figure 2B Further describing the example embodiment, the generator matrix G(Q) is given by equation (9).

[0075] Measuring modules 2201 to 220 N Each of is configured to n The corresponding subgroups perform measurements to generate parity values ​​p1 to p N The corresponding one of the two, the measurement is based on the vector f q The corresponding one of (see equation (4)), where q = 1, 2, ..., N. As already indicated above, the vector f q Defined by the qth row of the supplementary parity check matrix A. For the following reference Figure 2C Further describing the example embodiment, the supplemental parity check matrix A is given by equation (12).

[0076] Figure 2B A block diagram of measurement module 2103 is shown according to an example embodiment. Measurement module 2103 is an example of a measurement module configured to generate syndrome bit values ​​(i.e., s3) of vector v. More specifically, measurement module 2103 is configured to measure the state formed by coupling the entangled quantum states of qubits q4 to q9 to the reference state of the satellite qubit based on the coupling defined by the generator vector g3:

[0077] g3=[0 0 0 1 1 1 1 ww 2 0... 0] (13)

[0078] Equation (13) can be obtained, for example, by comparing equations (1) with (9). Since the only non-zero elements of this generator vector g3 are the fourth to ninth elements, module 2103 is only coupled to qubits q4 to q9, which are qubits q1 to q9. n The satellite qubits are reference qubits that are prepared to be in a specific pre-selected quantum state as is known in the relevant art.

[0079] The measurement module 2101 includes ten quantum Hadamard gates H, five quantum CNOT gates , quantum controlled Y gate Y and six quantum measurement gates M, all as Figure 2B One of ordinary skill in the art will recognize that quantum Hadamard gates, quantum CNOT gates, quantum controlled Y gates, and quantum measurement gates are basic quantum gates from a set of universal quantum gates that are routinely used in the construction of quantum circuits. Descriptions of such basic quantum gates can be found, for example, in (i) A. Barenco et al., “Elementary Gates for Quantum Computation,” Physical Review A, Vol. 52, pp. 3457-3467, 1995; (ii) the book “QUANTUM COMPUTING DEVICES: PRINCIPLES, DESIGNS, AND ANALYSIS,” by Goong Chen et al., CRC Press, 2007; and (iii) the book “Quantum Computation and Quantum Information,” by M. Nielsen and I. Chuang, Cambridge University Press, 2000, all of which are incorporated herein by reference in their entirety. Additional description of basic quantum gates can be found in the above-mentioned book by Frank Gaitan.

[0080] The fourth element of the generator vector g3 defined by equation (13) is 1. Therefore, module 2103 is configured to couple qubit q4 and the auxiliary qubits via a Hadamard gate and a CNOT gate. Each of the fifth, sixth, and seventh elements of the generator vector g3 defined by equation (13) is also 1. Therefore, the coupling arrangement applied to qubit q4 is repeated in module 2103 for qubits q5, q6, and q7. The eighth element of the generator vector g3 defined by equation (13) is w. Therefore, module 2103 is configured to couple qubit q8 and the auxiliary qubits via a CNOT gate without using a Hadamard gate. The ninth element of the generator vector g3 defined by equation (13) is w 2 Thus, module 2103 is configured to couple qubit q9 and the satellite qubits via controlled Y-gates and Hadamard gates.

[0081] Each quantum measurement gate M in the measurement module 2103 is configured to: (i) measure the voltage applied to its input port (located at Figure 2B ) at its output port (located on the left side of the gate in ); and (ii) based on the measurement, Figure 2B The corresponding electrical output signal 208 is generated at the right side of the gate in i (i=1, 2, ..., 6). Then, each quantum measurement gate M outputs its electrical signal 208 i Applied to parity logic circuit 212 which is connected to receive electrical output signals 2081-2086.

[0082] In an example embodiment, parity logic circuit 212 is configured to slice each of signals 2081 to 2086, thereby converting each of them into a corresponding binary value (0 or 1). Parity logic circuit 212 is further configured to: (i) output a binary "0" if the number of zeros generated from signals 2081 to 2086 is an even number; and (ii) output a binary "1" if the number of zeros generated from signals 2081 to 2086 is an odd number. In practice, the latter function of parity logic circuit 212 is the same as that of a conventional six-input exclusive-OR (XOR) gate.

[0083] Alternative embodiments of parity logic circuit 212 are described, for example, in the aforementioned US Patent No. 9,286,154.

[0084] Figure 2C A block diagram of a measurement module 2204 is shown according to an example embodiment. Module 2204 is an example of a measurement module configured to generate a parity bit value (ie, p4) of a vector v.

[0085] Module 2204 is configured to perform measurements based on vector f4 (see equation (4)). In this particular embodiment, vector f4 is defined by the fourth row of the complementary parity check matrix A given by equation (12). Since the only non-zero elements of that row are located in the first and second columns (see equation (12)), vector f4 is represented as the generator vector g i The following linear combination of :

[0086] f4=g1+g2 (14)

[0087] Using the generator vectors g1 and g2 from equation (9) and the set {0, 1, w, w given in the corresponding one of the two tables shown above 2}, equation (14) can be equivalently rewritten as follows:

[0088] f4=[w 2 w 2 w 2 w2 1 w 0 ... 0] (15)

[0089] Since the only non-zero elements of this vector f4 are the first to sixth elements, module 2204 is coupled only to qubits q1 to q6.

[0090] The first element of the vector f4 defined by equation (15) is w 2 . Thus, module 2204 is configured to couple qubit q1 and the satellite qubits via controlled Y gates and Hadamard gates. This gate arrangement is similar to the gate arrangement used for qubit q9 in module 2103 (see Figure 2B ). Each of the second, third, and fourth elements of the vector f4 defined by equation (15) is also w 2 . Thus, the coupling arrangement applied to qubit q1 is repeated in module 2204 for qubits q2, q3, and q4. The fifth element of vector f4 defined by equation (15) is 1. Thus, module 2204 is configured to couple qubit q5 and the satellite qubits via a Hadamard gate and a CNOT gate. This gate arrangement is similar to the gate arrangement used for qubit q4 in module 2103 (see Figure 2B ). The sixth element of the vector f4 defined by equation (15) is w. Therefore, module 2204 is configured to couple qubit q6 and the auxiliary qubits via CNOT gates without using Hadamard gates. This gate arrangement is similar to the gate arrangement used for qubit q6 in module 2103 (see Figure 2B The quantum measurement gate M and the parity logic circuit 212 in the measurement module 2204 are similar to those in the measurement module 2103 ( Figure 2B ) to perform the operation.

[0091] Figure 3 A method for using the memory system 100 ( Figure 1 ) in the flowchart of the memory refresh method 300. Figure 1 2 to describe method 300.

[0092] At step 302 of method 300, a set of n qubits (e.g., qubits q1 to q n ) is transferred from array 110 to buffer 134 ( Figure 1 ). By transferring qubit q1 to q n is in the entangled quantum state initially generated using the above-mentioned quantum stable subcode Q. By the time step 302 is executed, the quantum bits q1 to q n The entangled quantum state may or may not be degraded from the initial state.

[0093] At step 304, syndrome measurement circuit 140 is used to measure the qubits q1 to q2 corresponding to the qubits q1 to q3 transferred to buffer 134 at step 302. n The binary vector v of the quantum state is (s1, ..., s n-K , p1, ..., p N ). Using measurement modules 2101 to 210 n-K (See Figure 2A , 2B ) measures the first nK binary values ​​of the vector v (s1, ..., s n-K As indicated above, the measurement modules 2101 to 210 n-K Each of has a generator matrix G(Q) configured to operate according to the operation (e.g., see Figure 2B ) corresponding rows of the quantum circuit to perform measurement. Using measurement modules 2201 to 220 N (See Figure 2A , 2C ) measures the next N binary values ​​(p1, ..., p N ). Measurement modules 2201 to 220 N Each of has a configuration to supplement the parity check matrix A according to the operation (see, for example Figure 2C ) is a quantum circuit that performs measurement on the corresponding row of ). The measured binary vector v is then supplied to the decoder 144.

[0094] At step 306, the decoder 144 runs a suitable decoding algorithm to correct the binary values ​​(s1, . . . , s n-K ) in the decoder 144. After error correction, the decoder 144 converts the resulting binary values ​​(s1, . . . , s n-K )' is sent to the quantum state recovery circuit 148 (see Figure 1 ).

[0095] One of ordinary skill in the art will understand that a set of all-zero binary values ​​(s1, . . . , s n-K )' indicates that the quantum bits q1 to q n The current quantum state of is most likely not yet degraded from its initial quantum state. On the other hand, if the set of binary values ​​(s1, ..., s n-K )' contains one or more binary "1", then the qubits q1 to q n The quantum state of may be degraded to some extent from its initial quantum state.

[0096] In general, any decoding algorithm corresponding to the code C defined by the matrices G(Q) and A may be used in the decoder 144. For example, in one possible embodiment, the decoder 144 may be configured to use trellis-based decoding (e.g., Viterbi-type decoding) to perform step 306. The corresponding trellis may be constructed in a relatively simple manner based on the operation matrices G(Q) and A.

[0097] In an example embodiment, a trellis for decoder 144 may be constructed using the following method.

[0098] First, it should be noted that the generator matrix G(Q) of equation (2) defines a quantum stable subcode Q similar to a traditional convolutional code. This property of the code Q comes from the above-mentioned inclined stripe form of the generator matrix G(Q). In particular, the matrix block [G1...G v ] can be analogous to the sliding application of a Boolean polynomial function in conventional convolutional coding. Thus, the extensive knowledge gained in the art of conventional convolutional coding regarding trellis construction can be readily applied to the trellis construction of any particular (e.g., defined by equation (9)) generator matrix G(Q) used in system 100.

[0099] Once the lattice corresponding to the generator matrix G(Q) is constructed, it can be modified in a relatively simple manner as known in the relevant art to include additional check nodes corresponding to the supplementary parity check matrix A. The resulting modified lattice can then be used in the decoder 144 to perform the correction of the binary values ​​(s1, ..., s2) measured at step 304. n-K ) in the decoding of errors, if any.

[0100] Although it is conceivable to use many different forms of the supplemental parity check matrix A to implement the syndrome measurement circuit 140, we have found through various numerical simulations that relatively good results can generally be achieved when the matrix A has the above-mentioned transposed slanted stripe form (see, for example, equation (12)). It will be understood by those skilled in the art that some other (e.g., other than transposed slanted stripe) forms of the supplemental parity check matrix A can also be used to achieve acceptable performance of the syndrome measurement circuit 140.

[0101] At step 308, quantum state recovery circuit 148 uses the non-zero syndrome value (s1, . . . , s n-K )′ to determine the most likely cause of the quantum bit q1 to q n The initial quantum state of (with all zero syndromes) is degraded to the corresponding error operator E of a quantum state characterized by the received non-zero syndromes. Step 308 may be implemented using any algorithm suitable for this purpose, such as some of the algorithms described in the above-mentioned book by Frank Gaitan.

[0102] Because steps 302 through 306 provide improvements in the reliability of measured syndrome values ​​compared to at least some prior art methods, step 308 may provide a better (e.g., more accurate) estimate of the actual error operator E. In turn, using the more accurate error operator E in step 310 may be used to slow the effective degradation rate of entangled qubit states stored in system 100 to a degree greater than that achievable with comparable prior art methods.

[0103] At step 310, the quantum state recovery circuit 148 is configured to find the inverse error operator E -1 Based on E -1 The quantum state recovery circuit 148 then operates to generate a stimulus 150 that changes the qubits q1 to q in a manner that corrects the error caused by the error operator E determined at step 308. n If the above process of method 300 is performed correctly, then the quantum bits q1 to q n The corrected quantum state of will most likely have all-zero syndromes.

[0104] At step 312, the qubits q1 to q2 in the quantum state generated at the end of step 310 are converted to n Transferred from buffer 134 back to array 110 (see Figure 1 ).

[0105] Figure 4 The performance of a prior art replication method is graphically compared to the performance of a comparably configured embodiment of method 300. More specifically, Figure 4 The graphs shown in Figure 2 indicate the failure rates of these two memory refresh methods, where the term “failure” refers to the failure of the corresponding memory system to update the qubit q1 to q n The degraded quantum state of returns to the initial quantum state characterized by all-zero syndromes.

[0106] Curve 402 illustrates the performance of a prior art replication method. As is known in the related art, the replication method includes repeated measurements of each of the syndrome bits. The sets (s1, ..., s n-K )′. For example, if the syndrome bit s j is measured three times and the measurement results are 0, 1 and 0 respectively, then the set (s1, ..., s n-K )′ j The value of will be 0 (because “0” occurs more frequently than “1” in these measurements).

[0107] Curve 404 illustrates the performance of a comparable embodiment of method 300. The better performance of method 300 over at least a range of input error probability values ​​is due to the corresponding failure rate being lower than the failure rate exhibited by the replication method. Figure 4 It is obvious.

[0108] According to the example embodiments disclosed above, for example, in the Summary section and / or with reference to Figures 1 to 4 Any one or any combination of some or all of the above, providing a device comprising: a register (e.g., 134, Figure 1 ), which is configured to store an encoded entangled qubit state generated using a quantum stabilizer code; a measurement circuit (e.g., 140, Figure 1 , 2A ), which is configured to perform redundant measurements of a set of syndrome values ​​corresponding to the encoded entangled qubit state, the redundant measurements being based on a set of ordered generator vectors (e.g., g i , where i = 1, 2, ..., nK, equation (1)) and multiple different linear combinations of the generator vectors (e.g., f q , where q = 1, 2, ..., N, Equation (4)) is defined by the error correction code; and an electronic decoder (e.g., 144, Figure 1 ), which is configured to use the error correction code to correct measurement errors in the group of syndrome values; and wherein the generator matrix defined by the group of ordered generator vectors (e.g., G(Q), equation (1)) has a first inclined stripe form (e.g., according to equations (2), (9)).

[0109] In some embodiments of the above apparatus, the generator matrix is ​​self-orthogonal (eg, according to equation (3)).

[0110] In some embodiments of any of the above apparatus, the coefficients (e.g., a iq , equation (4)) defined by a supplementary parity check matrix (e.g., A, equation (5)) has a second inclined stripe form (e.g., according to equation (12)).

[0111] In some embodiments of any of the above apparatus, the second slanted stripe form is a transposed form relative to the first slanted stripe form.

[0112] In some embodiments of any of the above apparatus, each of the coefficients has two binary values ​​(eg, a iq ∈{0, 1}, one of equation (4)).

[0113] In some embodiments of any of the above apparatus, the second slanted stripe pattern is constructed by incrementally shifting downward consecutive subsets of the highest matrix elements of the leftmost column of the supplemental parity-check matrix (e.g., a0, equations (7) to (8)).

[0114] In some embodiments of any one of the above apparatus, the generator matrix is ​​a matrix over a Galois field.

[0115] In some embodiments of any of the above apparatus, the generator matrix is ​​a matrix over a Galois field of size 4 (eg, GF(4), Equation (2)).

[0116] In some embodiments of any of the above devices, the first oblique stripe pattern is formed by incrementally shifting rightward consecutive sub-blocks of the leftmost matrix elements of the highest row block of the generator matrix (e.g., [G1 ... G v ], equation (2)) is used to construct.

[0117] In some embodiments of any of the above apparatus, the electronic decoder is configured to decode based on a trellis type (e.g., 306, Figure 3 ) to correct the measurement error.

[0118] In some embodiments of any of the above devices, the device further includes a state recovery circuit (e.g., 148, Figure 1 ), the state recovery circuit is configured to recover the state of the electronic decoder based on the set of syndrome values ​​received from the electronic decoder (e.g., (s1, ..., s2, determined at 306). n-K )′) corrects degradation errors in the encoded entangled qubit state.

[0119] In some embodiments of any of the apparatus above, the state recovery circuit is further configured to: determine an error operator corresponding to a most likely error in the encoded entangled qubit state based on the set of syndrome values ​​received from the electronic decoder; and subject the encoded entangled qubit state to a stimulus determined based on the error operator (e.g., 150, Figure 1 ).

[0120] In some embodiments of any of the above apparatus, the apparatus further comprises an array (e.g., 110, Figure 1 ), wherein the apparatus is configured to: transfer a selected encoded entangled qubit state from the array (e.g., 302, Figure 3 ) to the register; and after correcting the degradation error, transferring the selected encoded entangled qubit state from the register (e.g., 312, Figure 3) to the array.

[0121] In some embodiments of any of the above devices, the measurement circuit includes: a set of first measurement modules (e.g., 210, Figure 2A ), which is coupled to the register, each of the first measurement modules being configured to measure a respective syndrome value of the encoded entangled qubit state based on a respective one of the generator vectors; a set of second measurement modules (e.g., 220, Figure 2A ), which is coupled to the register, each of the second measurement modules being configured to measure a respective parity value of the syndrome corresponding to the encoded entangled qubit state based on a respective one of the different linear combinations of the generator vectors.

[0122] In some embodiments of any of the apparatus above, the measurement module in the measurement circuit includes: a plurality of quantum gates connected to the register and configured to couple subsets of the qubits of the encoded entangled qubit state to a reference multi-qubit state (e.g., an auxiliary qubit, Figure 2B , 2C ) to process the reference multi-qubit state; and a logic circuit (e.g., 212, Figure 2B , 2C ) configured to estimate a syndrome value or parity value of the encoded entangled qubit state from a measurement of the processed reference multi-qubit state performed using the quantum gate.

[0123] While this disclosure contains references to illustrative embodiments, this description is not intended to be construed in a limiting sense.

[0124] In some embodiments, other sizes of Galois fields may also be used.

[0125] Various modifications of the described embodiments, as well as other embodiments within the scope of the invention, which are apparent to persons skilled in the art to which the invention pertains are deemed to fall within the principles and scope of the invention, for example, as expressed in the following claims.

[0126] Unless expressly stated otherwise, each numerical value and range should be interpreted as an approximation, as would the term "about" or "approximately" preceding the value or range.

[0127] It will be further understood that various changes may be made by those skilled in the art to the details, materials and arrangements of parts which have been described and illustrated for the purpose of explaining the nature of the invention without departing from the scope of the invention, for example, as expressed in the appended claims.

[0128] The use of figure numbers and / or figure reference signs in the claims is intended to identify one or more possible embodiments of the claimed subject matter in order to facilitate the interpretation of the claims. Such use should not be interpreted as necessarily limiting the scope of those claims to the embodiments shown in the corresponding figures.

[0129] Although elements in the accompanying method claims, if present, are recited in a specific sequence with corresponding labels, those elements are not necessarily intended to be limited to being implemented in that specific sequence unless the claim recitation otherwise implies a specific sequence for implementing some or all of those elements.

[0130] Reference herein to "one embodiment" or "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the present invention. The appearance of the phrase "in one embodiment" in multiple places in this specification is not necessarily all referring to the same embodiment, nor are separate or alternative embodiments necessarily mutually exclusive of other embodiments. The same applies to the term "implementation".

[0131] Unless otherwise specified herein, the use of ordinal adjectives "first," "second," "third," etc. to refer to an object among multiple similar objects merely indicates that different instances of such similar objects are referenced and is not intended to imply that the similar objects so referenced must be in a corresponding order or sequence in time, space, ranking, or in any other manner.

[0132] Furthermore, for the purposes of this specification, the terms "couple," "coupling," "coupled," or "connect," "connecting," "connected" refer to any means known in the art or later developed to allow energy to be transferred between two or more elements, and the insertion of one or more additional elements should be anticipated (although not required). Conversely, the terms "directly coupled," "directly connected," and the like imply the absence of such additional elements. The same type of distinction applies to the use of the terms "attachment" and "direct attachment" as applied to descriptions of physical structures. For example, a relatively thin layer of an adhesive or other suitable bonding agent may be used to implement this "direct attachment" of two corresponding components in this physical structure.

[0133] The described embodiments should be considered in all respects as illustrative only and non-restrictive. In particular, the scope of the present invention is indicated by the appended claims rather than the description and drawings herein. All changes falling within the equivalent meaning and scope of the claims should be included within their scope.

[0134] As used in this application, the term "circuitry" may refer to one or more or all of the following: (a) a pure hardware circuit implementation (e.g., an implementation in pure analog and / or digital circuitry); (b) a combination of hardware circuitry and software, such as (where applicable): (i) a combination of (several) analog and / or digital hardware circuits and software / firmware, and (ii) any portion of (several) hardware processors and software (including (several) digital signal processors), software, and (several) memories that work together to cause a device such as a mobile phone or server to perform various functions); and (c) (several) hardware circuits and / or (several) processors, such as (several) microprocessors or portions of (several) microprocessors, which require software (e.g., firmware) to operate, but the software may not be present when not required for operation. This definition of circuitry applies to all uses of this term in this application, including in any claims. As a further example, as used in this application, the term circuitry also encompasses implementations of only hardware circuitry or a processor (or multiple processors), or portions of a hardware circuitry or a processor and its or their accompanying software and / or firmware. The term circuitry also covers, by way of example and where applicable to a particular claim element, a baseband integrated circuit or a processor integrated circuit for a mobile device, or a similar integrated circuit in a server, cellular network device, or other computing or network device.

[0135] It should be understood by those skilled in the art that any block diagrams herein represent conceptual diagrams of illustrative circuits embodying the principles of the present invention. Similarly, it will be understood that any flow charts, flow diagrams, state transition diagrams, pseudocodes, etc. represent various processes that can be substantially represented in a computer-readable medium and thus can be executed by a computer or processor, whether or not such a computer or processor is explicitly shown.

Claims

1. A device for quantum computing, comprising: a register configured to store an encoded entangled qubit state encoded using a quantum stabilizer code; measurement circuitry configured to perform redundant measurements of a set of syndrome values ​​corresponding to the encoded entangled qubit states, the redundant measurements being performed based on an error correction code defined using a complementary parity check matrix defined by a set of ordered generator vectors of the quantum stabilizer code and coefficients used in a plurality of linearly independent combinations of the generator vectors; and an electronic decoder configured to use the error correction code to correct measurement errors in the set of syndrome values ​​for which the redundant measurements have been performed; and Wherein a generator matrix defined by the set of ordered generator vectors has a first slanted stripe form. 2 . The apparatus according to claim 1 , wherein the supplementary parity check matrix has a second slanted stripe form. 3 . The apparatus of claim 2 , wherein the second slanted stripe pattern is a transposed pattern relative to the first slanted stripe pattern.

4. The apparatus of claim 2, wherein each of the coefficients has one of two binary values.

5. The apparatus of claim 2, wherein the second slanted stripe pattern is constructed by incrementally shifting downward consecutive subsets of the highest matrix elements of the leftmost column of the supplementary parity-check matrix.

6. The apparatus of claim 1, wherein the generator matrix is ​​a matrix over a Galois field.

7. The apparatus of claim 1, wherein the generator matrix is ​​a matrix over a Galois field of size 4.

8. The apparatus of claim 1, wherein the first oblique stripe pattern is constructed by incrementally shifting rightward successive sub-blocks of leftmost matrix elements of a top row block of the generator matrix.

9. The apparatus of claim 1, wherein the electronic decoder is configured to correct the measurement errors based on trellis-type decoding.

10. The apparatus of claim 1, further comprising a state recovery circuit configured to correct degradation errors in the encoded entangled qubit state based on the set of syndrome values ​​received from the electronic decoder.

11. The apparatus of claim 10, wherein the state restoration circuit is further configured to: determining an error operator corresponding to a most likely error in the encoded entangled qubit state based on the set of syndrome values ​​received from the electronic decoder; and The encoded entangled qubit state is subjected to a stimulus determined based on the error operator.

12. The apparatus of claim 10, further comprising an array for storing a plurality of encoded entangled qubit states, wherein the apparatus is configured to: transferring a selected encoded entangled qubit state from the array to the register; and After correcting the degradation error, the selected encoded entangled qubit state is transferred from the register to the array.

13. The apparatus of claim 1, wherein the measurement circuit comprises: a set of first measurement modules coupled to the register, each of the first measurement modules configured to measure a respective syndrome value of the encoded entangled qubit state based on a respective one of the generator vectors; A set of second measurement modules coupled to the register, each of the second measurement modules configured to measure a respective parity value of the syndrome corresponding to the encoded entangled qubit state based on a respective one of the linearly independent combinations of the generator vectors.

14. The device according to claim 1, wherein the measuring module in the measuring circuit comprises: a plurality of quantum gates connected to the register and configured to process a reference multi-qubit state by coupling subsets of the qubits of the encoded entangled qubit state to the reference multi-qubit state; and A logic circuit is configured to estimate a syndrome value or parity value of the encoded entangled qubit state from a measurement of the processed reference multi-qubit state performed using the quantum gate.

Images