Display device and bonding member for connecting electronic components in display device

Abstract

According to one aspect of the invention, a display device and an adhesive member for connecting electronic components in the display device are provided. The display device includes: a first layer having a display area and a non-display area adjacent to the display area, the first layer including a first pad and a second pad overlapping the non-display area and spaced apart from each other in a first direction; a second layer including a third pad and a fourth pad facing the first pad and the second pad, respectively, in a thickness direction of the first layer; and an adhesive member disposed between the first layer and the second layer and including an adhesive layer and a plurality of conductive groups spaced apart from each other in the first direction and distributed in the adhesive layer along a second direction substantially perpendicular to the first direction, wherein the conductive groups include conductive particles arranged along the second direction, and the adhesive layer has a thickness of about 0.5 times to about 2.0 times the diameter of the conductive particles.

Description

[0001] This application claims priority to and the benefit of Korean Patent Application No. 10-2019-0097331, filed on August 9, 2019, which is hereby incorporated by reference for all purposes as if fully set forth herein. Technical Field

[0002] Exemplary embodiments of the invention relate generally to a display device, and more particularly, to an adhesive member and a display device including the adhesive member. Background Art

[0003] Various display devices for use in multimedia devices such as televisions, mobile phones, tablet computers, navigation devices, and game consoles are being developed. Such display devices include a display panel on which an image is displayed. The display panel includes a plurality of gate lines, a plurality of data lines, and a plurality of pixels connected to the plurality of gate lines and the plurality of data lines. The display panel may be connected to an electronic component that provides the gate lines or the data lines with an electrical signal required for displaying an image. The electronic component may be mounted on the display panel using an anisotropic conductive film or an ultrasonic method.

[0004] The above information disclosed in this Background section is only for understanding the background of the inventive concept and therefore it may contain information that does not constitute prior art. Summary of the invention

[0005] Applicants have discovered that the thickness of adhesive layers electrically connecting components in a display device may compromise the reliability of the connection and result in undesired short circuits.

[0006] A display device including an adhesive member constructed according to the principles and exemplary embodiments of the invention improves connection reliability between electronic components in the display device, such as between the electronic component and a display panel.

[0007] For example, according to an exemplary embodiment of the invention, the thickness of the adhesive layer can be formed based on the diameter of the conductive particles. As a result, even if pressure is applied to the adhesive layer from the outside while the two pads are bonded to each other, the flow of the conductive particles distributed in the adhesive layer can be prevented, which minimizes the short circuit of adjacent pads. Therefore, the overall driving reliability of the display device can be improved.

[0008] Additional features of the inventive concepts will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the inventive concepts.

[0009] According to one aspect of the invention, a display device includes: a first layer having a display area and a non-display area adjacent to the display area, the first layer including a first pad and a second pad overlapping the non-display area and spaced apart from each other in a first direction; a second layer including a third pad and a fourth pad facing the first pad and the second pad, respectively, in a thickness direction of the first layer; and a bonding member disposed between the first layer and the second layer, and including an bonding layer and a plurality of conductive groups spaced apart from each other in the first direction and distributed in the bonding layer along a second direction substantially perpendicular to the first direction, wherein the conductive groups include conductive particles arranged along the second direction, and the bonding layer has a thickness of about 0.5 times to about 2.0 times the diameter of the conductive particles.

[0010] The conductive groups may be arranged at predetermined intervals in the first direction.

[0011] The conductive group may include three subgroups including a first subgroup, a second subgroup, and a third subgroup, the first pad and the second pad may include a first signal pad and a second signal pad, respectively, and the third pad and the fourth pad may include a first drive pad and a second drive pad, respectively. The first subgroup may be disposed between the first signal pad and the first drive pad to electrically connect the first signal pad to the first drive pad, the second subgroup may be disposed between the second signal pad and the second drive pad to electrically connect the second signal pad to the second drive pad, and the third subgroup may be disposed between the first subgroup and the second subgroup without overlapping any of the first signal pad and the second signal pad.

[0012] Each of the first subgroup, the second subgroup, and the third subgroup may include at least one of the conductive groups.

[0013] Each of the first, second, and third subgroups may include a corresponding one of the conductive groups, wherein the number of conductive groups of each of the first and second subgroups may be greater than the number of conductive groups of the third subgroup.

[0014] Each of the first and second subgroups may include a corresponding conductive group and the third subgroup may include two conductive groups, and in a plan view, a first distance between the first driving pad and a first first conductive group closest to the first driving pad among the conductive groups of the third subgroup may be equal to a second distance between the second driving pad and a first second conductive group closest to the second driving pad among the conductive groups of the third subgroup, and a distance between the first first conductive group and the first second conductive group may be greater than each of the first distance and the second distance.

[0015] The first layer may include a display substrate, the second layer may include electronic components, the first pad and the second pad may include a first signal pad and a second signal pad, respectively, the third pad and the fourth pad may include a first drive pad and a second drive pad, respectively, the conductive group may include a first subgroup arranged between the first signal pad and the first drive pad and a second subgroup arranged between the second signal pad and the second drive pad, and the first subgroup and the second subgroup may be alternately and repeatedly arranged in a first direction.

[0016] The conductive groups may be arranged at a predetermined interval in the first direction, and in a plan view, each of a first distance between the first driving pad and a conductive group closest to the first subgroup among the conductive groups of the second subgroup and a distance between the second driving pad and a conductive group closest to the second subgroup among the conductive groups of the first subgroup may be greater than the predetermined interval, wherein the predetermined interval satisfies the following equation:

[0017]

[0018] Wherein, Dk is the separation distance, Vd is the voltage level applied to each of the conductive groups, and DSr is the dielectric strength of the adhesive layer.

[0019] The second layer may include an electronic component, and the electronic component may also include a base substrate on which the first driving pad and the second driving pad may be arranged, the adhesive layer may include a first adhesive portion overlapping the first driving pad and the second driving pad and a second adhesive portion that may not overlap the first driving pad and the second driving pad, and the second layer also includes an inner space defined between the second adhesive portion and the base substrate.

[0020] The second adhesive part may partially fill the inner space.

[0021] The adhesive layer may have a refractive index greater than that of air within the inner space.

[0022] The adhesive layer may include a photoinitiator activated by external ultraviolet light.

[0023] The filler may have a first filling portion and a second filling portion, the first filling portion may not overlap the electronic component, and the second filling portion is disposed in the inner space.

[0024] The filler may include a photoinitiator that is activated by external UV light.

[0025] The first filling portion may have a planar area larger than a planar area of ​​the second filling portion.

[0026] The adhesive layer may have a thermal initiator that is activated by temperature changes.

[0027] The spacing distance between two adjacent conductive groups in the conductive group may satisfy the following equation:

[0028]

[0029] Wherein, Dk is the separation distance, Vd is the voltage level applied to each of the conductive groups, and DSr is the dielectric strength of the adhesive layer.

[0030] According to another aspect of the invention, an adhesive member for connecting electronic components in a display device includes: an adhesive layer; and a conductive group distributed in the adhesive layer at predetermined intervals in a first direction and extending in a second direction substantially perpendicular to the first direction, wherein the conductive group includes conductive particles arranged along the second direction, and the adhesive layer has a thickness of about 0.5 times to about 2.0 times the diameter of the conductive particles. At least some of the conductive particles may be partially exposed by the adhesive layer.

[0031] At least some of the conductive particles arranged along the second direction may be electrically connected to each other.

[0032] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0033] The accompanying drawings are included to provide a further understanding of the invention and are incorporated in and constitute a part of this specification. The drawings illustrate exemplary embodiments of the invention and together with the description serve to explain the inventive concept.

[0034] Figure 1A is a perspective view of an exemplary embodiment of a display device constructed according to the principles of the invention.

[0035] Figure 1B yes Figure 1A An exploded perspective view of a display device.

[0036] Figure 2 yes Figure 1B A cross-sectional view of a display module is shown in FIG.

[0037] Figure 3 yes Figure 1B A schematic plan view of a display panel shown in FIG.

[0038] Figure 4A It is shown Figure 3 An equivalent circuit diagram of an exemplary embodiment of a representative pixel.

[0039] Figure 4B yes Figure 1B An enlarged partial cross-sectional view of an exemplary embodiment of a display panel is shown in FIG.

[0040] Figure 5 is through Figure 1AAn exploded perspective view of an exemplary embodiment of a display device in which an adhesive member is connected between a signal pad of a display panel and a driving pad of a circuit board.

[0041] Fig. 6A yes Figure 5 Schematic plan view of an exemplary embodiment of a bonding member.

[0042] Figure 6B yes Figure 5 Schematic perspective view of a bonding member.

[0043] Figure 6C yes Fig. 6A An enlarged schematic plan view of an exemplary embodiment of a portion of a bonding member.

[0044] Fig. 7A yes Fig. 6A A plan view of another exemplary embodiment of a bonding member.

[0045] Figure 7B yes Fig. 6A A plan view of another exemplary embodiment of a bonding member.

[0046] Figure 7C yes Fig. 6A A plan view of yet another exemplary embodiment of a bonding member.

[0047] Figure 8 It is along Figure 5 A cross-sectional view taken along line II'.

[0048] Fig. 9 yes Fig. 6A A cross-sectional view of another exemplary embodiment of a bonding member.

[0049] Fig.10 yes Fig. 9 An enlarged cross-sectional view of area AA.

[0050] Fig.11 is a perspective view of another exemplary embodiment of a display device constructed according to the principles of the invention.

[0051] Fig.12 It is along Fig.11 A cross-sectional view taken along line II-II'. DETAILED DESCRIPTION

[0052] In the following description, for the purpose of illustration, many specific details are set forth in order to provide a thorough understanding of various exemplary embodiments or implementations of the invention. As used herein, "embodiment" and "implementation" are interchangeable words, which are non-limiting examples of devices or methods using one or more inventive concepts disclosed herein. However, it is apparent that various exemplary embodiments can be practiced without these specific details or with one or more equivalent arrangements. In other examples, well-known structures and devices are shown in block diagram form to avoid unnecessary obscurity of various exemplary embodiments. In addition, various exemplary embodiments may be different, but need not be exclusive. For example, without departing from the inventive concept, the specific shape, configuration and characteristics of the exemplary embodiment may be used or implemented in another exemplary embodiment.

[0053] Unless otherwise specified, the exemplary embodiments shown will be understood as providing exemplary features of varying details of some ways in which the inventive concept can be implemented in practice. Therefore, unless otherwise specified, the features, components, modules, layers, films, panels, regions and / or aspects, etc. (hereinafter individually or collectively referred to as "elements") of the various embodiments can be further combined, separated, interchanged and / or rearranged without departing from the inventive concept.

[0054] The use of cross hatching and / or shading in the drawings is generally provided to clarify the boundaries between adjacent elements. Thus, unless otherwise specified, the presence or absence of cross hatching or shading does not convey or indicate any preference or requirement for the specific material, material properties, size, ratio, commonality between the elements shown and / or any other characteristics, attributes, properties, etc. of the elements. In addition, in the drawings, the size and relative size of the elements may be exaggerated for clarity and / or descriptive purposes. When the exemplary embodiments may be implemented differently, a specific process sequence may be performed differently from the described sequence. For example, two processes described in succession may be performed substantially simultaneously or in an order opposite to the described sequence. In addition, the same reference numerals represent the same elements.

[0055] When an element or layer is referred to as being "on," "connected to," or "bonded to" another element or layer, the element or layer may be directly on, directly connected to, or directly bonded to the other element or layer, or there may be intervening elements or layers. However, when an element or layer is referred to as being "directly on," "directly connected to," or "directly bonded to" another element or layer, there are no intervening elements or layers. For this purpose, the term "connected" may refer to a physical connection, an electrical connection, and / or a fluid connection with or without intervening elements. In addition, the DR1 axis, the DR2 axis, and the DR3 axis are not limited to the three axes of a rectangular coordinate system (such as the x-axis, the y-axis, and the z-axis), and may be interpreted in a broader sense. For example, the DR1 axis, the DR2 axis, and the DR3 axis may be perpendicular to each other, or may represent different directions that are not perpendicular to each other. For the purpose of this disclosure, "at least one of X, Y, and Z" and "at least one selected from the group consisting of X, Y, and Z" may be interpreted as any combination of only X, only Y, only Z, or two or more of X, Y, and Z, such as XYZ, XYY, YZ, and ZZ for example. As used herein, the term "and / or" includes any and all combinations of one or more of the associated listed items.

[0056] Although the terms "first", "second", etc. can be used to describe various types of elements, these elements should not be limited by these terms. These terms are used to distinguish one element from another element. Therefore, without departing from the disclosed teachings, the first element discussed below can be referred to as the second element.

[0057] Spatially relative terms such as "under," "below," "below," "down," "above," "up," "above," "higher," and "side" (e.g., as in "sidewall") may be used herein for descriptive purposes and thereby describe the relationship of one element to another (or other) elements as shown in the accompanying drawings. In addition to the orientations depicted in the accompanying drawings, the spatially relative terms are intended to encompass different orientations of the device in use, operation, and / or manufacture. For example, if the device in the accompanying drawings is flipped, an element described as "under" or "beneath" other elements or features will subsequently be oriented as "above" the other elements or features. Thus, the exemplary term "under" may encompass both above and below orientations. In addition, the device may be otherwise oriented (e.g., rotated 90 degrees or at other orientations), and as such, the spatially relative descriptors used herein are interpreted accordingly.

[0058] The term used herein is for the purpose of describing specific embodiments, and is not intended to be limiting. As used herein, unless the context clearly indicates otherwise, the singular "one (kind / person)" and "the (described)" are also intended to include plural forms. In addition, when the term "comprising" and its variations and / or "including" and its variations are used in this specification, it is explained that there are stated features, integral bodies, steps, operations, elements, components and / or their groups, but it is not excluded that there are or add one or more other features, integral bodies, steps, operations, elements, components and / or their groups. It is also noted that, as used herein, the term "substantially", "about" and other similar terms are used as approximate terms rather than degree terms, and are used to explain the measured values, calculated values ​​and / or the inherent deviations of the provided values ​​that those of ordinary skill in the art will recognize.

[0059] Various exemplary embodiments are described herein with reference to cross-sectional illustrations and / or exploded illustrations as schematic illustrations of idealized exemplary embodiments and / or intermediate structures. As such, variations in the shapes of the illustrations, such as those caused by manufacturing techniques and / or tolerances, are contemplated. Therefore, the exemplary embodiments disclosed herein should not necessarily be interpreted as being limited to the specific illustrated shapes of the regions, but rather include deviations in shapes caused by, for example, manufacturing. In this manner, the regions shown in the accompanying drawings may be schematic in nature, and the shapes of these regions may not reflect the actual shapes of the regions of the device, and as such are not necessarily intended to be limiting.

[0060] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as commonly understood by those of ordinary skill in the art to which this disclosure is a part. Terms (such as those defined in commonly used dictionaries) should be interpreted as having a meaning consistent with their meaning in the context of the relevant art and should not be interpreted in an idealized or overly formal sense unless explicitly so defined herein.

[0061] Figure 1A is a perspective view of an exemplary embodiment of a display device constructed according to the principles of the invention. Figure 1B yes Figure 1A An exploded perspective view of a display device. Figure 2 yes Figure 1B A cross-sectional view of a display module is shown in FIG.

[0062] In this specification, a display device DD that can be applied to a mobile terminal is exemplarily shown. An electronic module, a camera module, a power module, etc. mounted on a main board can be set on a bracket / housing together with the display device DD to constitute a mobile terminal. The display device DD according to the exemplary embodiment can be applied to large-sized electronic devices such as televisions and monitors and small and medium-sized electronic devices such as tablet PCs, navigation components for vehicles, game consoles, and smart watches.

[0063] Reference Figure 1A , the display device DD can display the image IM through the display surface DD-IS. Figure 1A An icon image as an example of the image IM is shown in . The display surface DD-IS is substantially parallel to the surface defined by the first direction DR1 and the second direction DR2. The normal direction of the display surface DD-IS (i.e., the thickness direction of the display device DD) is indicated as a third direction DR3. In the present specification, "when viewed in a plan view or in a plan view" means the case when viewed in the third direction DR3. The front surface (or top surface) and the rear surface (or bottom surface) of each of the layers or components to be described below are distinguished by the third direction DR3. However, the directions indicated as the first direction DR1, the second direction DR2, and the third direction DR3 may be changed to different directions, for example, as opposite directions of relative concepts.

[0064] In addition, the display surface DD-IS includes a display area DD-DA on which the image IM is displayed and a non-display area DD-NDA adjacent to the display area DD-DA. The non-display area DD-NDA may be an area on which the image IM is not displayed. In this specification, "on an area" may be understood as in an area according to the context. However, exemplary embodiments are not limited thereto. The non-display area DD-NDA may be adjacent to one side of the display area DD-DA or may be omitted.

[0065] Reference Figure 1B , the display device DD may include a window WM, a display module DM, a driving chip DC, a circuit board PB, and a containing member or back cover BC. The back cover BC may have enough space therein to accommodate or contain the display module DM and be coupled to the window WM. The window WM may be disposed above the display module DM to transmit an image provided from the display module DM to the outside. The window WM includes a transmission area TA and a non-transmission area NTA. The transmission area TA may have a shape that overlaps the display area DD-DA to correspond to the display area DD-DA. The image IM displayed on the display area DD-DA of the display device DD may be visible from the outside through the transmission area TA of the window WM.

[0066] The non-transmission area NTA may have a shape overlapping the non-display area DD-NDA to correspond to the non-display area DD-NDA. The non-transmission area NTA may be an area having a relatively small transmittance compared to the transmittance of the transmission area TA. However, the exemplary embodiment is not limited thereto, and the non-transmission area NTA may be omitted.

[0067] The window WM may be made of glass, sapphire or plastic. In addition, although the window WM is set as a single layer, the window WM may include a plurality of layers. The window WM may include a base layer and at least one printed layer overlapped with the non-transmission area NTA and disposed on the rear surface of the base layer. The printed layer may have a predetermined color. For example, the printed layer may have a black color or have a color other than black.

[0068] The display module DM is disposed between the window WM and the back cover BC. The display module DM includes a display panel DP and an input sensing layer ISU. The display panel DP generates an image to transmit the generated image to the window WM.

[0069] According to an exemplary embodiment, the display panel DP may be an emissive display panel, but is not limited thereto. For example, the display panel DP may be an organic light emitting display panel or a quantum dot light emitting display panel. The light emitting layer of the organic light emitting display panel may include an organic light emitting material. The light emitting layer of the quantum dot light emitting display panel may include quantum dots and quantum rods, etc. Hereinafter, the organic light emitting display panel will be described as an example of the display panel DP.

[0070] Hereinafter, a case where the display panel DP according to an exemplary embodiment is an organic light emitting display panel will be described However, the exemplary embodiments are not limited thereto, and the inventive concept may be applied to various types of display panels.

[0071] Reference Figure 2 , the display panel DP includes a substrate SUB, a circuit element layer DP-CL disposed on the substrate SUB, a display element layer DP-OLED, and an insulating layer TFL.

[0072] The display panel DP includes a display area DP-DA and a non-display area DP-NDA. The display area DP-DA of the display panel DP may be Figure 1A Display area DD-DA or Figure 1B The non-display area DP-NDA may correspond to the transmission area TA. Figure 1A Non-display area DD-NDA or Figure 1B Corresponding to the non-transmissive area NTA.

[0073] The substrate SUB may include at least one plastic film.The substrate SUB may include a plastic substrate, a glass substrate, a metal substrate, or an organic / inorganic composite substrate as a flexible substrate.

[0074] The circuit element layer DP-CL includes circuit elements and at least one intermediate insulating layer. The intermediate insulating layer includes at least one intermediate inorganic film and at least one intermediate organic film. The circuit elements include signal lines and pixel driving circuits, etc.

[0075] The display element layer DP-OLED may include a plurality of organic light emitting diodes. The display element layer DP-OLED may further include an organic layer such as a pixel defining layer. According to another exemplary embodiment, when the display panel DP is set as a liquid crystal display panel, the display element layer may be set as a liquid crystal layer.

[0076] The insulating layer TFL seals the display element layer DP-OLED. For example, the insulating layer TFL may be a thin film encapsulation layer. The insulating layer TFL protects the display element layer DP-OLED from foreign substances such as moisture, oxygen, and dust particles. However, exemplary embodiments are not limited thereto. For example, an encapsulation substrate may be provided instead of the insulating layer TFL. In this case, the encapsulation substrate may be opposite to the substrate SUB, and the circuit element layer DP-CL and the display element layer DP-OLED may be provided between the encapsulation substrate and the substrate SUB.

[0077] The input sensing layer ISU may be disposed between the window WM and the display panel DP. The input sensing layer ISU senses input applied from the outside. The input applied from the outside may be provided in various ways. For example, the external input includes various types of external inputs (such as a part of the user's body, a stylus, light, heat, or pressure, etc.). In addition, input by contact with a part of the human body (such as a user's hand) and adjacent or neighboring space touch (e.g., hovering) may also be a form of input.

[0078] The input sensing layer ISU may be directly disposed on the display panel DP. In the present specification, "component A is directly disposed on component B" may mean that an adhesive member is not disposed between component A and component B. In the exemplary embodiment shown, the input sensing layer ISU may be manufactured together with the display panel DP through a continuous process. However, the exemplary embodiments are not limited thereto. For example, the input sensing layer ISU may be disposed as a separate layer and then bonded to the display panel DP through an adhesive layer. For another example, the input sensing layer ISU may be omitted.

[0079] Refer again Figure 1B , the driving chip DC may be overlapped with the non-display area DP-NDA and disposed on the display panel DP. For example, the driving chip DC may generate a driving signal required for the operation of the display panel DP based on a control signal transmitted from the circuit board PB. The driving chip DC may transmit the generated driving signal to the circuit element layer DP-CL of the display panel DP.

[0080] The circuit board PB is electrically connected to the display module DM. Figure 1B The circuit board PB shown in FIG. 1 is connected to the display panel DP, but exemplary embodiments are not limited thereto. For example, the circuit board PB may be electrically connected to the input sensing layer ISU.

[0081] In this specification, the circuit board PB and the driving chip DC are examples of electronic components. In particular, each of the circuit board PB and the driving chip DC may be electrically connected to the display module DM through an adhesive member. The adhesive member according to an exemplary embodiment may be an anisotropic conductive film (ACF).

[0082] Figure 3 yes Figure 1B A schematic plan view of a display panel shown in FIG. Figure 4A It is shown Figure 3 An equivalent circuit diagram of an exemplary embodiment of a representative pixel. Figure 4B yes Figure 1B An enlarged partial cross-sectional view of an exemplary embodiment of a display panel is shown in FIG.

[0083] Reference Figure 3 , the display panel DP may include a drive circuit GDC, a plurality of signal lines SGL, a plurality of signal pads ("pads" are also called "pads" or "pads") DP-PD, a plurality of connection signal pads DP-CPD and a plurality of pixels PX (hereinafter, referred to as pixels). The pixels PX are arranged on the display area DP-DA. Each of the pixels PX includes an organic light emitting diode and a pixel drive circuit connected to the organic light emitting diode. The drive circuit GDC, the signal lines SGL, the signal pads DP-PD, the connection signal pads DP-CPD and the pixel drive circuit may be arranged on Figure 2 The circuit element layer DP-CL is shown in FIG.

[0084] In this specification, the display panel DP may be described as a display substrate. The display substrate may include a substrate SUB, a plurality of signal pads DP-PD disposed on the substrate SUB, and a plurality of connection signal pads DP-CPD.

[0085] The driving circuit GDC sequentially outputs gate signals to the plurality of gate lines GL. The driving circuit GDC may also output other control signals to the pixel PX. The driving circuit GDC may include a plurality of thin film transistors, which are manufactured by the same process as the driving circuit of the pixel PX (e.g., a low temperature polycrystalline silicon (LTPS) process or a low temperature polycrystalline oxide (LTPO) process).

[0086] The signal lines SGL include gate lines GL, data lines DL, power lines PL, and control signal lines CSL. The gate lines GL are connected to corresponding pixels PX in the pixels PX, respectively, and the data lines DL are connected to corresponding pixels PX in the pixels PX, respectively. The power lines PL are connected to the pixels PX. The control signal lines CSL can provide control signals to the scan driving circuit.

[0087] The signal lines SGL overlap the display area DP-DA and the non-display area DP-NDA. Each of the signal lines SGL may include a pad portion and a line portion. The line portion overlaps the display area DP-DA and the non-display area DP-NDA. The pad portion is connected to an end of the line portion. The pad portion is disposed on the non-display area DP-NDA to overlap with a corresponding one of the signal pads DP-PD.

[0088] Hereinafter, in this specification, a region of the non-display area DP-NDA on which the signal pad DP-PD is disposed may be defined as a chip region NDA-DC, and a region of the non-display area DP-NDA on which the connection signal pad DP-CPD is disposed may be defined as a first pad region NDA-PC1.

[0089] According to an exemplary embodiment, Figure 1B The driving chip DC may be mounted on the chip area NDA-DC. The signal pads DP-PD are electrically connected to the driving chip DC to transmit an electrical signal received from the driving chip DC to the signal lines SGL.

[0090] In detail and hereinafter, the signal pads DP-PD include a first row of signal pads DP-PD1 arranged in a first row along a first direction DR1 and a second row of signal pads DP-PD2 arranged in a second row along the first direction DR1. However, exemplary embodiments are not limited thereto. For example, the signal pads DP-PD may be arranged in a row along the first direction DR1.

[0091] A portion of the circuit board PB may be disposed on the first pad area NDA-PC1. The connection signal pad DP-CPD is electrically connected to the circuit board PB to transmit an electrical signal received from the circuit board PB to the connection signal pad DP-CPD. The circuit board PB may be rigid or flexible. For example, when the circuit board PB is flexible, the circuit board PB may be configured as a flexible printed circuit board.

[0092] The circuit board PB may include a timing control circuit for controlling the operation of the display panel DP. The timing control circuit may be mounted on the circuit board PB in the form of an integrated chip. In addition, the circuit board PB may include an input sensing circuit for controlling the input sensing layer ISU.

[0093] The circuit board PB may include a driving pad PB-PD electrically connected to the display panel DP. The driving pad PB-PD may be disposed on a second pad area NDA-PC2 defined on the circuit board PB.

[0094] According to an exemplary embodiment, the driving pads PB-PD are connected to each other by an adhesive member AF having conductivity (see Figure 5 ) is electrically bonded to the connection signal pad DP-CPD. The adhesive member AF may be a conductive adhesive resin.

[0095] Reference Figure 4A , the display area DP-DA may be defined as an area on which the pixels PX are disposed. Each of the pixels PX includes an organic light emitting diode OLED and a pixel driving circuit connected to the organic light emitting diode OLED.

[0096] In detail, the pixel PX may include a first transistor T1, a second transistor T2, a capacitor CP, and an organic light emitting diode OLED. Although it is sufficient that the pixel driving circuit includes a switching transistor and a driving transistor, it is not limited to referring to Figure 4A The exemplary embodiments described herein are as follows. Figure 4A As shown in FIG. 1 , although each of the first transistor T1 and the second transistor T2 is configured as a P-MOS transistor, exemplary embodiments are not limited thereto. For example, each of the first transistor T1 and the second transistor T2 may be configured as an N-MOS transistor.

[0097] The first transistor T1 is connected to the gate line GL and the data line DL. The organic light emitting diode OLED receives the first power voltage ELVDD and the second power voltage ELVSS provided from the power line PL. The first power voltage ELVDD is provided to the first electrode AE ​​(see FIG. 2 ) of the organic light emitting diode OLED through the second transistor T2. Figure 4B ), the second power voltage ELVSS is supplied to the second electrode CE of the organic light emitting diode OLED (see Figure 4B ). The second power voltage ELVSS may be lower than the first power voltage ELVDD.

[0098] Reference Figure 4B , the display panel DP may include a plurality of insulating layers, semiconductor patterns, conductive patterns, signal lines, etc. The insulating layers, semiconductor layers, and conductive layers may be formed by methods such as coating or deposition. Thereafter, the insulating layers, semiconductor layers, and conductive layers may be selectively patterned by photolithography. The semiconductor patterns, conductive patterns, and signal lines provided in the circuit element layer DP-CL and the display element layer DP-OLED may be formed in the manner described above. Figure 4B In the display panel DP, when the first transistor T1 and the second transistor T2 are connected Figure 4AThe pixel driving circuit may further include other components when compared with the pixel driving circuit of FIG. 1 . The substrate SUB may be a base substrate supporting the circuit element layer DP-CL and the display element layer DP-OLED.

[0099] The substrate SUB may include a synthetic resin layer. The synthetic resin layer may include a thermosetting resin. The substrate SUB may have a multilayer structure. For example, the substrate SUB may have a three-layer structure of a synthetic resin layer, an adhesive layer and a synthetic resin layer. In particular, the synthetic resin layer may be a polyimide resin layer, and its material is not particularly limited. The synthetic resin layer may include at least one of acrylic resin, methacrylic resin, polyisoprene resin, vinyl resin, epoxy resin, polyurethane resin, cellulose resin, siloxane resin, polyamide resin and perylene resin. In addition, the synthetic resin layer may include a glass substrate, a metal substrate or an organic / inorganic composite substrate.

[0100] At least one inorganic layer may be disposed on the top surface of the substrate SUB. The inorganic layer may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, zirconium oxide, and hafnium oxide. The inorganic layer may be provided as a multilayer. The multilayer inorganic layer may constitute a barrier layer and / or a buffer layer. In the exemplary embodiment shown, the display panel DP may include a buffer layer BFL.

[0101] The buffer layer BFL improves the bonding force between the substrate SUB and the semiconductor pattern. The buffer layer BFL may include a silicon oxide layer and a silicon nitride layer. The silicon oxide layer and the silicon nitride layer may be alternately stacked.

[0102] The semiconductor pattern is disposed on the buffer layer BFL. The semiconductor pattern may include polysilicon. However, the exemplary embodiment is not limited thereto. For example, the semiconductor pattern may include amorphous silicon or metal oxide.

[0103] Figure 4B Only a portion of the semiconductor pattern is shown. For example, in the plan view, the semiconductor pattern may be further disposed on other regions of the pixel PX. The semiconductor pattern may be arranged on the pixel PX in a specific rule. Depending on whether the semiconductor pattern is doped, the semiconductor pattern has different electrical properties. The semiconductor pattern may include a doped region and a non-doped region. The doped region may be doped with an N-type dopant or a P-type dopant. The P-type transistor includes a doped region into which a P-type dopant is doped.

[0104] The doped region may have a conductivity greater than that of the non-doped region and may be substantially used as an electrode or a signal line. The non-doped region may substantially correspond to an active layer (or channel) of a transistor. That is, a portion of the semiconductor pattern may be an active layer of a transistor, another portion may be a source or drain of the transistor, and further another portion may be a connection electrode or a connection signal line SCL.

[0105] like Figure 4B As shown in , the source S1, active layer A1 and drain D1 of the first transistor T1 may be formed of a semiconductor pattern, and the source S2, active layer A2 and drain D2 of the second transistor T2 may be formed of a semiconductor pattern. The source S1 and drain D1 of the first transistor T1 extend from the active layer A1 in opposite directions to each other, and the source S2 and drain D2 of the second transistor T2 extend from the active layer A2 in opposite directions to each other. Figure 4B A portion of a connection signal line SCL formed of a semiconductor pattern is shown. In a plan view, the connection signal line SCL may be connected to a drain electrode D2 of the second transistor T2.

[0106] The first insulating layer 10 is disposed on the buffer layer BFL. The first insulating layer 10 is stacked together with the plurality of pixels PX and covers the semiconductor pattern. The first insulating layer 10 may include an inorganic layer and / or an organic layer and have a single-layer structure or a multi-layer structure. The first insulating layer 10 may include at least one of aluminum oxide, titanium oxide, silicon oxide, silicon nitride, zirconium oxide, and hafnium oxide. In the exemplary embodiment shown, the first insulating layer 10 may include a single-layer silicon oxide layer. The insulating layer of the circuit element layer DP-CL to be described below may be an inorganic layer and / or an organic layer and may have a single-layer structure or a multi-layer structure. The inorganic layer may include at least one of the materials described above.

[0107] The gates G1 and G2 are disposed on the first insulating layer 10. Each of the gates G1 and G2 may be a part of a metal pattern. The gates G1 and G2 overlap the active layers A1 and A2, respectively. The gates G1 and G2 may be used as masks in a process of doping the semiconductor pattern.

[0108] The second insulating layer 20 covering the gates G1 and G2 is disposed on the first insulating layer 10. The second insulating layer 20 is stacked together with the pixel PX. The second insulating layer 20 may include an inorganic layer and / or an organic layer and have a single-layer structure or a multi-layer structure. In the exemplary embodiment shown, the second insulating layer 20 may include a single-layer silicon oxide layer.

[0109] The upper electrode UE may be disposed on the second insulating layer 20. The upper electrode UE may overlap the gate G2 of the second transistor T2. The upper electrode UE may be a portion of the metal pattern. A portion of the gate G2 and the upper electrode UE overlapping the portion of the gate G2 may define a capacitor CP (see Figure 4A ).

[0110] A third insulating layer 30 covering the upper electrode UE is disposed on the second insulating layer 20. In the exemplary embodiment shown, the third insulating layer 30 may be a single silicon oxide layer. The first connection electrode CNE1 may be disposed on the third insulating layer 30. The first connection electrode CNE1 may be connected to the signal line SCL through a contact hole CNT-1 passing through the first insulating layer 10 to the third insulating layer 30.

[0111] A fourth insulating layer 40 covering the first connection electrode CNE1 is disposed on the third insulating layer 30. The fourth insulating layer 40 may be a single silicon oxide layer. A fifth insulating layer 50 is disposed on the fourth insulating layer 40. The fifth insulating layer 50 may be an organic layer. The second connection electrode CNE2 may be disposed on the fifth insulating layer 50. The second connection electrode CNE2 may be connected to the first connection electrode CNE1 through a contact hole CNT-2 passing through the fourth insulating layer 40 and the fifth insulating layer 50.

[0112] A sixth insulating layer 60 covering the second connection electrode CNE2 is disposed on the fifth insulating layer 50. The sixth insulating layer 60 may be an inorganic layer. The first electrode AE ​​is disposed on the sixth insulating layer 60. The first electrode AE ​​is connected to the second connection electrode CNE2 through a contact hole CNT-3 passing through the sixth insulating layer 60. An opening OP is defined in the pixel defining layer PDL. The opening OP of the pixel defining layer PDL exposes at least a portion of the first electrode AE.

[0113] like Figure 4B As shown in , the display area DP-DA may include an emission area PXA and a light blocking area NPXA adjacent to the emission area PXA. The light blocking area NPXA may surround the emission area PXA. In the exemplary embodiment shown, the emission area PXA may be defined to correspond to a portion of the area of ​​the first electrode AE ​​exposed by the opening OP.

[0114] The hole control layer HCL may be disposed on the emission region PXA and the light blocking region NPXA in common. The hole control layer HCL may include a hole transport layer and may further include a hole injection layer. The emission layer EML is disposed on the hole control layer HCL. The emission layer EML may be disposed on an area corresponding to the opening OP. That is, the emission layer EML may be disposed separately for each pixel PX.

[0115] The electron control layer ECL is disposed on the emission layer EML. The electron control layer ECL may include an electron transport layer and may also include an electron injection layer. The hole control layer HCL and the electron control layer ECL may be formed together on a plurality of pixels PX by using an open mask. The second electrode CE is disposed on the electron control layer ECL. The second electrode CE is disposed as a single entity and is disposed together on a plurality of pixels PX.

[0116] The insulating layer TFL is disposed on the second electrode CE. The insulating layer TFL may include a plurality of thin films.

[0117] Figure 5 is through Figure 1A An exploded perspective view of an exemplary embodiment of a display device in which an adhesive member is connected between a signal pad of a display panel and a driving pad of a circuit board.

[0118] Reference Figure 5 , the display device DD further includes adhesive members AF-D and AF-P. The adhesive members AF-D and AF-P include a first adhesive member AF-D and a second adhesive member AF-P. According to an exemplary embodiment, each of the adhesive members AF-D and AF-P may be an anisotropic conductive film (ACF). The first adhesive member AF-D electrically couples the driving chip DC to the display panel DP, and the second adhesive member AF-P electrically couples the circuit board PB to the display panel DP.

[0119] In detail, the driving chip DC includes a top surface DC-US and a bottom surface DC-DS. The bottom surface DC-DS of the driving chip DC may be a surface facing the display panel DP. The driving chip DC includes chip driving pads DC-PD, which are electrically connected to the reference Figure 3 The signal pads DP-PD described are disposed on the substrate SUB. The chip driving pads DC-PD include first row driving pads DC-PD1 arranged in a first row along the first direction DR1 and second row driving pads DC-PD2 arranged in a second row along the first direction DR1. Each of the first row driving pads DC-PD1 and the second row driving pads DC-PD2 may have a shape exposed to the outside from the bottom surface of the driving chip DC.

[0120] The first adhesive member AF-D may be disposed between the driving chip DC and the substrate SUB of the display panel DP to electrically connect the driving chip DC to the display panel DP. The top surface of the first adhesive member AF-D may contact the chip driving pad DC-PD of the driving chip DC, and the bottom surface of the first adhesive member AF-D may contact the signal pad DP-PD.

[0121] The driving pads PB-PD provided in the circuit board PB are electrically connected to the connection signal pads DP-CPD, respectively. Each of the driving pads PB-PD may have a shape exposed to the outside from the bottom surface of the circuit board PB.

[0122] The second adhesive member AF-P may be disposed between the circuit board PB and the substrate SUB of the display panel DP to electrically connect the circuit board PB to the display panel DP. The top surface of the second adhesive member AF-P may contact the driving pad PB-PD of the circuit board PB, and the bottom surface of the second adhesive member AF-P may contact the connection signal pad DP-CPD.

[0123] Fig. 6A yes Figure 5 Schematic plan view of an exemplary embodiment of a bonding member. Figure 6B yes Figure 5 Schematic perspective view of a bonding member. Figure 6C yes Fig. 6A An enlarged schematic plan view of an exemplary embodiment of a portion of a bonding member.

[0124] According to an exemplary embodiment, Figure 5 Each of the first bonding member AF-D and the second bonding member AF-P shown in FIG. FIG. 6A to FIG. 6C The structure of the bonding member AF described. For example, Fig. 6A The structure of the bonding member AF may correspond to the structure of the first bonding member AF-D, and the structure of the bonding member AF in which the second conductive particles CB2 arranged in the second row are omitted may correspond to the second bonding member AF-P. Hereinafter, the bonding member AF corresponding to the first bonding member AF-D will be described. FIG. 6A to FIG. 6C .

[0125] Reference Fig. 6A , the bonding member AF includes an bonding layer AF-BS and first and second conductive groups CBG1 and CBG2 arranged in different rows, respectively. The bonding layer AF-BS may be provided as a bonding resin having a predetermined thickness. The first and second conductive groups CBG1 and CBG2 may be distributed in the bonding layer AF-BS in a predetermined pattern along the first direction DR1.

[0126] The plurality of first conductive groups CBG1 may be spaced apart from each other in the first direction DR1, and each of the first conductive groups CBG1 may extend in the second direction DR2. Each of the plurality of first conductive groups CBG1 may include a plurality of first conductive particles CB1 defined to be arranged in the second direction DR2. According to an exemplary embodiment, the plurality of first conductive groups CBG1 may have a shape arranged at a predetermined interval (pitch) in the first direction DR1. That is, the intervals between any two adjacent first conductive groups CBG1 in the first direction DR1 may be the same.

[0127] In particular, the plurality of first conductive groups CBG1 may be divided into first connection groups and first non-connection groups alternately and repeatedly arranged in the first direction DR1. The first conductive groups CBG1 disposed in the first connection group among the first conductive groups CBG1 electrically connect the display panel DP to the electronic components. The first conductive groups CBG1 disposed in the first non-connection group among the first conductive groups CBG1 are electrically separated from the first conductive groups CBG1 overlapping the first connection group.

[0128] Each of the first connection group and the first non-connection group may include at least one or more conductive groups. For example, Fig. 6A A structure in which each of the first connection group and the second connection group includes two conductive groups is shown. The first driving pad DC-PD1a, the second driving pad DC-PD1b, the third driving pad DC-PD1c, the fourth driving pad DC-PD1d, and the fifth driving pad DC-PD1e of the first row driving pad DC-PD1 of the driving chip DC arranged in the first row may be electrically connected to the five first connection groups arranged at predetermined intervals (pitch) in the first direction DR1.

[0129] The plurality of second conductive groups CBG2 may be spaced apart from each other in the first direction DR1, and each second conductive group CBG2 may extend along the second direction DR2. For example, each of the plurality of second conductive groups CBG2 may include a plurality of second conductive particles CB2 defined to be arranged along the second direction DR2. According to an exemplary embodiment of the invention, the plurality of second conductive groups CBG2 may be arranged at predetermined intervals in the first direction DR1. That is, the intervals between two adjacent second conductive groups CBG2 may be the same in the first direction DR1.

[0130] In particular, the plurality of second conductive groups CBG2 may be divided into second connected groups and second non-connected groups alternately and repeatedly arranged in the first direction DR1. The second conductive groups CBG2 disposed in the second connected group among the second conductive groups CBG2 electrically connect the display panel DP to the electronic components. The second conductive groups CBG2 disposed in the second non-connected group among the second conductive groups CBG2 are electrically separated from the second conductive groups CBG2 overlapping the second connected groups.

[0131] Each of the second connection group and the second non-connection group may include at least one or more conductive groups. The first driving pad DC-PD2a, the second driving pad DC-PD2b, the third driving pad DC-PD2c, the fourth driving pad DC-PD2d, and the fifth driving pad DC-PD2e of the second row driving pad DC-PD2 arranged in the second row may be electrically connected to the five second connection groups arranged at predetermined intervals in the first direction DR1.

[0132] Fig. 6A FIG. 4 shows a structure in which each of the first conductive group CBG1 and the second conductive group CBG2 includes five conductive particles. Fig. 6A As shown in , since one connection group includes two conductive groups, one connection group and one driving pad may be electrically connected to each other through ten conductive particles. However, the number of conductive particles provided in each of the first conductive group CBG1 and the second conductive group CBG2 is not limited thereto and thus may vary.

[0133] In addition, although the conductive particles disposed in each of the first conductive group CBG1 and the second conductive group CBG2 are shown to be in electrical contact with each other, exemplary embodiments are not limited thereto. For example, the conductive particles may be spaced apart from each other in the second direction DR2.

[0134] Figure 6B Shows Fig. 6A Some of the conductive groups of one of the first conductive group CBG1 and the second conductive group CBG2 shown in FIG. Fig. 6A As described, the first conductive group CBG1 or the second conductive group CBG2 may be divided into a connection area AF-CA corresponding to a connection group and a non-connection area AF-NCA corresponding to a non-connection group.

[0135] The bonding member AF is disposed between the electronic component and the substrate SUB of the display panel DP (see Figure 5 ), the driving pads of the electronic components and the signal pads of the display panel DP may be pressed to the bonding member AF by external pressure. In this case, since the bonding layer AF-BS is pressed by the driving pads and the signal pads, the pattern of the conductive particles CB distributed in the bonding layer AF-BS may be deformed. For example, the conductive particles CB-C overlapping the connection area AF-CA may move to be adjacent to the non-connection area AF-NCA, or the conductive particles CB-N overlapping the non-connection area AF-NCA may move to be adjacent to the connection area AF-CA.

[0136] As a result, the conductive particle CB-N overlapped with one non-connection area AF-NCA may be electrically connected to the conductive particle CB-C overlapped with two connection areas AF-CA facing each other and having one non-connection area AF-NCA between the two connection areas AF-CA. Therefore, a short circuit between two signal pads or driving pads adjacent to each other may occur.

[0137] According to the principles and exemplary embodiments of the invention, the thickness H1 of the adhesive layer AF-BS in the third direction DR3 can be defined based on the diameter DS of each of the conductive particles CB. For example, the adhesive layer AF-BS can have a thickness H1 of about 0.5 times to about 2.0 times the diameter DS of each of the conductive particles CB. For example, when the adhesive layer AF-BS is about 1.0 times or less the diameter DS of each of the conductive particles CB, at least a portion of the conductive particles CB can be exposed from the adhesive layer AF-BS. As another example, when the adhesive layer AF-BS is about 1.0 times or more the diameter DS of each of the conductive particles CB, the conductive particles CB can be completely disposed inside the adhesive layer AF-BS.

[0138] Therefore, even if the adhesive layer AF-BS having a thickness H1 is pressed by the signal pad and the driving pad, the flow of the conductive particles CB can be reduced. That is, even if the thickness H1 of the adhesive layer AF-BS is larger than the diameter DS of each of the conductive particles CB, the flow of the conductive particles CB due to the pressing of the adhesive layer AF-BS may increase. On the other hand, since the thickness H1 of the adhesive layer AF-BS according to the principle of the invention is set based on the diameter DS of each of the conductive particles CB, the flow of the conductive particles CB can be prevented even if the adhesive layer AF-BS is pressed.

[0139] In addition, according to an exemplary embodiment, the adhesive layer AF-BS may be provided as an adhesive resin including a thermal initiator. That is, the adhesive layer AF-BS may connect the electronic component to the substrate SUB by external heat pressing. The adhesive layer AF-BS including the thermal initiator may be activated according to a temperature change caused by heat provided from the outside. The thermal initiator may be changed according to the temperature of the heat provided during the process of manufacturing the display device DD and the time taken to perform the high temperature process.

[0140] Reference Figure 6C , showing a first conductive group corresponding to two connection areas AF-CA1 and AF-CA2 and a first conductive group corresponding to one non-connection area AF-NCA among the plurality of first conductive groups CBG1.

[0141] Hereinafter, in this specification, the first conductive group overlapping the first connection area AF-CA1 is described as the first sub-group CBG1a, and the first conductive group overlapping the second connection area AF-CA2 is described as the second sub-group CBG1b. In addition, the first conductive group overlapping the non-connection area AF-NCA is described as the third sub-group CBG1c. Each of the first sub-group CBG1a, the second sub-group CBG1b, and the third sub-group CBG1c includes two first conductive groups.

[0142] The first subgroup CBG1a is set in Figure 5 The conductive particles disposed in the first sub-group CBG1a are provided between the first signal pad of the first row of signal pads DP-PD1 on the substrate SUB shown in FIG. 1 and the first driving pad DC-PD1a of the first row of driving pads DC-PD1 disposed on the driving chip DC. As an example, the conductive particles disposed in the first sub-group CBG1a electrically connect the first signal pad of the first row of signal pads DP-PD1 to the first driving pad DC-PD1a.

[0143] The second subgroup CBG1b is spaced apart from the first subgroup CBG1a in the first direction DR1. Figure 5The conductive particles disposed in the second subgroup CBG1b electrically connect the second signal pad to the second driving pad DC-PD1b.

[0144] For another example, the first subgroup CBG1a may electrically connect the first signal pad to one of the driving pads PB-PD disposed on the circuit board PB. The second subgroup CBG1b may electrically connect the second signal pad to another one of the driving pads PB-PD disposed on the circuit board PB.

[0145] The third sub-group CBG1 c is disposed between the first sub-group CBG1 a and the second sub-group CBG1 b to overlap each of the first signal pad and the second signal pad in a plan view.

[0146] According to an exemplary embodiment, the conductive groups CBG disposed in the adhesive layer AF-BS may be arranged at predetermined intervals (spacings) in the first direction DR1. Fig. 6A As shown in FIG. 1 , the first conductive group CBG1 and the second conductive group CBG2 are arranged at predetermined intervals in the first direction DR1 .

[0147] In particular, the conductive groups CBG may be spaced apart from each other by a predetermined distance (interval) Dk in the first direction DR1. The predetermined distance Dk may be set based on the following equation (1). Here, Vd is a voltage level applied to the conductive group CBG, and DSr is an insulation strength of the adhesive layer AF-BS.

[0148]

[0149] That is, when the conductive groups CBG are spaced apart by a predetermined distance Dk, conductive particles of two conductive groups adjacent to each other in the first direction DR1 can be prevented from being electrically connected to each other. The "predetermined distance" means a distance sufficient to avoid process errors occurring while the bonding member AF is bonded between two pads.

[0150] In particular, in a plan view, one of the two conductive groups disposed in the third sub-group CBG1c (hereinafter, referred to as a "first first conductive group") may be separated from the first driving pad DC-PD1a by a first distance DSa. In a plan view, the other of the two conductive groups disposed in the third sub-group CBG1c (hereinafter, referred to as a "first second conductive group") may be separated from the second driving pad DC-PD1b by a second distance DSb. Here, each of the first distance DSa and the second distance DSb may be less than a predetermined distance Dk between the two conductive groups.

[0151] As a result, the first driving pad DC-PD1a and the first first conductive group can be electrically connected by the electric field between the first driving pad DC-PD1a and the first first conductive group. Similarly, the second driving pad DC-PD1b and the first second conductive group can be electrically connected by the electric field between the second driving pad DC-PD1b and the first second conductive group.

[0152] However, according to an exemplary embodiment, since the first first conductive group and the first second conductive group of the third subgroup CBG1c are separated from each other by a predetermined distance Dk, the first driving pad DC-PD1a and the second driving pad DC-PD1b may be electrically separated from each other. That is, a short circuit between the first driving pad DC-PD1a and the second driving pad DC-PD1b may be prevented.

[0153] As described above, in the process of bonding the chip driving pad DC-PD to the signal pad DP-PD of the display panel DP through the adhesive member AF according to the exemplary embodiment, the pads can be prevented from being short-circuited to each other through the conductive particles. Similarly, in the process of bonding the driving pad PB-PD to the connection signal pad DP-CPD of the display panel DP through the adhesive member AF according to the exemplary embodiment, the pads can be prevented from being short-circuited to each other through the conductive particles. Therefore, the overall driving reliability of the display device DD can be improved.

[0154] Fig. 7A yes Fig. 6A A plan view of another exemplary embodiment of a bonding member. Figure 7B is based on

[0155] Fig. 6A A plan view of another exemplary embodiment of a bonding member of another embodiment of the inventive concept.

[0156] Figure 7C yes Fig. 6A A plan view of yet another exemplary embodiment of a bonding member.

[0157] Reference Fig. 7A , the number of conductive groups provided in each of the first and second subgroups CBG1a and CBG1b is greater than the number of conductive groups provided in the third subgroup CBG1c. For example, each of the first and second subgroups CBG1a and CBG1b includes three conductive groups, and the third subgroup CBG1c includes two conductive groups.

[0158] Reference Figure 7B , the number of conductive groups provided in each of the first and second subgroups CBG1a and CBG1b is greater than the number of conductive groups provided in the third subgroup CBG1c. For example, each of the first and second subgroups CBG1a and CBG1b includes two conductive groups, and the third subgroup CBG1c includes one conductive group.

[0159] In a plan view, a distance between the first driving pad DC-PD1a and the conductive group of the third sub-group CBG1c is defined as a first interval W1. A distance between the second driving pad DC-PD1b and the conductive group of the third sub-group CBG1c is defined as a second interval W2.

[0160] According to an exemplary embodiment, the second interval W2 may be smaller than the first interval W1. That is, the conductive group of the third subgroup CBG1c may be electrically connected to the second driving pad DC-PD1b through an electric field. However, according to an exemplary embodiment, the conductive group of the third subgroup CBG1c and the conductive group closer to the third subgroup CBG1c of the two conductive groups disposed in the first subgroup CBG1a are separated from each other by a predetermined distance Dk. As a result, the first driving pad DC-PD1a and the second driving pad DC-PD1b may be electrically separated from each other.

[0161] Reference Figure 7C , the area in which the conductive group CBG is arranged may be divided into connection areas AF-CA1 and AF-CA2. That is, all the conductive groups CBG may overlap the connection areas AF-CA1 and AF-CA2.

[0162] The first subgroup CBG1a overlaps the first connection area AF-CA1, and the second subgroup CBG1b overlaps the second connection area AF-CA2. The first subgroup CBG1a and the second subgroup CBG1b may be alternately and repeatedly arranged in the first direction DR1. Each of the first subgroup CBG1a and the second subgroup CBG1b includes at least two conductive groups.

[0163] According to an exemplary embodiment, in a plan view, a distance between the first driving pad DC-PD1a and a conductive group of the second sub-group CBG1b closest to the first sub-group CBG1a is defined as a first interval Wa1. A distance between the second driving pad DC-PD1b and a conductive group of the first sub-group CBG1a closest to the second sub-group CBG1b is defined as a second interval Wa2. In particular, each of the first interval Wa1 and the second interval Wa2 may be greater than a predetermined distance Dk.

[0164] That is, the conductive group of the second subgroup CBG1b closest to the first subgroup CBG1a and the conductive group of the first subgroup CBG1a closest to the second subgroup CBG1b may be maintained at a predetermined distance Dk. As a result, the first driving pad DC-PD1a and the second driving pad DC-PD1b may be electrically separated from each other.

[0165] Figure 8 It is along Figure 5 A cross-sectional view taken along line II'. Fig. 9 yes Fig. 6A A cross-sectional view of another exemplary embodiment of a bonding member. Fig.10 yes Fig. 9 An enlarged cross-sectional view of area AA.

[0166] Reference Figure 8 The display panel DP includes a substrate SUB and an insulating layer IL disposed on the substrate SUB. The insulating layer IL may be Figure 4B The first signal pad DP-PD1a and the second signal pad DP-PD1b may be disposed in a contact hole defined in the insulating layer IL. However, exemplary embodiments are not limited thereto. For example, the insulating layer IL overlapped with the driving chip DC may be omitted, and a circuit element layer DP-CL (see FIG. 1 ) may be additionally disposed between the substrate SUB and the insulating layer IL. Figure 2 ) in the component set.

[0167] The driving chip DC includes a base substrate DC-BS and a pad insulating layer DC-IL disposed on the base substrate DC-BS. The first driving pad DC-PD1a and the second driving pad DC-PD1b may be disposed in contact holes defined in the pad insulating layer DC-IL.

[0168] The conductive particles CB-C overlapping the connection area AF-CA are disposed between the first signal pad DP-PD1a and the first driving pad DC-PD1a and between the second signal pad DP-PD1b and the second driving pad DC-PD1b. In addition, the conductive particles CB-N overlapping the non-connection area AF-NCA do not overlap the first driving pad DC-PD1a and the second driving pad DC-PD1b and are disposed between the insulating layer IL and the base substrate DC-BS.

[0169] Hereinafter, in this specification, the adhesive layer AF-BS is described as including a first adhesive portion AP1 overlapping the connection area AF-CA and a second adhesive portion AP2 overlapping the non-connection area AF-NCA.

[0170] According to an exemplary embodiment, the adhesive layer AF-BS may have a Figure 6B The thickness of each of the conductive particles CB described above is about 0.5 to about 2.0 times the diameter DS. As a result, the second adhesive portion AP2 may fill only a portion of the space between the driving chip DC and the substrate SUB instead of completely filling the space between the driving chip DC and the substrate SUB. Therefore, an inner space GP may be defined between the second adhesive portion AP2 and the base substrate DC-BS. The inner space GP may be filled with air.

[0171] In particular, the height of the inner space GP in the third direction DR3 may be greater than the thickness of the second adhesive portion AP2. In addition, since the first adhesive portion AP1 is pressed by the drive pad and the signal pad, at least a portion of the first adhesive portion AP1 may move to the second adhesive portion AP2. As a result, the thickness of the second adhesive portion AP2 may be at least partially greater than the thickness of the first adhesive portion AP1. This may correspond to a case where the thickness of the adhesive layer AF-BS is greater than about 1.0 times the diameter DS of each of the conductive particles CB. For another example, when the thickness of the adhesive layer AF-BS is less than about 1.0 times the diameter DS of each of the conductive particles CB, the thicknesses of the first adhesive portion AP1 and the second adhesive portion AP2 may be substantially the same.

[0172] According to an exemplary embodiment of the invention, the adhesive layer AF-BS may be an adhesive resin including a photoinitiator. The adhesive layer AF-BS including the photoinitiator may be exposed to external ultraviolet rays UVL (see Fig. 9 ) is activated. In particular, the adhesive layer AF-BS may have a refractive index greater than about 1.0, 1.0 being the refractive index of air. For example, the adhesive layer AF-BS may have a refractive index of about 1.3 to about 2.5.

[0173] Since the adhesive layer AF-BS is provided as an adhesive resin including a photoinitiator, after the adhesive member AF is provided on the driving chip DC and the substrate SUB, external ultraviolet rays UVL are emitted to the adhesive layer AF-BS.

[0174] In this case, since each of the driving pads provided in the driving chip DC and the signal pads provided on the substrate SUB is made of a metal material, the external ultraviolet rays UVL may not be transmitted through each of the driving pads provided in the driving chip DC and the signal pads provided on the substrate SUB. Therefore, hardening of the first adhesive portion AP1 provided between the driving pad and the signal pad facing each other may be difficult.

[0175] According to an exemplary embodiment, the refractive index of the second adhesive portion AP2 and the refractive index of the air constituting the inner space GP may be different from each other. As a result, the external ultraviolet rays UVL may be totally reflected at the interface between the second adhesive portion AP2 and the inner space GP. That is, the hardening of the first adhesive portion AP1 may be performed by total reflection of the external ultraviolet rays UVL emitted to the second adhesive portion AP2.

[0176] For details, refer to Fig. 9 and Fig.10 , the external ultraviolet rays UVL may be emitted to the second adhesive portion AP2 at an angle inclined with respect to the third direction DR3. Therefore, the external ultraviolet rays UVL may be totally reflected by the difference in refractive index at the interface IF between the second adhesive portion AP2 and the inner space GP.

[0177] That is to say, Fig.10 As shown in , a portion of the external ultraviolet rays UVL emitted to the second adhesive portion AP2 may be emitted to the inner space GP, and another portion may be totally reflected to be emitted to the first adhesive portion AP1. As a result, hardening of the first adhesive portion AP1 may be performed more effectively.

[0178] Fig.11 is a perspective view of another exemplary embodiment of a display device constructed according to the principles of the invention. Fig.12 It is along Fig.11 A cross-sectional view taken along line II-II'.

[0179] Reference Fig.11 The display panel DP may further include a filling Fig.10 The filler RS ​​in the inner space GP is shown in FIG.

[0180] The filler RS ​​may include a photoinitiator. The filler RS ​​including the photoinitiator may be activated by external ultraviolet rays UVL. Fig.11 A circuit board PB is shown as an electronic component. A filler RS ​​connects the circuit board PB to a substrate SUB. In a plan view, the filler RS ​​may overlap the circuit board PB.

[0181] Reference Fig.12 The filler RS ​​includes a first filling portion RS-1 and a second filling portion RS-2, the first filling portion RS-1 is not overlapped with the electronic component and is disposed on the substrate SUB, and the second filling portion RS-2 is disposed between the electronic component and the substrate SUB.

[0182] According to an exemplary embodiment, the circuit board PB includes a base circuit board PB-BS and a circuit insulating layer PB-IL. However, the structure of the circuit board PB is not limited thereto and may be variously modified. The first driving pad PB-PDa and the second driving pad PB-PDb of the circuit board PB face the first connection signal pad DP-CPDa and the second connection signal pad DP-CPDb, respectively.

[0183] In particular, an inner space is defined between the second adhesive portion AP2 of the adhesive member AF not overlapping the first and second driving pads PB-PDa and PB-PDb and the base circuit board PB-BS. According to an exemplary embodiment, a process of filling the second filling portion RS-2 in the inner space is as follows.

[0184] First, a filler RS ​​may be provided on the substrate SUB so as not to overlap with the circuit board PB. In this case, the filler RS ​​may be provided as a filler RS ​​having a liquid property before the external ultraviolet rays are emitted. As a result, a portion of the filler RS ​​provided on the substrate SUB may penetrate into the inner space between the circuit board PB and the substrate SUB. Thereafter, when the external ultraviolet rays are emitted to the inner space, the inner space may be filled with the filler RS.

[0185] According to an exemplary embodiment, the plane area of ​​the first filling portion RS-1 may be greater than the plane area of ​​the second filling portion RS-2. In addition, in the third direction DR3, the thickness of the first filling portion RS-1 may be greater than the thickness of the second filling portion RS-2.

[0186] According to the principles and exemplary embodiments of the invention, the thickness of the adhesive layer can be formed based on the diameter of the conductive particles. As a result, even if pressure is applied to the adhesive layer from the outside while the two pads are bonded to each other, the flow of the conductive particles distributed in the adhesive layer can be prevented. The flow of the conductive particles can be prevented, which in turn minimizes the short circuit of adjacent pads. Therefore, the overall driving reliability of the display device can be improved.

[0187] Although certain exemplary embodiments and implementations have been described herein, other embodiments and modifications will be apparent from this description. Therefore, the inventive concept is not limited to such embodiments, but to the broader scope of the claims and various obvious modifications and equivalent arrangements as will be apparent to those of ordinary skill in the art.

Claims

1. A display device, comprising: a first layer having a display area and a non-display area adjacent to the display area, the first layer comprising a first pad and a second pad overlapping the non-display area and spaced apart from each other in a first direction; a second layer including a base substrate and a third pad and a fourth pad facing the first pad and the second pad, respectively, in a thickness direction of the first layer and disposed on the base substrate; as well as an adhesive member disposed between the first pad and the second pad and the third pad and the fourth pad and comprising an adhesive layer and a plurality of conductive groups spaced apart from each other in the first direction and distributed in the adhesive layer along a second direction perpendicular to the first direction, wherein the plurality of conductive groups include conductive particles arranged along the second direction, and the thickness of the adhesive layer between the first pad and the second pad and the third pad and the fourth pad is 0.5 to 2.0 times the diameter of the conductive particles, wherein the adhesive layer includes a first adhesive portion overlapping the third pad and the fourth pad and a second adhesive portion not overlapping the third pad and the fourth pad, and Wherein, the second layer further includes an air layer defined between the second adhesive portion and the base substrate.

2. The display device according to claim 1, wherein: The plurality of conductive groups are arranged at predetermined intervals in the first direction.

3. The display device according to claim 1, wherein: The plurality of conductive groups include three subgroups including a first subgroup, a second subgroup, and a third subgroup, the first pad and the second pad include a first signal pad and a second signal pad, respectively, the third pad and the fourth pad include a first driving pad and a second driving pad, respectively; and The first subgroup is disposed between the first signal pad and the first driving pad to electrically connect the first signal pad to the first driving pad, The second subgroup is disposed between the second signal pad and the second driving pad to electrically connect the second signal pad to the second driving pad, and The third subgroup is disposed between the first subgroup and the second subgroup without overlapping any one of the first signal pad and the second signal pad.

4. The display device according to claim 3, wherein: Each of the first subgroup, the second subgroup, and the third subgroup includes at least one conductive group of the plurality of conductive groups.

5. The display device according to claim 1, wherein: The first layer includes a display substrate, the second layer includes an electronic component, the first pad and the second pad include a first signal pad and a second signal pad, respectively, the third pad and the fourth pad include a first drive pad and a second drive pad, respectively, and the plurality of conductive groups include a first subgroup disposed between the first signal pad and the first drive pad and a second subgroup disposed between the second signal pad and the second drive pad, and The first subset and the second subset are arranged alternately and repeatedly in the first direction.

6. The display device according to claim 1, wherein: The adhesive layer includes a photoinitiator activated by external ultraviolet rays.

7. The display device according to claim 1, wherein: The spacing distance between two adjacent conductive groups in the plurality of conductive groups satisfies the following equation: Wherein, Dk is the spacing distance, Vd is the voltage level applied to each of the plurality of conductive groups, and DSr is the dielectric strength of the adhesive layer.

8. An adhesive member for connecting electronic components in a display device, the adhesive member comprising: Adhesive layer; as well as a conductive group, distributed in the adhesive layer at predetermined intervals in a first direction and extending in a second direction perpendicular to the first direction, wherein the conductive group includes conductive particles arranged along the second direction, and The adhesive layer has a thickness of 0.5 to 2.0 times the diameter of the conductive particles, and the thickness of the adhesive layer is uniform.

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