Universal application circuit and method for three-phase, two-phase and single-phase resistance sampling

Abstract

The present invention discloses a universal application circuit and method for three-phase, two-phase, and single-phase resistance sampling, wherein the application circuit includes: a rectifier bridge, used to convert input alternating current into pulsating direct current; a filter and voltage stabilization circuit, used to filter the direct current and stabilize the bus voltage of the direct current; an inverter circuit, used to convert the direct current into alternating current; a sampling circuit, used to sample the alternating current; and a sampling and amplification circuit, used to amplify the voltage obtained by sampling. The present invention adopts a universal adaptive structure in hardware, and the user can conveniently switch back and forth on the three-resistance, two-resistance, and single-resistance system without changing the PCB. It has a larger choice of cost and efficiency in different application scenarios, and better meets the needs of users with different needs. It is more flexible and applicable, and can be widely used in the field of resistance sampling and detection technology.

Description

Technical Field

[0001] The present invention relates to the technical field of resistance sampling detection, and in particular to an application circuit and method universal for three-phase, two-phase and single-phase resistance sampling. Background Art

[0002] Existing patents (such as patent numbers CN201820032656.5, CN201610776444.3 or CN201821788055.3, etc.) describe single-resistance and dual-resistance sampling systems. These hardware are applied to a single method and cannot be used universally. Generally, three-resistance sampling has high efficiency and low algorithm requirements, but the cost is slightly higher; single-resistance sampling has low efficiency, high algorithm requirements, and requires current reconstruction, but the cost is optimal; and two resistors are between them. Manufacturers usually need to make a comprehensive selection between them and update and upgrade their products, so they generally hope that the hardware can be compatible so that they can quickly debug and upgrade the software without changing the hardware; at the same time, for manufacturers who need to balance cost and efficiency, when they want to be compatible with these three application circuits, they need to change the hardware and re-layout the PCB, which not only affects production time, but also increases costs. Summary of the invention

[0003] In order to solve at least one of the technical problems existing in the prior art to a certain extent, the object of the present invention is to provide a universal application circuit and method for three-phase, two-phase and single-phase resistance sampling.

[0004] The technical solution adopted by the present invention is:

[0005] A universal application circuit for three-phase, two-phase, and single-phase resistance sampling, comprising:

[0006] Rectifier bridge, used to convert input AC power into pulsating DC power;

[0007] A filtering and voltage stabilizing circuit, used for filtering the direct current and stabilizing the bus voltage of the direct current;

[0008] An inverter circuit, used for converting the direct current into alternating current;

[0009] A sampling circuit, for sampling alternating current, comprising a first sampling resistor, a second sampling resistor, a third sampling resistor and a fourth sampling resistor, wherein one end of the first sampling resistor is used to collect the voltage at the U end of the inverter circuit, one end of the second sampling resistor is used to collect the voltage at the V end of the inverter circuit, one end of the third sampling resistor is used to collect the voltage at the W end of the inverter circuit, and the other end of the first sampling resistor, the other end of the second sampling resistor and the other end of the third sampling resistor are combined and connected to one end of the fourth sampling resistor;

[0010] The sampling and amplifying circuit is used to amplify the voltage obtained by sampling.

[0011] Further, the filtering and voltage stabilizing circuit includes a first capacitor, a second capacitor, a first resistor and a second resistor;

[0012] The first capacitor and the second capacitor are connected in series at both ends of the bus voltage, the first resistor is connected in parallel with the first capacitor, and the second capacitor is connected in parallel with the second resistor.

[0013] Furthermore, the filtering and voltage stabilizing circuit also includes a third resistor and a relay switch;

[0014] The third resistor is connected in parallel with the relay switch. The third resistor is a soft start protection resistor used to protect the rectifier bridge and the inverter circuit when powered on. The relay switch is closed after power-on to short-circuit the third resistor.

[0015] Further, when the application circuit is applied to a three-resistance test device, the fourth sampling resistor is short-circuited;

[0016] The sampling and amplifying circuit includes a bias module, a first amplifying circuit, a second amplifying circuit and a third amplifying circuit;

[0017] The bias module performs voltage bias for the first amplifier circuit, the second amplifier circuit and the third amplifier circuit, the first amplifier circuit is used to amplify the voltage collected by the first sampling resistor, the second amplifier circuit is used to amplify the voltage collected by the second sampling resistor, and the third amplifier circuit is used to amplify the voltage collected by the third sampling resistor.

[0018] Further, the bias module includes a fourth resistor, a fifth resistor, a seventh resistor, a twelfth resistor, a seventeenth resistor, a third capacitor and a first amplifier;

[0019] The four resistors and the fifth resistor are connected in series between the first voltage and the ground, the connection point of the fourth resistor and the fifth resistor is connected to the in-phase input terminal of the first amplifier, the inverting input terminal of the first amplifier is connected to the output terminal of the first amplifier, the output terminal of the first amplifier is connected to the first amplifier circuit through the seventh resistor, the output terminal of the first amplifier is connected to the second amplifier circuit through the twelfth resistor, the output terminal of the first amplifier is connected to the third amplifier circuit through the seventeenth resistor, and the third capacitor is connected to the fifth resistor in parallel.

[0020] Further, the first amplifying circuit includes a sixth resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor, a fifth capacitor and a second amplifier;

[0021] One end of the sixth resistor is used to collect the voltage at the U end, the other end of the sixth resistor is connected to the non-inverting input end of the second amplifier, the inverting input end of the second amplifier is grounded through the eighth resistor, the output of the second amplifier is respectively connected to one end of the ninth resistor and one end of the tenth resistor, the other end of the ninth resistor is connected to the inverting input end of the second amplifier, the other end of the tenth resistor serves as the output end of the first amplifier circuit, the fourth capacitor is connected between the non-inverting input end of the second amplifier and the ground, and the fifth capacitor is connected between the other end of the tenth resistor and the ground.

[0022] Further, when the application circuit is applied to a two-resistance test device, the fourth sampling resistor is short-circuited, and one of the first sampling resistor, the second sampling resistor or the third sampling resistor is short-circuited;

[0023] The sampling and amplifying circuit comprises a bias module and two amplifying circuits. The bias module performs voltage bias for the amplifying circuit, and the two amplifying circuits amplify two sampling resistors that are not short-circuited.

[0024] Further, when the application circuit is applied to a single resistor test device, the first sampling resistor, the second sampling resistor and the third sampling resistor are all short-circuited;

[0025] The fourth sampling resistor is used to collect the output voltage of the inverter circuit;

[0026] The sampling and amplifying circuit includes a bias module and an amplifying circuit. The bias module performs voltage bias on the amplifying circuit, and the amplifying circuit amplifies the collected voltage.

[0027] Furthermore, the application circuit also includes a digital signal processor, which is used to receive the signal from the sampling and amplifying circuit and output a signal to control the permanent magnet synchronous motor.

[0028] Another technical solution adopted by the present invention is:

[0029] A method is applied to the above-mentioned three-phase, two-phase, and single-phase resistance sampling universal application circuit, comprising the following steps:

[0030] According to different solution requirements, the sampling circuit and sampling amplifier circuit can be adjusted without changing the PCB.

[0031] The beneficial effects of the present invention are as follows: the present invention adopts a universal adaptive structure in hardware, and the user can conveniently switch back and forth between the three-resistor-two-resistor-single-resistor system without changing the PCB. It has a larger choice space in terms of cost and efficiency in different application occasions, and better meets the needs of users with different needs, and is more flexible and applicable. BRIEF DESCRIPTION OF THE DRAWINGS

[0032] In order to more clearly illustrate the embodiments of the present invention or the technical solutions in the prior art, the embodiments of the present invention or the drawings of related technical solutions in the prior art are introduced below. It should be understood that the drawings introduced below are only for the convenience of clearly describing some embodiments of the technical solutions of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work.

[0033] Figure 1 It is a circuit diagram of a rectifier bridge, a filtering and voltage stabilizing circuit, an inverter circuit and a sampling circuit in an application circuit in an embodiment of the present invention;

[0034] Figure 2 is a circuit diagram of a sampling amplifier circuit of a three-resistance scheme in an embodiment of the present invention;

[0035] Figure 3 is a schematic diagram of a sampling circuit of a two-resistance scheme in an embodiment of the present invention;

[0036] Figure 4 is a circuit diagram of a sampling amplifier circuit of a two-resistance scheme in an embodiment of the present invention;

[0037] Figure 5 is a schematic diagram of a sampling circuit of a single resistor scheme in an embodiment of the present invention;

[0038] Figure 6 is a circuit diagram of a sampling amplifier circuit in a single resistor scheme according to an embodiment of the present invention;

[0039] Figure 7 is a simulation circuit diagram of an application circuit in an embodiment of the present invention;

[0040] Figure 8 Schematic diagram of simulation results in an embodiment of the present invention. DETAILED DESCRIPTION

[0041] The embodiments of the present invention are described in detail below, and examples of the embodiments are shown in the accompanying drawings, wherein the same or similar reference numerals throughout represent the same or similar elements or elements having the same or similar functions. The embodiments described below with reference to the accompanying drawings are exemplary and are only used to explain the present invention, and are not to be construed as limitations of the present invention. For the step numbers in the following embodiments, they are only provided for the convenience of explanation, and the order between the steps is not limited in any way, and the execution order of each step in the embodiment can be adaptively adjusted according to the understanding of those skilled in the art.

[0042] In the description of the present invention, it should be understood that descriptions involving orientations, such as up, down, front, back, left, right, etc., and orientations or positional relationships indicated are based on the orientations or positional relationships shown in the accompanying drawings, and are only for the convenience of describing the present invention and simplifying the description, and do not indicate or imply that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore should not be understood as a limitation on the present invention.

[0043] In the description of the present invention, "several" means one or more, "more" means more than two, "greater than", "less than", "exceed" etc. are understood as not including the number itself, and "above", "below", "within" etc. are understood as including the number itself. If there is a description of "first" or "second", it is only used for the purpose of distinguishing the technical features, and cannot be understood as indicating or implying the relative importance or implicitly indicating the number of the indicated technical features or implicitly indicating the order of the indicated technical features.

[0044] In the description of the present invention, unless otherwise clearly defined, terms such as setting, installing, connecting, etc. should be understood in a broad sense, and technicians in the relevant technical field can reasonably determine the specific meanings of the above terms in the present invention based on the specific content of the technical solution.

[0045] like Figure 1 As shown, this embodiment provides a universal application circuit for three-phase, two-phase, and single-phase resistance sampling, including:

[0046] Rectifier bridge, used to convert input AC power into pulsating DC power;

[0047] A filtering and voltage stabilizing circuit is used for filtering direct current and stabilizing the bus voltage of direct current;

[0048] Inverter circuit, used to convert direct current into alternating current;

[0049] A sampling circuit, for sampling alternating current, comprising a first sampling resistor RS1, a second sampling resistor RS2, a third sampling resistor RS3 and a fourth sampling resistor RS4, wherein one end of the first sampling resistor RS1 is used to collect the voltage at the U end of the inverter circuit, one end of the second sampling resistor RS2 is used to collect the voltage at the V end of the inverter circuit, one end of the third sampling resistor RS3 is used to collect the voltage at the W end of the inverter circuit, and the other end of the first sampling resistor RS1, the other end of the second sampling resistor RS2 and the other end of the third sampling resistor RS3 are combined and connected to one end of the fourth sampling resistor RS4;

[0050] The sampling and amplifying circuit is used to amplify the voltage obtained by sampling.

[0051] See also Figure 1 , A, B, C are the input of three-phase power supply, the application circuit includes rectification circuit, filter voltage regulator circuit and inverter circuit, and the subsequent equipment includes motors (such as permanent magnet synchronous motors, Figure 1 The middle position is given), forming a complete control system. Among them, the inverter circuit is made of an intelligent power module (IPM). Using the circuit of this embodiment, when the user needs to switch a three-resistance, two-resistance or single-resistance system, it is only necessary to adjust the connection relationship of the sampling resistor, such as short-circuiting the sampling resistor. In production, tin can be used directly to short-circuit according to the current size, or other methods can be used to short-circuit without modifying the entire PCB, which improves flexibility and reduces hardware costs. Among them, resistor RS1 is the motor U-phase sampling resistor, resistor RS2 is the motor V-phase sampling resistor, resistor RS3 is the motor W-phase sampling resistor, and resistor RS4 is the motor bus current sampling resistor, which is also the sampling resistor that constitutes the single-resistance control system and the basis for reconstructing the three-phase current of the motor.

[0052] Reference Figure 1 , further as an optional implementation, the filtering and stabilizing circuit includes a first capacitor C1, a second capacitor C2, a first resistor R1 and a second resistor R2;

[0053] The first capacitor C1 and the second capacitor C2 are connected in series at both ends of the bus voltage, the first resistor R1 is connected in parallel with the first capacitor C1, and the second capacitor C2 is connected in parallel with the second resistor R2.

[0054] Among them, the electrolytic capacitors C1 and C2 are energy storage capacitors, which play the role of stabilizing the rectified bus voltage. The resistors R1 and R2 are equalizing resistors, which keep the voltage on the bus energy storage capacitors C1 and C2 at half of the bus voltage, keep the voltage on the electrolytic capacitors C1 and C2 equal, and improve the service life of the electrolytic capacitors.

[0055] V PN is the voltage between busbars P and N;

[0056] V PN is the voltage between busbars P and N.

[0057] Reference Figure 1 , further as an optional implementation, the filtering and voltage stabilizing circuit further includes a third resistor R3 and a relay switch;

[0058] The third resistor R3 is connected in parallel with the relay switch. The third resistor R3 is a soft start protection resistor, which is used to protect the rectifier bridge and the inverter circuit when powered on. The relay switch is closed after power-on to short-circuit the third resistor R3.

[0059] In this embodiment, the third resistor R3 is a cement resistor. Resistor R3 is a soft start protection resistor to prevent damage to the rectifier bridge and the subsequent IPM module due to overcurrent breakdown when power is just turned on. The relay switch is a soft start relay. After the startup is completed, the starting resistor R3 is cut off to reduce the loss caused by the soft start resistor R3 during the operation of the inverter and improve the efficiency of the inverter.

[0060] Further as an optional implementation, when the application circuit is applied to a three-resistance test device, the fourth sampling resistor RS4 is short-circuited;

[0061] The sampling and amplifying circuit includes a bias module, a first amplifying circuit, a second amplifying circuit and a third amplifying circuit;

[0062] The bias module performs voltage bias for the first amplifier circuit, the second amplifier circuit and the third amplifier circuit. The first amplifier circuit is used to amplify the voltage collected by the first sampling resistor RS1, the second amplifier circuit is used to amplify the voltage collected by the second sampling resistor RS2, and the third amplifier circuit is used to amplify the voltage collected by the third sampling resistor RS3.

[0063] See also Figure 2 , further as an optional implementation, the bias module includes a fourth resistor R4, a fifth resistor R5, a seventh resistor R7, a twelfth resistor R12, a seventeenth resistor R17, a third capacitor C3 and a first amplifier OP1;

[0064] The fourth resistor and the fifth resistor R5 are connected in series between the first voltage and the ground, the connection point of the fourth resistor R4 and the fifth resistor R5 is connected to the non-inverting input terminal of the first amplifier OP1, the inverting input terminal of the first amplifier OP1 is connected to the output terminal of the first amplifier OP1, the output terminal of the first amplifier OP1 is connected to the first amplifier circuit through the seventh resistor R7, the output terminal of the first amplifier OP1 is connected to the second amplifier circuit through the twelfth resistor R12, the output terminal of the first amplifier OP1 is connected to the third amplifier circuit through the seventeenth resistor R17, and the third capacitor C3 is connected in parallel with the fifth resistor R5.

[0065] See also Figure 2 , further as an optional implementation, the first amplifying circuit includes a sixth resistor R6, an eighth resistor R8, a ninth resistor R9, a tenth resistor R10, a fourth capacitor C4, a fifth capacitor C5 and a second amplifier OP1;

[0066] One end of the sixth resistor R6 is used to collect the voltage at the U end, the other end of the sixth resistor R6 is connected to the non-inverting input end of the second amplifier OP1, the inverting input end of the second amplifier OP1 is grounded through the eighth resistor R8, the output of the second amplifier OP1 is respectively connected to one end of the ninth resistor R9 and one end of the tenth resistor R10, the other end of the ninth resistor R9 is connected to the inverting input end of the second amplifier OP1, the other end of the tenth resistor R10 serves as the output end of the first amplifier circuit, the fourth capacitor C4 is connected between the non-inverting input end of the second amplifier OP1 and the ground, and the fifth capacitor C5 is connected between the other end of the tenth resistor R10 and the ground.

[0067] See also Figure 3 and Figure 4 , further as an optional implementation, when the application circuit is applied to a two-resistance test device, the fourth sampling resistor RS4 is short-circuited, and one of the first sampling resistor RS1, the second sampling resistor RS2 or the third sampling resistor RS3 is short-circuited;

[0068] The sampling and amplifying circuit comprises a bias module and two amplifying circuits. The bias module performs voltage bias for the amplifying circuit, and the two amplifying circuits amplify two sampling resistors that are not short-circuited.

[0069] See also Figure 5 and Figure 6 , further as an optional implementation, when the application circuit is applied to a single resistor test device, the first sampling resistor RS1, the second sampling resistor RS2 and the third sampling resistor RS3 are all short-circuited;

[0070] The fourth sampling resistor RS4 is used to collect the output voltage of the inverter circuit;

[0071] The sampling and amplifying circuit includes a bias module and an amplifying circuit. The bias module performs voltage bias on the amplifying circuit, and the amplifying circuit amplifies the collected voltage.

[0072] See also Figure 2 As an optional implementation, the application circuit further includes a digital signal processor DSP, which is used to receive the signal from the sampling and amplifying circuit and output a signal to control the permanent magnet synchronous motor.

[0073] The above application circuit is described in detail below in conjunction with specific embodiments.

[0074] 1. Three-resistance solution

[0075] See also Figure 1 and Figure 2 , the three-resistor scheme connects all three paths of NU, NV, and NW, and the sampling resistors are set to RS1, RS2, RS3 and the peripheral sampling amplifier circuit composed of their operational amplifiers OP1~OP4. Specifically including: sampling resistors RS1, RS2, RS3, operational amplifiers OP1, OP2, OP3, OP4, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, R16, R17, R18, R19, R20, capacitors C3, C4, C5, C6, C7, C8, C9, RS4 sampling resistor can be short-circuited (in production, it is directly short-circuited with tin according to the current size).

[0076] The setting conditions are R7=R9, R8=R6, where R6 / / R7=R8 / / R9 (the resistance between the same phase and the opposite phase of the op amp must be balanced), then the formula between the current input of each phase → the sampling voltage output is:

[0077] (1)U phase output current:

[0078] (2) V phase output current:

[0079] (3)W phase output current:

[0080] 2. Two-resistance solution

[0081] See also Figure 3 and Figure 4 , the two-resistance scheme selects any two of the three paths NU, NV, and NW, and the sampling resistors are set to RS1, RS2 and the peripheral sampling amplifier circuit composed of the operational amplifiers OP1~OP3. Any two of the sampling resistors RS1, RS2, and RS3 (such as RS1 and RS2) and their peripheral sampling circuits NU and NV are assembled, specifically including: sampling resistors RS1, RS2, operational amplifiers OP1, OP2, OP3, resistors R4, R5, R6, R7, R8, R9, R10, R11, R12, R13, R14, R15, capacitors C3, C4, C5, C6, C7, RS3 and RS4 can be short-circuited (directly short-circuited with tin according to the current size in production).

[0082] Capacitor C3 is the filter capacitor entering the operational amplifier OP1, and C4 and C5 are high-frequency filter capacitors, which mainly filter out high-frequency signals. The setting conditions are R7=R9, R8=R6, where R6 / / R7=R8 / / R9 (the resistance between the same and opposite phases of the operational amplifier must be balanced), then the formula between the NU and NV two-phase current input → sampling voltage output is:

[0083] (1)U phase output current:

[0084] (2) V phase output current:

[0085] Here, IU and IV are the currents passing through the U and V phase sampling resistors.

[0086] 3. Single resistor solution

[0087] See also Figure 5 and Figure 6 The single resistor solution cancels all the related sampling resistors of NU, NV, and NW, and sets the sampling resistor to the peripheral sampling amplifier circuit composed of RS4 and its operational amplifiers OP1~OP2. Specifically, it includes: sampling resistor RS4, operational amplifiers OP1, OP2, resistors R4, R5, R6, R7, R8, R9, R10, capacitors C3, C4, C5, and sampling resistors RS1, RS2, and RS3 are short-circuited (in production, they are short-circuited directly with tin according to the current size).

[0088] The setting conditions are R7=R9, R8=R6, where R6 / / R7=R8 / / R9 (satisfying the balance of resistance between the op amp and the inverting phase), Idc is the bus current, and the formula between Idc bus current input and sampling voltage output formed by single resistor RS4 is:

[0089]

[0090] In this embodiment, it is only necessary to layout all RS1 to RS4 at the beginning of PCB planning and design to implement the universal three-phase-two-phase-single-phase resistance scheme. The scheme is simple and reliable, low-cost, and has good economic and technical value and promotion and application value. The correctness and effectiveness of this scheme are further verified by simulation.

[0091] We directly use a three-phase sinusoidal current source to simulate the current passing through the sampling resistors RS1~RS4, setting the current source amplitude to 15A. The hardware peripheral circuit is simulated as follows Figure 7 As shown, it is verified whether the output voltage V_out1 obtained by amplifying the current through the sampling resistors RS1~RS4 to N and the output V_out2 obtained by the current through the two ends of the sampling resistors RS1~RS3 and the differential sampling op amp are consistent. The specific simulation output voltages V_out1 and V_out2 are as follows Figure 8 shown.

[0092] It can be seen from the simulation waveform that the bias voltage is set from 3.3V to 1.65V through the voltage-equalizing resistor, the sampling resistors RS1~RS4 are all 6mΩ, the amplification factor is set to 10, the amplitude of the simulated equivalent three-phase input current source is 50A, and the frequency is set to 50Hz. The corresponding mathematical relationship between the current source input and output is:

[0093] Vout_1=Vout_2=1.65+0.006*10*±15=0.75V~2.55V

[0094] And from Figure 8 The simulated voltage waveforms of Vout_1 and Vout_2 are completely consistent, and the voltage output waveforms of Vout_1 and Vout_2 completely overlap, so the effectiveness and reliability of the universal application circuit for converting three-phase to two-phase to single-phase resistance sampling of the present invention can be effectively verified.

[0095] In summary, the application circuit of this embodiment has the following beneficial effects compared with the prior art:

[0096] (1) Due to the use of a universal three-phase-two-phase-single-phase resistor sampling hardware system application circuit, the driven system is suitable for variable frequency drive control systems composed of three resistors, two resistors and single resistors composed of discrete devices. It is also applicable to the variable frequency drive control system of the intelligent power module (IPM) of the three-phase lower bridge arm with the N side open. It has high economic value and a wide range of adaptability.

[0097] (2) Since all three phases use resistor sampling, it has great cost advantages for small and medium power variable frequency drive control systems.

[0098] (3) Due to the universal adaptability adopted in the hardware, the user can easily switch back and forth between the three-resistor-two-resistor-single-resistor system without changing the PCB by using the resistance sampling control system of this embodiment, and no longer needs to change the PCB, which provides more choices in terms of cost or efficiency in different application occasions, and better meets the needs of users with different needs, and is more flexible and applicable.

[0099] This embodiment also provides a method, which is applied to the above-mentioned universal application circuit for three-phase, two-phase, and single-phase resistance sampling, and includes the following steps:

[0100] S1. According to different solution requirements, adjust the sampling circuit and sampling amplifier circuit without changing the PCB.

[0101] The method of this embodiment has a corresponding relationship with the above-mentioned application circuit, and therefore has the corresponding functions and effects of the application circuit.

[0102] In some selectable embodiments, the function / operation mentioned in the block diagram may not occur in the order mentioned in the operation diagram. For example, depending on the function / operation involved, the two boxes shown in succession can actually be executed substantially simultaneously or the boxes can sometimes be executed in reverse order. In addition, the embodiment presented and described in the flow chart of the present invention is provided by way of example, for the purpose of providing a more comprehensive understanding of technology. The disclosed method is not limited to the operation and logic flow presented herein. Selectable embodiments are expected, wherein the order of various operations is changed and the sub-operation of a part for which is described as a larger operation is performed independently.

[0103] In addition, although the present invention is described in the context of functional modules, it should be understood that, unless otherwise specified, one or more of the functions and / or features described may be integrated into a single physical device and / or software module, or one or more functions and / or features may be implemented in separate physical devices or software modules. It is also understood that a detailed discussion of the actual implementation of each module is unnecessary for understanding the present invention. More specifically, in view of the properties, functions, and internal relationships of the various functional modules in the device disclosed herein, the actual implementation of the module will be understood within the conventional skills of the engineer. Therefore, those skilled in the art can implement the present invention set forth in the claims without excessive experimentation using ordinary techniques. It is also understood that the specific concepts disclosed are merely illustrative and are not intended to limit the scope of the present invention, which is determined by the full scope of the appended claims and their equivalents.

[0104] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the methods described in each embodiment of the present invention. The aforementioned storage medium includes: U disk, mobile hard disk, read-only memory (ROM, Read-Only Memory), random access memory (RAM, Random Access Memory), disk or optical disk, etc., which can store program codes.

[0105] The logic and / or steps represented in the flowchart or otherwise described herein, for example, can be considered as an ordered list of executable instructions for implementing logical functions, and can be embodied in any computer-readable medium for use by an instruction execution system, device or apparatus (such as a computer-based system, a system including a processor, or other system that can fetch instructions from an instruction execution system, device or apparatus and execute instructions), or in conjunction with such instruction execution systems, devices or apparatuses. For the purposes of this specification, "computer-readable medium" can be any device that can contain, store, communicate, propagate or transmit a program for use by an instruction execution system, device or apparatus, or in conjunction with such instruction execution systems, devices or apparatuses.

[0106] More specific examples of computer-readable media (a non-exhaustive list) include the following: an electrical connection with one or more wires (electronic device), a portable computer disk case (magnetic device), a random access memory (RAM), a read-only memory (ROM), an erasable and programmable read-only memory (EPROM or flash memory), an optical fiber device, and a portable compact disk read-only memory (CDROM). In addition, the computer-readable medium may even be a paper or other suitable medium on which the program is printed, since the program may be obtained electronically, for example, by optically scanning the paper or other medium, followed by editing, deciphering or, if necessary, processing in another suitable manner, and then stored in a computer memory.

[0107] It should be understood that the various parts of the present invention can be implemented by hardware, software, firmware or a combination thereof. In the above-mentioned embodiments, a plurality of steps or methods can be implemented by software or firmware stored in a memory and executed by a suitable instruction execution system. For example, if implemented by hardware, as in another embodiment, it can be implemented by any one of the following technologies known in the art or their combination: a discrete logic circuit having a logic gate circuit for implementing a logic function for a data signal, a dedicated integrated circuit having a suitable combination of logic gate circuits, a programmable gate array (PGA), a field programmable gate array (FPGA), etc.

[0108] In the above description of this specification, the description with reference to the terms "one embodiment / example", "another embodiment / example" or "certain embodiments / examples" etc. means that the specific features, structures, materials or characteristics described in conjunction with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representation of the above terms does not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in any one or more embodiments or examples in a suitable manner.

[0109] Although embodiments of the present invention have been shown and described, it will be appreciated by those skilled in the art that various changes, modifications, substitutions and variations may be made to the embodiments without departing from the principles and spirit of the present invention, and that the scope of the present invention is defined by the claims and their equivalents.

[0110] The above is a specific description of the preferred implementation of the present invention, but the present invention is not limited to the above embodiments. Those skilled in the art may make various equivalent modifications or substitutions without violating the spirit of the present invention. These equivalent modifications or substitutions are all included in the scope defined by the claims of this application.

Claims

1. A universal application circuit for three-phase, two-phase, and single-phase resistance sampling, characterized in that: include: Rectifier bridge, used to convert input AC power into pulsating DC power; A filtering and voltage stabilizing circuit, used for filtering the direct current and stabilizing the bus voltage of the direct current; An inverter circuit, used for converting the direct current into alternating current; A sampling circuit, for sampling alternating current, comprising a first sampling resistor, a second sampling resistor, a third sampling resistor and a fourth sampling resistor, wherein one end of the first sampling resistor is used to collect the voltage at the U end of the inverter circuit, one end of the second sampling resistor is used to collect the voltage at the V end of the inverter circuit, one end of the third sampling resistor is used to collect the voltage at the W end of the inverter circuit, and the other end of the first sampling resistor, the other end of the second sampling resistor and the other end of the third sampling resistor are combined and connected to one end of the fourth sampling resistor; A sampling and amplifying circuit, used for amplifying the voltage obtained by sampling; When the application circuit is applied to the three-resistance test device, the fourth sampling resistor is short-circuited; The sampling and amplifying circuit includes a bias module, a first amplifying circuit, a second amplifying circuit and a third amplifying circuit; The bias module performs voltage bias for the first amplifier circuit, the second amplifier circuit and the third amplifier circuit, the first amplifier circuit is used to amplify the voltage collected by the first sampling resistor, the second amplifier circuit is used to amplify the voltage collected by the second sampling resistor, and the third amplifier circuit is used to amplify the voltage collected by the third sampling resistor; When the application circuit is applied to a two-resistance test device, the fourth sampling resistor is short-circuited, and one of the first sampling resistor, the second sampling resistor or the third sampling resistor is short-circuited; The sampling and amplifying circuit includes a bias module and two amplifying circuits, wherein the bias module performs voltage bias for the amplifying circuit, and the two amplifying circuits amplify two sampling resistors that are not short-circuited; When the application circuit is applied to a single resistor test device, the first sampling resistor, the second sampling resistor and the third sampling resistor are all short-circuited; The fourth sampling resistor is used to collect the output voltage of the inverter circuit; The sampling and amplifying circuit includes a bias module and an amplifying circuit. The bias module performs voltage bias on the amplifying circuit, and the amplifying circuit amplifies the collected voltage.

2. The universal application circuit for three-phase, two-phase and single-phase resistance sampling according to claim 1 is characterized in that: The filtering and voltage stabilizing circuit comprises a first capacitor, a second capacitor, a first resistor and a second resistor; The first capacitor and the second capacitor are connected in series at both ends of the bus voltage, the first resistor is connected in parallel with the first capacitor, and the second capacitor is connected in parallel with the second resistor.

3. The universal application circuit for three-phase, two-phase and single-phase resistance sampling according to claim 2 is characterized in that: The filtering and voltage stabilizing circuit also includes a third resistor and a relay switch; The third resistor is connected in parallel with the relay switch. The third resistor is a soft start protection resistor used to protect the rectifier bridge and the inverter circuit when powered on. The relay switch is closed after power-on to short-circuit the third resistor.

4. The universal application circuit for three-phase, two-phase and single-phase resistance sampling according to claim 1 is characterized in that: The bias module includes a fourth resistor, a fifth resistor, a seventh resistor, a twelfth resistor, a seventeenth resistor, a third capacitor and a first amplifier; The fourth resistor and the fifth resistor are connected in series between the first voltage and the ground, the connection point of the fourth resistor and the fifth resistor is connected to the non-inverting input terminal of the first amplifier, the inverting input terminal of the first amplifier is connected to the output terminal of the first amplifier, the output terminal of the first amplifier is connected to the first amplifier circuit through the seventh resistor, the output terminal of the first amplifier is connected to the second amplifier circuit through the twelfth resistor, the output terminal of the first amplifier is connected to the third amplifier circuit through the seventeenth resistor, and the third capacitor is connected to the fifth resistor in parallel.

5. The universal application circuit for three-phase, two-phase and single-phase resistance sampling according to claim 1 is characterized in that: The first amplifying circuit includes a sixth resistor, an eighth resistor, a ninth resistor, a tenth resistor, a fourth capacitor, a fifth capacitor and a second amplifier; One end of the sixth resistor is used to collect the voltage at the U end, the other end of the sixth resistor is connected to the non-inverting input end of the second amplifier, the inverting input end of the second amplifier is grounded through the eighth resistor, the output of the second amplifier is respectively connected to one end of the ninth resistor and one end of the tenth resistor, the other end of the ninth resistor is connected to the inverting input end of the second amplifier, the other end of the tenth resistor serves as the output end of the first amplifier circuit, the fourth capacitor is connected between the non-inverting input end of the second amplifier and the ground, and the fifth capacitor is connected between the other end of the tenth resistor and the ground.

6. The universal application circuit for three-phase, two-phase and single-phase resistance sampling according to claim 1, characterized in that: The application circuit also includes a digital signal processor, which is used to receive the signal from the sampling and amplifying circuit and output a signal to control the permanent magnet synchronous motor.

7. A method, applied to a three-phase, two-phase, or single-phase resistance sampling universal application circuit as claimed in any one of claims 1 to 6, characterized in that: The following steps are involved: According to different solution requirements, the sampling circuit and sampling amplifier circuit can be adjusted without changing the PCB.

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