Chip gold wire detection method, device, electronic equipment and medium

Through image edge detection and linear fitting technology, the problems of low efficiency and high cost of chip gold wire detection are solved, efficient and accurate gold wire abnormality detection are achieved, and chip loss is reduced.

CN112651946BActive Publication Date: 2025-01-17KUNSHAN QIUTI PHOTOELECTRIC TECH CO LTD
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Patent Information

Application Number
CN202011602806.X
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-12-29
Publication Date
2025-01-17
Estimated Expiration
2040-12-29

AI Technical Summary

Technical Problem

The existing chip gold wire detection methods are inefficient and costly, manual detection is prone to misjudgment, and there is a risk of short circuit detection, resulting in chip scrapping.

Method used

By obtaining the chip gold line image after the gold line is drawn, calculating the gradient map, drawing the edge pixel link, performing linear fitting, and performing gold line abnormality detection based on the feature information of the fitted straight line segment to determine whether there is a missed or broken gold line. Defects such as insufficient lines and spacing or repeated lines.

Benefits of technology

It realizes the improvement of chip gold wire detection efficiency at low cost, reduces misjudgment and chip loss, and improves the accuracy of detection results.

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Abstract

The invention discloses a chip gold wire detection method, device, electronic equipment and medium. The method collects a gold wire image of a chip after gold wire punching as a target image, then obtains a gradient map of the target image, and draws an edge pixel link of the target image based on the gradient map to characterize the edge line in the target image. Then, straight line fitting is performed on the edge pixel link to obtain one or more fitted straight line segments, so as to perform gold wire anomaly detection on the chip based on feature information of each fitted straight line segment to obtain a gold wire anomaly detection result, which is beneficial to improving the gold wire detection efficiency of the chip under the premise of ensuring low cost.
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Description

Technical Field

[0001] The present invention relates to the field of chip detection technology, and in particular to a chip gold wire detection method, device, electronic equipment and medium. Background Art

[0002] The inspection of the chip after gold wire punching is a necessary inspection process in the chip production process. If there is an abnormality in the gold wire punching, it will greatly affect the quality of the finished chip and even cause the chip to malfunction. For the inspection of the chip after gold wire punching, the industry currently mainly uses two methods: manual inspection and power-on inspection. Both methods have certain shortcomings. Manual inspection is inefficient, and the human eye is prone to misjudgment due to visual fatigue. Although power-on inspection can be quickly detected, it is costly, and once the gold wire sticks, a short circuit will occur after power is turned on, causing the chip to be scrapped, so there is chip loss. Therefore, there is an urgent need for a chip gold wire detection method that can achieve high efficiency and low cost. Summary of the invention

[0003] The present invention provides a chip gold wire detection method, device, electronic equipment and medium, which are beneficial to improving the gold wire detection efficiency of the chip while ensuring low cost.

[0004] In a first aspect, an embodiment of the present specification provides a chip gold wire detection method, the method comprising: obtaining a gradient map of a target image, wherein the target image is a gold wire image of a chip after gold wire punching; based on the gradient map, drawing an edge pixel link of the target image, the edge pixel link is used to characterize the edge line in the target image; performing straight line fitting on the edge pixel link to obtain one or more fitted straight line segments; based on the feature information of each fitted straight line segment, performing gold wire anomaly detection on the chip to obtain a gold wire anomaly detection result.

[0005] Furthermore, drawing the edge pixel link of the target image based on the gradient map includes: marking the edge feature pixel points in the target image based on the gradient value of each edge pixel point in the gradient map to obtain a plurality of marking points; drawing the edge pixel link of the target image based on the determined marking points and preset path planning rules until all the determined marking points are linked to the drawn edge pixel link, wherein the path planning rules are used to plan the pixel point link path of the edge pixel link.

[0006] Further, the method of drawing an edge pixel link of the target image based on the determined marking points and the preset path planning rules includes: determining an initial marking point from the multiple marking points, determining the direction of the current link drawing path according to the edge direction of the initial marking point, taking the initial marking point as the current guiding pixel point, and executing a linking step: taking the edge pixel point with the largest gradient value among the three adjacent edge pixels of the current guiding pixel point in the direction of the current link drawing path as the next guiding pixel point, and linking the current guiding pixel point to the next guiding pixel point, wherein the edge direction is determined by comparing the horizontal gradient and the vertical gradient of the initial marking point; taking the next guiding pixel point as the current guiding pixel point, if the current guiding pixel point is a marking point, determining the direction of the current link drawing path according to the edge direction of the current guiding pixel point, and if the current guiding pixel point is a non-marking point, determining the direction of the current link drawing path according to the relative position of the current guiding pixel point and the previous guiding pixel point, and repeating the linking step until a preset cutoff condition is met to obtain the current edge pixel link.

[0007] Furthermore, before performing gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment, the method further includes: detecting whether there is a straight line segment with a length less than a preset length threshold in the one or more fitted straight line segments, and if so, removing the straight line segment, and executing the step of performing gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment for the remaining fitted straight line segments, wherein the preset length threshold is determined based on the size of the target image.

[0008] Furthermore, based on the feature information of each fitted straight line segment, the chip is subjected to gold wire anomaly detection to obtain a gold wire anomaly detection result, including: obtaining the position information of each fitted straight line segment; based on the position information of each fitted straight line segment, determining whether there is a gold wire in a preset area in the target image, and if not, determining that no gold wire is applied to the chip.

[0009] Furthermore, based on the characteristic information of each fitting straight line segment, the chip is subjected to gold wire anomaly detection to obtain a gold wire anomaly detection result, and further includes: if there is a gold wire in the preset area, the defect type of the gold wire marked in the chip is determined according to the defect characteristic information of the fitting straight line segment located in the preset area.

[0010] Furthermore, the defect type of the gold wire on the chip is determined according to the defect feature information of the fitted straight line segment located in the preset area, including one or more combinations of the following defect detection methods:

[0011] Acquiring the number of fitted straight line segments in the preset area, and if the number is lower than a preset number threshold, determining that the gold wires on the chip have a missing wire defect;

[0012] Acquire the length of the fitted straight line segment in the preset area, and if there is a straight line segment whose length is not within the preset length range among the fitted straight line segments in the preset area, it is determined that the gold wire on the chip has a broken wire defect;

[0013] The spacing between adjacent straight line segments in the fitted straight line segments located in the preset area is obtained. If the spacing between adjacent straight line segments is greater than a first preset threshold and less than a second preset threshold, it is determined that the gold wires struck in the chip have a defect of insufficient spacing. If the spacing between adjacent straight line segments is less than the first preset threshold, it is determined that the gold wires struck in the chip have a defect of repeated bonding.

[0014] In a second aspect, an embodiment of the present specification provides a chip gold wire detection device, the device comprising: an acquisition module, used to acquire a gradient map of a target image, wherein the target image is a gold wire image of a chip after gold wire punching; a link drawing module, used to draw an edge pixel link of the target image based on the gradient map, wherein the edge pixel link is used to characterize the edge line in the target image; a straight line segment fitting module, used to perform straight line fitting on the edge pixel link to obtain one or more fitted straight line segments; a detection module, used to perform gold wire anomaly detection on the chip based on feature information of each fitted straight line segment to obtain a gold wire anomaly detection result.

[0015] In a third aspect, an embodiment of this specification provides an electronic device, comprising: a processor, a memory, and a computer program stored in the memory, wherein the processor implements the steps of the chip gold wire detection method provided in the first aspect when executing the computer program.

[0016] In a fourth aspect, an embodiment of the present specification provides a computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of the chip gold wire detection method provided in the first aspect above.

[0017] The chip gold wire detection method provided in one embodiment of the present specification collects the gold wire image of the chip after gold wire punching as the target image, then obtains the gradient map of the target image, and based on the gradient map, draws the edge pixel link of the target image to characterize the edge line in the target image, then performs straight line fitting on the edge pixel link to obtain one or more fitted straight line segments, and finally performs gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment to obtain the gold wire anomaly detection result. In this way, the gold wire anomaly detection of the chip is realized by combining image edge detection with straight line fitting, which is beneficial to improve the gold wire detection efficiency of the chip while ensuring low cost compared with traditional manual detection and current detection. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present specification. Also, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0019] Figure 1 A flow chart of a chip gold wire detection method provided in the first aspect of the embodiment of this specification;

[0020] Figure 2 A module block diagram of a chip gold wire detection device provided in the second aspect of the embodiment of this specification;

[0021] Figure 3 A schematic diagram of the structure of an electronic device provided in the third aspect of the embodiments of this specification. DETAILED DESCRIPTION

[0022] In order to better understand the technical solutions provided by the embodiments of this specification, the technical solutions of the embodiments of this specification are described in detail below through the accompanying drawings and specific embodiments. It should be understood that the embodiments of this specification and the specific features in the embodiments are detailed descriptions of the technical solutions of the embodiments of this specification, rather than limitations on the technical solutions of this specification. In the absence of conflict, the embodiments of this specification and the technical features in the embodiments can be combined with each other.

[0023] In a first aspect, an embodiment of the present invention provides a chip gold wire detection method, such as Figure 1 As shown, the method may include the following steps S101 to S104.

[0024] Step S101, obtaining a gradient image of a target image, wherein the target image is a gold wire image of a chip after gold wire punching.

[0025] In the chip production process, after the gold wire punching step is performed, the gold wire image of the chip after gold wire punching can be collected, and the collected gold wire image is used as the target image. By executing the chip gold wire detection method provided by the embodiment of the present invention on the target image, the gold wire abnormality detection of the chip is realized.

[0026] Optionally, in order to obtain a more accurate gradient map, before grayscale gradient processing is performed on the target image, the target image may be preprocessed, for example, filtering may be performed to filter out noise in the target image. It is understandable that there are multiple image filtering algorithms. In this embodiment, it is necessary to perform gold line detection by detecting edge features in the target image. Therefore, the selection of the filtering algorithm needs to consider whether the edge features in the image will be filtered out. In order to better retain the edge features in the image, the present embodiment may use a Gaussian filtering algorithm to filter the target image. Of course, in other embodiments of the present invention, other filtering algorithms that can be applied to remove noise may also be used.

[0027] Next, the gradient and edge direction of the target image can be calculated. The gradient is divided into two directions: horizontal and vertical. As an implementation method, the gradient size G at each pixel in the target image can be obtained by the following formula, thereby obtaining the gradient map corresponding to the target image.

[0028]

[0029]

[0030]

[0031] In equations (1) and (2), I(x, y) is the intensity of the output image at the pixel point (x, y), and G in equation (3) is the gradient amplitude. Optionally, in order to increase the speed of the operation, the gradient G can be calculated using the following equation.

[0032] G=|G x 2 |+|G y 2 | (4)

[0033] Of course, in other embodiments of the present invention, other gradient value calculation methods may also be used, which is not limited here.

[0034] In this embodiment, the edge direction at each pixel can be calculated by comparing the horizontal and vertical gradients at each pixel to obtain an edge direction map. For example, if the horizontal gradient of a pixel is greater than the vertical gradient, that is, G x >G y, and an edge appears at the pixel, the edge direction of the pixel is vertical. Otherwise, the edge direction of the pixel is horizontal.

[0035] It should be noted that, since there are different grayscales in an image, gradients will appear wherever there is a change in grayscale value, but the point where the grayscale value changes is not necessarily the edge of the image. Therefore, in an optional embodiment, after obtaining the gradient map of the target image, it is necessary to traverse each pixel point in the gradient map whose gradient value is not 0, and determine the pixel point whose gradient value is greater than or equal to the preset gradient threshold as the edge pixel point, that is, the pixel point corresponding to the edge feature in the target image; delete the pixel point whose gradient value is less than the preset gradient threshold. Then perform the following step S102.

[0036] Step S102: Draw edge pixel links of the target image based on the gradient map, where the edge pixel links are used to represent edge lines in the target image.

[0037] The gradient map can reflect the grayscale changes in a certain neighborhood of each pixel. Pixels with relatively large gradient values ​​are more likely to correspond to edge features.

[0038] As an implementation method, based on the gradient map, the process of drawing the edge pixel link of the target image may include: based on the gradient value of each edge pixel point in the gradient map, marking the edge feature pixel points in the target image to obtain multiple marking points; based on the determined marking points and the preset path planning rules, drawing the edge pixel link of the target image until the determined marking points are all linked to the drawn edge pixel link; wherein the path planning rules are used to plan the pixel point link path of the edge pixel link. In this embodiment, the edge feature pixel point can be a local gradient threshold pixel point on the target image, that is, a local gradient extreme point. The edge pixels in the target image can be traversed, and the local gradient threshold pixel points therein can be marked to obtain multiple marking points.

[0039] Currently, in other embodiments of the present invention, other edge detection methods may also be used to obtain edge pixel links.

[0040] The following takes the drawing process of the first edge pixel link as an example to illustrate the process of drawing the edge pixel link of the target image based on the determined marking points and the preset path planning rules.

[0041] First, an initial marking point is determined from multiple marking points. As an optional implementation, in order to speed up link drawing as much as possible and further improve the efficiency of golden line detection, the first marking point determined in the process of traversing edge pixels in the target image can be used as the initial marking point.

[0042] Then, starting from the initial marking point, the following link drawing process is performed:

[0043] According to the edge direction of the initial marking point, the direction of the current link drawing path is determined. The edge direction is determined by comparing the horizontal gradient and the vertical gradient of the initial marking point. When the horizontal gradient of the initial marking point is greater than the vertical gradient, that is, G x >G y , the edge direction of the initial marking point is vertical. Otherwise, the edge direction of the initial marking point is horizontal. When the edge direction of the initial marking point is horizontal, the direction of the current link drawing path can be horizontal to the left or horizontal to the right; when the edge direction of the initial marking point is vertical, the direction of the current link drawing path can be vertically upward or vertically downward.

[0044] Take the initial marking point as the current guide pixel point and execute the linking step: take the edge pixel point with the largest gradient value among the three adjacent edge pixels of the current guide pixel point in the direction of the current link drawing path as the next guide pixel point, and link the current guide pixel point to the next guide pixel point.

[0045] It can be understood that the edge pixel points adjacent to the current guide pixel point include the edge pixel points in the gradient map that are located in the neighborhood of the current guide pixel point 8. For example, assuming that the marking point (x, y) is used as the initial marking point, if the current link drawing path direction is to the left, the three adjacent edge pixel points of the initial marking point in the current link drawing path direction are: (x-1, y-1), (x-1, y), (x-1, y+1); if the current link drawing path direction is to the right, the three adjacent edge pixel points of the initial marking point in the current link drawing path direction are (x+1, y-1), (x+1, y), (x+1, y+1); if the current link drawing path direction is upward, the three adjacent edge pixel points of the initial marking point in the current link drawing path direction are (x-1, y-1), (x, y-1), (x+1, y-1); if the current link drawing path direction is downward, the three adjacent edge pixel points of the initial marking point in the current link drawing path direction are (x-1, y+1), (x, y+1), (x+1, y+1). That is, the orientations of the three adjacent edge pixels relative to the initial marking point are consistent with the direction of the current link drawing path in a general direction (up, down, left or right).

[0046] The next guiding pixel point is used as the current guiding pixel point. If the current guiding pixel point is a marked point, the direction of the current link drawing path is determined according to the edge direction of the current guiding pixel point. If the current guiding pixel point is a non-marked point, the direction of the current link drawing path is determined according to the relative position of the current guiding pixel point and the previous guiding pixel point. Based on the re-determined current guiding pixel point and the current link drawing path direction, the linking step is repeated until the preset cutoff condition is met to obtain the current edge pixel link. When the current guiding pixel point is a non-marked point, for example, if the current guiding pixel point is in the horizontal left direction of the previous guiding pixel point, the direction of the current link drawing path is determined to be horizontal to the left, if the current guiding pixel point is in the upper left of the previous guiding pixel point, the direction of the current link drawing path is determined to be vertically upward, and if the current guiding pixel point is in the lower left of the previous guiding pixel point, the direction of the current link drawing path is determined to be vertically downward.

[0047] The following is a detailed description of the process of drawing edge pixel links.

[0048] Assume that pixel A is the initial marking point. The edge direction at the starting marking point is horizontal, so it will be executed horizontally. You can move left or right here, and the method is the same. Assuming that when moving to the left, since the edge here is horizontal, the coordinates of the three edge pixels adjacent to it in the horizontal left direction are B1, B2, and B3 respectively. Assuming that the gradient value of the position B2 is the largest, B2 is used as the current guide pixel point. Since B2 is a non-marked point, continue to the left, and so on, and link the non-marked points C and D as guide pixels in turn.

[0049] When the link drawing reaches pixel point E, since E is a marking point, it is assumed that the edge direction at this position is still horizontal to the left, so the gradient values ​​of the three edge pixels adjacent to E in the horizontal left direction: F1, F2 and F3 are checked. Assuming that the gradient value at F3 is the largest, F3 continues to be used as the current guide pixel point, and F3 is located at the lower left of E, so the direction of the current link drawing path changes from horizontal to vertical downward. At this time, stop moving horizontally to the left and start moving vertically downward. Check the gradients of the three adjacent edge pixels of pixel F3 in the downward direction: G1, G2 and G3, and select the one with the largest gradient value as the next guide pixel point, and so on, until the preset cutoff condition is met, indicating that the current edge pixel link is drawn. The current edge pixel link obtained includes: A→B2→C→D→E→F3→….

[0050] Among them, the preset cutoff condition is used to detect whether the link of the current edge pixel link is completed. Specifically, the preset cutoff condition may include: the first sub-condition: the edge pixel points in the direction of the current link drawing path are linked, and the second sub-condition: the initial marking point is linked again. For example, assuming that the current guide pixel point is (x, y), and the direction of the current link drawing path is horizontal to the left, if there is no edge pixel point on its left, it is determined that the edge pixel points in the direction of the current link drawing path are linked. When any one of the first sub-condition and the second sub-condition is met, it is determined that the preset cutoff condition is met, that is, the current edge pixel link is linked.

[0051] It is understandable that the drawn edge pixel link may be one or more. After each edge pixel link is drawn, it is necessary to detect whether all the determined marking points are linked to the marking points of the drawn edge pixel link. If not, an initial marking point is re-determined from the remaining unlinked marking points, and the above link drawing process is repeated until all the determined marking points are linked to the drawn edge pixel link, and it is determined that the link drawing process is completed.

[0052] The edge pixel link drawn by the above link drawing process is composed of continuous edge pixel points, and the width of the obtained edge map is one pixel, which can more clearly and accurately reflect the edge lines, which may be gold lines or other edge features. In addition, the drawing process is simple, without the need to use complex algorithms, and the drawing of edge pixel links can be quickly realized, which is conducive to further improving the efficiency of gold line detection.

[0053] After all edge pixel links in the target image are drawn, the following step S103 can be performed for each edge pixel link to segment the continuous edge pixel link into one or more straight line segments, which is conducive to more intuitively reflecting the gold wires in the chip.

[0054] Step S103: performing straight line fitting on the edge pixel link to obtain one or more fitting straight line segments.

[0055] It is understandable that there are many methods for straight line fitting. Taking the least squares method as an example, when using the least squares method to estimate parameters, it is necessary to make the observed value y i The weighted sum of squares of deviations from the fitted value is minimized. That is to say, for straight line fitting with the same accuracy, the value of the following formula needs to be minimized.

[0056]

[0057] This method is called least squares straight line fitting. In the final analysis, it is to find the minimum value of the above formula (5) to determine the straight line fitting coefficients k and b. Of course, in addition to the least squares method, other straight line fitting methods can also be used, such as the gradient descent method, etc.

[0058] In this embodiment, the edge pixel link drawn by the above-mentioned link drawing method is composed of continuous edge pixel points, that is, edge pixel points adjacent to each other. Compared with directly fitting a straight line to discrete marking points, it is beneficial to improve the accuracy of the fitted straight line segment, thereby improving the accuracy of the anomaly detection result.

[0059] Considering that there may be impurities on the chip, some fitted straight line segments may be formed under the influence of these impurities and have nothing to do with the gold wire. Therefore, in an optional embodiment, before the following step S104, the chip detection method provided in this embodiment may also include: detecting whether there are straight line segments with a length less than a preset length threshold among all the fitted straight line segments obtained in step S103, if so, removing the straight line segment, and executing step S104 for the remaining fitted straight line segments. Among them, the preset length threshold is determined based on the size of the target image. These short straight lines with a length less than the preset length threshold are straight line segments formed by the influence of impurities on the chip and have nothing to do with the gold wire. Removing these straight line segments is conducive to improving the accuracy of the fitted straight line segments, thereby improving the accuracy of the abnormality detection results.

[0060] It is understandable that in the straight line fitting process, when the error exceeds a certain threshold, a new line segment will be generated. Assuming that the error threshold is 1, the algorithm recursively processes the remaining pixels of the edge pixel link until all pixels in the edge pixel link are processed. In one embodiment, the fitted straight line can be verified by the minimum line segment length calculated by the Helmholtz criterion to remove short straight lines. A cleaner and smoother fitted straight line segment can be obtained. Specifically, the following method can be used to determine the preset length threshold for straight line verification.

[0061] In an image of size N*M, suppose L is a line segment in the image, l is a part of line segment L, and suppose the length of line segment l is n pixels, then at least k points in line segment l have the same direction as line segment L. The NFA (Number of False Alarms) of L is defined as:

[0062]

[0063] Among them, (NM) 2 Represents the number of potential line segments in an N*M image. The reason is (NM) 2This is because a line segment has two endpoints, and each endpoint can be located at any of the N*M pixels in the image, so there are a total of N 2 ×M 2 =(NM) 2 Line segments. In formula (6), p is the precision of the line segment direction. After verification, it was determined that the number of n should not exceed 8, so it is assumed that two points (or a point and a line segment) will have the same direction within π / 8=22.5°. This corresponds to 8 different angular directions, so the precision of the line segment direction is p=1 / 8=0.125.

[0064] To make the line verification meaningful, NFA(n,k)≤ε must be satisfied. Experiments have shown that the value of ε can be set to 1, which can effectively detect every wrongly detected line in the image. And to make the fitted line segment meaningful, n=k must be set. At this time, equation (6) is transformed into equation (7).

[0065] NAF(n,n)=N 2 M 2 p n (1-p) n-n =N 2 M 2 p n ≤1 (7)

[0066] According to formula (7), the calculation formula of the line segment length n can be obtained as follows:

[0067]

[0068] It can be calculated based on the image size and the preset p value The value of , that is, the minimum length of the fitting line segment in the Helmholtz principle is Therefore, the straight line segments fitted in step S103 with lengths less than n cannot pass the straight line verification and will be eliminated, while those greater than or equal to n will be retained. Of course, if the target image is a square, that is, the number of row and column pixels is equal, that is, M=N, then the minimum line segment length n can be

[0069] Step S104: Based on the characteristic information of each fitting straight line segment, the chip is subjected to gold wire anomaly detection to obtain a gold wire anomaly detection result.

[0070] After the processing flow before step S104 has been completed and the fitting straight line segments in the target image are determined, the gold wire anomaly detection result of the chip can be obtained by detecting these fitting straight line segments.

[0071] Specifically, the characteristic information of the fitted straight line segment may include position information. The above process of performing gold wire anomaly detection on the chip based on the characteristic information of each fitted straight line segment and obtaining the gold wire anomaly detection result may include: obtaining the position information of each fitted straight line segment; based on the position information of each fitted straight line segment, determining whether there is a gold wire in a preset area in the target image, and if there is no gold wire in the preset area, it is determined that the chip is not marked with a gold wire. Among them, the preset area is a pre-set area in the chip that needs to be marked with a gold wire. It can be understood that if the obtained fitted straight line segments are all outside the preset area, it is determined that there is no gold wire in the preset area in the target image. At this time, the gold wire anomaly detection result of the chip is: the chip is not marked with a gold wire; if there is more than one straight line segment in the obtained fitted straight line segments located in the preset area, it is determined that there is a gold wire in the preset area, indicating that the chip is marked with a gold wire.

[0072] Furthermore, the characteristic information of the fitted straight line segment may also include defect characteristic information. If there is a gold wire in the preset area, the defect type of the gold wire in the chip may be determined based on the defect characteristic information of the fitted straight line segment in the preset area. In this embodiment, the specific defect type is determined based on the defect type that occurs in the actual application scenario, and the defect characteristic information is determined based on the specific defect type. It should be noted that when it is determined that there is no defect in the gold wire in the chip, it can be considered that the gold wire anomaly detection of the chip is qualified.

[0073] Specifically, the defect types of gold wire in the chip can include one or more combinations of the following defects:

[0074] The first type: missed wire defect. At this time, the above defect feature information includes the number of fitted straight line segments located in the preset area. The detection process specifically includes: obtaining the number of fitted straight line segments located in the preset area. If the number is lower than the preset number threshold, it is determined that the gold wires in the chip have missed wire defects. Otherwise, it is determined that there are no missed wire defects. Among them, the preset number threshold is set according to the actual number of gold wires that need to be punched. At this time, the gold wire abnormality detection result of the chip includes: there is a missed wire defect.

[0075] The second type: broken wire defect. At this time, the above-mentioned defect characteristic information includes the length of the fitted straight line segment located in the preset area. The detection process specifically includes: obtaining the length of the fitted straight line segment located in the preset area. If there is a straight line segment whose length is not within the preset length range among the fitted straight line segments located in the preset area, it is determined that the gold wire punched in the chip has a broken wire defect. Otherwise, it is determined that there is no broken wire defect. Among them, the preset length range is set according to the actual length range of the gold wire. It can be understood that when the gold wire is actually punched, the length of the gold wire is within a certain range. If it does not reach this range, it means that the wire is broken. At this time, the abnormal gold wire detection results of the chip include: the presence of a broken wire defect.

[0076] The third type: insufficient spacing or repeated wire bonding. At this time, the above-mentioned defect feature information includes the spacing between adjacent straight line segments in the fitted straight line segment located in the preset area. The detection process specifically includes: obtaining the spacing between adjacent straight line segments in the fitted straight line segment located in the preset area. If there is a spacing between adjacent straight line segments greater than the first preset threshold and less than the second preset threshold, it is determined that the gold wires in the chip have a defect of insufficient spacing. At this time, the gold wire abnormality detection result of the chip includes: there is a defect of insufficient spacing between gold wires; if there is a spacing between adjacent straight line segments less than the first preset threshold, it is determined that there is a defect of repeated wire bonding in the gold wires in the chip. At this time, the gold wire abnormality detection result of the chip includes: there is a defect of repeated wire bonding. If both exceed the second preset threshold, it is determined that there is no defect of insufficient spacing and repeated wire bonding. Among them, the first preset threshold is less than the second preset threshold, and the first preset threshold is close to 0, which is specifically determined based on the experience of actual gold wire bonding, and the second preset threshold is set according to the spacing requirements of adjacent gold wires when actually bonding gold wires.

[0077] For example, when the above three defect types need to be detected, if none of the above three defects exist, it is determined that the gold wire in the chip has no defects.

[0078] In summary, the chip gold line detection method provided by the embodiment of the present invention realizes the gold line abnormality detection of the chip by combining image edge detection with straight line fitting. Compared with the traditional manual detection and current detection, it is beneficial to improve the gold line detection efficiency of the chip while ensuring low cost. In addition, the edge pixel link drawing process adopted is simple, and there is no need to adopt a complex edge detection algorithm, which is conducive to speeding up the drawing of edge lines and further improving the gold line detection efficiency.

[0079] In a second aspect, based on the same inventive concept as the chip gold wire detection method provided in the first aspect embodiment, the present invention also provides a chip gold wire detection device, such as Figure 2 As shown, the chip gold wire detection device 20 includes:

[0080] An acquisition module 21 is used to acquire a gradient map of a target image, wherein the target image is a gold wire image of a chip after gold wire punching;

[0081] A link drawing module 22, used for drawing edge pixel links of the target image based on the gradient map, wherein the edge pixel links are used for representing edge lines in the target image;

[0082] A straight line segment fitting module 23, used to perform straight line fitting on the edge pixel link to obtain one or more fitted straight line segments;

[0083] The detection module 24 is used to perform gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment to obtain a gold wire anomaly detection result.

[0084] As an optional embodiment, the link drawing module 22 includes: a marking submodule 221, which is used to mark the edge feature pixel points in the target image based on the gradient value of each edge pixel point in the gradient map to obtain multiple marking points; a drawing submodule 222, which is used to draw the edge pixel link of the target image based on the determined marking points and preset path planning rules until the determined marking points are all linked to the drawn edge pixel link; wherein the path planning rules are used to plan the pixel point link path of the edge pixel link.

[0085] As an optional embodiment, the drawing submodule 222 is used for:

[0086] Determine an initial marking point from the multiple marking points, determine the direction of the current link drawing path according to the edge direction of the initial marking point, take the initial marking point as the current guide pixel point, and perform a linking step: take the edge pixel point with the largest gradient value among the three adjacent edge pixel points of the current guide pixel point in the direction of the current link drawing path as the next guide pixel point, and link the current guide pixel point to the next guide pixel point, wherein the edge direction is determined by comparing the horizontal direction gradient and the vertical direction gradient of the initial marking point;

[0087] The next guiding pixel point is used as the current guiding pixel point. If the current guiding pixel point is a marking point, the direction of the current link drawing path is determined according to the edge direction of the current guiding pixel point. If the current guiding pixel point is a non-marking point, the direction of the current link drawing path is determined according to the relative position of the current guiding pixel point and the previous guiding pixel point. The linking step is repeated until the preset cutoff condition is met to obtain the current edge pixel link.

[0088] As an optional embodiment, the above-mentioned chip gold wire detection device 20 also includes: a straight line verification module, used to detect whether there is a straight line segment with a length less than a preset length threshold in the one or more fitted straight line segments. If so, the straight line segment is removed, and for the remaining fitted straight line segments, the step of performing gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment is executed, wherein the preset length threshold is determined based on the size of the target image.

[0089] As an optional embodiment, the above-mentioned detection module 24 is used to: obtain the position information of each fitted straight line segment; based on the position information of each fitted straight line segment, determine whether there is a gold wire in a preset area in the target image, and if not, determine that no gold wire is marked in the chip.

[0090] As an optional embodiment, the detection module 24 is further used to: if there is a gold wire in the preset area, determine the defect type of the gold wire on the chip according to defect feature information of the fitted straight line segment in the preset area.

[0091] As an optional embodiment, the detection module 24 may adopt one or more combinations of the following defect detection methods:

[0092] The first method is to obtain the number of fitted straight line segments in the preset area, and if the number is lower than a preset number threshold, it is determined that the gold wires in the chip have a missing wire defect;

[0093] The second method: obtaining the length of the fitted straight line segment in the preset area, and if there is a straight line segment whose length is not within the preset length range among the fitted straight line segments in the preset area, it is determined that the gold wire on the chip has a broken wire defect, wherein the preset length range is set according to the length range of the actual gold wire;

[0094] The third method: obtaining the spacing between adjacent straight line segments in the fitted straight line segments located in the preset area; if the spacing between adjacent straight line segments is greater than the first preset threshold and less than the second preset threshold, it is determined that the gold wires on the chip have a defect of insufficient spacing; if the spacing between adjacent straight line segments is less than the first preset threshold, it is determined that the gold wires on the chip have a defect of repeated bonding.

[0095] It should be noted that the above modules can be implemented by software code or by hardware such as integrated circuit chips.

[0096] It should also be noted that for the specific process of each of the above modules realizing their respective functions, please refer to the specific content described in the above method embodiment, which will not be repeated here.

[0097] In a third aspect, based on the same inventive concept as the chip gold wire detection method provided in the above embodiment, the embodiment of this specification also provides an electronic device, for example, the electronic device can be a terminal device or a server. Figure 3 As shown, the electronic device includes a memory 304, one or more processors 302, and a computer program stored in the memory 304 and executable on the processor 302. When the processor 302 executes the program, the steps of any embodiment of the chip gold wire detection method provided in the first aspect above are implemented.

[0098] Among them, Figure 3 In the embodiment of the present invention, a bus architecture (represented by bus 300) is shown, which may include any number of interconnected buses and bridges, and bus 300 links various circuits including one or more processors represented by processor 302 and memory represented by memory 304. Bus 300 may also link various other circuits such as peripherals, voltage regulators, and power management circuits, which are well known in the art and are therefore not further described herein. Bus interface 305 provides an interface between bus 300 and receiver 301 and transmitter 303. Receiver 301 and transmitter 303 may be the same element, namely a transceiver, providing a unit for communicating with various other devices over a transmission medium. Processor 302 is responsible for managing bus 300 and general processing, while memory 304 may be used to store data used by processor 302 when performing operations.

[0099] Understandably, Figure 3 The structure shown is for illustration only. The electronic device provided by the embodiment of the present invention may also include Figure 3 More or fewer components as shown, or with Figure 3 Different configurations are shown. Figure 3 Each component shown in the figure can be implemented by hardware, software or a combination thereof.

[0100] In the fourth aspect, based on the same inventive concept as the chip gold wire detection method provided in the aforementioned embodiment, the embodiment of this specification also provides a computer-readable storage medium on which a computer program is stored, which, when executed by a processor, implements the steps of any embodiment of the chip gold wire detection method provided in the first aspect above.

[0101] This specification is described with reference to the flowcharts and / or block diagrams of the methods, devices, and computer program products according to the embodiments of this specification. It should be understood that each process and / or block in the flowchart and / or block diagram, as well as the combination of the processes and / or blocks in the flowchart and / or block diagram, can be implemented by computer program instructions. These computer program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, an embedded processor, or other programmable data processing device to produce a machine, so that the instructions executed by the processor of the computer or other programmable data processing device generate instructions for implementing the processes in the flowchart and / or block diagram. Figure 1 A process or multiple processes and / or boxes Figure 1 A device that has the functions specified in one or more boxes.

[0102] These computer program instructions may also be stored in a computer-readable memory that can direct a computer or other programmable data processing device to work in a specific manner, so that the instructions stored in the computer-readable memory produce an article of manufacture including an instruction device, which implements the process Figure 1 A process or multiple processes and / or boxes Figure 1 A function specified in one or more boxes.

[0103] These computer program instructions can also be loaded onto a computer or other programmable data processing device so that a series of operating steps are executed on the computer or other programmable device to produce a computer-implemented process, thereby providing instructions for implementing the process. Figure 1 A process or multiple processes and / or boxes Figure 1 The steps for the functions specified in one or more boxes.

[0104] In this article, relational terms such as first and second, etc. are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply that there is any such actual relationship or order between these entities or operations. Moreover, the terms "include", "comprise" or any other variant thereof are intended to cover non-exclusive inclusion, so that the process, method, article or equipment including a series of elements not only includes those elements, but also includes other elements not explicitly listed, or also includes elements inherent to such process, method, article or equipment. In the absence of more restrictions, the elements limited by the statement "comprise one..." do not exclude the existence of other identical elements in the process, method, article or equipment including the elements. The term "plurality" means more than two, including two or more than two situations.

[0105] Although the preferred embodiments of this specification have been described, those skilled in the art may make additional changes and modifications to these embodiments once they have learned the basic creative concept. Therefore, the appended claims are intended to be interpreted as including the preferred embodiments and all changes and modifications that fall within the scope of this specification.

[0106] Obviously, those skilled in the art can make various changes and modifications to this specification without departing from the spirit and scope of this specification. Thus, if these modifications and variations of this specification fall within the scope of the claims of this specification and their equivalents, this specification is also intended to include these modifications and variations.

Claims

1. A chip gold wire detection method, characterized in that: The method comprises: Acquire a gradient map of a target image, wherein the target image is a gold wire image of a chip after gold wire punching, and the gradient map includes the grayscale gradient size at each pixel point in the target image; Based on the gradient map, drawing an edge pixel link of the target image, wherein the edge pixel link is used to represent an edge line in the target image; Performing straight line fitting on the edge pixel link to obtain one or more fitting straight line segments; Based on the feature information of each fitting straight line segment, the chip is subjected to gold wire anomaly detection to obtain a gold wire anomaly detection result, including: obtaining the position information of each fitting straight line segment, and determining whether there is a gold wire in a preset area in the target image based on the position information of each fitting straight line segment, wherein if all the obtained fitting straight line segments are outside the preset area, it is determined that there is no gold wire in the preset area in the target image, and the gold wire anomaly detection result is: no gold wire is applied to the chip, and if more than one straight line segment among the obtained fitting straight line segments is located in the preset area, it is determined that there is a gold wire in the preset area, and the preset area is a preset area in the chip where the gold wire needs to be applied; Among them, based on the gradient map, drawing the edge pixel link of the target image includes: traversing each pixel point whose gradient value is not 0 in the gradient map, and determining the pixel point whose gradient value is greater than or equal to the preset gradient threshold as the edge pixel point; based on the gradient value of each edge pixel point in the gradient map, marking the edge feature pixel points in the target image to obtain multiple marking points; based on the determined marking points and the preset path planning rules, drawing the edge pixel link of the target image until the determined marking points are all linked to the drawn edge pixel link, wherein the path planning rules are used to plan the pixel point link path of the edge pixel link.

2. The method according to claim 1, characterized in that Drawing edge pixel links of the target image based on the determined marking points and the preset path planning rules includes: Determine an initial marking point from the multiple marking points, determine the direction of the current link drawing path according to the edge direction of the initial marking point, take the initial marking point as the current guide pixel point, and perform a linking step: take the edge pixel point with the largest gradient value among the three adjacent edge pixel points of the current guide pixel point in the direction of the current link drawing path as the next guide pixel point, and link the current guide pixel point to the next guide pixel point, wherein the edge direction is determined by comparing the horizontal direction gradient and the vertical direction gradient of the initial marking point; The next guiding pixel point is used as the current guiding pixel point. If the current guiding pixel point is a marking point, the direction of the current link drawing path is determined according to the edge direction of the current guiding pixel point. If the current guiding pixel point is a non-marking point, the direction of the current link drawing path is determined according to the relative position of the current guiding pixel point and the previous guiding pixel point. The linking step is repeated until the preset cutoff condition is met to obtain the current edge pixel link.

3. The method according to claim 1, characterized in that Before performing gold wire anomaly detection on the chip based on the characteristic information of each fitted straight line segment, the method further includes: Detect whether there is a straight line segment with a length less than a preset length threshold in the one or more fitted straight line segments. If so, remove the straight line segment, and execute the step of performing gold wire anomaly detection on the chip based on the feature information of each fitted straight line segment for the remaining fitted straight line segments, wherein the preset length threshold is determined based on the size of the target image.

4. The method according to claim 1, characterized in that: The step of performing gold line anomaly detection on the chip based on the feature information of each fitting straight line segment to obtain a gold line anomaly detection result further includes: If there is a gold wire in the preset area, the defect type of the gold wire on the chip is determined according to defect feature information of the fitting straight line segment located in the preset area.

5. The method according to claim 4, characterized in that Determining the defect type of the gold wire on the chip according to the defect feature information of the fitted straight line segment located in the preset area includes one or more combinations of the following defect detection methods: Acquiring the number of fitted straight line segments in the preset area, and if the number is lower than a preset number threshold, determining that the gold wires on the chip have a missing wire defect; Acquire the length of the fitted straight line segment in the preset area, and if there is a straight line segment whose length is not within the preset length range among the fitted straight line segments in the preset area, it is determined that the gold wire on the chip has a broken wire defect; The spacing between adjacent straight line segments in the fitted straight line segments located in the preset area is obtained. If the spacing between adjacent straight line segments is greater than a first preset threshold and less than a second preset threshold, it is determined that the gold wires struck in the chip have a defect of insufficient spacing. If the spacing between adjacent straight line segments is less than the first preset threshold, it is determined that the gold wires struck in the chip have a defect of repeated bonding.

6. A chip gold wire detection device, characterized in that: The device comprises: An acquisition module, used to acquire a gradient map of a target image, wherein the target image is a gold wire image of a chip after gold wire punching, and the gradient map includes a grayscale gradient size at each pixel point in the target image; A link drawing module, used for drawing edge pixel links of the target image based on the gradient map, wherein the edge pixel links are used for representing edge lines in the target image; A straight line segment fitting module, used to perform straight line fitting on the edge pixel link to obtain one or more fitted straight line segments; A detection module, for performing gold wire anomaly detection on the chip based on feature information of each fitting straight line segment, and obtaining a gold wire anomaly detection result, including: obtaining position information of each fitting straight line segment, and determining whether there is a gold wire in a preset area in the target image based on the position information of each fitting straight line segment, wherein if all the obtained fitting straight line segments are outside the preset area, it is determined that there is no gold wire in the preset area in the target image, and the gold wire anomaly detection result is: no gold wire is marked in the chip, and if more than one straight line segment among the obtained fitting straight line segments is located in the preset area, it is determined that there is a gold wire in the preset area, and the preset area is a preset area in the chip that needs to be marked with a gold wire; Among them, based on the gradient map, drawing the edge pixel link of the target image includes: traversing each pixel point whose gradient value is not 0 in the gradient map, and determining the pixel point whose gradient value is greater than or equal to the preset gradient threshold as the edge pixel point; based on the gradient value of each edge pixel point in the gradient map, marking the edge feature pixel points in the target image to obtain multiple marking points; based on the determined marking points and the preset path planning rules, drawing the edge pixel link of the target image until the determined marking points are all linked to the drawn edge pixel link, wherein the path planning rules are used to plan the pixel point link path of the edge pixel link.

7. An electronic device, characterized in that: include: A processor, a memory, and a computer program stored in the memory, wherein the processor implements the steps of the method according to any one of claims 1 to 5 when executing the computer program.

8. A computer-readable storage medium, characterized in that: A computer program is stored thereon, and when the program is executed by a processor, the steps of the method according to any one of claims 1 to 5 are implemented.

Citation Information

Patent Citations

  • Gold thread detection method for a packaged chip

    CN111429408A

  • Visual edge inspection method based on EDLines and LSM

    CN111754422A