Interrupt response method, device and readable storage medium

Abstract

The embodiment of the present invention provides an interrupt response method, device and readable storage medium. The interrupt response method of the embodiment of the present invention, by turning on the interrupt enable of the status register of the central processing unit CPU, configuring the interrupt entry address and turning on the interrupt enable of the functional module of the CPU, so that after an interrupt occurs in the functional module of the CPU, the functional module where the interrupt occurs will report its own interrupt status to the CPU, and the CPU can determine which functional module has been interrupted, that is, it can determine that the target functional module has been interrupted, and can immediately jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module to respond to the interrupt generated by the target functional module. Thereby, a rapid response to the interrupt generated by the target functional module can be achieved.

Description

Technical Field

[0001] The present invention relates to the field of computer technology, and in particular to an interrupt response method, device and readable storage medium. Background Art

[0002] In existing computer systems, the central processing unit (CPU) serves as the system control center and needs to manage multiple functional modules in the system, including serial port modules, controller area network (CAN) modules, etc. For example, when the CPU is executing an application program normally, if the serial port module receives data, the CPU will be interrupted and an interrupt will be generated. In this case, the CPU should theoretically pause the executing application program and respond to the interrupt immediately.

[0003] At present, the implementation method of interrupt response in the boot program of the MIPS platform is: encapsulate the interrupt query function and the application main function into a loop function. After the boot program is started, the CPU executes the application main function in the loop function, and then executes the interrupt query function to check whether the interrupt status register of each functional module is set. If the interrupt status register of a functional module is set, the interrupt service program corresponding to the functional module is executed. After the interrupt service program is processed, it returns to execute the application main function. After the application main function is executed, the interrupt query function is executed again to check whether the interrupt status register of each functional module is set, and the cycle repeats.

[0004] Therefore, the MIPS platform boot program uses a method of looping through the interrupt status register to respond to interrupts. Although the interrupt response function can be completed, the interrupt cannot be responded to in time and too many useless queries will reduce the efficiency of the loop function. Summary of the invention

[0005] In view of the above problems, embodiments of the present invention are proposed to provide an interrupt response method, device and readable storage medium that overcome the above problems or at least partially solve the above problems.

[0006] A first aspect of the present invention provides an interrupt response method, comprising:

[0007] Enable the interrupt of the status register of the central processing unit CPU;

[0008] Configure the interrupt entry address and enable the interrupt of each functional module of the CPU;

[0009] When receiving the interrupt status sent by the target functional module in each functional module, jump to the interrupt entry address and call the interrupt processing function corresponding to the target functional module;

[0010] The interrupt status is information sent to the CPU when the target functional module receives an interrupt trigger signal.

[0011] A second aspect of the present invention provides an interrupt response device, comprising:

[0012] The enable module is used to enable the interrupt enable of the status register of the central processing unit CPU;

[0013] A configuration module, used to configure an interrupt entry address and enable interrupts of each functional module of the CPU;

[0014] A processing module, configured to jump to the interrupt entry address and call an interrupt processing function corresponding to the target functional module when receiving an interrupt status sent by the target functional module in each functional module;

[0015] The interrupt status is information sent to the CPU when the target functional module receives an interrupt trigger signal.

[0016] According to a third aspect of the present invention, a computer-readable storage medium is provided, on which a computer program is stored. When the computer program is executed by a processor, the steps of any of the above-mentioned interrupt response methods are implemented.

[0017] According to a fourth aspect of the present invention, an interrupt response device is provided, comprising a processor, a memory, and a computer program stored in the memory and executable on the processor, wherein when the computer program is executed by the processor, the steps of the interrupt response method as described in any one of the above items are implemented.

[0018] The embodiments of the present invention include the following advantages:

[0019] The interrupt response method, device and readable storage medium in the embodiment of the present invention do not need to wait until the main function of the application program is executed before executing the interrupt query function to check whether an interrupt has occurred in each functional module. Instead, the interrupt enable of the status register of the central processing unit CPU is turned on, the interrupt entry address is configured and the interrupt enable of the functional module of the CPU is turned on. In this way, after an interrupt occurs in the functional module of the CPU, the functional module where the interrupt occurs will report its own interrupt status to the CPU, and the CPU can determine which functional module has been interrupted, that is, it can determine that the target functional module has been interrupted, and can immediately jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module to respond to the interrupt generated by the target functional module. Thus, a rapid response to the interrupt generated by the target functional module can be achieved.

[0020] The above description is only an overview of the technical solution of the present invention. In order to more clearly understand the technical means of the present invention, it can be implemented according to the contents of the specification. In order to make the above and other purposes, features and advantages of the present invention more obvious and easy to understand, the specific implementation methods of the present invention are listed below. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Various other advantages and benefits will become apparent to those of ordinary skill in the art by reading the detailed description of the preferred embodiments below. The accompanying drawings are only for the purpose of illustrating the preferred embodiments and are not to be considered as limiting the present invention. Moreover, the same reference symbols are used throughout the accompanying drawings to represent the same components. In the accompanying drawings:

[0022] Figure 1 A flowchart of an interrupt response method provided by an embodiment of the present invention;

[0023] Figure 2 is a flowchart of another interrupt response method provided by an embodiment of the present invention;

[0024] Figure 3 A schematic diagram of the structure of an interrupt response device provided by an embodiment of the present invention;

[0025] Figure 4 A schematic diagram of the structure of another interrupt response device provided by an embodiment of the present invention. DETAILED DESCRIPTION

[0026] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, the present invention is further described in detail below with reference to the accompanying drawings and specific embodiments.

[0027] It should be understood that the specific embodiments described herein are only used to explain the present invention, are only a part of the embodiments of the present invention, rather than all the embodiments, and are not used to limit the present invention.

[0028] Reference Figure 1 , Figure 1 The present invention provides a flowchart of the steps of an interrupt response method provided by an embodiment of the present invention. The interrupt response method provided by the present embodiment is applicable to the situation where the CPU can promptly respond to the interruption of the functional module of the CPU after the boot program of the microprocessor without internal interlocked piped stages (MIPS) platform is started. The interrupt response method provided by the present embodiment is executed by an interrupt response device, and the interrupt response device can be deployed in a computer system. The interrupt response method may include the following steps:

[0029] S110, turn on the interrupt enable of the CPU status register.

[0030] To enable the interruption enable of the CPU status register, the BEV bit of the status register of the MIPS architecture CPU can be set to 1 to enable the interruption enable of the CPU status register. Enabling the interruption enable of the status register in the CPU is a preparatory step for enabling the interruption enable of the functional modules of the CPU. When the interruption status register of any functional module is set, the status register of the CPU can change the status of its own specified control bit (other bits except the BEV bit) accordingly.

[0031] S120, configuring the interrupt entry address and turning on the interrupt enable of the CPU functional module.

[0032] It should be noted that the interrupt entry address can be configured in a read-only memory (ROM). The functional modules of the CPU include serial port modules, CAN modules and other functional modules. Before an interrupt occurs, an interrupt entry address is configured and the interrupt enable of the functional module of the CPU is turned on (the configured interrupt entry address is the interrupt entry address of different functional modules). If an interrupt occurs, it can directly jump to the interrupt entry address to call the interrupt processing function to respond to the interrupt. Among them, the interrupt enable of each functional module of the CPU can be realized by configuring the value of the interrupt enable bit in the register of each functional module.

[0033] It should be noted that some functional modules have separate interrupt enable registers, and the interrupt enable of the functional module can be controlled by configuring the interrupt enable bit of the interrupt enable register, for example, setting the interrupt enable bit to 1 to enable the functional module to enable interrupt. For functional modules that do not have separate interrupt enable registers, the interrupt enable of the functional module that does not have a separate interrupt enable register can be controlled by configuring the interrupt enable bit of the control register. The embodiment of the present invention does not limit the manner of enabling the interrupt enable of each functional module. Only after the interrupt enable of the functional module is enabled can the functional module receive the trigger signal of the interrupt. For example, the interrupt enable of the serial port module can be enabled and the serial port module can receive data.

[0034] S130 , when receiving the interrupt status sent by the target functional module in each functional module, jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module.

[0035] Among them, the target function module is used to send its own interrupt status to the CPU when receiving the trigger signal of the interrupt, so that it can request resources from the CPU and use the resources allocated by the CPU to execute the function of the target function module. The interrupt status is the information sent to the CPU when the target function module receives the trigger signal of the interrupt. When the target function module receives the trigger signal of the interrupt, that is, the interrupt arrives, the CPU will jump to the interrupt entry address to call the interrupt processing function corresponding to the target function module to respond to the interrupt generated by the target function module. For example, the serial port module does not receive data under normal circumstances. If the serial port module receives a data when the CPU is executing an application, the serial port module will send the status of the data received by itself, that is, its own interrupt status, to the CPU. According to the interrupt status reported by the serial port module, the CPU can determine that the serial port module has been interrupted, and needs to jump to the interrupt entry address to call the interrupt processing function corresponding to the serial port module to respond to the interruption of the serial port module, and use the resources allocated by the CPU to send and receive data.

[0036] It should be noted that, in the prior art, the interrupt query function needs to be executed after the main function of the application program is executed, and then the interrupt status register of each functional module is checked to determine whether an interrupt has occurred in a certain functional module, and the CPU needs to check (loop check) again and again whether each functional module has been interrupted, so the interrupt cannot be responded in time and too many useless queries will reduce the efficiency of the loop function. For example, the CPU needs to query whether there is a target functional module among 10 functional modules. If the first 9 functional modules have not been interrupted, only the 10th functional module has been interrupted, the CPU needs to query the first 9 functional modules before it can query the 10th functional module, so that the CPU cannot respond to the interrupt in time, and if the first 9 functional modules have not been interrupted, the CPU also needs to query the first 9 functional modules, which results in many useless queries and reduces the query efficiency. Or, for example, if none of the 10 functional modules have been interrupted, the CPU also needs to execute the query, so many useless queries are caused.

[0037] It should be noted that the setting of the interrupt status register of any functional module can set the specified control bit in the status register of the CPU in S110, and after the specified control bit in the status register of the CPU is set, the CPU learns that an interrupt has occurred in a functional module, but cannot determine which functional module has been interrupted. Therefore, in this embodiment, by configuring the interrupt entry address and turning on the interrupt enable of each functional module of the CPU, when receiving the interrupt status sent by the target functional module in each functional module, jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module, so that the CPU does not need to query whether an interrupt has occurred in each functional module.

[0038] The interrupt response method provided in this embodiment does not need to wait until the main function of the application is executed before executing the interrupt query function to query whether each functional module has an interrupt. Instead, the interrupt enable of the CPU status register is turned on, the interrupt entry address is configured, and the interrupt enable of the functional module of the CPU is turned on. In this way, during the execution of the main function of the application, after the functional module of the CPU is interrupted, the functional module that has been interrupted will report its own interrupt status to the CPU, and the CPU can suspend the executing main function of the application, and then determine which functional module has been interrupted, that is, it can determine that the target functional module has been interrupted, and can immediately jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module to respond to the interrupt generated by the target functional module. Thus, a quick response to the interrupt generated by the target functional module can be achieved.

[0039] Figure 2 FIG. 1 is a flowchart of another interrupt response method provided by an embodiment of the present invention. Figure 2As shown, the method may include:

[0040] S201, turn on the interrupt enable of the CPU status register.

[0041] S202: Configure the interrupt entry address and enable the interrupt of each functional module of the CPU.

[0042] S203: Clear the interrupt status of the CPU status register.

[0043] The interrupt status of the CPU status register can be cleared by clearing the EXL bit of the CPU status register to 0. Clearing the interrupt status of the CPU status register can prevent the CPU from being in the interrupt status all the time.

[0044] S204, call the stack push function.

[0045] The stack push function is used to apply for a stack space and push the value of each register of the CPU into the stack space. The registers include at least a status register and a return address register of a subroutine; the subroutine is used to represent any step in any application executable by the CPU. Among them, a stack space can be applied in the memory.

[0046] Among them, each register of the CPU includes a general register of the CPU and a control register of the CPU. The general register may include a return address register of a subroutine for saving the return address of the subroutine, a return address register (ra, return address) register, a register for storing the value returned by the subroutine, a register for saving temporary variables, etc. The control register may include a status register, a cause register, etc. The status register is used to configure the working state of the CPU. After the value of the status register of the CPU (the state when the CPU responds to an interrupt) is pushed onto the stack and saved, it is ensured that the CPU can return to the original state (i.e. the state when the interrupt occurs). The cause register is used to save the interrupt type, which is convenient for the CPU to query the interrupt type, so as to find out the functional module where the interrupt occurs. Interrupt types include external interrupts, internal interrupts, etc.

[0047] The above subroutine refers to a step in any application program that can be executed by the CPU. For example, when the CPU is executing an application program normally, if the CPU receives an interrupt status sent by a serial port module, if the CPU is executing the second step (subroutine) of the application program at this time, the return address of the second step can be stored in the ra register first, and after the CPU handles the interrupt, the return address of the second step can be taken out from the ra register, and then the steps after the second step can be executed.

[0048] S205. After calling the push function, modify the value of the return address register of the subroutine to the pop function address.

[0049] S206 : When receiving the interrupt status sent by the target functional module in each functional module, jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module.

[0050] Among them, jumping to the interrupt entry address and calling the interrupt processing function corresponding to the target functional module can be achieved by the following steps:

[0051] The function module where the interrupt occurs in the function modules of the CPU is determined as the target function module; the interrupt entry address is jumped to call the interrupt processing function corresponding to the target function module.

[0052] Optionally, determining the function module in which the interrupt occurs in the function module of the CPU as the target function module can be implemented in the following two ways:

[0053] One method is: determine the interrupt type to which the interrupt belongs according to the value of the CPU's cause register; determine the functional modules belonging to the interrupt type from the functional modules of the CPU according to the interrupt type; and determine the target functional module according to the values ​​of the interrupt status registers corresponding to the functional modules belonging to the interrupt type.

[0054] It should be noted that the CPU first determines the interrupt type to which the interrupt belongs based on the value of the CPU's cause register, and determines the functional modules belonging to the interrupt type from the CPU's functional modules based on the interrupt type, thereby narrowing the scope of the CPU's determination of the target functional modules and enabling the CPU to determine the target functional modules more quickly. For example, based on the value of the cause register, it is determined that the type of interrupt that occurred is an external interrupt, and the CPU only needs to determine the target functional module from the functional modules corresponding to the external interrupt, without having to search for internal interrupts and other types of functional modules for interrupt types. For example, if the CPU determines from the functional modules corresponding to the external interrupt that the value of the interrupt status register corresponding to the serial port module is 1, it means that an interrupt has occurred in the serial port module, and the serial port module can be determined as the target functional module. If the value of the interrupt status register corresponding to the serial port module is 0, it means that no interrupt has occurred in the serial port module.

[0055] Another way is to determine the target functional module according to the value of the interrupt status register corresponding to each functional module of the CPU.

[0056] This method is to search for the values ​​of the interrupt status registers corresponding to all the functional modules of the CPU, and if it is determined that the value of the interrupt status register corresponding to a certain functional module is 1, then the functional module can be determined to be the target functional module. Each functional module corresponds to an interrupt status register.

[0057] It should be noted that the above two methods can determine the target functional module during the execution of the main function of the application. There is no need to wait until the main function of the application is executed before executing the interrupt query function to check whether the interrupt status register of each functional module is set, thereby achieving a quick response to the interrupt generated by the target functional module.

[0058] S207, obtaining a pop function address from the subroutine return address register, and calling the pop function according to the pop function address, wherein the pop function is used to pop the value of each register of the CPU stored in the stack space and assign it to the corresponding register.

[0059] After jumping to the interrupt entry address to call the interrupt handling function corresponding to the target functional module, the pop function address can be obtained from the subroutine return address register. The pop function can be called according to the pop function address. The value of each register of the CPU saved in the stack space can be popped out in sequence and saved to the corresponding register in a first-in-last-out manner to ensure that the CPU can return to the original execution program after responding to the interrupt. For example, after the subroutine return address is popped out, it is assigned to the subroutine return address register. After the CPU status when responding to the interrupt is popped out, it is assigned to the CPU status register to ensure that the CPU can return to the working state before responding to the interrupt. For example, when the CPU is executing application A, when the CPU receives the interrupt status sent by the serial port module, it jumps to the interrupt entry address to call the interrupt handling function corresponding to the serial port module. After calling the pop function, the CPU can continue to execute application A.

[0060] It should be noted that, for example, the CPU registers include status registers and general registers. The pop function is used to pop the value of the CPU status register saved in the stack space and assign it to the status register, and to pop the value of the CPU general register saved in the stack space and assign it to the general register.

[0061] S208, exit interruption.

[0062] The interrupt response method provided in this embodiment enables the interruption enable of the CPU status register, configures the interruption entry address and enables the interruption enable of the CPU function module. In this way, after an interruption occurs in the CPU function module, the target function module will report its interruption status to the CPU, and the CPU can determine which function module has been interrupted, and can immediately jump to the interruption entry address to call the interruption processing function corresponding to the target function module to respond to the interruption generated by the target function module, thereby realizing a rapid response to the interruption generated by the target function module. In addition, by determining that the type of interruption that occurs is an external interruption according to the value of the cause register, the CPU only needs to determine the target function module from the function module corresponding to the external interruption, and does not need to search for the function module of the internal interruption and other interruption types, thereby ensuring that the target function module can be determined faster, further improving the timeliness of the interruption response. In addition, the value of each register of the CPU stored in the stack space is popped out of the stack and assigned to the corresponding register to ensure that the CPU can return to the originally executed application after responding to the interruption.

[0063] Reference Figure 3 , Figure 3 This is a schematic diagram of the structure of an interrupt response device provided in an embodiment of the present invention. The interrupt response device provided in this embodiment can be deployed in a computer system. The interrupt response device 300 includes the following modules: an enabling module 310, a configuration module 320 and a processing module 330.

[0064] The enabling module 310 is used to enable the interrupt enable of the status register of the central processing unit CPU;

[0065] The configuration module 320 is used to configure the interrupt entry address and enable the interrupt of each functional module of the CPU; the processing module 330 is used to jump to the interrupt entry address and call the interrupt processing function corresponding to the target functional module when receiving the interrupt status sent by the target functional module in each functional module;

[0066] The interrupt status is information sent to the CPU when the target functional module receives an interrupt trigger signal.

[0067] The interrupt response device provided in this embodiment does not need to wait until the main function of the application program is executed and then execute the interrupt query function to traverse and check whether each functional module has been interrupted, as in the prior art. Instead, the interrupt enable of the status register of the central processing unit CPU is turned on, the interrupt entry address is configured, and the interrupt enable of the functional module of the CPU is turned on. In this way, after an interrupt occurs in the functional module of the CPU, the functional module where the interrupt occurs will report its own interrupt status to the CPU, and the CPU can determine which functional module has been interrupted, that is, it can determine that the target functional module has been interrupted, and can immediately jump to the interrupt entry address to call the interrupt processing function corresponding to the target functional module to respond to the interrupt generated by the target functional module. Thus, a rapid response to the interrupt generated by the target functional module can be achieved.

[0068] Optionally, the processing module 330 is further configured to clear the interrupt status of the CPU status register before jumping to the interrupt entry address to call the interrupt processing function corresponding to the target functional module.

[0069] Optionally, the processing module 330 is also used to call the push function after clearing the interrupt status of the CPU's status register, the push function being used to apply for a stack space and push the value of each register of the CPU into the stack space; the registers include at least a status register and a return address register of a subroutine; the subroutine is used to represent any step in any application executable by the CPU; after calling the push function, the value of the subroutine return address register is modified to the pop function address; after jumping to the interrupt entry address to call the interrupt handling function corresponding to the target functional module, the pop function address is obtained from the subroutine return address register, and the pop function is called according to the pop function address, and the pop function is used to pop the value of each register of the CPU stored in the stack space and assign it to the corresponding register.

[0070] Optionally, the processing module 330 is specifically configured to determine a functional module in which an interrupt occurs among the functional modules of the CPU as a target functional module; and jump to the interrupt entry address to call an interrupt processing function corresponding to the target functional module.

[0071] Optionally, the processing module 330 is specifically used to determine the interrupt type to which the interrupt belongs according to the value of the cause register of the CPU; determine the functional modules belonging to the interrupt type from the functional modules of the CPU according to the interrupt type; and determine the target functional module according to the values ​​of the interrupt status registers corresponding to the functional modules belonging to the interrupt type.

[0072] Optionally, the processing module 330 is specifically configured to determine the target functional module according to the value of the interrupt status register corresponding to each functional module of the CPU.

[0073] In addition, the embodiment of the present invention also provides an interrupt response device, such as Figure 4 As shown, Figure 4 The schematic diagram of the structure of another interrupt response device provided by an embodiment of the present invention. The interrupt response device 400 includes a processor 410, a memory 420, and a computer program stored in the memory 420 and executable on the processor 410. When the computer program is executed by the processor 410, each process of the interrupt response method embodiment of the above embodiment is implemented, and the same technical effect can be achieved. To avoid repetition, it will not be described here.

[0074] The embodiment of the present invention also provides a computer-readable storage medium, on which a computer program is stored. When the computer program is executed by a processor, each process of the interrupt response method embodiment described above is implemented, and the same technical effect can be achieved. To avoid repetition, it is not repeated here. The computer-readable storage medium can be a read-only memory (ROM), a random access memory (RAM), a magnetic disk or an optical disk, etc.

[0075] The embodiment of the present invention further provides a computer program, which can be stored in a cloud or local storage medium. When the computer program is run by a computer or a processor, it is used to execute the corresponding steps of the interrupt response method of the embodiment of the present invention, and is used to implement the corresponding modules in the interrupt response device according to the embodiment of the present invention.

[0076] As for the device embodiment, since it is basically similar to the method embodiment, the description is relatively simple, and the relevant parts can be referred to the partial description of the method embodiment.

[0077] The various embodiments in this specification are described in a progressive manner, and each embodiment focuses on the differences from other embodiments. The same or similar parts between the various embodiments can be referenced to each other.

[0078] Those skilled in the art can understand that all or part of the steps of implementing the above-mentioned method embodiments can be completed by hardware related to program instructions. The above-mentioned program can be stored in a computer-readable storage medium.

[0079] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein by equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. An interrupt response method, characterized in that: Applied to a boot program, the method comprises: Turning on the interrupt enable of the status register of the central processing unit CPU, wherein each register of the central processing unit CPU includes a general register of the central processing unit CPU and a control register of the central processing unit CPU, and the control register includes the status register; Configure the interrupt entry address and enable the interrupt of each functional module of the CPU; When receiving an interrupt status sent by a target functional module in each functional module, determining the functional module in which the interrupt occurs in each functional module of the CPU as the target functional module; Jump to the interrupt entry address and call the interrupt processing function corresponding to the target functional module; Among them, the interrupt status is the information sent to the CPU when the target functional module receives the interrupt trigger signal; the control register also includes a cause register, which is used to save the interrupt type, so that the central processing unit CPU can query the interrupt type and find out the functional module where the interrupt occurs.

2. The method according to claim 1, characterized in that Before jumping to the interrupt entry address and calling the interrupt processing function corresponding to the target functional module, it also includes: Clear the interrupt status of the status register of the CPU.

3. The method according to claim 2, characterized in that After the interrupt status of the status register of the CPU is cleared, the method further comprises: Calling a push function; wherein the push function is used to apply for a stack space and push the value of each register of the CPU into the stack space; the registers at least include a return address register of a subroutine; the subroutine is used to represent any step in any application executable by the CPU; After calling the push function, modifying the value of the return address register of the subroutine to the pop function address; After jumping to the interrupt entry address and calling the interrupt processing function corresponding to the target functional module, it also includes: Obtaining the pop function address from the return address register of the subroutine; The pop function is called according to the pop function address, and the pop function is used to pop the value of each register of the CPU stored in the stack space and assign it to the corresponding register.

4. The method according to claim 1, characterized in that: The step of determining the functional module in which the interrupt occurs among the functional modules of the CPU as the target functional module comprises: Determining the interrupt type to which the interrupt belongs according to the value of the cause register of the CPU; According to the interrupt type, determining a functional module belonging to the interrupt type from each functional module of the CPU; The target functional module is determined according to the values ​​of the interrupt status registers respectively corresponding to the functional modules belonging to the interrupt type.

5. The method according to claim 1, characterized in that The step of determining the function module in which the interrupt occurs in the function modules of the CPU as the target function module comprises: The target functional module is determined according to the value of the interrupt status register corresponding to each functional module of the CPU.

6. An interrupt response device, characterized in that: Applied to a boot program, the device comprises: An enabling module, used for enabling interrupt enable of a status register of a central processing unit CPU, wherein each register of the central processing unit CPU includes a general register of the central processing unit CPU and a control register of the central processing unit CPU, and the control register includes the status register; A configuration module, used to configure an interrupt entry address and enable interrupts of each functional module of the CPU; A processing module, configured to, when receiving an interrupt status sent by a target functional module in each functional module, determine the functional module in which an interrupt occurs in each functional module of the CPU as the target functional module; and jump to the interrupt entry address to call an interrupt processing function corresponding to the target functional module; Among them, the interrupt status is the information sent to the CPU when the target functional module receives the interrupt trigger signal; the control register also includes a cause register, which is used to save the interrupt type, so that the central processing unit CPU can query the interrupt type and find out the functional module where the interrupt occurs.

7. The device according to claim 6, characterized in that The processing module is further configured to clear the interrupt status of the status register of the CPU before jumping to the interrupt entry address to call the interrupt processing function corresponding to the target functional module.

8. The device according to claim 7, characterized in that The processing module is also used to call a push function after clearing the interrupt status of the status register of the CPU, and the push function is used to apply for a stack space and push the value of each register of the CPU into the stack space; the register at least includes a return address register of a subroutine; the subroutine is used to represent any step in any application program executable by the CPU; after calling the push function, the value of the subroutine return address register is modified to a pop function address; after jumping to the interrupt entry address to call the interrupt processing function corresponding to the target functional module, the pop function address is obtained from the return address register of the subroutine; the pop function is called according to the pop function address, and the pop function is used to pop the value of each register of the CPU stored in the stack space and assign it to the corresponding register.

9. A computer-readable storage medium, characterized in that: The computer-readable storage medium stores a computer program, and when the computer program is executed by a processor, the steps of the interrupt response method according to any one of claims 1 to 5 are implemented.

10. An interrupt response device, characterized in that: The method comprises a processor, a memory and a computer program stored in the memory and executable on the processor, wherein the computer program implements the steps of the interrupt response method according to any one of claims 1 to 5 when executed by the processor.

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