Semiconductor structure and method for forming the same

By forming a combined side wall in semiconductor device manufacturing, the increased production time and cost problems in multiple patterning processes are solved, and the effect of saving time and cost is achieved.

CN112864094BActive Publication Date: 2025-01-17SEMICON MFG INT (SHANGHAI) CORP +1
View PDF 1 Cites 0 Cited by

Patent Information

Application Number
CN201911176061.2
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2019-11-26
Publication Date
2025-01-17
Estimated Expiration
2039-11-26

AI Technical Summary

Technical Problem

The existing multiple patterning processes require further processing of graphics in semiconductor device manufacturing, which increases production time and cost.

Method used

By forming the first side wall and the second side wall on the layer to be etched, the width ratio control of the side wall groove and the sacrificial layer groove is used to avoid forming the fins, thereby eliminating the subsequent photolithography patterning process removal process , the combined side wall is formed using atomic layer deposition process and anisotropic or isotropic etching process.

Benefits of technology

Save production time and cost, improve production efficiency, and avoid additional mask usage and removal processes.

✦ Generated by Eureka AI based on patent content.

Smart Images

  • Figure CN112864094B_ABST
    Figure CN112864094B_ABST
Patent Text Reader

Abstract

A semiconductor structure and a method for forming the same include: providing a layer to be etched, the layer to be etched having a first sacrificial film on it; forming a plurality of mutually independent first sidewalls and a plurality of sidewall grooves on the first sacrificial film, the plurality of sidewall grooves having a first sidewall groove and a second sidewall groove; forming a second sidewall in the first sidewall groove, the second sidewall filling the first sidewall groove; etching the first sacrificial film with the first sidewall and the second sidewall as masks, forming a plurality of first sacrificial layers on the layer to be etched; forming a third sidewall on the sidewall of the first sacrificial layer. By using the second sidewall to fill the first sidewall groove, the second sidewall is merged with the first sidewalls on both sides of the first sidewall groove, and in the subsequent pattern transfer process, the layer to be etched corresponding to the merged first sidewall and the second sidewall will not form a fin, thereby eliminating the process of removing part of the fin by photolithography patterning process, thereby saving manufacturing time and cost.
Need to check novelty before this filing date? Find Prior Art

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] In the process of manufacturing semiconductor devices, the pattern on the mask is usually transferred to the substrate by using a photolithography process. The photolithography process includes: providing a substrate; forming a photoresist on the semiconductor substrate; exposing and developing the photoresist to form a patterned photoresist so that the pattern on the mask is transferred to the photoresist; etching the substrate using the patterned photoresist as a mask so that the pattern on the photoresist is transferred to the substrate; and removing the photoresist.

[0003] As the size of semiconductor devices continues to shrink, the critical dimensions of lithography are gradually approaching or even exceeding the physical limits of lithography, which poses a more severe challenge to lithography technology. In order to further reduce the size of semiconductor devices based on the existing lithography process, the prior art proposes a multiple patterning process, which has application prospects because it can form a smaller mask size, overcoming the lithography limit that cannot be achieved by a single patterning.

[0004] However, the prior art multiple patterning process still requires further processing of the pattern after the pattern is transferred, which increases the production time and cost. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, which can save the process of removing part of the fins by photolithography patterning process, thereby saving production time and production cost.

[0006] To solve the above problems, the present invention provides a method for forming a semiconductor structure, comprising: providing a layer to be etched, wherein the layer to be etched has a first sacrificial film; forming a plurality of mutually independent first side walls and a plurality of side wall grooves on the first sacrificial film, wherein each of the side wall grooves is located between adjacent first side walls, wherein the plurality of side wall grooves have a first side wall groove and a second side wall groove, wherein the width of the second side wall groove is greater than the width of the first side wall groove; forming a second side wall in the first side wall groove, wherein the second side wall fills the first side wall groove; etching the first sacrificial film using the first side wall and the second side wall as a mask to form a plurality of first sacrificial layers on the layer to be etched; and forming a third side wall on the side wall of the first sacrificial layer.

[0007] Optionally, the layer to be etched is a multi-layer structure, and the layer to be etched includes a substrate, a mask structure located on the substrate, and a first stop layer located on the mask structure.

[0008] Optionally, the method for forming the first side wall includes: forming a second stop layer on the first sacrificial film, forming a plurality of mutually discrete second sacrificial layers and a plurality of sacrificial layer grooves on the second stop layer, each of the sacrificial layer grooves being located between adjacent second sacrificial layers, a plurality of the sacrificial layer grooves including a first sacrificial layer groove and a second sacrificial layer groove, a width of the second sacrificial layer groove being greater than a width of the first sacrificial layer groove; forming the first side wall on the side wall of the second sacrificial layer; and removing the second sacrificial layer after forming the first side wall.

[0009] Optionally, the method for forming the first side wall on the side wall of the second sacrificial layer includes: forming a first side wall film on the top surface exposed by the second stop layer, and the side wall and top surface of the second sacrificial layer; etching back the first side wall film on the top surface of the second stop layer and the top surface of the second sacrificial layer until the top surface of the second stop layer and the top surface of the second sacrificial layer are exposed, thereby forming the first side wall on the side wall of the second sacrificial layer.

[0010] Optionally, a ratio of a width of the first sacrificial layer groove to a thickness of the first sidewall is greater than 2:1, and a ratio of a width of the second sacrificial layer groove to a thickness of the first sidewall is greater than 2:1.

[0011] Optionally, the formation process of the first sidewall film includes an atomic layer deposition process.

[0012] Optionally, the process of etching back the first spacer film includes an anisotropic dry etching process or an anisotropic wet etching process.

[0013] Optionally, the material of the first spacer film includes silicon nitride or silicon oxynitride.

[0014] Optionally, the method for forming the second sacrificial layer includes: forming a second sacrificial film on the second stop layer; forming a plurality of discrete graphic structures on the second sacrificial film; etching the second sacrificial film using the graphic structure as a mask until the second stop layer is exposed to form the second sacrificial layer; after forming the second sacrificial layer, removing the graphic structure.

[0015] Optionally, the method for forming the second side wall includes: forming a second side wall film on the top surface exposed by the second stop layer, and the side wall and top surface of the first side wall; etching the second side wall film on the second side wall groove surface and the top surface of the first side wall until the top surface of the second stop layer and the top surface of the first side wall are exposed, thereby forming the second side wall.

[0016] Optionally, a ratio of a width of the first sidewall groove to a thickness of the second sidewall is less than 2:1, and a ratio of a width of the second sidewall groove to a thickness of the second sidewall is greater than 2:1.

[0017] Optionally, the second sidewall film forming process includes an atomic layer deposition process.

[0018] Optionally, the process used for etching the second spacer film includes an isotropic dry etching process or an isotropic wet etching process.

[0019] Optionally, the second sidewall film forming process includes an atomic layer deposition process.

[0020] Optionally, the material of the second sidewall film includes silicon carbon nitride.

[0021] Optionally, after forming the first sacrificial layer, the method further includes: removing the second side wall and the first side wall.

[0022] Optionally, the method for forming the third side wall includes: forming a third side wall film on the exposed top surface of the layer to be etched, and on the side wall and top surface of the first sacrificial layer; back-etching the third side wall film on the top surface of the layer to be etched and the top surface of the first sacrificial layer until the top surface of the layer to be etched and the top surface of the first sacrificial layer are exposed to form the third side wall; after forming the third side wall, removing the first sacrificial layer.

[0023] Optionally, the process for forming the third sidewall film includes an atomic layer deposition process.

[0024] Optionally, the material of the third sidewall film includes silicon nitride or silicon oxynitride.

[0025] Optionally, after forming the third sidewall spacer, the method further includes: etching the to-be-etched layer using the third sidewall spacer as a mask to form a plurality of mutually discrete fins.

[0026] Correspondingly, the present invention also provides a semiconductor structure formed by the above method.

[0027] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0028] In the technical solution of the present invention, during the multiple patterning process, the second side wall is used to fill the first side wall groove, so that the second side wall is merged with the first side wall on both sides of the first side wall groove. In the subsequent pattern transfer process, the merged first side wall and the etched layer corresponding to the second side wall will not form a fin, thereby eliminating the subsequent process of removing part of the fin by a photolithography patterning process, thereby saving production time and production cost.

[0029] Furthermore, in the technical solution of the present invention, the layer to be etched is etched using the third sidewall spacer as a mask to form the fin, and the fin is formed for subsequent fabrication of semiconductor devices. BRIEF DESCRIPTION OF THE DRAWINGS

[0030] Figures 1 to 3 It is a schematic diagram of the structure of a semiconductor structure;

[0031] Figures 4 to 14 It is a schematic structural diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention. DETAILED DESCRIPTION

[0032] As described in the background art, the prior art multiple patterning process still requires further processing of the patterns after pattern transfer, which increases the production time and cost.

[0033] The following is a detailed description with reference to the accompanying drawings.

[0034] Please refer to Figure 1 , providing an initial substrate 100; forming a mask layer 101 on the initial substrate 100; forming a plurality of mutually discrete sacrificial layers 102 on the mask layer 101, wherein the process for forming the sacrificial layers 102 adopts a multiple patterning process.

[0035] Please refer to Figure 2 , using the sacrificial layer 102 as a mask, the mask layer 101 and the initial substrate 100 are etched to form a substrate 103 and a plurality of mutually discrete fins 104 located on the substrate 103; after forming the substrate 103 and the fins 104, the sacrificial layer 102 and the mask layer 101 are removed.

[0036] Please refer to Figure 3 , a photolithography patterning process is used to remove part of the fin 104 .

[0037] In the above embodiment, after the fins 104 are formed, according to different design requirements, it is often necessary to remove part of the fins 104, so as to increase the spacing between adjacent fins 104. In the above embodiment, after the fins 104 are formed, part of the fins 104 are removed by using a photolithography patterning process. This method not only increases the manufacturing time, but also requires additional masks in the process, which also increases the manufacturing cost.

[0038] On this basis, the present invention provides a semiconductor structure and a method for forming the same. In the process of multiple patterning processes, a second side wall is used to fill the first side wall groove. In the subsequent pattern transfer process, the etched layer corresponding to the position will not form a fin, thereby eliminating the need for a subsequent photolithography patterning process to remove part of the fin, thereby saving production time and production costs.

[0039] In order to make the above-mentioned objects, features and advantages of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0040] Figures 4 to 14 , is a structural schematic diagram of a formation process of a semiconductor structure according to an embodiment of the present invention.

[0041] Please refer to Figure 4 , providing a layer 200 to be etched, wherein the layer 200 to be etched has a first sacrificial film 201 thereon.

[0042] In this embodiment, the layer to be etched 200 is a multi-layer structure, and the layer to be etched 200 includes a substrate 202, a mask structure located on the substrate 202, and a first stop layer 203 located on the mask structure.

[0043] In this embodiment, the material of the substrate 202 is silicon; in other embodiments, the material of the substrate may also be germanium, silicon germanium, silicon carbide, gallium arsenide or indium gallium.

[0044] In this embodiment, the mask structure includes a first mask layer 204 and a second mask layer 205 located on the first mask layer 204 .

[0045] The material of the first mask layer 204 is nitrogen-doped silicon oxycarbide; the first mask layer 204 formed by the nitrogen-doped silicon oxycarbide has good bonding ability with the substrate 202. When the substrate 202 is subsequently etched using the etched first mask layer 204 as a mask, the first mask layer 204 is not prone to peeling or warping. Therefore, the first mask layer 204 has a good ability to maintain the etched pattern, which is beneficial to making the opening morphology formed in the substrate 202 good, and effectively improving the accuracy of the etched pattern.

[0046] The material of the second mask layer 205 is titanium nitride, and the second mask layer 205 has good bonding ability with the first mask layer 204. The second mask layer 205 can protect the surface of the first mask layer 204 when the substrate 202 is subsequently etched, so that the first mask layer 204 will not be thinned. Moreover, the physical strength of the second mask layer 205 is relatively large. When the layer to be etched is subsequently etched, the patterns of the second mask layer 205 and the first mask layer 204 can remain stable, which is conducive to forming an opening with a good morphology.

[0047] In other embodiments, the mask structure may also be a single-layer structure.

[0048] In this embodiment, the material of the first sacrificial film 201 is amorphous silicon; in other embodiments, the material of the first sacrificial film may also be silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon nitride oxide, boron nitride or boron carbonitride.

[0049] A plurality of mutually independent first sidewalls and a plurality of sidewall grooves are formed on the first sacrificial film 201, each of the sidewall grooves is located between adjacent first sidewalls, and the plurality of sidewall grooves include a first sidewall groove and a second sidewall groove, and the width of the second sidewall groove is greater than the width of the first sidewall groove. For the specific formation process, please refer to Figures 5 to 8 .

[0050] Please refer to Figure 5 , forming a second stop layer 206 on the first sacrificial film 201 ; forming a second sacrificial film 207 on the second stop layer 206 ; and forming a plurality of mutually discrete patterned structures 208 on the second sacrificial film 207 .

[0051] In this embodiment, the second stop layer 206 is used to stop etching when the second sacrificial film 207 is subsequently etched, so as to prevent the etching from continuing and damaging the first sacrificial film 201 .

[0052] In this embodiment, the material of the second stop layer 206 is different from that of the second sacrificial film 207. The purpose is to stop etching at the top surface of the second stop layer 206 when the second sacrificial film 207 is subsequently etched. The material of the second stop layer 206 is silicon oxide.

[0053] In this embodiment, the material of the second sacrificial film 207 is amorphous silicon; in other embodiments, the material of the first sacrificial film may also be silicon nitride, silicon carbide, silicon carbonitride, silicon carbonitride oxide, silicon nitride oxide, boron nitride or boron carbonitride.

[0054] In this embodiment, the material of the patterned structure 208 is photoresist.

[0055] Please refer to Figure 6, using the graphic structure 208 as a mask to etch the second sacrificial film 207 until the second stop layer 206 is exposed, to form a plurality of mutually independent second sacrificial layers 209 and a plurality of sacrificial layer grooves, each of which is located between adjacent second sacrificial layers 209, and a plurality of the sacrificial layer grooves having a first sacrificial layer groove 210 and a second sacrificial layer groove 211, wherein the width of the second sacrificial layer groove 211 is greater than the width of the first sacrificial layer groove 210; after forming the second sacrificial layer 209, the graphic structure 208 is removed.

[0056] In this embodiment, the width directions of the first sacrificial layer trench 210 and the second sacrificial layer trench 211 are parallel to the top surface of the second stop layer 206 .

[0057] The process of forming the patterned structure 208 includes a photolithography patterning process; the process of removing the patterned structure 208 includes a wet stripping process or an ashing process. In this embodiment, the process of removing the patterned structure 208 adopts an ashing process, and the gas of the ashing process is an oxygen-containing gas, such as oxygen or ozone.

[0058] Please refer to Figure 7 After removing the patterned structure 208 , a first spacer film 212 is formed on the exposed top surface of the second stop layer 206 and the sidewall and top surface of the second sacrificial layer 209 .

[0059] In the present embodiment, the first spacer film 212 is formed by an atomic layer deposition process. The first spacer film 212 is formed by the atomic layer deposition process, which has good step coverage capability. In addition, the deposition thickness is relatively uniform and easy to control.

[0060] The material of the first spacer film 212 includes silicon nitride or silicon oxynitride. In this embodiment, the material of the first spacer film 212 is silicon nitride.

[0061] Please refer to Figure 8 , back-etching the first sidewall film 212 on the top surface of the second stop layer 206 and the top surface of the second sacrificial layer 209 until the top surface of the second stop layer 206 and the top surface of the second sacrificial layer 209 are exposed, so as to form a first sidewall 213; removing the second sacrificial layer 209, so as to form a plurality of sidewall grooves, each of which is located between adjacent first sidewalls 213, and a first sidewall groove 214 and a second sidewall groove 215 are included in the plurality of sidewall grooves, and a width of the second sidewall groove 215 is greater than a width of the first sidewall groove 214.

[0062] In this embodiment, the width directions of the first spacer trench 214 and the second spacer trench 215 are parallel to the top surface of the second stop layer 206 .

[0063] In this embodiment, a plurality of mutually independent first spacers 213 and a plurality of the spacer trenches are specifically formed on the second stop layer 206 .

[0064] The process used for etching back the first spacer film 212 includes an anisotropic dry etching process or an anisotropic wet etching process. In this embodiment, the process used for etching back the first spacer film 212 is an anisotropic dry etching process, wherein the etching gas includes CF 4 , CHF 3 or C 2 F 6 One or more of the fluorine-containing gases.

[0065] In this embodiment, the ratio of the width of the first sacrificial layer groove 210 to the thickness of the first side wall 213 is greater than 2:1, the ratio of the width of the second sacrificial layer groove 211 to the thickness of the first side wall 213 is greater than 2:1, and the direction of the thickness of the first side wall 213 is parallel to the direction of the top surface of the second stop layer 206.

[0066] By setting the width of the first sacrificial layer groove 210 and the second sacrificial layer groove 211 to be greater than twice the thickness of the first side wall 213, the overall width of the first side wall 213 and the second side wall subsequently formed in the first sacrificial layer groove 210 can be effectively increased, thereby avoiding the problem of requiring additional trimming treatment when the width of the first sacrificial layer groove 210 and the second sacrificial layer groove 211 is small, thereby effectively improving production efficiency.

[0067] In this embodiment, after the first sidewall 213 is formed, a second sidewall is subsequently formed in the first sidewall groove 214, and the second sidewall fills the first sidewall groove 214. For details on the process of forming the second sidewall, please refer to Figures 9 and 10 .

[0068] Please refer to Fig. 9 A second spacer film 216 is formed on the exposed top surface of the second stop layer 206 and the sidewall and top surface of the first spacer 213 .

[0069] In this embodiment, the second stop layer 206 is also used to stop etching the second sidewall film 216 to prevent the first sacrificial film 201 from being damaged by continued etching.

[0070] In this embodiment, the second spacer film 216 is formed by an atomic layer deposition process.

[0071] In this embodiment, the material of the second sidewall film 216 is different from that of the first sidewall film 212 to prevent damage to the first sidewall 213 during subsequent etching of the second sidewall film 216. The material of the second sidewall film 216 is silicon carbonitride.

[0072] Please refer to Fig.10 , the second sidewall film 216 on the surface of the second sidewall groove 215 and the top surface of the first sidewall 213 is etched until the top surface of the second stop layer 206 and the top surface of the first sidewall 213 are exposed, so as to form the second sidewall 217.

[0073] In this embodiment, the ratio of the width of the first sidewall groove 214 to the thickness of the second sidewall 217 is less than 2:1, and the ratio of the width of the second sidewall groove 215 to the thickness of the second sidewall 217 is greater than 2:1, and the thickness direction of the second sidewall 217 is parallel to the direction of the second stop layer 206.

[0074] By setting the width of the first sidewall groove 214 to be less than 2 times the thickness of the second sidewall 217, and setting the width of the second sidewall groove 215 to be greater than 2 times the thickness of the second sidewall 217, it can be ensured that after etching the second sidewall film 216, the second sidewall 217 formed can fill the first sidewall groove 214 and is not formed in the second sidewall groove 215, so that the second sidewall 217 is merged with the first sidewall 213 on both sides of the first sidewall groove 214. In the subsequent graphic transfer process, the etched layer 200 corresponding to the merged first sidewall 213 and the second sidewall 217 will not form a fin, and there is no need to use a photolithography patterning process to remove part of the fin, thereby saving production time and production cost.

[0075] The process used to etch the second spacer film 216 includes an isotropic dry etching process or an isotropic wet etching process. In this embodiment, the process used to etch the second spacer film 216 includes an isotropic dry etching process, and the isotropic dry etching process parameters include: CF 4 Flow rate is 50sccm~500sccm, CHF 3 Flow rate is 0sccm~200sccm, O 2 Flow rate is 0 sccm~100 sccm, N 2 The flow rate is 0 sccm~200 sccm.

[0076] Please refer to Fig.11The first sacrificial film 201 is etched using the first sidewall 213 and the second sidewall 217 as a mask to form a plurality of first sacrificial layers 218 on the to-be-etched layer 200 .

[0077] In this embodiment, after forming the first sacrificial layer 218 , the first spacer 213 , the second spacer 217 and the second stop layer 206 are removed.

[0078] After removing the first sidewall 213, the second sidewall 217 and the second stop layer 206, a third sidewall is subsequently formed on the sidewall of the first sacrificial layer 218. For a detailed process of forming the third sidewall, please refer to Figure 12 to Figure 13 .

[0079] Please refer to Fig.12 A third spacer film 219 is formed on the exposed top surface of the to-be-etched layer 200 and the sidewall and top surface of the first sacrificial layer 218 .

[0080] In this embodiment, the formation process of the third spacer film 219 includes an atomic layer deposition process.

[0081] The material of the third spacer film 219 includes silicon oxynitride. In this embodiment, the material of the third spacer film 219 is silicon nitride.

[0082] Please refer to Fig.13 , back-etch the third sidewall film 219 on the top surface of the layer to be etched 200 and the top surface of the first sacrificial layer 218 until the top surface of the layer to be etched 200 and the top surface of the first sacrificial layer 218 are exposed, so as to form the third sidewall 220.

[0083] In this embodiment, the etching back of the third spacer film 219 specifically stops at the first stop layer 203 , so the material of the first stop layer 203 is different from that of the third spacer film, and the material of the first stop layer is silicon oxide.

[0084] The process used for etching back the third spacer film 219 includes anisotropic dry etching or anisotropic wet etching. In this embodiment, the process used for etching back the third spacer film 219 is anisotropic dry etching.

[0085] Please refer to Fig.14 After forming the third sidewall spacer 220 , the first sacrificial layer 218 is removed; the to-be-etched layer 200 is etched using the third sidewall spacer 220 as a mask to form a plurality of mutually discrete fins 221 .

[0086] In this embodiment, the fin 221 is specifically formed in the substrate 202 , and the fin 221 is formed for subsequent fabrication of semiconductor devices.

[0087] The fins 221 formed by etching using the third sidewall spacer 220 as a mask have different spacings between them, thereby meeting the subsequent manufacturing requirements of semiconductor devices.

[0088] In this embodiment, please continue to refer to Fig.14 After forming the fin 221 , the third spacer 220 , the first stop layer 203 and the mask structure are removed.

[0089] Accordingly, an embodiment of the present invention further provides a Fig.13 The semiconductor structure shown.

[0090] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A method for forming a semiconductor structure, characterized in that: include: Providing a layer to be etched, wherein the layer to be etched has a first sacrificial film thereon; Forming a plurality of mutually independent first sidewalls and a plurality of sidewall grooves on the first sacrificial film, wherein each of the sidewall grooves is located between adjacent first sidewalls, and the plurality of sidewall grooves include a first sidewall groove and a second sidewall groove, wherein the width of the second sidewall groove is greater than the width of the first sidewall groove; forming a second sidewall spacer in the first sidewall spacer trench, wherein the second sidewall spacer completely fills the first sidewall spacer trench; Using the first sidewall and the second sidewall as a mask, etching the first sacrificial film to form a plurality of first sacrificial layers on the layer to be etched; A third sidewall spacer is formed on the sidewall of the first sacrificial layer; wherein, The method for forming the second sidewall includes: forming a second sidewall film on the sidewall and top surface of the first sidewall; etching the second sidewall film on the second sidewall groove surface and the top surface of the first sidewall until the top surface of the first sidewall is exposed to form the second sidewall.

2. The method for forming a semiconductor structure according to claim 1, wherein: The layer to be etched is a multi-layer structure, and includes a substrate, a mask structure located on the substrate, and a first stop layer located on the mask structure.

3. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the first side wall includes: forming a second stop layer on the first sacrificial film, forming a plurality of mutually discrete second sacrificial layers and a plurality of sacrificial layer grooves on the second stop layer, each of the sacrificial layer grooves is located between adjacent second sacrificial layers, a plurality of the sacrificial layer grooves include a first sacrificial layer groove and a second sacrificial layer groove, a width of the second sacrificial layer groove is greater than a width of the first sacrificial layer groove; forming the first side wall on the side wall of the second sacrificial layer; after forming the first side wall, removing the second sacrificial layer.

4. The method for forming a semiconductor structure according to claim 3, wherein: The method for forming the first side wall on the side wall of the second sacrificial layer includes: forming a first side wall film on the exposed top surface of the second stop layer, and the side wall and top surface of the second sacrificial layer; etching back the first side wall film on the top surface of the second stop layer and the top surface of the second sacrificial layer until the top surface of the second stop layer and the top surface of the second sacrificial layer are exposed, thereby forming the first side wall on the side wall of the second sacrificial layer.

5. The method for forming a semiconductor structure according to claim 3, wherein: The ratio of the width of the first sacrificial layer trench to the thickness of the first spacer is greater than 2:1, and the ratio of the width of the second sacrificial layer trench to the thickness of the first spacer is greater than 2:

1.

6. The method for forming a semiconductor structure according to claim 4, wherein: The formation process of the first sidewall film includes an atomic layer deposition process.

7. The method for forming a semiconductor structure according to claim 4, wherein: The process of etching back the first spacer film includes an anisotropic dry etching process or an anisotropic wet etching process.

8. The method for forming a semiconductor structure according to claim 4, wherein: The material of the first spacer film includes silicon nitride or silicon oxynitride.

9. The method for forming a semiconductor structure according to claim 3, wherein: The method for forming the second sacrificial layer includes: forming a second sacrificial film on the second stop layer; forming a plurality of discrete graphical structures on the second sacrificial film; etching the second sacrificial film using the graphical structure as a mask until the second stop layer is exposed to form the second sacrificial layer; after forming the second sacrificial layer, removing the graphical structure.

10. The method for forming a semiconductor structure according to claim 3, wherein: The method for forming the second sidewall further includes: forming the second sidewall film on the top surface exposed by the second stop layer; and etching the second sidewall film on the second sidewall groove surface and the top surface of the first sidewall until the top surface of the second stop layer is exposed.

11. The method for forming a semiconductor structure according to claim 10, wherein: The ratio of the width of the first spacer groove to the thickness of the second spacer is less than 2:1, and the ratio of the width of the second spacer groove to the thickness of the second spacer is greater than 2:

1.

12. The method for forming a semiconductor structure according to claim 10, wherein: The second sidewall film is formed by an atomic layer deposition process.

13. The method for forming a semiconductor structure according to claim 10, wherein: The process used for etching the second spacer film includes an isotropic dry etching process or an isotropic wet etching process.

14. The method for forming a semiconductor structure according to claim 10, wherein: The material of the second spacer film includes silicon carbonitride.

15. The method for forming a semiconductor structure according to claim 1, wherein: After forming the first sacrificial layer, the method further includes: removing the second sidewall spacer and the first sidewall spacer.

16. The method for forming a semiconductor structure according to claim 1, wherein: The method for forming the third side wall includes: forming a third side wall film on the exposed top surface of the layer to be etched, and on the side wall and top surface of the first sacrificial layer; etching back the third side wall film on the top surface of the layer to be etched and the top surface of the first sacrificial layer until the top surface of the layer to be etched and the top surface of the first sacrificial layer are exposed to form the third side wall; after forming the third side wall, removing the first sacrificial layer.

17. The method for forming a semiconductor structure according to claim 16, wherein: The formation process of the third sidewall film includes an atomic layer deposition process.

18. The method for forming a semiconductor structure according to claim 16, wherein: The material of the third spacer film includes silicon nitride or silicon nitride oxide.

19. The method for forming a semiconductor structure according to claim 1, wherein: The layer to be etched is etched using the third sidewall spacer as a mask to form a plurality of fins separated from each other, and the layer to be etched corresponding to the merged first sidewall spacer and the second sidewall spacer will not form the fins.

20. A semiconductor structure formed by the method of any one of claims 1 to 19.

Citation Information

Patent Citations

  • Method for forming fine patterns on semiconductor

    CN103839781A