LED Package

Abstract

A solid-state wafer, such as an LED (or OLED) wafer, is described which is mounted in a hole, such as a through hole, in a carrier substrate, such as a PCB. The wafer is to be connected to the PCB, such as a trace on the PCB. The electrical contacts on the wafer are arranged (e.g., substantially) in the same plane as the contacts on the carrier substrate, such as the PCB. This is achieved by adapting the holes on the substrate, such as the PCB, so that the die fits into the hole or opening, i.e., each die is received into the opening before the electrical contacts are made. A method of manufacturing a solid-state light source and a combination of an LED (or OLED) wafer and a carrier substrate, as well as a repair method are described.

Description

[0001] The present invention relates to packaging of solid state light sources such as LEDs or OLEDs, or methods of manufacturing or servicing these light sources. Background Art

[0002] The first (first generation) PCBs using through-hole technology involved mounting electronic components by inserting signal-carrying leads through holes on one side of the board, with only one lead passing through each hole. Each lead was soldered to a copper track (trace).

[0003] Through-hole technology increases costs due to the need to drill many holes, and it limits the available routing area for signal traces on layers directly below the top layer on a multi-layer board. This is because the holes must pass through all layers of the PCB. After surface mounting became available, small SMD components were used where possible, with only large components that were not suitable for surface mounting due to power requirements or mechanical limitations being mounted via through-holes.

[0004] Various methods such as wafer bonding can be used to secure the light emitting diode with the encapsulation material. Figure 1 It shows how to electrically contact the LED to the substrate by means of bumps as described in US Pat. No. 8,847,267 “Light emitting diode with metal piles and multi-passivation layers and its manufacturing method”. Figure 1 The reference numerals used in the description are explained as follows:

[0005] 100: base,

[0006] 110: first semiconductor layer

[0007] 120: active layer,

[0008] 130: Second semiconductor layer

[0009] 140: reflective layer,

[0010] 150: first electrode

[0011] 160: a second electrode,

[0012] The problem with this type of assembly is that the adhesion between the die and the bumps or contact pads on the substrate is poor. In an LED array where a large number of LEDs are assembled side by side, the probability that at least one LED will have a problem increases beyond acceptable limits.

[0013] The existing technology needs to be improved. Summary of the invention

[0014] Embodiments of the present invention relate to packaging of solid-state light sources, such as LEDs or OLEDs, or methods of manufacturing or servicing these solid-state light sources.

[0015] In an embodiment of the present invention, a light emitting chip such as a solid-state light emitting chip is connected to a carrier substrate such as a PCB, the light emitting chip having a light emitting element and being located in a hole or opening made in the carrier substrate, the carrier substrate having a first main surface or side and a second main surface or side. The first main surface or side and the second main surface or side are generally planar, i.e., each is in the form of a first plane and a second plane.

[0016] The light emitting wafer has a third main surface or side and a fourth main surface or side, on which the light emitting elements are positioned. The third main surface or side and the fourth main surface or side are generally planar, ie each is in the form of a third plane and a fourth plane, respectively.

[0017] The light emitting wafer may be a solid state light source, such as an LED or an OLED.

[0018] The contact elements, such as the first and second contact elements, are preferably positioned in or on the fourth major surface of the light emitting wafer. The contact elements, such as the first and second contact elements, are electrically connected to the anode and cathode of the light emitting element. The contacts, such as the first and second contact elements, in or on the fourth major surface of the light emitting wafer are electrically connected to the second contact, such as the third and fourth contact on the second major surface of the carrier substrate, by any suitable connection. Including the wafer in a hole in a carrier substrate such as a PCB enables better connection between the traces on the substrate and the wafer.

[0019] The anode and cathode are signal conductors. Each hole or opening in the carrier substrate is provided with at least two or more signal conductors (e.g., anodes and cathodes) from a solid state light source such as an LED or OLED wafer. This reduces the number of holes required by 50% compared to conventional through-hole technology.

[0020] The light emitting die can be sealed on a carrier substrate such as a PCB. The light emitting die can be sealed by a sealant such as silicone or silicone-based glue. The die can be contacted without disturbing the seal.

[0021] Each hole or opening in the carrier substrate is provided with at least two or more signal conductors from a solid state light source such as an LED or OLED wafer. This reduces the number of holes required by 50% compared to conventional through-hole technology.

[0022] The enclosure can enclose a hole or opening, for example on four sides thereof, while leaving room for the wafer.

[0023] The method can include attaching a layer to a carrier substrate, the encapsulant being formed in the layer.

[0024] The holes in the substrate may be through holes. Through holes are easier to manufacture.

[0025] The carrier substrate may be flexible (pliable). This allows for more types and shapes of installations (mountings).

[0026] The connection may be a connector, and can comprise a bead of conductive glue. These are easier to manufacture.

[0027] The fourth major surface of the light emitting wafer and the second major surface of the carrier substrate may be substantially flush or coplanar. This makes it easier to form a connection between the wafer and the substrate and to repair or replace the wafer.

[0028] An offset (OFF) can be set (i.e., allowed) between the fourth major surface and the second major surface. The offset OFF is preferably less than the thickness of the carrier substrate, preferably less than 30% of the thickness of the carrier substrate, more preferably less than 10% of the thickness of the carrier substrate. The offset can be, for example, at most 30% or more preferably at most 10%. In these cases, the offset has little effect. For example, the offset can be at most 30 microns, or more preferably at most 10 microns. For example, the carrier substrate can be a PCB, the thickness of which can be between 0.1 mm and 10 mm.

[0029] The back side of a carrier substrate such as a PCB, where the contacts are made, is preferably covered by an insulating layer, such as an insulating tape applied to the back side. Alternatively, an insulating coating such as a lacquer may be applied, for example by spraying.

[0030] Embodiments of the present invention provide a method for repairing a light emitting chip connected to a carrier substrate as described above. If any contact on the fourth main surface of the light emitting chip electrically connected to the contact on the second main surface of the carrier substrate is damaged, the damaged connection can be repaired without removing the sealing material.

[0031] The light emitting wafer may have a light emitting element. The light emitting element may be a solid state light source such as an LED or an OLED.

[0032] The method can include:

[0033] A light emitting wafer is positioned in a hole or opening formed in a carrier substrate, whereby the carrier substrate has a first major surface or side and a second major surface or side, and the light emitting wafer has a third major surface or side and a fourth major surface or side. The method includes: positioning a light emitting element on the third major surface; positioning a contact element in or on the fourth major surface of the light emitting wafer; electrically connecting the contact element to the anode and cathode of the light emitting element; and electrically connecting the contact on the fourth major surface of the light emitting wafer to the contact on the second major surface of the carrier substrate.

[0034] The method may include sealing the light emitting wafer on the carrier substrate, wherein the sealant may be silicone or a silicone-based glue.

[0035] The hole may be formed as a through hole.

[0036] Each hole or opening in the carrier substrate is provided with at least two or more signal conductors from a solid state light source such as an LED or OLED wafer. This reduces the number of holes required by 50% compared to conventional through-hole technology.

[0037] The carrier substrate may be a printed circuit board.

[0038] The carrier substrate may be flexible.

[0039] The electrical connection step may include using beads of conductive glue.

[0040] The fourth main surface of the light emitting wafer and the second main surface of the carrier substrate may be arranged to be substantially flush or coplanar.

[0041] An offset (OFF) may be set (i.e. allowed) between the fourth major surface and the second major surface. The offset OFF is preferably less than the thickness of the carrier substrate, preferably less than 30% of the thickness of the carrier substrate, more preferably less than 10% of the thickness of the carrier substrate. The offset can be, for example, at most 30% or more preferably at most 10%. In this case, the offset has almost no effect. For example, the offset can be at most 30 microns, or more preferably at most 10 microns. For example, the carrier substrate may be a PCB, the thickness of which may be between 0.1 mm and 10 mm.

[0042] The method can include forming an enclosure that completely encloses the aperture, for example, on four sides thereof, while leaving room for one wafer.

[0043] The method can include attaching a layer to a carrier substrate, the encapsulant being formed in the layer.

[0044] The step of positioning the light emitting chip in the hole or opening may include attaching the light emitting chip to a foil or sheet and inserting the light emitting chip into the carrier substrate using the foil or sheet. The method can also include removing the foil or sheet to expose the first electrical contact and / or the second electrical contact.

[0045] The encapsulation can be formed in self-alignment with the hole or opening. Thus, the encapsulation on the carrier substrate and the hole on the carrier substrate can be formed in a self-aligned manner. Each chip can be introduced into a through hole or opening of the carrier substrate. The contact pads can also be applied in an aligned manner.

[0046] In another aspect, the present invention provides a kit of parts comprising:

[0047] A plurality of light emitting wafers attached to the foil, and a carrier substrate; the light emitting wafers having light emitting elements; the carrier substrate having periodically spaced holes or openings; each of the plurality of light emitting wafers being aligned with the hole or opening.

[0048] According to one aspect of the invention, as described above, a solid-state light source such as an LED (or OLED) die is mounted in a hole, such as a through hole in a substrate such as a PCB to which the die is to be connected. An advantage of embodiments of the invention is that the contacts on the die will (e.g., substantially) be in the same plane as the contacts on the substrate such as the PCB. This is achieved by fitting the holes on the substrate such as the PCB so that the die fits into the opening, i.e., each die is received in the opening.

[0049] The contact of the wafer with the carrier substrate, such as a PCB, is carried out horizontally (i.e. in the x and Y planes) rather than vertically (i.e. in the z plane). The spacing of the wafer in the x plane along the x direction, i.e. Δx, is much larger than any offset in the z direction, i.e. Δz. If the offset (OFF) is small, the offset (OFF) between the fourth main surface and the second main surface can be tolerated. The offset is preferably less than the thickness of the carrier substrate, preferably less than 30% of the thickness of the carrier substrate, more preferably less than 10% of the thickness of the carrier substrate. The offset can be, for example, at most 30% or more preferably at most 10%. In this case, the offset has almost no effect. For example, the offset can be at most 30 microns, or more preferably at most 10 microns. For example, the carrier substrate can be a PCB, and its thickness can be between 0.1mm and 10mm.

[0050] An advantage of embodiments of the present invention is that the problem of improved adhesion is solved.

[0051] Definitions and Abbreviations

[0052] PCB Printed Circuit Board

[0053] COB Chip on Board

[0054] Flip-Chip is also called controlled folded chip connection. It is a method of interconnecting a semiconductor device to an external circuit via solder bumps that have been deposited to the chip pads. To mount the chip to an external circuit such as a PCB, the chip is flipped over with its top side down and aligned so that the connection pads align with the matching pads on the PCB, and then the solder reflows to complete the interconnection.

[0055] Footprint refers to the area (or the boundaries of that area) defined by the orthogonal projection of a component on a usually planar surface.

[0056] LED Light Emitting Diode or OLED (Organic Light Emitting Diode)

[0057] A naked die is a chip without a chip carrier or other electronic devices, so that the die must be connected to conductors on a carrier substrate such as a PCB.

[0058] Flexible PCB can be designed to withstand a 5mm bending radius.

[0059] The offset OFF is an acceptable offset between the carrier substrate and the light emitting chip in the z-direction, ie, in the direction perpendicular to the carrier substrate. BRIEF DESCRIPTION OF THE DRAWINGS

[0060] Figure 1 An example of a bare die LED according to the prior art is shown, connected to conductors on a carrier substrate.

[0061] Figure 2 An example of a bare die LED connected to a printed circuit board and sealed according to the present invention is shown.

[0062] Figure 3 Shown is how the die fits into an opening or via in a printed circuit board.

[0063] Figure 4A and 4B An example of the footprint of an opening or via in a printed circuit board is shown.

[0064] Figure 5 is a cross section of a die array on a carrier substrate.

[0065] Figure 6 is a perspective view of a die array on a carrier substrate.

[0066] Figure 7 A perspective view of a printed circuit board according to the invention with an opening and a corresponding enclosure is shown.

[0067] Figure 8 A cross section of a printed circuit board with an opening and a corresponding enclosure is shown.

[0068] Fig. 9A A cross section of a printed circuit board is shown with a film or multiple layers on top (covered with) that are used to form an enclosure.

[0069] Fig. 9B A cross section of a printed circuit board is shown, which once punched or drilled to form an opening for the die is covered on top by a film or layer (overlain by a film or layer).

[0070] Fig.10 A cross section of a carrier film is shown with the die aligned with an opening in a printed circuit board and a corresponding package.

[0071] Fig.11 A cross section of the die assembled in the opening and enclosure is shown after encapsulation material has been dispensed in the enclosure.

[0072] Fig.12 A cross section of a die assembled in an opening and capsule is shown after encapsulation material has been dispensed in and between the capsules.

[0073] Fig.13 A cross section of the die is shown while allowing contact to electrical contacts on the second surface of the die and electrical contacts on the second surface of the printed circuit board. DETAILED DESCRIPTION

[0074] The present invention will be described with reference to the particular embodiments but the invention is not limited thereto but only by the claims.Any reference signs in the claims should not be construed as limiting the scope.

[0075] When the term "comprising" is used in this specification and claims, it does not exclude other elements or steps. Where an indefinite or definite article is used referring to a singular noun such as "a" or "an", "the", this includes a plural of that noun, unless something else is specifically stated.

[0076] In addition, the terms "first", "second", "third", etc. in the specification and claims are used to distinguish between similar elements, and are not necessarily used to describe a sequence or time order unless specifically stated. It should be understood that the terms used in this way are interchangeable under appropriate circumstances, and the embodiments of the present invention described herein can operate in other sequences than those described or illustrated herein. The terms or definitions used herein are provided only to assist in understanding the present invention.

[0077] Embodiments of the present invention relate to displays having solid-state light sources in the form of wafers. An LED or OLED may include multiple layers, such as a semiconductor layer and an active layer. Typically, a solid-state light source such as an LED or OLED will have two electrical contacts. An LED or OLED may include a substrate, a first semiconductor layer, an active layer, a second semiconductor layer, a reflective layer, a first electrode, and a second electrode.

[0078] Figure 2 A cross section of an example of a solid-state wafer is shown, the solid-state wafer such as an LED (or OLED) wafer 20, which is connected to and sealed on a carrier substrate 23 such as a printed circuit board according to an embodiment of the present invention. The bare die 20 has a first major surface or side 20A and a second side or major surface 20B. The light-emitting diode (or OLED) element 20C is positioned on the first major surface 20A. Contact elements 21A and 21B are positioned in or on the second major surface 20B of the bare die 20. For example, contact elements 21A and 21B are electrically connected to the anode and cathode of the light-emitting diode (LED or OLED) element 20C. The anode and cathode are signal conductors, and for each hole or opening in the carrier substrate, at least two or more signal conductors (e.g., anodes and cathodes) from a solid-state light source such as an LED or OLED wafer are provided. Compared with conventional through-hole technology, this reduces the number of holes required by 50%.

[0079] The die 20 is mounted in a through hole or opening 22 in a carrier substrate 23 such as made in a printed circuit board, for example. The carrier substrate 23 such as a printed circuit board may be flexible. The carrier substrate 23 has a first major surface or side 23A and a second side or major surface 23B.

[0080] The contacts 21A and 21B on the second major surface 20B of the die 20 are electrically connected to the contacts 24A and 24B on the second major surface 23B of the carrier substrate 23, such as a printed circuit board, by means of a connector. The connector may be, for example, conductive glue beads 25 and 26. The second major surface 20B of the die 20 and the second major surface 23B of the carrier substrate 23 may be substantially flush or coplanar. There may be an offset such as a small offset OFF between the second major surface 20B and the second major surface 23B. The offset OFF may be caused by, for example, the tolerance of the equipment used to position the wafer 20 in the opening 22. The offset OFF is preferably less than the thickness of the carrier substrate 23. An offset (OFF) may be set (i.e., allowed) between the fourth major surface and the second major surface. The offset OFF is preferably less than the thickness of the carrier substrate, preferably less than 30% of the thickness of the carrier substrate, and more preferably less than 10% of the thickness of the carrier substrate. The offset can be, for example, at most 30% or more preferably at most 10%. In this case, the offset has almost no effect. For example, the offset can be at most 30 micrometers, or more preferably at most 10 micrometers.For example, the carrier substrate may be a PCB, which may have a thickness between 0.1 mm and 10 mm.

[0081] The light emitting die 20 is preferably sealed in an encapsulant such as silicone or a silicone-based glue 27 .

[0082] If the electrical connection between the electrodes on the die 20 (eg, 21A) and the electrodes on the carrier substrate 23 (eg, 24A) is broken, repair can be performed without removing the encapsulation material 27 .

[0083] Figure 3 Shown is a top view of a solid state die, such as an LED (or OLED), mounted in an opening 22 made in a carrier substrate 23, such as a printed circuit board.

[0084] like Figure 4A As shown, if the occupied area of ​​the light emitting chip 20 is, for example, a square with a side length of L1, the opening 22 can be defined by, for example, a square 40A with a side length L2>L1. Figure 4B As shown, if the occupied area of ​​the light emitting chip 20 is, for example, a square with a side length of L1, the opening 22 can be defined (bounded) by, for example, a circle 40B with a radius R>√2*L1 (L2 is 2R). More generally, the lateral dimensions of the opening 22 (side length of a square, radius of a disk, width and length of a rectangle, etc.) are greater than the lateral dimensions of the occupied area of ​​the light emitting chip 20. The light emitting chip 20 can then be fitted in the opening 22 and can be received in the opening 22. Once inserted, the second surface 20B will be substantially coplanar with the second surface 23B.

[0085] The size difference between L2 and L1 or the size difference between R (= L2 / 2) and L1 (i.e., in the x and y planes) is preferably greater than the tolerance ε that affects the alignment of the exposed light-emitting wafer 20 and the opening 22 in the z plane. Therefore, the offset is preferably less than the thickness of the carrier substrate. An offset (OFF) can be set (i.e., allowed) between the fourth main surface and the second main surface. The offset OFF is preferably less than the thickness of the carrier substrate, preferably less than 30% of the thickness of the carrier substrate, and more preferably less than 10% of the thickness of the carrier substrate. The offset can be, for example, at most 30% or more preferably at most 10%. In this case, the offset has almost no effect. For example, the offset can be at most 30 microns, or more preferably at most 10 microns. For example, the carrier substrate can be a PCB, and its thickness can be between 0.1 mm and 10 mm.

[0086] A method of assembling a display having a solid-state light source such as an LED (or OLED) display according to an embodiment of the present invention will be described with reference to the accompanying drawings.

[0087] like Figure 5 and Figure 6 As shown, the light emitting dies 200, 201, ... are pre-positioned on a carrier film 50. The film 50 is used as a disposable tool for providing and allowing the die to be attached to the carrier substrate 23. Figure 5 shows a cross section through the carrier membrane 50, while Figure 6 A perspective view of light emitting dies distributed on a carrier film 50, for example in a periodic array, is given. Figure 6 In FIG. 5 , the solid state light sources may be LEDs (or OLEDs) which are shown as RGB triplets forming a regularly spaced array of RGB pixels. The carrier film 50 may be made of plastic, such as PVC, polyolefin or polyethylene sheet or foil.

[0088] The carrier film 50 can be, for example, a tape such as a dicing tape, a backing film tape, or a blue film known in the art. The distance between adjacent light emitting chips ( Figure 5 Dx in and Figure 6 The distances Dx' and Dy') can be the same as the distances between adjacent light emitting chips in a conventional LED (or OLED) display. Other configurations are also within the scope of the present invention.

[0089] For example, LEDs (or OLEDs) can be used to build LED (or OLED) displays, and the LEDs (or OLEDs) can be grouped into clusters of three or four such LEDs (or OLEDs). Each LED (or OLED) in the cluster can correspond to a sub-pixel of a given primary color (e.g., RGB or RGBW, where R=red, G=green, B=blue, and W=white).

[0090] Figure 6A perspective view of a solid state light source, such as LEDs grouped in RGB triplets, is shown. A first triplet 200 includes a red LED 200A, a green LED 200B, and a blue LED 200C. A second triplet 201 includes a red LED 201A, a green LED 201B, and a blue LED 201C. The distance between two adjacent triplets, such as the first triplet (200A, 200B, 200C) and the second triplet (201A, 201B, 201C) along a first direction is Dx'. The distance between two adjacent triplets, such as the first triplet (200A, 200B, 200C) and the third triplet (202A, 202B, 201C) along a second direction is Dy'.

[0091] Figure 8 Openings 220, 221, ... are shown made in a substrate such as a printed circuit board 70. These openings may be through holes. Conductive traces and contact pads may be made on the back side (rear side). This is usually the case with PCBs. The printed circuit board 70 may be a flexible circuit board made of a material such as polyimide, PEEK, polyester, ...

[0092] The openings 220, 221, ... may be formed by any suitable technique such as subtractive machining (subtractive machining), for example by punching, cutting, drilling or laser ablation or drilling. However, the carrier substrate may also have holes moulded therein.

[0093] Figure 7 and / or Figure 8 A cross section of a printed circuit board 70 having openings 220, 221 and corresponding capsules 230, 231 is shown. The capsules 230, 231, ... are formed or positioned around each hole or opening 220, 221, .... The capsules 230, 231, ... surround the respective holes or openings. The capsules 230, 231 can be cylindrical and open at both ends. For example, the capsules 230, 231 can have a circular cross section, a hexagonal cross section, or a square cross section. If the capsules 230, 231 have a circular cross section with an inner diameter DE and the openings 220, 221, ... are bounded by a circle with a diameter DO, then DE is preferably greater than DO (DE>DO).

[0094] Figure 7 Shown is a perspective view of a printed circuit board 70 with holes or openings 220, 221, 222 and a corresponding capsule made in a thick layer or film 71 formed on the printed circuit board 70. The layer or film 71 may be 100 to 300 microns thick, for example 200 microns thick.

[0095] The encapsulation can for example be printed on a printed circuit board (eg inkjet printing or screen printing or any other form of 3D printing).

[0096] Alternatively, the capsule can be formed by drilling or punching holes in a thick film 71 which can be deposited on or secured to a printed circuit board 70. In that case, Fig. 9A and Fig. 9B As shown, the capsule is formed simultaneously with the opening in a self-aligned manner. The layer or film 71 may be 100 to 300 microns thick, for example 200 microns thick. The layer or film 71 can be applied by roll lamination, roll-to-roll process, blade coating, etc.

[0097] Fig. 9A A cross section is shown with a printed circuit board 70 having (covered with) a film or layer 71 on top. Both the PCB 70 and the layer 71 are fixed or fastened to each other. The layer 71 may be, for example, a resin that solidifies after having been dispensed and spread on the printed circuit board 70, thereby adhering to the printed circuit board 70. The layer or film 71 may be 100 to 300 microns thick, for example 200 microns thick. The layer or film 71 can be applied by roll lamination, a roll-to-roll process, blade coating, etc.

[0098] like Fig. 9B As shown, holes 220, 221 are made in both PCB 70 and layer 71 by subtractive machining processes, for example they are punched, ground, milled, laser ablated, drilled or laser drilled. They can be formed by subtractive machining, for example punching, grinding, milling, forming, drilling or laser drilling or ablation at the same time. The resulting cross section can be Fig. 9B The enclosures can be interconnected or independent.

[0099] The electrical contacts 72 , 73 , 74 , 76 . . . on the printed circuit board 70 will be electrically connected to the contact pads of a solid state light source such as an LED (or OLED) on a die that is on the side of the printed circuit board opposite to the side of the contact layer 71 .

[0100] When formed, for example, by printing on a printed circuit board 70, the enclosures 230, 231, ... are different from each other, such as Figure 7 and 8 shown.

[0101] The openings or holes 220, 221, ... form a dot matrix on the printed circuit board, which has the same periodicity as the dot matrix formed by the die on the carrier film 50. The openings or holes 220, 221, ... in the printed circuit board 70 can be aligned with the die 200 on the carrier film 50. Fig.10, a cross section of a carrier film 50 with light emitting dies 200, 201, ... is shown, which are aligned with openings 220, 221 in a printed circuit board 70 and corresponding capsules 230, 231, ... made in a thick film 71. The layer or film 71 may be 100 to 300 microns thick, for example 200 microns thick. It can be applied by roll lamination, a roll-to-roll process, doctor blade coating, etc.

[0102] When the light emitting dies 200, 201, ... are positioned in the corresponding holes or openings 220 and 221 with the capsules 230, 231, ..., the encapsulation material 270 can be dispensed in the capsules (enclosures) 230, 231, .... Fig.11 The capsules need not be connected to each other (ie, when they are printed separately rather than punched in a thick film). The encapsulation material can also be dispensed around and within the capsules 230, 231, ... This is shown in FIG. Fig.12 . The encapsulation material 270 can, for example, be cured or cross-linked. This can be, for example, by chemical cross-linking, room temperature vulcanization, electron beam, UV or infrared cross-linking. For example, the encapsulation material can be silicone or a silicone-based glue.

[0103] The carrier film 50 is then removed (e.g., peeled off), thereby providing contact paths with the electrical contacts on the second surface of the die 200, 201 and the electrical contacts on the second surface of the printed circuit board 70. The connection between the electrical contacts (electrical contacts) can be made, for example, by dispensing a conductive glue to create the connection. This is done in Fig.13 The first electrical contact is formed by a conductive glue bead 240 between the electrode 72 on the printed circuit board and the first contact on the wafer 200. The second electrical contact is formed by a conductive glue bead 241 between the electrode 73 on the printed circuit board and the second contact on the wafer 200.

[0104] The back side of the finished product according to any or all embodiments is preferably covered with an insulating layer applied to all contacts. The insulating layer can be, for example, an insulating tape or an insulating varnish or a coating of any other suitable insulating material. For example, this can be done by spraying.

[0105] Although the invention has been described above with reference to specific embodiments, this is done to illustrate the invention rather than to limit the invention. Those skilled in the art will appreciate that various modifications and different combinations of the disclosed features are possible without departing from the scope of the invention.

Claims

1. A packaging structure of a light-emitting chip, comprising a light-emitting chip connected to a carrier substrate, the light-emitting chip having a light-emitting element, and the light-emitting chip is located in an opening made in the carrier substrate, the carrier substrate having a first side and a second side, the light-emitting chip having a third side and a fourth side, the light-emitting element being positioned on the third side, the first side and the second side being opposite to each other, the third side and the fourth side being opposite to each other, a first contact element being positioned in or on the fourth side of the light-emitting chip, the first contact element being electrically connected to an anode and a cathode of the light-emitting element, the first contact elements on the fourth side of the light-emitting chip being electrically connected to the second contact elements on the second side of the carrier substrate by means of conductive connections, in, The fourth side of the light emitting chip and the second side of the carrier substrate are coplanar, and Wherein, the electrical connection between the first contact element and the second contact element comprises a conductive glue bead.

2. The packaging structure of the light emitting chip according to claim 1, characterized in that: The light emitting wafer is sealed on the carrier substrate.

3. The packaging structure of the light emitting chip according to claim 2, characterized in that: The light emitting wafer is sealed by a sealant which is silicone or silicone-based glue.

4. The light emitting chip packaging structure according to claim 1, characterized in that: The opening is a through hole.

5. The light emitting chip packaging structure according to claim 1, characterized in that: The carrier substrate is a printed circuit board.

6. The light emitting chip packaging structure according to claim 1, characterized in that: The carrier substrate is flexible.

7. The light emitting chip packaging structure according to claim 1, characterized in that: The enclosure closes the opening on three or four sides thereof.

8. The light emitting chip packaging structure according to claim 7, characterized in that: Also included is a layer attached to the carrier substrate, wherein the encapsulant is formed in the layer.

9. The light emitting chip packaging structure according to claim 1, characterized in that: The light emitting wafer is attached to a removable foil for placing the light emitting wafer into the opening.

10. The light emitting chip packaging structure according to claim 1, characterized in that: The method also includes forming a capsule on the carrier substrate to close the opening.

11. The light emitting chip packaging structure according to claim 10, characterized in that: The enclosure closes the opening on four sides thereof.

12. A method of connecting a light emitting wafer to a carrier substrate, the light emitting wafer having light emitting elements, the method comprising: The light emitting chip is positioned in an opening formed in the carrier substrate, the carrier substrate having a first side and a second side, the light emitting chip having a third side and a fourth side, the first side and the second side being opposite to each other, the third side and the fourth side being opposite to each other, positioning the light emitting element on the third side, positioning a first contact element in or on the fourth side of the light emitting wafer, electrically connecting the first contact element to the anode and cathode of the light emitting element, and electrically connecting each of the first contact elements on the fourth side of the light emitting chip to the second contact elements on the second side of the carrier substrate, The step of electrically connecting the first contact element to the second contact element comprises using a conductive glue bead, and Wherein, the fourth side portion of the light emitting chip and the second side portion of the carrier substrate are arranged to be coplanar.

13. The method according to claim 12, characterized in that The method includes packaging the light emitting chip on the carrier substrate.

14. The method according to claim 13, characterized in that The method further includes sealing the light emitting chip with a sealant, wherein the sealant is silicone or silicone-based glue.

15. The method according to claim 12, characterized in that The opening is a through hole.

16. The method according to claim 12, characterized in that The carrier substrate is a printed circuit board.

17. The method according to claim 12, characterized in that The carrier substrate is flexible.

18. The method according to claim 12, characterized in that Also included is a capsule formed to enclose the opening.

19. The method according to claim 18, characterized in that Also included is attaching a layer to the carrier substrate, the encapsulant being formed in the layer.

20. The method according to claim 12, characterized in that Positioning the light emitting wafer in the opening includes attaching the light emitting wafer to a foil, and inserting the light emitting wafer into the carrier substrate using the foil.

21. The method according to claim 20, characterized in that Also included is removing the foil to expose the first contact element and / or the second contact element.

22. The method according to claim 18, characterized in that The capsule is formed in self-alignment with the opening.

23. A kit of parts comprising: - a plurality of light emitting chips attached to the foil, and - a carrier substrate; the light emitting wafer having light emitting elements, the carrier substrate having periodically spaced openings, the foil and the carrier substrate being adapted such that when the foil is provided to the carrier substrate, each of the plurality of light emitting wafers is aligned with one of the openings for placing each of the plurality of light emitting wafers in one of the openings, The carrier substrate further has a first side and a second side, the first side and the second side are opposite to each other, the light emitting chip has a third side and a fourth side, the third side and the fourth side are opposite to each other, the light emitting element is positioned on the third side, the first contact element is positioned in or on the fourth side of the light emitting chip, the first contact element is electrically connected to the anode and cathode of the light emitting element, and the first contact elements on the fourth side of the light emitting chip are electrically connected to the second contact elements on the second side of the carrier substrate by means of conductive connections, wherein the fourth side of the light emitting chip and the second side of the carrier substrate are coplanar, and Wherein, the electrical connection between the first contact element and the second contact element comprises a conductive glue bead.

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