Semiconductor structure and method for forming the same

Abstract

A semiconductor structure and a method for forming the same, wherein the structure comprises: a substrate; a magnetic tunnel junction located on the surface of the substrate, the magnetic tunnel junction comprising: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; and a sidewall tunneling layer located on the sidewall surface of the magnetic tunnel junction. The semiconductor structure has good performance.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor manufacturing technology, and in particular to a semiconductor structure and a forming method thereof. Background Art

[0002] MRAM (Magnetic Random Access Memory) is a non-volatile magnetic random access memory. It has the high-speed read and write capabilities of static random access memory (SRAM), the high integration of dynamic random access memory (DRAM) and much lower power consumption than DRAM. Compared with flash memory (Flash), its performance will not degrade with the increase of usage time. Due to the above characteristics of MRAM, it is called universal memory and is considered to be able to replace SRAM, DRAM, EEPROM and Flash.

[0003] Unlike traditional random access memory chip manufacturing technology, the data in MRAM is not stored in the form of charge or current, but in a magnetic state, and is sensed by measuring resistance without interfering with the magnetic state. MRAM uses a magnetic tunnel junction (MTJ) structure to store data. Generally speaking, an MRAM unit consists of a transistor (1T) and a magnetic tunnel junction (MTJ) to form a storage unit. The magnetic tunnel junction (MTJ) structure includes at least two electromagnetic layers and an insulating layer for isolating the two electromagnetic layers. The current flows vertically from one electromagnetic layer through the insulating layer or "through" another electromagnetic layer. One of the electromagnetic layers is a fixed magnetic layer, which fixes the electrode in a specific direction through a strong fixed field. The other electromagnetic layer is a freely rotatable magnetic layer that keeps the electrode on one side.

[0004] However, the performance of the magnetic tunnel junction prepared by the prior art is poor. Summary of the invention

[0005] The technical problem solved by the present invention is to provide a semiconductor structure and a method for forming the same, so as to improve the performance of the formed semiconductor structure.

[0006] In order to solve the above technical problems, the technical solution of the present invention provides a semiconductor structure, including: a substrate; a magnetic tunnel junction located on the surface of the substrate, the magnetic tunnel junction including: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; a sidewall tunneling layer located on the sidewall surface of the magnetic tunnel junction.

[0007] Optionally, the material of the sidewall tunneling layer includes: boron nitride, magnesium oxide or aluminum oxide.

[0008] Optionally, the thickness of the sidewall tunneling layer ranges from 1 angstrom to 20 nanometers.

[0009] Optionally, the thickness of the sidewall tunneling layer ranges from 1 angstrom to 5 nanometers.

[0010] Optionally, a conductive layer is provided in the substrate, and the substrate exposes a surface of the conductive layer.

[0011] Optionally, the bottom electromagnetic structure includes: a lower electrode layer located on the surface of the substrate; a lower composite layer located on the surface of the lower electrode layer; and a lower electromagnetic layer located on the surface of the lower composite layer.

[0012] Optionally, the material of the lower electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the lower composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the lower electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0013] Optionally, the top electromagnetic structure includes: an upper electromagnetic layer located on the surface of the insulating layer; an upper composite layer located on the surface of the upper electromagnetic layer; and an upper electrode layer located on the surface of the upper composite layer.

[0014] Optionally, the material of the upper electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the upper composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the upper electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0015] Optionally, the material of the insulating layer includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0016] Optionally, it also includes: a protective layer located on the side wall surface of the sidewall tunneling layer.

[0017] Optionally, the material of the protective layer includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide or silicon nitride oxide.

[0018] Correspondingly, the technical solution of the present invention also provides a method for forming any of the above-mentioned semiconductor structures, comprising: providing a substrate; forming a magnetic tunnel junction on the surface of the substrate, the magnetic tunnel junction comprising: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; forming a sidewall tunneling layer on the sidewall surface of the magnetic tunnel junction.

[0019] Optionally, the method for forming the sidewall tunneling layer includes: forming a magnetic conductive material film on the substrate surface, and the top surface and sidewall surface of the magnetic tunnel junction; etching back the magnetic conductive material film until the substrate surface and the top surface of the magnetic tunnel junction are exposed, and forming the sidewall tunneling layer on the substrate surface.

[0020] Optionally, the process for forming the magnetic conductive material film includes: a physical vapor deposition process, a chemical vapor deposition process, an atomic layer deposition process or a plasma atomic layer deposition process.

[0021] Optionally, the method for forming the magnetic tunnel junction includes: forming a bottom electromagnetic material film on the surface of the substrate; forming an insulating film on the surface of the bottom electromagnetic material film; forming a top electromagnetic material film on the surface of the insulating film; forming a patterned layer on the surface of the top electromagnetic material film; using the patterned layer as a mask, etching the bottom electromagnetic material film, the insulating film and the top electromagnetic material film until the substrate surface is exposed, so that the bottom electromagnetic material film forms a bottom electromagnetic structure, the insulating film forms an insulating layer, and the top electromagnetic material film forms a top electromagnetic structure, thereby forming a magnetic tunnel junction on the substrate surface.

[0022] Optionally, the method for forming the insulating film includes: forming an insulating material film on the surface of the underlying electromagnetic material film; and annealing the insulating material film to form the insulating film.

[0023] Optionally, the insulating material film forming process includes: a physical vapor deposition process, a chemical vapor deposition process or an atomic layer deposition process.

[0024] Compared with the prior art, the technical solution of the embodiment of the present invention has the following beneficial effects:

[0025] In the semiconductor structure provided by the technical solution of the present invention, the side wall surface of the magnetic tunnel junction has a side wall tunneling layer. The magnetic tunnel junction includes: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic layer, and a top electromagnetic structure located on the surface of the insulating layer. Since spin electrons can tunnel through the side wall tunneling layer, when the magnetic tunnel junction is in the on state, spin electrons located in the bottom electromagnetic structure can tunnel through the insulating layer into the top electromagnetic structure, or spin electrons located in the top electromagnetic structure can tunnel through the insulating layer into the bottom electromagnetic structure, and spin electrons between the bottom electromagnetic structure and the top electromagnetic structure can also tunnel through the side wall tunneling layer located on the side wall surface of the magnetic tunnel junction, which is conducive to reducing the on-resistance and making the performance of the semiconductor structure better.

[0026] In the method for forming a semiconductor structure provided by the technical solution of the present invention, a sidewall tunneling layer is formed on the sidewall surface of the magnetic tunnel junction. The magnetic tunnel junction includes: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer. Since spin electrons can tunnel through the sidewall tunneling layer, when the magnetic tunnel junction is in a conducting state, spin electrons located in the bottom electromagnetic structure can tunnel through the insulating layer into the top electromagnetic structure, or spin electrons located in the top electromagnetic structure can tunnel through the insulating layer into the bottom electromagnetic structure, and spin electrons between the bottom electromagnetic structure and the top electromagnetic structure can also tunnel through the sidewall tunneling layer located on the sidewall surface of the magnetic tunnel junction, which is conducive to reducing the on-resistance, so that the performance of the formed semiconductor structure is better.

[0027] Furthermore, since the process of forming the insulating material film includes: a physical vapor deposition process, a chemical vapor deposition process or an atomic layer deposition process, and the material formed by the deposition process is amorphous or polycrystalline, by annealing the insulating material film, the high temperature can transform the amorphous or polycrystalline material into a single crystal material, so that the performance of the formed insulating film is better, thereby improving the performance of the formed semiconductor structure. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 It is a schematic diagram of the structure of a semiconductor structure;

[0029] Figures 2 to 10 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention. DETAILED DESCRIPTION

[0030] As described in the background art, the performance of existing semiconductor structures is poor.

[0031] The following is a detailed description of the reasons for the poor performance of the semiconductor structure with reference to the accompanying drawings. Figure 1 It is a structural diagram of a semiconductor structure.

[0032] Please refer to Figure 1 , including: a substrate 100; a magnetic tunnel junction 110 located on the surface of the substrate 100, the tunnel junction 110 including: a bottom electromagnetic structure 111 located on the surface of the substrate 100, an insulating layer 112 located on the surface of the bottom electromagnetic structure 111, and a top electromagnetic structure 113 located on the surface of the insulating layer 112; a protective layer 120 located on the side wall surface of the magnetic tunnel junction 110.

[0033] In the above structure, the protection layer 120 can protect the sidewall surface of the magnetic tunnel junction, thereby reducing the impact of subsequent processes on the material of the magnetic tunnel junction 110, and is beneficial for the magnetic tunnel junction 110 to maintain integrity, thereby improving the performance of the semiconductor structure.

[0034] However, the spin electrons in the bottom electromagnetic structure 111 and the top electromagnetic structure 113 cannot tunnel and conduct in the protection layer 120. Therefore, the on-resistance of the magnetic tunnel junction 110 is still large, so that the performance of the semiconductor structure is still poor.

[0035] To solve the above technical problems, an embodiment of the present invention provides a semiconductor structure, comprising: a substrate; a magnetic tunnel junction located on the surface of the substrate, the magnetic tunnel junction comprising: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; and a sidewall tunneling layer located on the sidewall surface of the magnetic tunnel junction. The semiconductor structure has good performance.

[0036] In order to make the above-mentioned objects, features and beneficial effects of the present invention more obvious and easy to understand, specific embodiments of the present invention are described in detail below with reference to the accompanying drawings.

[0037] Figures 2 to 10 It is a structural schematic diagram of each step of a method for forming a semiconductor structure in one embodiment of the present invention.

[0038] Please refer to Figure 2 , providing a substrate 200.

[0039] In this embodiment, the substrate 200 has a conductive layer 210 therein, and the surface of the conductive layer 210 is exposed on the substrate 200 .

[0040] In this embodiment, the base 200 includes: a substrate (not shown in the figure) and a dielectric layer (not shown in the figure) located on the surface of the substrate, and the conductive layer 210 is located in the dielectric layer.

[0041] The material of the substrate is a semiconductor material. In this embodiment, the material of the substrate is silicon. In other embodiments, the material of the substrate includes silicon carbide, silicon germanium, a multi-component semiconductor material composed of III-V group elements, silicon on insulator (SOI) or germanium on insulator.

[0042] In this embodiment, the substrate has a device structure therein, and the device structure includes one or more of a PMOS transistor, an NMOS transistor, a CMOS transistor, a resistor, a capacitor, and an inductor.

[0043] The material of the dielectric layer includes: silicon oxide, low-K (relative dielectric constant greater than or equal to 2.5 and less than 3.9) dielectric material or ultra-low-K (relative dielectric constant less than or equal to 2.5) dielectric material.

[0044] In this embodiment, the material of the dielectric layer is silicon oxide.

[0045] The material of the conductive layer 210 includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride and tantalum.

[0046] In this embodiment, the conductive layer 210 is made of copper.

[0047] Next, a magnetic tunnel junction is formed on the surface of the substrate. The magnetic tunnel junction includes: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer. For the specific process of forming the magnetic tunnel junction, please refer to Figures 3 to 7 .

[0048] Please refer to Figure 3 , forming a bottom electromagnetic material film 220 on the surface of the substrate 200 .

[0049] In this embodiment, the bottom electromagnetic material film 220 is formed on the surface of the substrate 200 and the surface of the conductive layer 210 .

[0050] In this embodiment, the bottom electromagnetic material film 220 includes: a lower electrode film 221 located on the surface of the substrate 200 , a lower composite film 222 located on the surface of the lower electrode film 221 , and a lower electromagnetic film 223 located on the surface of the lower composite film 222 .

[0051] The material of the lower electrode film 221 includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum.

[0052] In this embodiment, the material of the lower electrode film 221 is tantalum.

[0053] The lower composite film 222 includes several overlapping conductive layers (not shown in the figure), and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0054] In this embodiment, the lower composite film 222 includes two overlapping conductive layers (not shown in the figure), one of which is made of platinum and the other is made of cobalt.

[0055] In other embodiments, the material of the conductive layer may also be one or a combination of iron, platinum, cobalt, nickel, cobalt-iron-boron, cobalt-iron, nickel-iron and lanthanum-stron-manganese-oxide.

[0056] The material of the lower electromagnetic film 223 includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0057] In this embodiment, the material of the lower electromagnetic film 223 is cobalt iron boron.

[0058] After forming the bottom electromagnetic material film, an insulating film is formed on the surface of the bottom electromagnetic material film. For the specific process of forming the insulating film, please refer to Figures 4 to 5 .

[0059] Please refer to Figure 4 , an insulating material film 230 is formed on the surface of the bottom electromagnetic material film 220 .

[0060] The insulating material film 230 is used for forming an insulating film later.

[0061] The material of the insulating material film 230 includes one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0062] In this embodiment, the insulating material film 230 is made of magnesium oxide.

[0063] The thickness of the insulating material film 230 is in the range of 1 angstrom to 5 nanometers.

[0064] The insulating material film 230 is formed by a process including a physical vapor deposition process, a chemical vapor deposition process or an atomic layer deposition process.

[0065] In this embodiment, the material of the insulating material film 230 formed by the physical vapor deposition process is amorphous magnesium oxide.

[0066] Please refer to Figure 5 , the insulating material film 230 is annealed to form the insulating film 231.

[0067] The insulating film 231 is formed by the insulating material film 230 , so the material of the insulating film 231 includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0068] In this embodiment, the material of the insulating film 231 is magnesium oxide.

[0069] Since the process of forming the insulating material film 230 includes: physical vapor deposition process, chemical vapor deposition process or atomic layer deposition process, the material formed by the deposition process is amorphous or polycrystalline. By annealing the insulating material film 230, the high temperature can transform the amorphous or polycrystalline material into a single crystal material, so that the performance of the formed insulating film 231 is better, thereby improving the performance of the formed semiconductor structure.

[0070] In this embodiment, the insulating film 231 formed of the single crystal magnesium oxide material serves as a non-magnetic insulating layer in the middle of the magnetic tunnel junction formed subsequently, which is beneficial to improving the performance of the formed magnetic tunnel junction.

[0071] The temperature range of the annealing treatment is 300 degrees Celsius to 400 degrees Celsius.

[0072] The significance of selecting the temperature range is that: if the temperature is greater than 400 degrees Celsius, the temperature is too high, which may easily cause high temperature effects on the material of the underlying electromagnetic material film 220 and the devices in the substrate 200, resulting in poor performance of the formed semiconductor structure; if the temperature is less than 300 degrees Celsius, the temperature is too low, which is not conducive to converting amorphous or polycrystalline materials into single crystal materials, resulting in poor performance of the formed insulating film 231.

[0073] Please refer to Figure 6 , a top-layer electromagnetic material film 240 is formed on the surface of the insulating film 231 .

[0074] The top electromagnetic material film 240 includes: an upper electromagnetic film 241 located on the surface of the insulating film 231 , an upper composite film 242 located on the surface of the upper electromagnetic film 241 , and an upper electrode film 243 located on the surface of the upper composite film 242 .

[0075] The upper electromagnetic film 241 and the lower electromagnetic film 223 are made of the same material, which will not be described in detail herein.

[0076] The upper composite membrane 242 and the lower composite membrane 222 are made of the same material, which will not be described in detail herein.

[0077] The upper electrode film 243 and the lower electrode film 221 are made of the same material, which will not be described in detail herein.

[0078] Please refer to Figure 7 After forming the top electromagnetic material film 240, a patterned layer (not shown in the figure) is formed on the surface of the top electromagnetic material film 240, and the patterned layer exposes part of the surface of the top electromagnetic material film 240; using the patterned layer as a mask, the bottom electromagnetic material film 220, the insulating film 231 and the top electromagnetic material film 240 are etched until the surface of the substrate 200 is exposed, so that the bottom electromagnetic material film 220 forms a bottom electromagnetic structure 261, the insulating film 231 forms an insulating layer 262, and the top electromagnetic material film 240 forms a top electromagnetic structure 263, and a magnetic tunnel junction 260 is formed on the surface of the substrate 200.

[0079] The bottom electromagnetic structure 261 includes: a lower electrode layer (not shown in the figure) located on the surface of the substrate 200; a lower composite layer (not shown in the figure) located on the surface of the lower electrode layer; and a lower electromagnetic layer (not shown in the figure) located on the surface of the lower composite layer.

[0080] The top electromagnetic structure 263 includes: an upper electromagnetic layer located on the surface of the insulating layer; an upper composite layer located on the surface of the upper electromagnetic layer; and an upper electrode layer located on the surface of the upper composite layer.

[0081] In this embodiment, the patterned layer covers the surface of the top electromagnetic material film 240 on the conductive layer 210, so that after the patterning process, the bottom of the formed magnetic tunnel junction 260 contacts the surface of the conductive layer 210 to achieve electrical connection.

[0082] In this embodiment, after forming the magnetic tunnel junction 260 , the process further includes: removing the patterned layer.

[0083] After forming the magnetic tunnel junction, a sidewall tunnel layer is formed on the side surface of the magnetic tunnel junction. For details on the process of forming the sidewall tunnel layer, please refer to Figures 8 to 9 .

[0084] Please refer to Figure 8 A magnetic conductive material film 270 is formed on the surface of the substrate 200 and the top surface and side wall surface of the magnetic tunnel junction 260 .

[0085] The magnetic conductive material film 270 provides material for the subsequent formation of a sidewall tunneling layer.

[0086] The formation process of the magnetic conductive material film 270 includes: physical vapor deposition process, chemical vapor deposition process, atomic layer deposition process or plasma atomic layer deposition process.

[0087] The material of the magnetic conductive material film 270 includes boron nitride, magnesium oxide or aluminum oxide.

[0088] In this embodiment, the material of the magnetic conductive material film 270 is boron nitride.

[0089] Please refer to Fig. 9 , the magnetic conductive material film 270 is etched back until the surface of the substrate 200 and the top surface of the magnetic tunnel junction 260 are exposed, and the sidewall tunneling layer 271 is formed on the surface of the substrate 200.

[0090] The thickness of the sidewall tunneling layer 271 is in the range of 1 angstrom to 20 nanometers.

[0091] The preferred thickness range of the sidewall tunneling layer 271 is 1 angstrom to 5 nanometers.

[0092] It should be noted that the thickness refers to the dimension in a direction perpendicular to the side wall of the magnetic tunnel junction 260 .

[0093] The preferred range of the thickness of the sidewall tunneling layer 271 is 1 angstrom to 5 nanometers because: if the thickness of the sidewall tunneling layer 271 is less than 1 angstrom, the magnetic conduction effect of the sidewall tunneling layer 271 is not easy to control and is easily affected by the outside world, resulting in poor stability of the magnetic tunnel junction 260; if the thickness of the sidewall tunneling layer 271 is greater than 5 nanometers, a larger current is required to enable the sidewall tunneling layer 271 to have a tunneling conduction effect, which places higher requirements on device performance.

[0094] Since the sidewall tunneling layer 271 is formed by etching back the magnetic conductive material film 270, the material of the sidewall tunneling layer 271 includes boron nitride, magnesium oxide or aluminum oxide. The sidewall tunneling layer 271 formed by the material has magnetic conductivity.

[0095] In this embodiment, the material of the sidewall tunneling layer 271 is boron nitride. The sidewall tunneling layer 271 formed by boron nitride not only has a magnetic conductivity, but also does not cause oxidation to the magnetic tunnel junction 260 during the formation of the sidewall tunneling layer 271, thereby further improving the performance of the formed semiconductor structure.

[0096] The magnetic tunnel junction 260 includes: a bottom electromagnetic structure 261 located on the surface of the substrate 200, an insulating layer 262 located on the surface of the bottom electromagnetic structure 261, and a top electromagnetic structure 263 located on the surface of the insulating layer 262. By forming the sidewall tunneling layer 271 on the sidewall surface of the magnetic tunnel junction 260, since spin electrons can tunnel through the sidewall tunneling layer 271, when the magnetic tunnel junction 260 is in the on state, spin electrons located in the bottom electromagnetic structure 261 can tunnel through the insulating layer 262 into the top electromagnetic structure 263, or spin electrons located in the top electromagnetic structure 363 can tunnel through the insulating layer 262 into the bottom electromagnetic structure 261, and spin electrons between the bottom electromagnetic structure 261 and the top electromagnetic structure 263 can also tunnel through the sidewall tunneling layer 271 located on the sidewall surface of the magnetic tunnel junction 260, which is conducive to reducing the on-resistance and making the performance of the semiconductor structure better.

[0097] Please refer to Fig.10 After the sidewall tunneling layer 271 is formed, a protection layer 280 is formed on the side surface of the sidewall tunneling layer 271 .

[0098] The method for forming the protective layer 280 includes: forming a protective material film (not shown in the figure) on the surface of the substrate 200, the top surface of the magnetic tunnel junction 260, and the top surface and side wall surface of the sidewall tunneling layer 271; etching back the protective material film until the surface of the substrate 200 and the top surface of the magnetic tunnel junction are exposed, and forming the protective layer 280 on the side surface of the sidewall tunneling layer 271.

[0099] The material of the protection layer 280 includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide, or silicon nitride oxide.

[0100] In this embodiment, the material of the protection layer 280 is silicon nitride.

[0101] The protection layer 280 is used to protect the magnetic tunnel junction 260 and the sidewall tunnel layer 271, reduce the impact of subsequent processes on the magnetic tunnel junction 260 and the sidewall tunnel layer 271, and help improve the integrity of the magnetic tunnel junction 260 and the sidewall tunnel layer 271, so that the formed semiconductor structure has higher stability.

[0102] Accordingly, the embodiment of the present invention further provides a semiconductor structure formed by the above method, please continue to refer to Fig.10, including: a substrate 200; a magnetic tunnel junction 260 located on the surface of the substrate 200, the magnetic tunnel junction 260 including: a bottom electromagnetic structure 261 located on the surface of the substrate 200, an insulating layer 262 located on the surface of the bottom electromagnetic structure 261, and a top electromagnetic structure 263 located on the surface of the insulating layer 262; a sidewall tunneling layer 271 located on the sidewall surface of the magnetic tunnel junction 260.

[0103] Since the side wall surface of the magnetic tunnel junction 260 has a side wall tunneling layer 271, spin electrons can tunnel through the side wall tunneling layer 271. When the magnetic tunnel junction 260 is in the on state, spin electrons located in the bottom electromagnetic structure 261 can tunnel through the insulating layer 262 to enter the top electromagnetic structure 263, or spin electrons located in the top electromagnetic structure 263 can tunnel through the insulating layer 262 to enter the bottom electromagnetic structure 261. Spin electrons between the bottom electromagnetic structure 261 and the top electromagnetic structure 263 can also tunnel through the side wall tunneling layer 71 located on the side wall surface of the magnetic tunnel junction 260, which is beneficial to reduce the on-resistance and improve the performance of the semiconductor structure.

[0104] The following is a detailed description with reference to the accompanying drawings.

[0105] In this embodiment, the substrate 200 has a conductive layer 210 therein, and the surface of the conductive layer 210 is exposed on the substrate 200 .

[0106] The material of the sidewall tunneling layer 271 includes boron nitride, magnesium oxide or aluminum oxide.

[0107] The thickness of the sidewall tunneling layer 271 is in the range of 1 angstrom to 20 nanometers.

[0108] In this embodiment, the thickness of the sidewall tunneling layer 271 is preferably in the range of 1 angstrom to 5 nanometers.

[0109] The bottom electromagnetic structure 261 includes: a lower electrode layer (not shown in the figure) located on the surface of the substrate 200; a lower composite layer (not shown in the figure) located on the surface of the lower electrode layer; and a lower electromagnetic layer (not shown in the figure) located on the surface of the lower composite layer.

[0110] The material of the lower electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the lower composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the lower electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0111] The top electromagnetic structure 263 includes: an upper electromagnetic layer (not shown in the figure) located on the surface of the insulating layer 262; an upper composite layer (not shown in the figure) located on the surface of the upper electromagnetic layer; and an upper electrode layer (not shown in the figure) located on the surface of the upper composite layer.

[0112] The material of the upper electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the upper composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the upper electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

[0113] The material of the insulating layer 262 includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

[0114] In this embodiment, the semiconductor structure further includes: a protection layer 280 located on the sidewall surface of the sidewall tunneling layer 271 .

[0115] The material of the protection layer 280 includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide, or silicon nitride oxide.

[0116] Although the present invention is disclosed as above, the present invention is not limited thereto. Any person skilled in the art can make various changes and modifications without departing from the spirit and scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the scope defined by the claims.

Claims

1. A semiconductor structure, characterized in that: include: substrate; A magnetic tunnel junction located on the surface of the substrate, the magnetic tunnel junction comprising: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; A sidewall tunneling layer located on the sidewall surface of the magnetic tunnel junction, the sidewall tunneling layer has a magnetic conductivity, the top surface of the sidewall tunneling layer is flush with the top surface of the magnetic tunnel junction, and the bottom of the sidewall tunneling layer extends to the substrate; Spin electrons between the bottom electromagnetic structure and the top electromagnetic structure can tunnel through the sidewall tunneling layer.

2. The semiconductor structure according to claim 1, wherein: The material of the sidewall tunneling layer includes: boron nitride, magnesium oxide or aluminum oxide.

3. The semiconductor structure according to claim 1, wherein: The thickness of the sidewall tunneling layer ranges from 1 angstrom to 20 nanometers.

4. The semiconductor structure according to claim 3, characterized in that The thickness of the sidewall tunneling layer ranges from 1 angstrom to 5 nanometers.

5. The semiconductor structure according to claim 1, wherein: The substrate has a conductive layer inside, and the substrate exposes the surface of the conductive layer.

6. The semiconductor structure according to claim 1, wherein: The bottom electromagnetic structure includes: a lower electrode layer located on the surface of the substrate; a lower composite layer located on the surface of the lower electrode layer; and a lower electromagnetic layer located on the surface of the lower composite layer.

7. The semiconductor structure according to claim 6, wherein: The material of the lower electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the lower composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the lower electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

8. The semiconductor structure according to claim 1, wherein: The top electromagnetic structure comprises: an upper electromagnetic layer located on the surface of the insulating layer; an upper composite layer located on the surface of the upper electromagnetic layer; An upper electrode layer is located on the surface of the upper composite layer.

9. The semiconductor structure according to claim 8, characterized in that The material of the upper electrode layer includes: one or a combination of copper, tungsten, aluminum, titanium, titanium nitride, and tantalum; the upper composite layer includes several overlapping conductive layers, and the material of each conductive layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide; the material of the upper electromagnetic layer includes: one or a combination of iron, platinum, cobalt, nickel, cobalt iron boron, cobalt iron, nickel iron and lanthanum strontium manganese oxide.

10. The semiconductor structure according to claim 1, wherein: The material of the insulating layer includes: one or a combination of magnesium oxide, aluminum oxide, silicon nitride, silicon oxynitride, hafnium dioxide and zirconium dioxide.

11. The semiconductor structure according to claim 1, wherein: Also includes: A protection layer is located on the side wall surface of the side wall tunneling layer.

12. The semiconductor structure according to claim 11, wherein: The material of the protective layer includes silicon oxide, silicon nitride, silicon carbide nitride, silicon boron nitride, silicon carbon nitride oxide or silicon nitride oxide.

13. A method for forming a semiconductor structure according to any one of claims 1 to 12, characterized in that: include: providing a substrate; A magnetic tunnel junction is formed on the surface of the substrate, wherein the magnetic tunnel junction comprises: a bottom electromagnetic structure located on the surface of the substrate, an insulating layer located on the surface of the bottom electromagnetic structure, and a top electromagnetic structure located on the surface of the insulating layer; A sidewall tunneling layer is formed on the sidewall surface of the magnetic tunnel junction. The sidewall tunneling layer has a magnetic conductivity. The top surface of the sidewall tunneling layer is flush with the top surface of the magnetic tunnel junction. The bottom of the sidewall tunneling layer extends to the substrate.

14. The method for forming a semiconductor structure according to claim 13, wherein: The method for forming the sidewall tunneling layer includes: forming a magnetic conductive material film on the surface of the substrate, and the top surface and sidewall surface of the magnetic tunnel junction; etching back the magnetic conductive material film until the substrate surface and the top surface of the magnetic tunnel junction are exposed, and forming the sidewall tunneling layer on the magnetic conductive material film on the sidewall surface of the magnetic tunnel junction.

15. The method for forming a semiconductor structure according to claim 14, wherein: The formation process of the magnetic conductive material film includes: physical vapor deposition process, chemical vapor deposition process or atomic layer deposition process.

16. The method for forming a semiconductor structure according to claim 13, wherein: The method for forming a magnetic tunnel junction includes: forming a bottom electromagnetic material film on the surface of the substrate; forming an insulating film on the surface of the bottom electromagnetic material film; forming a top electromagnetic material film on the surface of the insulating film; forming a patterned layer on the surface of the top electromagnetic material film; using the patterned layer as a mask, etching the bottom electromagnetic material film, the insulating film and the top electromagnetic material film until the substrate surface is exposed, so that the bottom electromagnetic material film forms a bottom electromagnetic structure, the insulating film forms an insulating layer, and the top electromagnetic material film forms a top electromagnetic structure, thereby forming a magnetic tunnel junction on the substrate surface.

17. The method for forming a semiconductor structure according to claim 16, wherein: The method for forming the insulating film comprises: forming an insulating material film on the surface of the underlying electromagnetic material film; and performing annealing treatment on the insulating material film to form the insulating film.

18. The method for forming a semiconductor structure according to claim 17, wherein: The process for forming the insulating material film includes: a physical vapor deposition process, a chemical vapor deposition process or an atomic layer deposition process.

Images