Display device with substrate hole and method of forming the same
By designing a way of contacting the device with the device substrate in the display device, the moisture permeability caused by cracks in the inorganic insulating layer is solved, and the reliability of the light emitting device is improved.
Patent Information
- Application Number
- CN202011537002.6
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Priority Date
- 2019-12-31
- Filing Date
- 2020-12-23
- Publication Date
- 2025-02-25
- Estimated Expiration
- 2040-12-23
AI Technical Summary
In the display device, cracks may be formed in the inorganic insulating layer due to the process of forming substrate holes, resulting in external moisture penetration.
A display device including a device substrate is designed, the substrate hole penetrates the device substrate, the light emitting device is spaced apart from the substrate hole, the separating device is arranged between the substrate hole and the light emitting device, and the separating device is in contact with the device substrate, including a metal pattern and an insulating cap, the insulating cap is arranged on the metal pattern, and the metal pattern has a smaller width than the insulating cap.
The partitioning device contacts the device substrate, cracks formed in the inorganic insulating layer are blocked, external moisture is prevented, and the reliability of the light emitting device is improved.
Smart Images

Figure CN113130579B_ABST
Abstract
Description
Technical Field
[0001] The present invention relates to a display device including a substrate hole penetrating a device substrate. Background Art
[0002] Typically, electronic devices such as monitors, TVs, laptop computers, and digital cameras include a display device for realizing an image. For example, the display device may include a light emitting device. The light emitting device may emit light showing a specific color. For example, the light emitting device may include a light emitting layer between a first electrode and a second electrode.
[0003] The display device may include a substrate hole in which peripheral devices such as a camera, a speaker, and a sensor are mounted. The substrate hole may penetrate a device substrate supporting a light-emitting device. The light-emitting device may be spaced apart from the substrate hole. A separating device may be disposed between the substrate hole and the light-emitting device. The separating device may partially cut off an organic layer between the substrate hole and the light-emitting device. For example, the separating device may include an undercut. The undercut of the separating device may be formed by a difference in etching rate between silicon oxide and silicon nitride.
[0004] However, in the display device, cracks may be formed in the inorganic insulating layer due to a process of forming the substrate hole. Therefore, in the display device, external moisture may penetrate through the cracks of the inorganic insulating layer. Summary of the invention
[0005] Accordingly, the present invention is directed to a display device that substantially obviates one or more problems due to limitations and disadvantages of the related art.
[0006] An object of the present invention is to provide a display device capable of preventing external moisture from penetrating through cracks occurring in a process of forming a substrate hole.
[0007] Other advantages, purposes and features of the present invention will be described in part in the following description, and in part will become apparent to those skilled in the art after studying the following, or may be learned from the practice of the present invention. The purposes and other advantages of the present invention may be realized and obtained by the structures particularly pointed out in the written description and claims and the accompanying drawings.
[0008] To achieve these objects and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described herein, there is provided a display device including a device substrate. A substrate hole penetrates the device substrate. A light emitting device is disposed on the device substrate. The light emitting device is spaced apart from the substrate hole. A spacer is disposed between the substrate hole and the light emitting device. The spacer contacts the device substrate.
[0009] The device substrate may include a groove. The spacer may be disposed adjacent to the groove.
[0010] The separation device may include a metal pattern and an insulating cap. The insulating cap may be disposed on the metal pattern.
[0011] The metal pattern may have a smaller width than the insulating cap.
[0012] The dam may be disposed between the light emitting device and the partition means. At least one insulating layer may be disposed between the device substrate and the dam.
[0013] The dam may have the same laminated structure as the partitioning means.
[0014] Between the dam and the spacer, the inclined surface of the insulating layer may have a gentler slope than side surfaces of the dam and side surfaces of the spacer.
[0015] The driving circuit may be disposed between the device substrate and the light emitting device. The connecting electrode may be disposed between the driving circuit and the light emitting device. The light emitting device may be connected to the driving circuit through the connecting electrode. The metal pattern may include the same material as the connecting electrode. BRIEF DESCRIPTION OF THE DRAWINGS
[0016] The accompanying drawings are included to provide a further understanding of the present invention and are incorporated in and constitute a part of this application. The accompanying drawings illustrate embodiments of the present invention and together with the description serve to explain the principle of the present invention. In the drawings:
[0017] Figure 1 is a diagram schematically showing a display device according to an embodiment of the present invention;
[0018] Figure 2 is an enlarged view showing the periphery of a substrate hole in a display device according to an embodiment of the present invention;
[0019] Figure 3A is a cross-sectional view showing a pixel in a display device according to an embodiment of the present invention;
[0020] Figure 3B is a cross-sectional view showing a peripheral area of a substrate hole in a display device according to an embodiment of the present invention;
[0021] Figure 4 yes Figure 3B A magnified view of K in ;
[0022] FIG. 5A to FIG. 10A and FIG. 5B to FIG. 10B are diagrams sequentially illustrating a method for forming a display device according to an embodiment of the present invention;
[0023] Fig.11A and Fig. 11B is a diagram showing a display device according to another embodiment of the present invention;
[0024] Fig.12 yes Fig. 11B A magnified view of P in FIG. 1 ; and
[0025] Fig.13A and 13B are views sequentially illustrating a process of forming a display device according to another embodiment of the present invention. DETAILED DESCRIPTION
[0026] Hereinafter, details related to the above-mentioned purposes, technical configurations and operational effects of the embodiments of the present invention will be clearly understood through the following detailed description with reference to the accompanying drawings, wherein the accompanying drawings illustrate some embodiments of the present invention. Here, the embodiments of the present invention are provided to allow the technical spirit of the present invention to be accurately conveyed to those skilled in the art, and therefore the present invention can be implemented in other forms and is not limited to the embodiments described below.
[0027] In addition, throughout the specification, the same or very similar elements may be represented by the same reference numerals, and in the drawings, the lengths and thicknesses of layers and regions may be exaggerated for convenience. It should be understood that when a first element is referred to as being "on" a second element, although the first element may be disposed on the second element in a manner of contacting the second element, a third element may be interposed between the first element and the second element.
[0028] Here, terms such as "first" and "second" may be used to distinguish any one element from another element. However, without departing from the technical spirit of the present invention, the first element and the second element may be arbitrarily named according to the convenience of those skilled in the art.
[0029] The terms used in the specification of the present invention are only used to describe specific embodiments and are not intended to limit the scope of the present invention. For example, unless the context clearly indicates otherwise, an element described in the singular is intended to include a plurality of elements. In addition, in the specification of the present invention, it will be further understood that the terms "include" and "comprise" indicate the presence of the features, values, steps, operations, elements, parts and / or combinations thereof, but do not exclude the presence or addition of one or more other features, values, steps, operations, elements, parts and / or combinations thereof.
[0030] Unless otherwise defined, all terms (including technical and scientific terms) used herein have the same meaning as those commonly understood by those skilled in the art to which the exemplary embodiments belong. It should also be understood that terms such as those defined in commonly used dictionaries should be interpreted as having a meaning consistent with their meaning in the context of the relevant art, and should not be interpreted in an idealized or overly formal sense, unless explicitly defined herein.
[0031] (Implementation Method)
[0032] Figure 1 is a diagram schematically showing a display device according to an embodiment of the present invention. Figure 2 is an enlarged view showing the periphery of a substrate hole in a display device according to an embodiment of the present invention. Figure 3A is a cross-sectional view showing a pixel in a display device according to an embodiment of the present invention. Figure 3B is a cross-sectional view showing a peripheral area of a substrate hole in a display device according to an embodiment of the present invention. Figure 4 yes Figure 3B Magnified view of K in .
[0033] Reference Figures 1 to 4 , a display device according to an embodiment of the present invention may include a device substrate 100. The device substrate 100 may include an insulating material. For example, the device substrate 100 may include glass or plastic.
[0034] The gate line GL and the data line DL may be disposed on the device substrate 100. The data line DL may intersect the gate line GL. For example, the gate line GL and the data line DL may define a plurality of pixel areas PA.
[0035] Each of the pixel areas PA may realize a specific color. For example, a light emitting device 700 may be disposed in each pixel area PA. The light emitting device 700 may emit light showing a specific color. For example, the light emitting device 700 may include a first electrode 710, a light emitting layer 720, and a second electrode 730 stacked in sequence.
[0036] The first electrode 710 may include a conductive material. The first electrode 710 may include a metal having a relatively high reflectivity. For example, the first electrode 710 may include a metal such as aluminum (Al) and silver (Ag). The first electrode 710 may have a multilayer structure. For example, the first electrode 710 may have a structure in which a reflective electrode formed of a metal is disposed between transparent electrodes formed of a transparent conductive material such as ITO and IZO.
[0037] The light emitting layer 720 may generate light having a brightness corresponding to the voltage difference between the first electrode 710 and the second electrode 730. For example, the light emitting layer 720 may include a light emitting material. The light emitting material may include an organic material, an inorganic material, or a mixed material. For example, the display device according to an embodiment of the present invention may be an organic light emitting display device including a light emitting layer 720 of an organic material.
[0038] The light emitting layer 720 may have a multilayer structure. For example, the light emitting layer 720 may include a light emitting material layer (EML) 722 disposed between a first organic layer 721 and a second organic layer 723. The first organic layer 721 and the second organic layer 723 may include at least one of a hole injection layer (HIL) and a hole transport layer (HTL), an electron transport layer (ETL), and an electron injection layer (EIL). Therefore, in the display device according to the embodiment of the present invention, the light emitting efficiency of the light emitting device 700 may be improved.
[0039] The second electrode 730 may include a conductive material. The second electrode 730 may include a material different from the first electrode 710. For example, the second electrode 730 may be a transparent electrode formed of a transparent conductive material such as ITO and IZO. Therefore, in the display device according to the embodiment of the present invention, light generated from the light emitting layer 720 of each pixel area PA may be emitted to the outside through the second electrode 730.
[0040] A driving circuit D connected to the light emitting device 700 may be provided in each pixel area PA. The driving circuit D may provide a driving current corresponding to a gate signal applied by the gate line GL and a data signal applied by the data line DL to the light emitting device 700. For example, the driving circuit D may include a first thin film transistor 200, a second thin film transistor 300, and a storage capacitor 400.
[0041] The first thin film transistor 200 may turn on / off the second thin film transistor 300 according to a gating signal. The first thin film transistor 200 may include a first semiconductor pattern 210, a first gate electrode 230, a first source electrode 250, and a first drain electrode 260. The first gate electrode 230 may overlap a portion of the first semiconductor pattern 210. A first gate insulating layer 121 may be disposed between the first semiconductor pattern 210 and the first gate electrode 230. The first source electrode 250 and the first drain electrode 260 may be connected to the first semiconductor pattern 210.
[0042] The first semiconductor pattern 210 may be disposed near the device substrate 100. The first semiconductor pattern 210 may include a semiconductor material. The first semiconductor pattern 210 may include polysilicon. For example, the first semiconductor pattern 210 may include low temperature polysilicon (LTPS). The first semiconductor pattern 210 may include a first channel region disposed between a first source region and a first drain region. The first source region and the first drain region may have a higher conductivity than the first channel region. For example, the first source region and the first drain region may have a higher conductive impurity content than the first channel region.
[0043] The first gate insulating layer 121 may be disposed on the first semiconductor pattern 210. The first gate insulating layer 121 may extend beyond the first semiconductor pattern 210. For example, a side surface of the first semiconductor pattern 210 may be covered by the first gate insulating layer 121. The first gate insulating layer 121 may include an insulating material. For example, the first gate insulating layer 121 may include silicon oxide (SiOx) or silicon nitride (SiNx). The first gate insulating layer 121 may include a material having a high dielectric constant (high-K material). For example, the first gate insulating layer 121 may include hafnium oxide (HfO). The first gate insulating layer 121 may have a multi-layer structure.
[0044] The first gate 230 may be disposed on the first gate insulating layer 121. For example, the first gate 230 may overlap the channel region of the first semiconductor pattern 210. The first gate 230 may be insulated from the first semiconductor pattern 210 by the first gate insulating layer 121. The first gate 230 may include a conductive material. For example, the first gate 230 may include a metal such as aluminum (Al), chromium (Cr), copper (Cu), titanium (Ti), molybdenum (Mo), and tungsten (W). The first gate 230 may be formed of a single layer or a multilayer.
[0045] The first source 250 may be electrically connected to the first source region of the first semiconductor pattern 210. For example, the first source 250 may be in direct contact with a portion of the first source region. The first source 250 may include a portion overlapping the first source region. The first source may be insulated from the first gate 230. For example, the lower interlayer insulating layer 120 may be disposed on the first gate insulating layer 121 and the first gate 230, and the first source 250 may be disposed on the lower interlayer insulating layer 120. For example, the lower interlayer insulating layer 120 may include silicon oxide (SiOx). The lower interlayer insulating layer 120 may extend beyond the first semiconductor pattern 210. For example, the side surface of the first gate 230 may be in direct contact with the lower interlayer insulating layer 120. The lower interlayer insulating layer 120 may include a first source contact hole partially exposing the first source region of the first semiconductor pattern 210. The first source 250 may be connected to the first source region of the first semiconductor pattern 210 in the first source contact hole.
[0046] The first source 250 may include a conductive material. For example, the first source 250 may include a metal such as aluminum (Al), titanium (Ti), chromium (Cr), molybdenum (Mo), tungsten (W), and copper (Cu), or an alloy thereof. The first source 250 may include a material different from that of the first gate 230.
[0047] The first drain electrode 260 may be electrically connected to the first drain region of the first semiconductor pattern 210. For example, the first drain electrode 260 may be in direct contact with a portion of the first drain region. The first drain electrode 260 may include a portion overlapping the first drain region. The first drain electrode 260 may be insulated from the first gate 230. For example, the first drain electrode 260 may be disposed on the lower interlayer insulating layer 120. The first drain electrode 260 may be spaced apart from the first source electrode 250. For example, the lower interlayer insulating layer 120 may include a first drain contact hole partially exposing the first drain region. The first drain electrode 260 may be connected to the first drain region in the first drain contact hole.
[0048] The first drain electrode 260 may include a conductive material. For example, the first drain electrode 260 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W) and copper (Cu) or an alloy thereof. The first drain electrode 260 may be formed of a single layer or multiple layers. The first drain electrode 260 may include the same material as the first source electrode 250. The first drain electrode 260 may include a material different from the first gate electrode 230.
[0049] The second thin film transistor 300 may generate a driving current corresponding to a data signal. The second thin film transistor 300 may include a second semiconductor pattern 310, a second gate electrode 330, a second source electrode 350, and a second drain electrode 360. The second gate electrode 330 may overlap a portion of the second semiconductor pattern 310. A second gate insulating layer 141 may be disposed between the second semiconductor pattern 310 and the second gate electrode 330. The second source electrode 350 and the second drain electrode 360 may be connected to the second semiconductor pattern 310.
[0050] The second semiconductor pattern 310 may include a material different from that of the first semiconductor pattern 210. The second semiconductor pattern 310 may be an oxide semiconductor. For example, the second semiconductor pattern 310 may include a metal oxide such as IGZO.
[0051] The second semiconductor pattern 310 may be disposed on a different layer from the first semiconductor pattern 210. For example, the intermediate buffer layer 140 may be disposed between the first semiconductor pattern 210 and the second semiconductor pattern 310. The first semiconductor pattern 210 may be disposed between the device substrate 100 and the intermediate buffer layer 140. The second semiconductor pattern 310 may be disposed on the intermediate buffer layer 140.
[0052] The intermediate buffer layer 140 may include silicon nitride (SiNx) or silicon oxide (SiOx). Figure 3A , the intermediate buffer layer 140 is shown as a single layer, but is not limited thereto. For example, the intermediate buffer layer 140 may be formed of a plurality of layers in which a layer including silicon nitride (SiNx) and a layer including silicon oxide (SiOx) are stacked.
[0053] The second semiconductor pattern 310 may have the same configuration as the first semiconductor pattern 210. For example, the second semiconductor pattern 310 may include a second channel region disposed between a second source region and a second drain region. The electrical conductivity of the second source region and the electrical conductivity of the second drain region may be higher than the electrical conductivity of the second channel region. For example, the second source region and the second drain region may be conductive regions.
[0054] The second gate insulating layer 141 may be disposed on the second semiconductor pattern 310. For example, the second gate insulating layer 141 may overlap with the second channel region of the second semiconductor pattern 310. The second source region and the second drain region of the second semiconductor pattern 310 may be disposed outside the second gate insulating layer 141. The second gate insulating layer 320 may include an insulating material. For example, the second gate insulating layer 320 may include silicon oxide (SiOx) or silicon nitride (SiNx). The second gate insulating layer 141 may include a material having a high dielectric constant (high-K material). For example, the second gate insulating layer 141 may include hafnium oxide (HfO). The second gate insulating layer 141 may have a multilayer structure. The second gate insulating layer 141 may have the same stacked structure as the first gate insulating layer 121.
[0055] The second gate 330 may be disposed on the second gate insulating layer 141. The second gate 330 may overlap the second channel region of the second semiconductor pattern 310. The second gate 330 may be insulated from the second semiconductor pattern 310 by the second gate insulating layer 141. The second channel region of the second semiconductor pattern 310 may have conductivity corresponding to a voltage applied to the second gate 330. For example, the second channel region of the second semiconductor pattern 310 may be a semiconductor region.
[0056] The second gate 330 may include a conductive material. For example, the second gate 330 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu). The second gate 330 may have a single layer or multiple layers. The second gate 330 may include the same material as the first gate 230.
[0057] The second source 350 may be electrically connected to the second source region of the second semiconductor pattern 310. For example, the second source 350 may be in direct contact with a portion of the second source region. The second source 350 may be insulated from the second gate 330. For example, an upper interlayer insulating layer 150 may be disposed on the second semiconductor pattern 310 and the second gate 330, and the second source 350 may be disposed on the upper interlayer insulating layer 150. The upper interlayer insulating layer 150 may include an insulating material. For example, the upper interlayer insulating layer 150 may include silicon oxide (SiOx). The upper interlayer insulating layer 150 may extend beyond the second semiconductor pattern 310. For example, a side surface of the second gate 330 may be in direct contact with the upper interlayer insulating layer 150. The upper interlayer insulating layer 150 may include a second source contact hole partially exposing the second source region of the second semiconductor pattern 310. The second source 350 may be connected to the second source region of the second semiconductor pattern 310 in the second source contact hole.
[0058] The upper interlayer insulating layer 150 may include silicon nitride (SiNx) or silicon oxide (SiOx). Figure 3A , the upper interlayer insulating layer 150 is shown as a single layer, but is not limited thereto. For example, the upper interlayer insulating layer 150 may have a multilayer structure in which a layer formed of silicon nitride (SiNx) and a layer formed of silicon oxide (SiOx) are stacked.
[0059] The second source electrode 350 may include a conductive material. For example, the second source electrode 350 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu). The second source electrode 350 may have a single layer or multiple layers. The second source electrode 350 may include the same material as the first source electrode 250.
[0060] The second drain electrode 360 may be electrically connected to the second drain region of the second semiconductor pattern 310. For example, the second drain electrode 360 may be in direct contact with a portion of the second drain region. The second drain electrode 360 may be insulated from the second gate 330. For example, the second drain electrode 360 may be disposed on the upper interlayer insulating layer 150. The upper interlayer insulating layer 150 may include a second drain contact hole partially exposing the second drain region of the second semiconductor pattern 310. The second drain electrode 360 may be connected to the second drain region of the second semiconductor pattern 310 in the second drain contact hole.
[0061] The second drain 360 may include a conductive material. For example, the second drain 360 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu). The second drain 360 may have a single layer or multiple layers. The second drain 360 may include the same material as the second source 350. The second drain 360 may include a material different from the second gate 330.
[0062] The storage capacitor 400 may be formed by the process of forming the first thin film transistor 200 and the second thin film transistor 300. For example, the storage capacitor 400 may include a first storage electrode 410 disposed on the same layer as the first gate electrode 230, and a second storage electrode 420 above the first storage electrode 410.
[0063] The first storage electrode 410 may include a conductive material. The first storage electrode 410 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu). The first storage electrode 410 may have a single layer or multiple layers. The first storage electrode 410 may include the same material as the first gate 230.
[0064] The second storage electrode 420 may include a conductive material. The second storage electrode 420 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu). The second storage electrode 420 may have a single layer or multiple layers. The lower interlayer insulating layer 120 may extend between the first storage electrode 410 and the second storage electrode 420. The second storage electrode 420 may be disposed on the lower interlayer insulating layer 120. The first source electrode 250 and the first drain electrode 260 may be disposed on a different layer from the second storage electrode 420. For example, the intermediate interlayer insulating layer 130 may be disposed on the second storage electrode 420, and the lower interlayer insulating layer 120 and the intermediate interlayer insulating layer 130 may be stacked between the first gate 230 and the first source electrode 250 and between the first gate 230 and the first drain electrode 260. The second storage electrode 420 may include a material different from the first source electrode 250 and the first drain electrode 260.
[0065] The intermediate interlayer insulating layer 130 may include an insulating material. For example, the intermediate interlayer insulating layer 130 may include silicon oxide (SiOx) and / or silicon nitride (SiNx). The intermediate interlayer insulating layer 130 may have a single layer or multiple layers. For example, the intermediate interlayer insulating layer 130 may have a multilayer structure in which an insulating layer formed of silicon oxide (SiOx) and an insulating layer formed of silicon nitride (SiNx) are stacked.
[0066] The second storage electrode 420 may be electrically connected to the second drain electrode 360 of the second thin film transistor 300. For example, a storage connection electrode 450 penetrating the intermediate interlayer insulating layer 130 may be disposed on the intermediate interlayer insulating layer 130. The storage connection electrode 450 may be disposed on the same layer as the first source electrode 250 and the first drain electrode 260. For example, the storage connection electrode 450 may include the same material as the first source electrode 250 and the first drain electrode 260. The second drain electrode 360 may be connected to the storage connection electrode 450 by penetrating the intermediate buffer layer 140 and the upper interlayer insulating layer 150.
[0067] The light-blocking electrode 500 may be disposed between the lower interlayer insulating layer 120 and the middle interlayer insulating layer 130. The light-blocking electrode 500 may prevent a characteristic change of the second semiconductor pattern 310 due to external light. For example, the light-blocking electrode 500 may include a metal. The light-blocking electrode 500 may include the same material as the second storage electrode 420. For example, the light-blocking electrode 500 may be disposed on the same layer as the second storage electrode 420.
[0068] The device buffer layer 110 may be disposed between the device substrate 100 and the driving circuit D of each pixel area PA. The device buffer layer 110 may prevent contamination from the device substrate 100 in the process of forming the driving circuit D. For example, the device buffer layer 110 may extend between the device substrate 100 and the first semiconductor pattern 210 of each pixel area PA. The device buffer layer 110 may include an insulating material. For example, the device buffer layer 110 may include silicon oxide (SiOx) and / or silicon nitride (SiNx). The device buffer layer 110 may have a multilayer structure. For example, the device buffer layer 110 may have a stacked structure of a first buffer layer 111 and a second buffer layer 112 including a material different from the first buffer layer 111.
[0069] The first overcoat layer 160 and the second overcoat layer 170 may be sequentially stacked between the driving circuit D of each pixel area PA and the light emitting device 700. The first overcoat layer 160 may remove the thickness difference caused by the driving circuit D of each pixel area PA. The second overcoat layer 170 may be disposed on the first overcoat layer 160. The surface of the second overcoat layer 170 facing the light emitting device 700 of each pixel area PA may be a flat surface. The first overcoat layer 160 and the second overcoat layer 170 may include an insulating material. The first overcoat layer 160 and the second overcoat layer 170 may include a material different from the upper interlayer insulating layer 150. For example, the first overcoat layer 160 and the second overcoat layer 170 may include an organic insulating material. The second overcoat layer 170 may include a material different from the first overcoat layer 160, but is not limited thereto.
[0070] The light emitting device 700 of each pixel region PA may be electrically connected to the second thin film transistor 300 of the corresponding pixel region PA. For example, the first electrode 710 of each pixel region PA may be electrically connected to the corresponding second drain electrode 360 by penetrating the first overcoat 160 and the second overcoat 170. The first electrode 710 of each pixel region PA may be electrically connected to the corresponding second drain electrode 360 through the intermediate electrode 610. For example, the intermediate electrode 610 may be disposed between the first overcoat 160 and the second overcoat 170. The intermediate electrode 610 may be connected to the second drain electrode 360 by penetrating the first overcoat 160, and the first electrode 710 may be connected to the intermediate electrode 610 by penetrating the second overcoat 170.
[0071] The intermediate electrode 610 may include a conductive material. For example, the intermediate electrode 610 may include a metal such as aluminum (Al), chromium (Cr), titanium (Ti), molybdenum (Mo), tungsten (W), and copper (Cu), or an alloy thereof. The intermediate electrode 620 may have a single layer or multiple layers.
[0072] The light emitting device 700 of each pixel area PA can be operated independently. For example, the first electrode 710 of each pixel area PA can be insulated from the first electrode 710 of the adjacent pixel area PA. The edge of each first electrode 710 can be covered by the bank insulation layer 180. The bank insulation layer 180 can be disposed on the second overcoat 170. The light emitting layer 720 and the second electrode 730 of each pixel area PA can be stacked on the portion of the corresponding first electrode 710 exposed by the bank insulation layer 180. The bank insulation layer 180 may include an insulating material. For example, the bank insulation layer 180 may include an organic insulating material. The bank insulation layer 180 may include a material different from the second overcoat 170.
[0073] At least a portion of the light emitting layer 720 of each pixel region PA may extend onto the bank insulating layer 180. For example, the first organic layer 721 and the second organic layer 723 of each pixel region PA may be connected to the first organic layer 721 and the second organic layer 723 of the adjacent pixel region PA. The light emitting material layer 722 of each pixel region PA may be spaced apart from the light emitting material layer 722 of the adjacent pixel region PA. For example, the light emitting material layer 722 of each pixel region PA may be formed by a deposition process using a fine metal mask (FMM). The spacer 800 may be disposed on the bank insulating layer 180. The spacer 800 may prevent the adjacent light emitting material layer 722 and / or the bank insulating layer 180 from being damaged by the fine metal mask. For example, the end of each light emitting material layer 722 may be disposed on a surface of the bank insulating layer 180 disposed outside the spacer 800. The spacer 800 may include an insulating material.
[0074] The second electrode 730 of each pixel region PA may extend onto the bank insulating layer 180. For example, the second electrode 730 of each pixel region PA may be connected to the second electrode 730 of an adjacent pixel region PA.
[0075] The substrate hole CH may be formed in the device substrate 100. The substrate hole CH may penetrate the device substrate 100. The substrate hole CH may be disposed between the pixel areas PA. For example, the substrate hole CH may be formed between the light emitting devices 700. The device substrate 100 may include a hole peripheral area HA including an area in which the substrate hole CH is formed. The light emitting device 700 may be disposed outside the hole peripheral area HA. The gate line GL and the data line DL may be bypassed along the edge of the substrate hole CH in the hole peripheral area HA.
[0076] The hole peripheral area HA may include a penetration area CA in which the substrate hole CH is formed, a separation area BA surrounding the penetration area CA, and a dam region DA disposed outside the separation area BA. The separation area BA may be disposed between the penetration area CA and the dam area DA. For example, the separation area BA may be disposed between the substrate hole CH and the light emitting device 700.
[0077] The partitioning means 911, 912 and 913 may be disposed in the partitioning area BA. The partitioning means 911, 912 and 913 may be in direct contact with the device substrate 100. For example, the insulating layer formed in the partitioning area BA may be removed. Therefore, in the display device according to the embodiment of the present invention, cracks occurring in the process of forming the substrate hole CH may be blocked in the partitioning area BA. Therefore, in the display device according to the embodiment of the present invention, moisture penetration due to the process of forming the substrate hole CH may be prevented.
[0078] The spacers 911, 912, and 913 may have a structure in which a metal pattern 912m and an insulating cap 912c are stacked. The metal pattern 912m may have a smaller width than the insulating cap 912c. For example, an undercut portion UC may be formed between the device substrate 100 and the insulating cap 921c. Therefore, in a display device according to an embodiment of the present invention, an organic layer and / or an inorganic layer deposited after forming the spacers 911, 912, and 913 may be separated by the spacers 911, 912, and 913. For example, the first organic layer 721, the second organic layer 723, and the second electrode 730 may be partially cut off by the spacers 911, 912, and 913.
[0079] The spacers 911, 912, and 913 may have various shapes. For example, at least one spacer 912 may have a shape in which undercut portions are formed at the lower left and right ends of the insulating cap 912c. Also, at least one spacer 911 and 913 may have a shape in which the insulating cap extends beyond one side of the metal pattern. Therefore, the display device according to the embodiment of the present invention can effectively block the penetration of external moisture using spacers 911, 912, and 913 having various shapes.
[0080] The metal pattern 912m may include the same material as the intermediate electrode 610. For example, the metal pattern 912m may have the same stack structure as the intermediate electrode 610.
[0081] The dams 921, 922, and 923 may be disposed in the dam area DA. At least one insulating layer 121, 130, 140, and 150 may be stacked between the device substrate 100 and the dams 921, 922, and 923. The dams 921, 922, and 923 may have the same structure as the spacers 911, 912, and 913. For example, at least one dam 922 may have a shape in which a metal pattern and an insulating cap are stacked in sequence and an undercut is formed at the lower left end and the lower right end of the insulating cap. Also, at least one dam 921 and 923 may have a shape in which a metal pattern and an insulating cap are stacked in sequence and the insulating cap extends beyond one side of the metal pattern. Therefore, the display device according to the embodiment of the present invention can effectively block the penetration of external moisture using the spacers 911, 912, and 913 having various shapes and the dams 921, 922, and 923.
[0082] FIG. 5A to FIG. 10A and FIG. 5B to FIG. 10B are diagrams sequentially illustrating a method of forming a display device according to an embodiment of the present invention.
[0083] Will refer to Figure 3A , Figure 3B , FIG. 5A to FIG. 10A and FIG. 5B to FIG. 10B A method for forming a display device according to an embodiment of the present invention is described. First, Figure 5A and Figure 5B As shown, the method for forming a display device according to an embodiment of the present invention may include the steps of forming a driving circuit D on each pixel area PA of a device substrate 100, forming a first overcoat 160 covering the driving circuit D, and removing an insulating layer disposed on the separation area BA and the penetration area CA.
[0084] Due to the difference in density, the step of removing the insulating layer in the separation area BA and the penetration area CA may be performed relatively gently between the dam area DA and the separation area BA. For example, the insulating layers 121, 130, 140, and 150 stacked on the dam area DA may include a side surface facing the penetration area CA, and the side surfaces of the insulating layers 121, 130, 140, and 150 facing the penetration area CA may have a gentle slope.
[0085] like Fig. 6A and Figure 6B As shown, the method for forming a display device according to an embodiment of the present invention may include forming an intermediate electrode 610 on the first overcoat layer 160, forming a first preliminary pattern 910 on the partition area BA, and forming a second preliminary pattern 920 on the dam area DA.
[0086] The first preliminary pattern 910 and the second preliminary pattern 920 may be formed simultaneously with the intermediate electrode 610. For example, the steps of forming the intermediate electrode 610, the first preliminary pattern 910, and the second preliminary pattern 920 may include the steps of forming a conductive material layer on the first overcoat layer 160, and the step of patterning the conductive material layer. Therefore, in the method of forming a display device according to an embodiment of the present invention, the intermediate electrode 610, the first preliminary pattern 910, and the second preliminary pattern 920 may be formed of the same material.
[0087] like Fig. 7A and Figure 7B As shown, the method for forming a display device according to an embodiment of the present invention may include the steps of forming a second overcoat 170 on the intermediate electrode 610, the first preliminary pattern 910, and the second preliminary pattern 920, forming a first preliminary cap 915 on the first preliminary pattern 910, forming a second preliminary cap 925 on the second preliminary pattern 920, and forming a first electrode 710 connected to the intermediate electrode 610 on the second overcoat 170.
[0088] The first preliminary cap 915 and the second preliminary cap 925 may be formed by using the second overcoat layer 170. For example, the steps of forming the first preliminary cap 915 and the second preliminary cap 925 may include the step of partially etching the second overcoat layer 170 on the separation area BA and the dam area DA. The second preliminary cap 925 may be formed of the same material as the first preliminary cap 915.
[0089] The first preliminary cap 915 may partially expose the first preliminary pattern 910. The second preliminary cap 925 may partially expose the second preliminary pattern 920. For example, a position of the first preliminary cap 915 based on the first preliminary pattern 910 may correspond to a position of the second preliminary cap 925 based on the second preliminary pattern 920.
[0090] like Fig. 8A and Figure 8B As shown, a method for forming a display device according to an embodiment of the present invention may include the steps of forming a bank insulating layer 180, a spacer 800, a first upper cap 917 and a second upper cap 927 on a device substrate 100 having a first electrode 710 formed in each pixel area PA.
[0091] The bank insulating layer 180 may cover the edge of the first electrode 710 of each pixel area PA. The spacer 800 may be formed on the bank insulating layer 180. The first upper cap 917 may be formed on the first preliminary cap 915. The second upper cap 927 may be formed on the second preliminary cap 927.
[0092] The first upper cap 917 and the second upper cap 927 may be formed by using the process of forming the bank insulation layer 180 and the spacer 800. For example, the steps of forming the first upper cap 917 and the second upper cap 927 may include the steps of stacking insulating layers for forming the bank insulation layer 180 and the spacer 800, and the step of patterning the insulating layers. The second upper cap 927 may be formed of the same material as the first upper cap 917. For example, the first upper cap 917 and the second upper cap 927 may be formed simultaneously with the bank insulation layer 180 and / or the spacer 800.
[0093] like Fig. 9A and Fig. 9B As shown, the method for forming a display device according to an embodiment of the present invention may include a step of removing a portion of the first initial pattern 910 exposed by the first initial cap 915 and the first upper cap 917, and a step of removing a portion of the second initial pattern 920 exposed by the second initial cap 925 and the second upper cap 927.
[0094] The step of removing a portion of the second preliminary pattern 920 may be performed simultaneously with the step of removing a portion of the first preliminary pattern 910. For example, the step of removing a portion of the second preliminary pattern 920 and a portion of the first preliminary pattern 910 may include the step of etching the first preliminary pattern 910 and the second preliminary pattern 920 using the first upper cap 917 and the second upper cap 927 as etching masks. The first preliminary metal pattern 910a overlapping the first preliminary cap 915 and the second preliminary metal pattern 920a overlapping the second preliminary cap 925 may be formed by a process of etching the first preliminary pattern 910 and the second preliminary pattern 920.
[0095] like Fig. 10A and Fig. 10B As shown, the method of forming a display device according to an embodiment of the present invention may include the steps of forming partitions 911 , 912 , and 913 on the partition area BA and dams 921 , 922 , and 923 on the dam area DA.
[0096] The step of forming the spacers 911, 912, and 913 and the dams 921, 922, and 923 may include the step of reducing the width of the first preliminary metal pattern 910a and the second preliminary metal pattern 920a. Therefore, in the display device according to the embodiment of the present invention, the spacers 911, 912, and 913 and the dams 921, 922, and 923 may include a stacked metal pattern and an insulating cap having a width greater than that of the metal pattern. That is, in the display device according to the embodiment of the present invention, each of the spacers 911, 912, and 913 and the dams 921, 922, and 923 may include an undercut portion formed due to a width difference.
[0097] like Figure 3A and Figure 3B As shown, a method for forming a display device according to an embodiment of the present invention may include the steps of forming a light-emitting layer 720 and a second electrode 730 of each light-emitting device 700 on a device substrate 100 formed with partitions 911, 912 and 913 and dam portions 921, 922 and 923, and the step of forming a substrate hole CH in a penetration area CA.
[0098] Therefore, in the display device and the method for forming the same according to the embodiment of the present invention, the insulating layer stacked on the partition area BA between the penetration area CA and the pixel area PA in which the substrate hole CH is formed can be completely removed so that the partition means 911, 912 and 913 formed on the partition area BA by a subsequent process can contact the device substrate 100. Therefore, in the display device and the method for forming the same according to the embodiment of the present invention, cracks occurring in the inorganic insulating layer by the process of forming the substrate hole do not propagate to the pixel area PA. Therefore, in the display device and the method for forming the same according to the embodiment of the present invention, the penetration of external moisture due to the process of forming the substrate hole can be blocked, and the damage of the light-emitting device due to the external moisture can be prevented.
[0099] Also, in the display device and the method for forming the same according to the embodiment of the present invention, the partitions 911, 912 and 913 may be formed simultaneously with the dams 921, 922 and 923. Therefore, in the display device and the method for forming the same according to the embodiment of the present invention, process efficiency may be improved.
[0100] The display device according to the embodiment of the present invention is described as the device substrate 100 being a single layer. However, in a display device according to another embodiment of the present invention, the device substrate 100 may have a multi-layer structure. For example, Fig.11A and Fig. 11B As shown, in a display device according to another embodiment of the present invention, the device substrate 100 may have a structure in which the insulating layer 102 may be disposed between the first substrate layer 101 and the second substrate layer 103. The second substrate layer 103 may include the same material as the first substrate layer 101. For example, the first substrate layer 101 and the second substrate layer 103 may include plastic. The insulating layer 102 may include an insulating material. Therefore, in a display device according to another embodiment of the present invention, the device substrate 100 may include a groove 100g disposed adjacent to the partitioning means 911, 912, and 913.
[0101] Fig.13A and Fig. 13B are views sequentially illustrating a method of forming a display device according to another embodiment of the present invention.
[0102] like Fig.13A and Fig. 13B As shown, in the method for forming a display device according to another embodiment of the present invention, over-etching may occur in the process of forming the first preliminary metal pattern 910a. Therefore, in the method for forming a display device according to another embodiment of the present invention, a portion of the device substrate 100 exposed by the first preliminary cap 915 may be etched, so that the groove 100g may be formed.
[0103] The step of forming the first preliminary metal pattern 910a may be performed simultaneously with the step of forming the second preliminary metal pattern 920a. For example, a portion of the upper interlayer insulating layer 150 exposed by the second preliminary cap 925 may be over-etched in the step of forming the second preliminary metal pattern 920a.
[0104] That is, the display device according to another embodiment of the present invention may include a groove 100g formed in a portion of the device substrate 100 by the steps of forming the partitions 911, 912, and 913. Therefore, in the display device according to another embodiment of the present invention, the movement path of the external moisture penetrating through the substrate hole CH formed in the penetration area CA can be increased. Therefore, in the display device according to another embodiment of the present invention, the degradation of the light emitting device due to the penetration of external moisture can be effectively prevented.
[0105] As a result, the display device according to the embodiment of the present invention may include a partitioning device between the substrate hole and the light-emitting device, wherein the partitioning device may be in contact with the device substrate. Therefore, in the display device according to the embodiment of the present invention, cracks that appear in the inorganic insulating layer in the process of forming the substrate hole can be blocked by the partitioning device. Therefore, in the display device according to the embodiment of the present invention, the reliability of the light-emitting device can be improved.
[0106] CROSS-REFERENCE TO RELATED APPLICATIONS
[0107] This application claims the benefit of priority to Korean Patent Application No. 10-2019-0180185, filed on December 31, 2019, which is hereby incorporated by reference as if fully set forth herein.
Claims
1. A display device, comprising: a substrate hole, the substrate hole penetrating the device substrate; a light emitting device, the light emitting device being located on the device substrate, the light emitting device being spaced apart from the substrate hole; as well as a partition device, the partition device being located between the substrate hole and the light emitting device, wherein the separation device is in contact with the device substrate, The display device further includes a dam portion provided between the light emitting device and the partitioning means, wherein the dam has the same stacked structure as the partition device, wherein at least one insulating layer of a driving circuit disposed between the device substrate and the light emitting device extends between the device substrate and the dam portion, wherein the at least one insulating layer extends up to a boundary between the dam and the separating device, wherein the side surface of the at least one insulating layer between the dam and the partitioning device has an inclined surface, and The inclined surface of the insulating layer has a gentler slope than side surfaces of the dam and side surfaces of the spacer.
2. The display device according to claim 1, wherein: The device substrate includes a groove recessed in the device substrate and disposed adjacent to the spacer.
3. The display device according to claim 1, wherein: The separation device includes a metal pattern disposed on the device substrate and an insulating cap disposed on the metal pattern.
4. The display device according to claim 3, wherein: The metal pattern overlaps the insulating cap and has a smaller width than the insulating cap. 5 . The display apparatus according to claim 4 , at least one organic layer of the light emitting device is partially cut off by the partitioning means.
6. The display device according to claim 3, further comprising: a first outer covering layer, the first outer covering layer being arranged between the driving circuit and the light emitting device; a second outer covering layer, the second outer covering layer being disposed between the first outer covering layer and the light emitting device; as well as an intermediate electrode disposed between the first outer covering layer and the second outer covering layer, wherein the intermediate electrode connects the light emitting device to the driving circuit, wherein the dam and the partitioning device are arranged outside the first outer covering layer and the second outer covering layer, and Wherein, the metal pattern of the separation device comprises the same material as that of the intermediate electrode.
7. The display device according to claim 3, further comprising: A driving circuit, wherein the driving circuit is arranged between the device substrate and the light emitting device; as well as a connecting electrode, wherein the connecting electrode is connected between the driving circuit and the light emitting device, Wherein, the metal pattern comprises the same material as that of the connecting electrode.
8. The display device according to claim 7, wherein: The insulating cap includes the same material as an overcoat covering the connection electrode.
9. A method for forming a display device, the method comprising the steps of: forming a driving circuit including at least one insulating layer on a pixel region of a device substrate; removing the at least one insulating layer on the penetration region on the device substrate and the separation region surrounding the penetration region; forming a separation device in contact with the device substrate on the separation area; as well as forming a light emitting device on the pixel region and forming a substrate hole in the penetration region, forming a dam portion disposed between the light emitting device and the partitioning means on the dam region while forming the partitioning means, wherein the dam has the same stacked structure as the partition device, wherein at least one insulating layer of a driving circuit disposed between the device substrate and the light emitting device extends between the device substrate and the dam portion, wherein the at least one insulating layer extends up to a boundary between the dam and the separating device, wherein the side surface of the at least one insulating layer between the dam and the partitioning device has an inclined surface, and The inclined surface of the insulating layer has a gentler slope than side surfaces of the dam and side surfaces of the spacer.
10. The method according to claim 9, wherein: The separation device includes a metal pattern disposed on the device substrate and an insulating cap disposed on the metal pattern, the metal pattern overlaps the insulating cap and has a smaller width than the insulating cap.
11. The method according to claim 10, wherein: The step of forming the partitioning device comprises the following steps: forming a first outer covering layer covering the driving circuit; forming a conductive material layer on the first overcoat layer in the pixel region and on the device substrate in the separation region; Patterning the conductive material layer to form a connection electrode for connecting the driving circuit and the light emitting device in the pixel region and to form an initial pattern in the separation region; forming a second overcoat layer on the connection electrode and the initial pattern, and partially etching the second overcoat layer to form an initial cap partially exposing the initial pattern; forming a first electrode of the light emitting device connected to the connecting electrode on the second outer covering layer, stacking insulating layers and patterning the insulating layers to form a bank insulating layer in the pixel region and forming an upper cap on the initial cap, the upper cap and the initial cap constituting the insulating cap; removing portions of the preliminary pattern exposed by the preliminary cap and the upper cap to form a preliminary metal pattern; and The width of the preliminary metal pattern is reduced to form the metal pattern.
12. The method according to claim 10, further comprising the steps of: forming a first overcoat layer disposed between the driving circuit and the light emitting device; forming an intermediate electrode disposed between the first overcoat layer and the light emitting device; forming a second outer covering layer covering the intermediate electrode between the first outer covering layer and the light emitting device, wherein the dam and the partitioning device are arranged outside the first outer covering layer and the second outer covering layer, and Wherein, the metal pattern of the separation device and the intermediate electrode are formed simultaneously.
Citation Information
Patent Citations
Display panel and preparation method thereof
CN110518141A
Organic light-emitting display and method of manufacturing the same
US20170148856A1