Method of making a device comprising a membrane suspended over a cavity

By forming a basic cavity and an isolator on the carrier substrate of the MEMS device, local etching forms useful cavity, solving the problems of substrate manufacturing complexity and sensitive information leakage in the prior art, and achieving rapid, economical development and precise dimensional control of the device .

CN113226978BActive Publication Date: 2024-12-20SOITEC SA
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Patent Information

Application Number
CN201980084624.7
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Priority Date
2018-12-20
Filing Date
2019-12-12
Publication Date
2024-12-20
Estimated Expiration
2039-12-12

AI Technical Summary

Technical Problem

Prior art When manufacturing MEMS devices based on suspended over useful cavity, substrate manufacturers are required to design and manufacture substrates specific to each topology, making rapid and economic development of devices difficult, and device topology is often Sensitive information, unwilling to be disclosed.

Method used

The adoption of a universal structure, including the formation of a basic cavity and a spacer on the carrier substrate, the formation of useful cavity by local etching and chemical etching, release of the surface layer, and simplify the manufacturing process, avoiding the need to develop a substrate manufacturing method specifically for each device.

Benefits of technology

The use of a universal substrate to manufacture a variety of devices is realized, reducing material consumption and etching time, ensuring the precise size of useful cavity, simplifying the manufacturing process and reducing development difficulty.

✦ Generated by Eureka AI based on patent content.

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Abstract

The present invention concerns a method for manufacturing a device, the device comprising a membrane extending over a useful cavity, the method comprising: providing a general structure, the general structure comprising a surface layer extending in a main plane and arranged on a first surface of a supporting substrate, the supporting substrate comprising basic cavities opening below the surface layer and an insulator defining each basic cavity, the insulator having an upper surface forming all or part of the first surface of the supporting substrate; defining a group of adjacent basic cavities so that the contour of the group of basic cavities corresponds to the contour of the useful cavities in the main plane; removing the insulator located within the contour of the group of basic cavities so as to form the useful cavities, and releasing the surface layer arranged above the useful cavities and forming the membrane.
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Description

Technical Field

[0001] The present invention relates to the field of microelectronics and microsystems. In particular, it relates to a method of manufacturing a device comprising a membrane suspended over a useful cavity. Background Art

[0002] MEMS devices (MEMS is the acronym for Microelectromechanical systems) are widely used to manufacture various sensors for a variety of applications, examples of which may be mentioned are pressure sensors, microphones, radio frequency switches, electroacoustic and ultrasonic transducers such as piezoelectric micromachined ultrasonic transducers (pMUTs), etc.

[0003] Many of these MEMS devices are based on a flexible membrane suspended over a useful cavity. In operation, the bending of the membrane, which is related to a physical parameter (such as acoustic wave propagation for the pMUT), is converted into an electrical signal (or vice versa, depending on whether the device is in receiver mode or transmitter mode).

[0004] Depending on the type of device implemented, the geometry of the individual useful cavities (shape, lateral dimensions, depth), the geometry of the membranes (thickness) and their planar distribution (intercavity distance) will be different.

[0005] Lu Yipeng and David A.Horsley published "Modeling, fabrication, and characterization of piezoelectric micromachined ultrasonic transducer arrays based on cavity SOI wafers." (Journal of Microelectromechanical Systems 24.4 (2015) 1142-1149) presents an example of fabricating a pMUT device from a SOI (silicon on insulator) substrate with a buried useful cavity. This method uses the useful cavity formed in advance in the substrate to limit the number of layers of photolithography masks that need to be used.

[0006] This approach is attractive, but it means that some of the effort in designing the acoustic device must be borne by the substrate manufacturer. Specifically, the substrate manufacturer must be able to design and manufacture a substrate that includes useful cavities that precisely match the topology (cavity geometry, cavity spacing) required for the device. However, the device topology is often valuable and sensitive information that the device manufacturer typically does not want to disclose.

[0007] In addition, substrate manufacturers must develop substrate manufacturing methods specific to each topology. The effort required to do so makes rapid and economical development of devices more difficult.

[0008] It would therefore be desirable to be able to provide a substrate that can be used to fabricate a variety of devices based on a membrane suspended over a useful cavity and that thus does not require substrate-specific fabrication methods to be developed specifically for each device. Summary of the invention

[0009] Purpose of the Invention

[0010] The present invention aims to achieve the above objectives and relates to a method for manufacturing a device comprising a membrane suspended over a useful cavity, which method is simplified by the use of a universal substrate.

[0011] Brief description of the invention

[0012] The present invention relates to a method of manufacturing a device comprising a membrane suspended over a useful cavity, the method comprising:

[0013] - providing a generic structure comprising a surface layer extending in a main plane and arranged on a first side of a carrier substrate, the carrier substrate comprising elementary cavities opening below the surface layer and insulating bodies delimiting the respective elementary cavities, the upper surface of the insulating bodies forming all or part of the first side of the carrier substrate;

[0014] - defining a set of adjacent elementary cavities such that the outline of said set of elementary cavities corresponds in said main plane to the outline of said useful cavity;

[0015] - Removing the spacers situated within the contour of the set of elementary cavities in order to form the useful cavities and in order to free the surface layers arranged above the useful cavities and constituting the membrane.

[0016] Other advantageous and non-limiting features according to the invention (alone or in any technically feasible combination):

[0017] · The separator separates the elementary cavities from each other;

[0018] The spacers are distributed in the main plane according to a network of spacers that allows communication between elementary cavities, each elementary cavity being defined by an elementary pattern of the spacer network;

[0019] Provides common structures including:

[0020] oProviding a donor substrate,

[0021] o providing a carrier substrate, the carrier substrate comprising open basic cavities and a spacer defining each basic cavity and having an upper surface forming all or part of a first side of the carrier substrate,

[0022] o joining the donor substrate and the carrier substrate at a first side of the carrier substrate,

[0023] oThinning the donor substrate to form a surface layer;

[0024] Providing a donor substrate includes: implanting a light substance in the donor substrate to form a buried fragile zone between a first portion of the donor substrate and a second portion of the donor substrate, the first portion being intended to form a surface layer and the second portion being intended to form a remainder of the donor substrate;

[0025] Thinning the donor substrate includes: separating the surface layer from the rest of the donor substrate via the buried fragile region;

[0026] the first portion of the donor substrate having a thickness comprised between 0.2 micrometers and 2 micrometers;

[0027] The joining comprises bonding the donor substrate on the one hand and the first side of the carrier substrate on the other hand by molecular adhesion;

[0028] Removing the spacer within the contours of the set of elementary cavities comprises: locally etching the surface layer to form at least one hole through the surface layer; and chemically etching the spacer through the hole;

[0029] At least one hole is formed perpendicular to the separator;

[0030] The holes are formed perpendicular to each of the elementary cavities in the set of elementary cavities;

[0031] Removing the spacer located within the outline of the set of basic cavities comprises: locally etching the second side of the carrier substrate to form at least one hole opening to one cavity of the set of basic cavities; and chemically etching the spacer through the hole;

[0032] The insulator comprises at least one material selected from silicon oxide, silicon nitride, single crystal silicon, polycrystalline silicon, amorphous silicon or porous silicon;

[0033] • The donor substrate comprises at least one semiconductor or piezoelectric material. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Other features and advantages of the present invention will become apparent from the following detailed description of the invention, which is given with reference to the accompanying drawings, in which:

[0035] Figures 1a to 1f A method for manufacturing a device comprising a membrane arranged on a useful cavity according to the invention is shown;

[0036] Figure 2a to Figure 2b The steps of the manufacturing method according to the present invention are shown;

[0037] Figure 3a to Figure 3c Other steps of the manufacturing method according to the present invention are shown;

[0038] Figures 4a to 4j An example of an embodiment of a manufacturing method according to the present invention is shown;

[0039] Figure 5a to Figure 5e The steps of the manufacturing method according to the present invention are shown. DETAILED DESCRIPTION

[0040] In the description, the same reference numerals may be used for the same type of elements in the drawings. The drawings are schematic representations and are not drawn to scale for ease of reading. In particular, the thickness of a layer along the z-axis is not proportional to the lateral dimensions along the x-axis and y-axis; and the relative thickness of the layers relative to each other is not necessarily considered in the drawings.

[0041] The present invention relates to a method of manufacturing a device 200 comprising a membrane 210 suspended above a useful cavity 230 ( Figure 1e and Figure 1f ). For example, the device 200 may be composed of an ultrasonic or acoustic transducer.

[0042] The manufacturing method according to the present invention first comprises a step of providing a generic structure 100, which comprises: a surface layer 10 extending in a main plane (x, y) and arranged on a first side 21 of a carrier substrate 20. The carrier substrate 20 comprises: basic cavities 23 opening below the surface layer 10; and a separator 24 ( Figure 1a , Figure 5a ). The upper surface of the isolation body 24 at least partially forms the first side surface 21 of the carrier substrate 20 .

[0043] By way of example and not limitation, spacer 24 includes at least one material from silicon oxide, silicon nitride, single crystal silicon, polycrystalline silicon, amorphous silicon, or porous silicon.

[0044] According to a first advantageous embodiment, the partitions 24 completely separate the elementary chambers 23 from one another. Figure 1b As shown in the plan view in , the partitions 24 are advantageously formed as partitions organized in a grid in the main plane (x, y), making it possible to separate each basic cavity 23 from its adjacent cavities and thus delimit each basic cavity 23.

[0045] In this case, the elementary cavities 23 are represented as square in shape, but alternatively they may have a rectangular, circular or any other geometric shape.

[0046] According to a second embodiment of the invention, the elementary cavities 23 are not separated from one another. The spacers 24 are preferably distributed in a uniform manner in the main plane (x, y) according to the network of spacers 24, such as Figure 5b The spacers 24 do not touch each other and they form local spacers and / or columns. In this embodiment, the basic cavity 23 refers to the cavity inside the basic pattern 23e of the network of spacers 24. Figure 5b In the example of FIG. 2 , the basic pattern 23 e corresponds to a square pattern imaginarily defined by four adjacent partitions 24 ; the basic cavity 23 is defined by the four adjacent partitions 24 and corresponds to an inner region of the basic pattern 23 e .

[0047] The upper surface of the spacer 24 (in the main plane (x, y)) is represented in this case as a square shape, but it can have a rectangular, circular or any other geometric shape. The spacers 24 can also be distributed according to a grid network or other uniform distribution. As an example and in a non-limiting manner, the size of the spacer 24 in the main plane (x, y) can be about 5 microns, 7 microns, 10 microns or 15 microns.

[0048] The manufacturing method then comprises a step of defining a group 23g of elementary cavities of adjacent elementary cavities 23, the outer contour of which corresponds in the main plane (x, y) to the contour of the useful cavity 230 ( Figure 1c , Figure 5c ). Of course, in this case, reference is made to the definition of at least one elementary cavity group 23g of elementary cavities: in practice, in the case of a generic structure 100 formed by a carrier substrate 20 having a diameter between 100 mm and 300 mm, a plurality of elementary cavity groups 23g will be defined in the main plane (x, y) according to a determined distribution.

[0049] This definition step depends on the type of device 200 envisaged and it depends in particular on the desired lateral dimensions of the useful cavity(ies) 230 in the main plane (x, y); these lateral dimensions vary from a few tens of micrometers to a few hundreds of micrometers or a few millimeters. This definition step also depends on the spacing between the useful cavities desired for the device 200: this spacing may vary, for example, from a few tens of micrometers to a few hundreds of micrometers or a few millimeters.

[0050] It will be noted that this definition step and subsequent steps may preferably be performed by the device manufacturer, the substrate manufacturer being responsible only for providing the generic structure 100. Alternatively, the substrate manufacturer may perform the definition step upon customer request and according to specifications set by the substrate manufacturer.

[0051] The manufacturing method according to the invention then comprises a step of removing the partitions 24 located within the contour of the basic cavity group 23g; in the following, said partitions are referred to as temporary partitions 24g.

[0052] Removing the temporary isolation body 24g advantageously comprises: locally etching the surface layer 10 so as to form at least one hole 13 ( 13 ) through the surface layer 10 in a defined area of ​​the elementary cavity group 23g. Figure 2a and Figure 2b ).

[0053] This local etching can be performed by photolithography and dry chemical etching or wet chemical etching. In particular, a mask (not shown) deposited on the free side 12' of the surface layer 10 makes it possible to define the area to be etched so as to form the hole 13 and to protect the rest of the free side 12'. It will be noted that during the formation of the basic cavity 23 and the isolation body 24 on the carrier substrate 20, alignment marks defined on the periphery of the carrier substrate 20 and / or in the area provided for the cutting road on the first side 21 of the carrier substrate 20 and / or at the second side 22 of the carrier substrate 20 allow precise positioning relative to the isolation body 24 and the basic cavity 23 during this removal step. These marks can also be used for subsequent steps that require alignment relative to the useful cavity (s) 230 of the device 200.

[0054] according to Figure 2b In the first variant shown, the (at least one) hole 13 is made perpendicular to the temporary insulation 24g.

[0055] According to a second variant, which may be used in particular in the first embodiment of the invention, the hole 13 is formed perpendicular to at least one elementary cavity 23 of the group 23 g of elementary cavities (not shown).

[0056] As for the aforementioned variant, the (at least one) hole 13 may be re-plugged, for example by depositing polysilicon under vacuum or in a controlled atmosphere.

[0057] According to a third variant (not shown), removing the temporary insulator 24g can include forming at least one hole 13 by locally etching the second side 22 of the carrier substrate 20 up to the cavity of the basic cavity group 23g. Advantageously, this etching is performed at the second side 22 at the end of the manufacture of the MEMS device 200, in particular when the carrier substrate 20 is thinned to, for example, 400 microns, 200 microns, 100 microns, 50 microns or less. This allows the generation of small-sized holes 13 while remaining within the ratio of the etched thickness / size of the holes that can be achieved using known chemical etching techniques. It will be noted that this variant allows the membrane (the portion of the surface layer 10 located perpendicular to the basic cavity group 23g) to remain intact by avoiding the passage of the hole 13 therethrough.

[0058] Then, in any of the variants described, a dry chemical etch or a wet chemical etch suitable for attacking the material of the spacer 24 is performed through the hole 13 in order to eliminate the temporary spacer 24g ( Figure 1d , Figure 5d ) and releases the surface layer 10 (forming the film 210 ) across the entire useful cavity 230 .

[0059] At the end of the step of removing the temporary spacer 24g, a device 200 is obtained comprising a membrane 210 suspended above a useful cavity 230 ( Figure 1e ).

[0060] The method for manufacturing the device 200 according to the invention is simplified by using a so-called generic structure 100 which, during its development, does not require knowledge of the geometry and distribution of the useful cavities 230. The generic structure 100 comprises a plurality of elementary cavities 23 and a plurality of partitions 24, some of which are temporary, since they are intended to be eliminated in order to form one (or more) useful cavities 230 defined by one (or more) elementary cavity groups 23g.

[0061] In the first embodiment of the present invention, in which the universal structure 100 comprises basic chambers 23 separated from each other by separators 24, after the temporary separators 24g are removed, the membrane 210 located above the useful chamber 230 is held by the separators 24 over the entire periphery of the useful chamber 230 ( Figure 1d and Figure 1e In the second embodiment of the present invention, in which the separator 24 of the general structure 100 does not separate the basic cavities 23 from each other, after removing the temporary separator 24g, the membrane 210 located above the useful cavity 230 is partially retained on the periphery of the useful cavity 230 by the separator 24 ( Figure 5d and Figure 5e Any implementation may be envisioned depending on the type of device 200 desired.

[0062] Therefore, the generic structure 100 has the advantage that it can be used to manufacture a large number of devices 200 based on different topologies of useful cavities 230 , which can be formed according to the basic cavity group 23 g .

[0063] Furthermore, the advantage of developing the useful cavity 230 by removing the temporary spacer 24g is that it requires only a small amount of material to be eliminated, the width of the spacer is reduced and this limits the etching time, and a precise size of the useful cavity 230 can be achieved.

[0064] The manufacturing method (regardless of the embodiment) may also include additional steps for manufacturing the device 200 on the surface layer 10 and in particular on and around the membranes 210. These additional steps may include, among others, steps of photolithography, etching and deposition of insulating and / or conductive layers in order to define and form, for example, electrodes 220 ( Figure 1f ).

[0065] It will be noted that these additional steps may alternatively be performed before the step of removing the temporary insulation 24g in order to exploit the mechanical strength of the surface layer 10 across the entire generic structure 100 (in the main plane (x,y)) as a result of said underlying temporary insulation 24g.

[0066] According to an advantageous mode of implementing the invention, the step of providing the generic structure 100 first comprises providing a donor substrate 1. The donor substrate 1 has a front side 11 intended to be bonded to a carrier substrate 20, and a back side 12. By way of example and in a non-limiting manner, the donor substrate 1 will likely comprise at least one semiconductor (e.g. silicon, silicon carbide, etc.), or a piezoelectric material (e.g. lithium tantalate, lithium niobate, aluminum nitride, zinc oxide, PZT, etc.).

[0067] Second, the step of providing the generic structure 100 comprises providing a carrier substrate 20 comprising a first side 21 intended to be joined to the donor substrate 1, and a second side 22. The carrier substrate further comprises a basic cavity 23 opening at the first side 21, and a spacer 24, the upper surface of which forms all or part of the first side 21.

[0068] As non-limiting examples, carrier substrate 20 may include silicon, glass, sapphire, or the like.

[0069] The shape of the basic cavity 23 in the main plane (x, y) can be circular, square, rectangular or polygonal. The lateral size of the basic cavity 23 in the main plane (x, y) can be advantageously less than 50 microns, or less than 25 microns, or less than 10 microns. The spacing between the basic cavities 23 (corresponding to the width of the separator 24) can vary from one micron to tens of microns. As an example and in a non-limiting manner, the width of the separator 24 can be about 5 microns, 7 microns, 10 microns or 15 microns. The upper surface of the separator 24 can have a circular, square, rectangular or polygonal shape.

[0070] Depending on the intended device 200 , the depth of the elementary cavity 23 along the z-axis perpendicular to the main plane (x, y) (also corresponding to the height of the spacer 24 ) may vary from tens of nanometers to tens of micrometers or hundreds of micrometers.

[0071] Third, the step of providing the generic structure 100 comprises joining the front side 11 of the donor substrate 1 and the first side 21 of the carrier substrate 20. The joining operation preferably comprises direct bonding by molecular adhesion. The principle of molecular adhesion is well known in the prior art and will not be described in detail here. It will be noted that the substrates to be joined must have a very good surface finish (cleanliness, low roughness, etc.) to obtain a high quality joint.

[0072] Advantageously, in order to ensure a good quality joint, the bonding step comprises cleaning the surfaces to be bonded of the donor substrate 1 and the surfaces to be bonded of the carrier substrate 20 before the surfaces are brought into contact. As an example, conventional procedures used in microelectronics, in particular for silicon-based substrates, comprise ozone cleaning, SC1 cleaning (SC1 is an acronym for Standard Clean 1) and SC2 cleaning (SC2 is an acronym for Standard Clean 2), with rinsing in between. The surfaces to be bonded will also possibly be activated (for example using plasma) before bringing into contact, in order to promote high bonding energies between the surfaces.

[0073] Optionally, the donor substrate 1 and / or the carrier substrate 20 will likely include a bonding layer on the front side 11 and / or the first side 21, respectively, in order to improve the bonding quality and bonding energy at their interface.

[0074] Fourthly, the step of providing the universal structure 100 includes thinning the donor substrate 1 to form the surface layer 10 .

[0075] According to a first variant of this advantageous mode of realization, the thinning of the donor substrate 1 is performed by mechanical grinding, chemical mechanical polishing and / or chemical etching of the back side 12 of the donor substrate 1. At the end of the thinning step, a surface layer 10 ( Figure 1a ).

[0076] According to this variant, the thickness of the surface layer 10 may be between a few micrometers and tens or hundreds of micrometers.

[0077] According to a second variant of this advantageous mode of implementation, the thinning is performed using SmartCut TM A process is performed which is based on the implantation of light ions and their separation at the implantation area.

[0078] Thus, according to this second variant, the aforementioned step of providing a donor substrate 1 comprises: injecting a light substance into said donor substrate 1 so as to form a buried fragile zone 2 between a first portion 3 of the donor substrate 1, intended to form the surface layer 10, and a second portion 4 of the donor substrate 1, intended to form the remainder of the donor substrate ( Figure 3a ). Preferably, before the implantation, an intermediate layer 5 is provided on the front side 11 of the donor substrate 1. Prior to the bonding step, this intermediate layer 5 can be retained, removed and / or replaced by a bonding layer.

[0079] The thickness of the first portion 3 and therefore of the future surface layer 10 depends on the implantation energy of the light species (eg hydrogen or helium). Advantageously, the implantation energy is chosen such that the first portion 3 of the donor substrate 1 has a thickness of about 0.2 to 2 microns.

[0080] Then, according to the bonding step of the method, the donor substrate 1 is bonded to the carrier substrate 20 ( Figure 3b ).

[0081] Still according to this second advantageous variant, the step of thinning the donor substrate 1 comprises: separating the surface layer 10 (formed by the separated first portion 3) from the rest of the donor substrate 1 at the buried fragile zone 2 ( Figure 3c ). This separation preferably takes place during the heat treatment, at a temperature comprised between a few hundred degrees and 700° C. Alternatively, it can be mechanically assisted or achieved by mechanical stress after the heat treatment.

[0082] At the end of the thinning step, a surface layer 10 ( Figure 3c ). To review, SmartCut TM The treatment allows obtaining thin layers with excellent thickness uniformity.

[0083] Using SmartCut TM In some cases where the thickness of the surface layer 10 transferred by the process is insufficient, it can be increased again during the finishing process mentioned below by depositing additional layers on the free side 12 ′ of the surface layer 10 , for example by epitaxial growth or other known deposition methods.

[0084] In both thinning variants described, the thinning step may include a finishing treatment aimed at improving the crystal quality (removing defects from the layer), the surface quality (removing residual roughness from the free side 12') and / or modifying the thickness of the surface layer 10 when the surface layer 10 is arranged on the carrier substrate 20. This finishing treatment will possibly include one or more thermal treatments, chemical mechanical polishing, chemical etching, epitaxial growth and / or deposition of additional layers.

[0085] Example of Implementation

[0086] In this example, the intended device 200 requires a silicon membrane 210 having a thickness of 1.5 microns overhanging a useful cavity 230 having a square shape of approximately 104 microns per side and a depth of 1 micron.

[0087] The manufacturing method according to the invention first proposes to provide a generic structure 100 comprising a 1.5 micron silicon surface layer and a basic cavity 23 having a square shape with 20 microns per side, a depth of 1 micron and a spacing of 8 microns.

[0088] The donor substrate 1 is a substrate made of silicon ( Figure 4a). Before the light species are implanted, an intermediate layer 5 of silicon oxide, for example about 100 nm, is formed on the front side 11, for example by thermal oxidation. The implantation energy is set to 210 keV, and the dose of hydrogen species is about 7 E 16 / cm2. Thus, a buried fragile region 2 is formed, which is located in the main plane (x, y) between the first portion 3 and the second portion 4 of the donor substrate 1 and at a depth of about 1.9 micrometers.

[0089] Prior to the step of bonding to the carrier substrate 20 , the intermediate layer 5 will possibly be retained or removed.

[0090] The carrier substrate 20 is a substrate made of silicon. A thermal oxide layer 24a having a thickness of 2 micrometers is formed on the carrier substrate 20. The thermal oxide layer 24a is formed on the first side 21 and the second side 22 of the carrier substrate 20. The thermal oxide layer present on the second side 22 may be retained or deleted in whole or in part as appropriate. Alternatively, the oxide layer may be deposited (using known deposition techniques) only on the first side 21 of the carrier substrate 20.

[0091] Then, by photolithography, a mask 25 is defined on the first side 21 of the carrier substrate 20, the mask 25 including an unmasked area where the thermal oxide layer 24a will be etched and a masked area ( Figure 4b It will be noted that alignment marks are also defined at the periphery of the carrier substrate 20 and / or in the region of the scribe lines for subsequent lithographic steps aimed at redefining the coordinates of the elementary cavity 23 when it is buried under the surface layer 10 .

[0092] The unmasked areas are defined according to the size of the basic cavity 23 of the generic structure 100 and the target plane distribution. In these unmasked areas, a dry chemical etch or a wet chemical etch of the thermal oxide layer 24a is performed directly through the thickness of the thermal oxide layer 24a, i.e., 2 microns ( Figure 4c Then, the mask 25 is removed ( Figure 4d ).

[0093] Typically, in this example, each elementary cavity 23 measures 20 microns per side, and spacers 24 having a width of 8 microns are distributed in a grid, separating the elementary cavities 23 from each other ( Figure 4e ).

[0094] After the cleaning and activation process, the front side 11 of the donor substrate 1 and the first side 21 of the carrier substrate 20 are in contact and bonded by molecular adhesion ( Figure 4f ). It will be noted that direct bonding will likely be performed under ambient atmosphere or under a controlled atmosphere (pressure and nature of the gas). Annealing for consolidating the bonding interface may be applied to the bonded structure at a temperature of about 350°C.

[0095] The separation via the buried fragile zone 2 is carried out during the separation heat treatment at a temperature of about 500° C.

[0096] This then results in a generic structure 100 comprising a surface layer 10 ( Figure 4g ).

[0097] Preferably, finishing operations (such as thermal oxidation treatment and chemical mechanical polishing) are performed in order to ensure that the transferred surface layer 10 has good surface and structural quality and obtains a thickness of 1.5 micrometers.

[0098] Then, a step of defining at least one basic cavity group 23g of adjacent basic cavities 23 is performed, the outer contour of the at least one basic cavity group 23g corresponding to the contour of the useful cavity 230 in the main plane. Figure 4h As shown, a basic cavity group 23g is defined with 16 basic cavities 23 to form a useful cavity 230 with a side length of about 104 microns. The partition separating these 16 basic cavities 23 is a temporary partition 24g, which is intended to be eliminated in the next step of the manufacturing method.

[0099] For the step of removing the temporary spacer 24g, a mask 14, for example made of silicon nitride, is defined by photolithography using alignment marks provided on the carrier substrate 20 to define unmasked areas where holes 13 through the surface layer 10 are to be formed, while the remaining free side faces 12' of the surface layer 10 are masked and thus protected. The surface layer 10 made of silicon is locally etched dry or wet so as to form the holes 13, where the cross-sectional area of ​​each hole 13 is selected to be smaller than the upper surface ( Figure 4i ) and each hole 13 is located at the intersection of the grid forming the temporary insulator 24g.

[0100] In the presence of the holes 13a , chemical etching (eg dry chemical etching based on hydrofluoric acid (HF) vapor) is performed to remove the thermal oxide making the temporary spacer 24g and thus free the surface layer 10 across the entire useful cavity 230 in order to form the membrane 210 .

[0101] The mask 14 may be removed before the chemical etching of the temporary spacer 24g or at the end of the step of removing the temporary spacer 24g.

[0102] It should be noted that, depending on the method selected for the step of removing the temporary spacer 24g, overetching may occur at the spacer 24 defining the useful cavity 230 and thus substantially modify the size of the useful cavity 230 and the associated size of the membrane 210. Therefore, it will be necessary to take into account these potential effects of overetching and / or adjust the method selected for the step of removing the temporary spacer 24g in order to obtain a useful cavity 230 with the correct size.

[0103] The hole 13a can then be re-blocked if necessary.

[0104] This results in the desired device 200 comprising a membrane 210 suspended over a useful cavity 230, with the thickness of the surface layer 10 (membrane 210) and the geometry of the useful cavity 230 meeting the above specifications.

[0105] Of course, the invention is not limited to the modes and examples of embodiment described and variant embodiments may be introduced therein without departing from the scope of the invention as defined by the claims.

Claims

1. A method of manufacturing an electronic device (200), the electronic device (200) comprising a membrane (210) suspended above a useful cavity (230), the method comprising: A general structure (100) is provided, the general structure (100) comprising a surface layer (10) extending in a main plane (x, y) and arranged on a first side (21) of a carrier substrate (20), the carrier substrate (20) comprising elementary cavities (23) opening below the surface layer (10) and a spacer (24) delimiting each elementary cavity (23), the spacer (24) having an upper surface forming all or part of the first side (21) of the carrier substrate (20); defining a basic cavity group (23g) of adjacent basic cavities (23) consisting of some basic cavities among the basic cavities (23) of the universal structure (100), so that the outline of the basic cavity group (23g) corresponds to the outline of the useful cavity (230) in the main plane (x, y); and The temporary isolation body (24g) located within the outline of the basic cavity group (23g) is removed so that the basic cavity (23) and the isolation body (24) located outside the outline of the basic cavity group (23g) are retained to form the useful cavity (230) and to release the surface layer (10) arranged above the useful cavity (230) and constituting the membrane (210).

2. The manufacturing method according to claim 1, wherein: The separating bodies (24) separate the basic chambers (23) from one another.

3. The manufacturing method according to claim 1, wherein: The separators (24) are distributed in the main plane (x, y) according to a separator network allowing communication between the elementary cavities (23), each elementary cavity (23) being delimited by an elementary pattern (23e) of the separator network.

4. The manufacturing method according to claim 1, wherein: Providing the general structure (100) includes: providing a donor substrate (1), Providing the carrier substrate (20), the carrier substrate (20) comprising the open basic cavities (23) and the isolation body (24) defining each basic cavity (23) and the upper surface of which forms all or part of the first side surface (21) of the carrier substrate (20), joining the donor substrate (1) and the carrier substrate (20) at the first side (21) of the carrier substrate (20), and The donor substrate (1) is thinned to form the surface layer (10).

5. The manufacturing method according to claim 4, wherein: Providing the donor substrate (1) comprises: injecting a light substance into the donor substrate (1) to form a buried fragile zone (2) between a first portion (3) of the donor substrate (1) and a second portion (4) of the donor substrate (1), the first portion being intended to form the surface layer (10) and the second portion being intended to form the remainder of the donor substrate (1), Thinning the donor substrate (1) comprises separating the surface layer (10) from the remaining portion of the donor substrate (1) via the buried fragile region (2).

6. The manufacturing method according to claim 5, wherein: The first portion (3) of the donor substrate (1) has a thickness comprised between 0.2 micrometers and 2 micrometers.

7. The manufacturing method according to one of claims 4 to 6, wherein: The joining comprises bonding the donor substrate (1) to the first side (21) of the carrier substrate (20) by molecular adhesion.

8. The manufacturing method according to claim 1, wherein: Removing the temporary insulator (24g) located within the outline of the basic cavity group (23g) includes: locally etching the surface layer (10) to form at least one hole (13) passing through the surface layer (10); and chemically etching the temporary insulator (24g) through the hole (13).

9. The manufacturing method according to claim 8, wherein: The at least one hole (13) is formed perpendicular to the temporary insulation (24g).

10. The manufacturing method according to claim 8, wherein: The hole (13) is formed perpendicular to each basic cavity (23) in the basic cavity group (23g).

11. The manufacturing method according to claim 1, wherein: Removing the temporary insulator (24g) located within the contour of the basic cavity group (23g) includes: locally etching the second side (22) of the carrier substrate (20) to form at least one hole (13) opening to one of the basic cavities (23) of the basic cavity group (23g); and chemically etching the temporary insulator (24g) through the hole (13).

12. The manufacturing method according to claim 1, wherein: The insulator (24) comprises at least one material selected from silicon oxide, silicon nitride, single crystal silicon, polycrystalline silicon, amorphous silicon or porous silicon.

13. The manufacturing method according to claim 4, wherein: The donor substrate (1) comprises at least one semiconductor or piezoelectric material.

Citation Information

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