Information sending and receiving method, device and terminal

Abstract

The present invention discloses a method, device and terminal for sending and receiving information, wherein the sending method comprises: sending a direct link synchronization signal block S-SSB, wherein the S-SSB comprises a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information. The terminal of an embodiment of the present invention determines the scrambling sequence of the PSBCH according to at least one of the first information and the second information, and scrambles the PSBCH using the corresponding scrambling sequence, which can reduce mutual interference between different PSBCH channels in the direct link, improve the decoding success rate of the PSBCH, and thus reduce the synchronization delay of the terminal.

Description

Technical Field

[0001] The present invention relates to the field of communication technology, and in particular to an information sending and receiving method, device and terminal. Background Art

[0002] In the Long Time Evolution (LTE) vehicle-to-everything (V2X) technology, a maximum of three synchronization subframes are configured every 160ms on the direct link (Sidelink, also known as the side link, side link, etc.). The terminal (User Equipment, UE, or user equipment) sends and receives sidelink synchronization signals and broadcast information on these synchronization subframes, and the UE does not perform beam scanning when sending and receiving synchronization signals and broadcast information on these synchronization subframes. With the development of vehicle networking technology, in the fifth generation (5 th In the New Radio (NR) system of the New Generation (5G), in order to meet the needs of new application scenarios, 5G NR supports larger bandwidth, flexible subcarrier spacing configuration, and synchronization signals and broadcast information are sent in the form of synchronization signal and broadcast channel block (Synchronization Signaland PBCH Block, SSB) beam scanning or beam repetition. This brings new challenges to the design of the NR V2X physical layer structure. The original UE's sending and receiving of synchronization signals and broadcast information on the synchronization subframe needs to be redesigned, and flexible subcarrier spacing configuration and SSB beam scanning or beam repetition mechanisms need to be introduced to meet the needs of NR V2X. However, after the introduction of the sidelink synchronization signal and PBCH block (S-SSB) in NR V2X, how to scramble the physical sidelink broadcast channel (PSBCH) sent on the sidelink link has become an urgent problem to be solved. Summary of the invention

[0003] The embodiments of the present invention provide a method, device and terminal for sending and receiving information, which can solve the scrambling problem of PSBCH in the NR V2X system.

[0004] The embodiments of the present invention provide the following technical solutions:

[0005] An embodiment of the present invention provides an information sending method, which is applied to a terminal, and the method includes:

[0006] Sending a direct link synchronization signal block S-SSB, where the S-SSB includes a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following:

[0007] at least part of the bits of a direct radio frame number DFN;

[0008] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0009] At least some of the bits of a timeslot number.

[0010] Optionally, at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS.

[0011] Optionally, the information sending method further includes:

[0012] The scrambling sequence is initialized according to the direct link synchronization signal identification number SL-SSID.

[0013] Optionally, the PSBCH is scrambled by a scrambling sequence, comprising:

[0014] Scrambling the PSBCH by a first scrambling sequence;

[0015] or,

[0016] Scrambling the PSBCH by a second scrambling sequence;

[0017] or,

[0018] The PSBCH is scrambled by a first scrambling sequence, and then scrambled by a second scrambling sequence;

[0019] The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

[0020] Optionally, scrambling the PSBCH by using a first scrambling sequence includes:

[0021] The PSBCH payload bit sequence is scrambled by a first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

[0022] Optionally, scrambling the PSBCH by a second scrambling sequence includes:

[0023] The PSBCH sequence is scrambled by the second scrambling sequence; wherein the PSBCH sequence is generated after the load in the PSBCH is interleaved and rate matched.

[0024] Optionally, scrambling the PSBCH by using a first scrambling sequence includes:

[0025] According to the first information, a sequence is selected from a first candidate sequence set as a first scrambling sequence, and the PSBCH is scrambled by using the first scrambling sequence.

[0026] Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

[0027] Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

[0028] Optionally, scrambling the PSBCH by a second scrambling sequence includes:

[0029] According to the second information, a sequence is selected from the second candidate sequence set as a second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

[0030] Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

[0031] Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

[0032] Optionally, at least some of the bits of DFN are the second and third least significant bits of DFN.

[0033] Optionally, at least some of the bits of the S-SSB index number are the 2 or 3 least significant bits of the S-SSB index number.

[0034] Optionally, at least part of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

[0035] Optionally, the time slot number is a time slot number within a system radio frame or a direct radio frame.

[0036] Optionally, in the process of scrambling the PSBCH, at least one item of information including at least part of the bits of the DFN in the first information, at least part of the bits of the S-SSB index number, and at least part of the bits of the time slot number are not scrambled.

[0037] An embodiment of the present invention further provides an information receiving method, which is applied to a terminal, and the method includes:

[0038] A direct link synchronization signal block S-SSB is received, wherein the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and the at least one of the first information and the second information includes at least one of the following:

[0039] at least part of the bits of a direct radio frame number DFN;

[0040] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0041] At least some of the bits of a timeslot number.

[0042] Optionally, the information receiving method further includes:

[0043] The PSBCH in the S-SSB is descrambled using the scrambling sequence.

[0044] An embodiment of the present invention further provides a terminal, including: a transceiver, a processor, and a memory, wherein a program executable by the processor is stored in the memory; when the processor executes the program, the transceiver is controlled to implement: sending a direct link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following:

[0045] at least part of the bits of a direct radio frame number DFN;

[0046] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0047] At least some of the bits of a timeslot number.

[0048] Optionally, at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS.

[0049] Optionally, the processor is used to initialize the scrambling sequence according to the direct link synchronization signal identification number SL-SSID.

[0050] Optionally, the processor is specifically configured to: scramble the PSBCH using a first scrambling sequence;

[0051] Alternatively, the PSBCH is scrambled by a second scrambling sequence;

[0052] Alternatively, the PSBCH is scrambled by a first scrambling sequence, and then the PSBCH is scrambled by a second scrambling sequence;

[0053] The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

[0054] Optionally, the processor is used to: scramble the PSBCH payload bit sequence by using a first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

[0055] Optionally, the processor is used to: scramble the PSBCH sequence by using a second scrambling sequence; wherein the PSBCH sequence is generated after the payload in the PSBCH is interleaved and rate matched.

[0056] Optionally, the processor is specifically configured to: select, according to the first information, a sequence from a first candidate sequence set as a first scrambling sequence,

[0057] The PSBCH is scrambled by the first scrambling sequence.

[0058] Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

[0059] Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

[0060] Optionally, the processor is specifically configured to:

[0061] According to the second information, a sequence is selected from the second candidate sequence set as a second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

[0062] Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

[0063] Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

[0064] Optionally, at least some of the bits of DFN are the second and third least significant bits of DFN.

[0065] Optionally, at least some of the bits of the S-SSB index number are the 2 or 3 least significant bits of the S-SSB index number.

[0066] Optionally, at least part of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

[0067] Optionally, the time slot number is a time slot number within a system radio frame or a direct radio frame.

[0068] Optionally, in the process of scrambling the PSBCH, at least one item of information including at least part of the bits of the DFN in the first information, at least part of the bits of the S-SSB index number, and at least part of the bits of the time slot number are not scrambled.

[0069] An embodiment of the present invention further provides an information sending device, which is applied to a terminal, and the device includes:

[0070] A sending module, configured to send a direct link synchronization signal block S-SSB, where the S-SSB includes a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following:

[0071] at least part of the bits of a direct radio frame number DFN;

[0072] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0073] At least some of the bits of a timeslot number.

[0074] An embodiment of the present invention further provides a terminal, comprising: a transceiver, a processor, and a memory, wherein a program executable by the processor is stored in the memory; when the processor executes the program, the transceiver is controlled to implement: receiving a direct link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following:

[0075] at least part of the bits of a direct radio frame number DFN;

[0076] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0077] At least some of the bits of a timeslot number.

[0078] Optionally, the processor is used to: descramble the PSBCH in the S-SSB using a scrambling sequence.

[0079] An embodiment of the present invention further provides an information receiving device, which is applied to a terminal, and the device includes:

[0080] A receiving module, configured to receive a direct link synchronization signal block S-SSB, the S-SSB comprising a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following:

[0081] at least part of the bits of a direct radio frame number DFN;

[0082] At least part of the bits of the through link synchronization broadcast channel block S-SSB index number;

[0083] At least some of the bits of a timeslot number.

[0084] An embodiment of the present invention further provides a processor-readable storage medium, wherein the processor-readable storage medium stores processor-executable instructions, wherein the processor-executable instructions are used to enable the processor to execute the information sending method described above, or to execute the information receiving method described above.

[0085] The beneficial effects of the embodiments of the present invention are:

[0086] In the above-mentioned embodiment of the present invention, the scrambling sequence of PSBCH is determined according to at least one item of the first information and the second information, and the PSBCH is scrambled using the corresponding scrambling sequence, which can reduce the mutual interference between different PSBCH channels in the direct link, improve the decoding success rate of PSBCH, and thus reduce the synchronization delay of the terminal. BRIEF DESCRIPTION OF THE DRAWINGS

[0087] Figure 1 A schematic diagram of a flow chart of a method for sending information according to an embodiment of the present invention;

[0088] Figure 2 A schematic diagram of a process of scrambling a PSBCH using a first scrambling sequence in an embodiment of the present invention;

[0089] Figure 3 A schematic diagram of a process of scrambling a PSBCH by a first scrambling sequence and scrambling a PSBCH by a second scrambling sequence in an embodiment of the present invention;

[0090] Figure 4 Schematic diagram of a process of scrambling a PSBCH by a second scrambling sequence in an embodiment of the present invention;

[0091] Figure 5 A terminal block diagram of a transmitting side of an embodiment of the present invention;

[0092] Figure 6 This is a schematic diagram of the module structure of a terminal on the sending side of an embodiment of the present invention;

[0093] Figure 7 A schematic diagram of a flow chart of an information receiving method according to an embodiment of the present invention;

[0094] Figure 8 A terminal block diagram of a receiving side of an embodiment of the present invention;

[0095] Fig. 9 The figure is a schematic diagram of the module structure of a terminal on the receiving side according to an embodiment of the present invention. DETAILED DESCRIPTION

[0096] The exemplary embodiments of the present invention will be described in more detail below with reference to the accompanying drawings. Although the exemplary embodiments of the present invention are shown in the accompanying drawings, it should be understood that the present invention can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided in order to enable a more thorough understanding of the present invention and to enable the scope of the present invention to be fully communicated to those skilled in the art.

[0097] The terms "first", "second", etc. in the specification and claims of the present application are used to distinguish similar objects, and are not necessarily used to describe a specific order or sequence. It should be understood that the data used in this way can be interchangeable in appropriate circumstances, so that the embodiments of the present application described here can be implemented in an order other than those illustrated or described here. The terms "one", "said", etc. are all general concepts, used to represent similar objects, and do not specifically refer to the number of objects. In addition, the terms "including" and "having" and any of their variations are intended to cover non-exclusive inclusions, for example, the process, method, system, product or equipment comprising a series of steps or units is not necessarily limited to those steps or units clearly listed, but may include other steps or units that are not clearly listed or inherent to these processes, methods, products or equipment. "And / or" in the specification and claims represents at least one of the connected objects.

[0098] In the 5G NR V2X system, terminals communicate directly with each other using the PC5 port (Sidelink). Before transmitting service data, the two terminals that communicate need to establish synchronization on the PC5 port (Sidelink). The method of establishing synchronization is that one terminal A sends synchronization and broadcast signals, and the other terminal B receives the synchronization and broadcast signals sent by terminal A. Once terminal B receives and demodulates successfully, the two terminals can establish synchronization and prepare for the next step of direct communication. Since 5G NR supports larger bandwidth, flexible subcarrier spacing configuration, and synchronization signals and broadcast information are sent in the form of SSB beam scanning or beam repetition, this brings new challenges to the design of the NR V2X physical layer structure. The original UE's transmission and reception of synchronization signals and broadcast information on the synchronization subframe needs to be redesigned, and flexible subcarrier spacing configuration and SSB beam scanning or beam repetition mechanisms need to be introduced to meet the needs of NR V2X. After the introduction of S-SSB in NR V2X, how to scramble PSBCH has become an urgent problem to be solved. The embodiment of the present invention provides a PSBCH scrambling method to solve the PSBCH scrambling problem, which will be further described below in conjunction with a specific embodiment.

[0099] First embodiment

[0100] like Figure 1 As shown, an embodiment of the present invention provides an information sending method, which is applied to a terminal. The method includes but is not limited to the following steps:

[0101] Step 11: Send a direct link synchronization signal block S-SSB, where the S-SSB includes a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence, wherein the scrambling sequence is determined according to at least one of the first information and the second information.

[0102] Optionally, at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number. The first scrambling sequence and the second scrambling sequence are related to the target information carried by the S-SSB (such as PSBCH), such as the timing information in the PSBCH, and optionally, the scrambling sequence can be determined according to the timing information carried in the PSBCH. It is worth noting that the information carried in the PSBCH, in addition to the timing information, may also include: time domain configuration information (such as subframe configuration information), frequency domain configuration information (such as bandwidth information, subcarrier spacing information, etc.), coverage indication information (such as synchronization cluster information), etc. That is, the first information and / or the second information may be information carried by the S-SSB, for example, at least one of the first information and the second information is carried by the PSBCH payload, or at least one of the first information and the second information is carried by the PSBCH demodulation reference signal (Demodulation Reference Signal, DMRS). Here, the first scrambling sequence determined according to the first information is used for the first scrambling process of PSBCH, and the second scrambling sequence determined according to the second information is used for the second scrambling process of PSBCH. The first scrambling process and the second scrambling process are different scrambling processes. For example, the first scrambling is the scrambling after interleaving of the PSBCH payload bit sequence, and the second scrambling is the scrambling after rate matching of the PSBCH sequence.

[0103] In NR V2X, PSBCH is included in S-SSB, that is, S-SSB includes PSBCH. Step 12 can also be understood as sending S-SSB, which includes scrambled PSBCH.

[0104] In this way, the terminal uses the scrambling sequence to scramble the PSBCH, the S-SSB contains the PSBCH, and after the scrambling is completed, the S-SSB is sent to complete the transmission of the PSBCH. Since the scrambling sequence is determined according to the information carried in the S-SSB, the mutual interference between different PSBCHs can be reduced, the decoding success rate of the PSBCH can be improved, and thus the synchronization delay in the direct link communication can be reduced.

[0105] In an optional embodiment, before step 11, it may also include: selecting a sequence from at least one candidate sequence as a scrambling sequence for PSBCH scrambling based on the value of at least part of the bits in the information carried by the S-SSB (such as the timing information carried in the PSBCH, etc.).

[0106] Optionally, the number of candidate sequences is related to the number of at least some of the bits. Optionally, different values ​​of at least some of the bits correspond to different candidate sequences. For example, the correspondence between the values ​​of at least some of the bits in the timing information and the candidate sequences may be predefined or preconfigured, and the terminal may select a scrambling sequence for scrambling from multiple candidate sequences according to the values ​​of at least some of the bits. Assuming that the number of candidate sequences is N, in one embodiment, N is related to the number of at least some of the bits, such as N=2 M , M is the number of at least some bits, where the at least some bits refer to bits related to the selection of the scrambling sequence. For example, if the number of at least some bits is 2, then the number of candidate sequences is 4, and accordingly, the terminal selects a scrambling sequence for scrambling the PSBCH from the 4 candidate sequences according to the values ​​of the 2 bits. For another example, if the number of at least some bits is 3, then the number of candidate sequences is 8, and accordingly, the terminal selects a scrambling sequence for scrambling the PSBCH from the 8 candidate sequences according to the values ​​of the 3 bits.

[0107] The above describes the selection or determination method of the scrambling sequence, and the following describes the initialization method of the scrambling sequence. It is worth noting that the initialization method can be used in combination with the above selection or determination method, or can be used alone. Optionally, the initialization sequence of the scrambling sequence is obtained based on the through link synchronization signal identification number (Sidelink-SynchronizationSignal ID, SL-SSID).

[0108] Specifically, before step 11, the information sending method according to the embodiment of the present invention may further include: initializing a scrambling sequence through the SL-SSID; wherein different SL-SSIDs correspond to different scrambling sequences.

[0109] Specifically, the scrambling sequence is initialized by SL-SSID as follows: C is calculated according to SL-SSID init , according to C init Perform the initialization scrambling sequence.

[0110] In some embodiments, the process of scrambling the PSBCH by the scrambling sequence includes at least one of the following:

[0111] Scrambling the PSBCH by a first scrambling sequence;

[0112] The PSBCH is scrambled by the second scrambling sequence.

[0113] The first scrambling sequence is related to the first information, and the second scrambling sequence is related to the second information. The contents of the first information and the second information may be the same or different. Optionally, at least some of the bits related to the selection of the first scrambling sequence in the target information (such as the timing information carried by the PSBCH) are the first information, and at least some of the bits related to the selection of the second scrambling sequence in the target information are the second information. That is to say, at least some of the bits corresponding to the first scrambling sequence and the second scrambling sequence may be the same or different.

[0114] That is, the PSBCH is scrambled by a scrambling sequence, including:

[0115] Scramble the PSBCH by a first scrambling sequence; or scramble the PSBCH by a second scrambling sequence; or scramble the PSBCH by a first scrambling sequence and then scramble the PSBCH by a second scrambling sequence;

[0116] The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

[0117] Specifically, the process of scrambling the PSBCH by using the scrambling sequence may include:

[0118] Selecting a first scrambling sequence from at least one candidate sequence according to a value of the first information, and scrambling the PSBCH according to the first scrambling sequence;

[0119] Alternatively, selecting a second scrambling sequence from at least one candidate sequence according to a value of the second information, and scrambling the PSBCH according to the second scrambling sequence;

[0120] Alternatively, according to the value of the first information, a first scrambling sequence is selected from at least one candidate sequence, and the PSBCH is scrambled according to the first scrambling sequence; then, according to the value of the second information, a second scrambling sequence is selected from at least one candidate sequence, and the PSBCH is scrambled according to the second scrambling sequence.

[0121] In an optional embodiment of the present invention, the step of scrambling the PSBCH according to the first scrambling sequence includes:

[0122] The PSBCH payload bit sequence is scrambled by the first scrambling sequence, wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH (such as the PSBCH of the broadcast message) is interleaved. That is, the first scrambling occurs after the interleaving of the PSBCH payload bit sequence.

[0123] In an optional embodiment of the present invention, the step of scrambling the PSBCH according to the second scrambling sequence includes: scrambling the PSBCH sequence by the second scrambling sequence; wherein the PSBCH sequence is generated after the load in the PSBCH (such as the PSBCH of the broadcast message) is interleaved and rate matched. That is, the second scrambling occurs after the PSBCH sequence rate matching.

[0124] In the embodiment of the present invention, the first information and / or the second information can be carried by the DMRS of the PSBCH, that is, the terminal can obtain the first information and / or the second information by detecting the DMRS of the PSBCH. Specifically, the terminal obtains the first information and / or the second information by blindly detecting the DMRS sequence of the PSBCH. For example, the terminal can obtain the second signal by detecting the DMRS of the PSBCH.

[0125] As an optional embodiment, scrambling the PSBCH by using a first scrambling sequence includes: selecting a sequence from a first candidate sequence set as the first scrambling sequence according to the first information, and then scrambling the PSBCH by using the first scrambling sequence.

[0126] Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

[0127] Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

[0128] As an optional embodiment, scrambling the PSBCH by using a second scrambling sequence includes:

[0129] According to the second information, a sequence is selected from the second candidate sequence set as a second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

[0130] Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

[0131] Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

[0132] It is worth noting that the first candidate sequence set may be the same as or different from the second candidate sequence set, and the embodiment of the present invention does not specifically limit this. Similarly, the first sequence and the second sequence may be the same as or different, and the first sequence and / or the second sequence may be a pseudo-random sequence. In addition, N, M, N1, M1, N2, and M2 mentioned in the embodiment of the present invention are all positive integers.

[0133] In order to further improve the flexibility, in the above embodiment of the present invention, step 11 may include: determining the scrambling method for PSBCH according to the system configuration, and different system configurations may select different scrambling methods.

[0134] For example, according to the system configuration, it is determined that the PSBCH is scrambled at least once. When it is determined that the PSBCH is scrambled multiple times, the scrambling method used in each scrambling process can be the same or different. In this way, the scrambling method of the PSBCH can be flexibly determined according to the system configuration, which improves the flexibility of the PSBCH scrambling process configuration and is suitable for different scenarios, thereby improving the success rate of PSBCH decoding.

[0135] Optionally, according to the system configuration, the step of determining to perform at least one scrambling on the PSBCH comprises one of the following:

[0136] In the first system configuration, the PSBCH is scrambled according to the first scrambling sequence. Optionally, in the first system configuration, the first scrambling sequence is selected from at least one candidate sequence according to the value of the first information, and the PSBCH is scrambled according to the first scrambling sequence.

[0137] In the second system configuration, the PSBCH is scrambled according to the first scrambling sequence and the PSBCH is scrambled according to the second scrambling sequence. Optionally, in the second system configuration, according to the value of the first information, a first scrambling sequence is selected from at least one candidate sequence, the PSBCH is scrambled according to the first scrambling sequence, and then according to the value of the second information, a second scrambling sequence is selected from at least one candidate sequence, and the PSBCH is scrambled according to the second scrambling sequence.

[0138] In the third system configuration, the PSBCH is scrambled according to the second scrambling sequence. Optionally, in the third system configuration, the second scrambling sequence is selected from at least one candidate sequence according to the value of the second information, and the PSBCH is scrambled according to the second scrambling sequence.

[0139] Taking the system configuration including the working frequency band of PSBCH as an example, the terminal can determine the scrambling of PSBCH according to the working frequency band of PSBCH. For example, when the working frequency band of PSBCH is frequency band 1 (Frequency Range 1, FR1), only beam repetition is required, and beam scanning is not required. In the case of beam repetition, all transmitted S-SSBs can be merged and then PSBCH decoded. In order to facilitate the merging, the PSBCH is scrambled according to the first scrambling sequence. For another example, when the working frequency band of PSBCH is frequency band 1 (Frequency Range 2, FR2), beam scanning is required, and the PSBCH needs to be scrambled according to the first scrambling sequence, and then the PSBCH needs to be scrambled according to the second scrambling sequence.

[0140] In order to improve flexibility, different system configurations have different lengths of scrambling sequences used for scrambling. Taking the system configuration including the working frequency band of PSBCH as an example, when the working frequency band of PSBCH is FR1, the length of the scrambling sequence for scrambling PSBCH is M1, and when the working frequency band of PSBCH is FR2, the length of the scrambling sequence for scrambling PSBCH is M2.

[0141] The first information and / or the second information in the above scrambling process will be further introduced below, such as the first information related to the first scrambling process and the second information related to the second scrambling process. The first information and / or the second information includes at least one of the following: at least some bits of a direct radio frame number (DFN); at least some bits of a direct link synchronization broadcast channel block S-SSB index number; at least some bits of a time slot number.

[0142] At least part of the embodiments of the present invention refers to part or all. For example, at least part of the bits of DFN are the 2nd and 3rd least significant bits of DFN. At least part of the bits of the S-SSB index number are the 2 or 3 least significant bits of the S-SSB index number. At least part of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number. The time slot number mentioned here can be the time slot number in the system radio frame (Systerm Frame, SF) or the direct radio frame (Direct Frame, DF).

[0143] In some embodiments of the present invention, in the process of scrambling the PSBCH according to the first scrambling sequence, specific bits are not scrambled, such as at least some bits of the DFN in the first information, at least some bits of the S-SSB index number, and at least some bits of the time slot number. Specifically, the first information and / or the bits indicating the S-SSB index number are not scrambled in the first scrambling process. Optionally, in the process of scrambling the PSBCH according to the first scrambling sequence, the bits indicating the 2nd and 3rd least significant bits of the DFN and / or the bits indicating the S-SSB index number in the first information are not scrambled in the first scrambling process.

[0144] The above introduces different scrambling modes in the PSBCH scrambling method according to the embodiment of the present invention, which will be described in detail below with reference to specific examples.

[0145] Example 1:

[0146] The PSBCH is scrambled by a first scrambling sequence, and the scrambled PSBCH is sent. Specifically, the first scrambling sequence is selected from the candidate sequence according to the value of at least part of the bits in the first information; the PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein the PSBCH payload bit sequence is generated by interleaving the PBSCH payload of the broadcast message in the PBSCH.

[0147] like Figure 2 As shown, the terminal generates a broadcast message, generates a PSBCH payload, and obtains a PSBCH payload bit sequence after interleaving, and then scrambles the PSBCH payload bit sequence through a first scrambling sequence. After scrambling, a cyclic redundancy check (CRC) is added and Polar coding is performed, and then rate matching is performed, and QPSK modulation and resource mapping are performed on the PSBCH sequence after rate matching, thereby sending the S-SSB containing the PSBCH.

[0148] The first information in this example includes at least one of the following:

[0149] At least some bits of the DFN, such as the second and third least significant bits of the DFN.

[0150] At least some bits of the S-SSB index number, such as some bits or all bits of the S-SSB index number;

[0151] At least some bits of the time slot number, such as some bits or all bits of the time slot number.

[0152] The candidate sequence is related to the first information. The first scrambling process will be described below by taking different first information as examples.

[0153] Method 1: when the first information refers to the 2nd and 3rd bits of the least significant bit of DFN, according to the values ​​of these two bits, one is selected from four candidate sequences (or candidate subsequences) as the first scrambling sequence, and the PSBCH payload bit sequence is scrambled using the first scrambling sequence.

[0154] Assume that DFN is 10 bits, for example, 1101011101. Then starting from the rightmost side, the first bit on the rightmost side is the least significant bit, the second bit on the rightmost side is the least significant bit, and so on, as shown in Table 1.

[0155] Table 1: Schematic diagram of the least significant bits of direct frame number DFN

[0156]

[0157] When the first information refers to the second and third bits of the least significant bit of the DFN, according to the values ​​(1,0) of the second and third bits of the least significant bit of the DFN, a subsequence is selected from four candidate subsequences as a first scrambling sequence, and the PSBCH payload bit sequence is scrambled using the first scrambling sequence, which means:

[0158] The PSBCH payload bit sequence a0,a1,a2,a3,...,a A-1 Scrambled into the bit sequence a'0,a'1,a'2,a'3,...,a' A-1 , where a' i =(a i +s i )mod2 and i=0,1,...,A-1. A is the total number of bits in the PSBCH payload.

[0159] s0,s1,s2,s3,...,s A-1 Produced according to the following process:

[0160] i=0;

[0161] j = 0;

[0162] while i

[0163] if a i The bits representing the S-SSB index number; or the 2nd and 3rd bits representing the least significant bit of the DFN

[0164] s i =0;

[0165] else

[0166] s i =c(j+vM);​

[0167] j=j+1;

[0168] end if

[0169] i=i+1;

[0170] end while

[0171] where c(i) is a pseudo-random sequence and is expressed in C init = SL-SSID for initialization. M is the number of PSBCH payload bits involved in scrambling. In this embodiment, c(i) is the candidate sequence, and s i is the first scrambling sequence, s i It is a subsequence of c(i), or a part or a segment of the c(i) sequence. v is determined according to Table 2 using the second and third least significant bits of the DFN of the transmitted PSBCH.

[0172] Table 2: Method for determining v value

[0173] (3rd least significant bit of DFN, 2nd least significant bit of DFN) Value of v (0,0) 0 (0,1) 1 (1,0) 2 (1,1) 3

[0174] Method 2: When the first information is the S-SSB index number, the PSBCH payload bit sequence a0, a1, a2, a3, ..., a A-1 Scrambled into the bit sequence a'0,a'1,a'2,a'3,...,a' A-1 , where a' i =(a i +s i )mod2 and i=0,1,...,A-1. A is the total number of bits in the PSBCH payload.

[0175] s0,s1,s2,s3,...,s A-1 Produced according to the following process:

[0176] i=0;

[0177] j = 0;

[0178] while i

[0179] if a i The bits representing the S-SSB index number; or the 2nd and 3rd bits representing the least significant bit of the DFN

[0180] s i =0;

[0181] else

[0182] s i =c(j+vM);​

[0183] j=j+1;

[0184] end if

[0185] i=i+1;

[0186] end while

[0187] where c(i) is a pseudo-random sequence and is expressed in C init = SL-SSID for initialization. M is the number of PSBCH payload bits involved in scrambling. In this embodiment, c(i) is the candidate sequence, and s i is the first scrambling sequence, s i It is a subsequence of c(i), or a part or a segment of the c(i) sequence, v = S-SSB index number.

[0188] Method 3: When the first information is a time slot number, the time slot number refers to the time slot number in the system radio frame, or the time slot number in the direct frame. A-1 Scrambled into the bit sequence a'0,a'1,a'2,a'3,...,a' A-1 , where a' i =(a i +s i )mod2 and i=0,1,...,A-1. A is the total number of bits in the PSBCH payload.

[0189] s0,s1,s2,s3,...,s A-1 Produced according to the following process:

[0190] i=0;

[0191] j = 0;

[0192] while i

[0193] if a i The bits representing the S-SSB index number; or the 2nd and 3rd bits representing the least significant bit of the DFN

[0194] s i =0;

[0195] else

[0196] s i =c(j+vM);

[0197] j=j+1;

[0198] end if ​

[0199] i=i+1;

[0200] end while

[0201] where c(i) is a pseudo-random sequence and is expressed in C init = SL-SSID for initialization. M is the number of PSBCH payload bits involved in scrambling. In this embodiment, c(i) is the candidate sequence, and s i is the first scrambling sequence, s i It is a subsequence of c(i), or a part or a segment of the c(i) sequence, v = time slot number.

[0202] In this example, different system configurations have different lengths of the first scrambling sequence used for scrambling. Taking the system configuration including the working frequency band of PSBCH as an example, when the working frequency band of PSBCH belongs to FR1, the length of the first scrambling sequence used is M1, and when the working frequency band of PSBCH belongs to FR2, the length of the first scrambling sequence used is M2, and M1 is not equal to M2.

[0203] Example 2:

[0204] The PSBCH is scrambled by a first scrambling sequence, and then by a second scrambling sequence; the scrambled PSBCH is sent. Specifically, according to the value of the first information, a first scrambling sequence is selected from a candidate sequence; the PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein the PSBCH payload bit sequence is generated by interleaving the PBSCH payload of the broadcast message in the PBSCH. Then, according to the value of the second information, a second scrambling sequence is selected from a candidate sequence; the PSBCH sequence is scrambled by the second scrambling sequence, wherein the PSBCH sequence is generated by interleaving and rate matching the PSBCH payload of the broadcast message in the PSBCH.

[0205] like Figure 3 As shown, the terminal generates a broadcast message, generates a PSBCH payload, and obtains a PSBCH payload bit sequence after interleaving, and then scrambles the PSBCH payload bit sequence through a first scrambling sequence. After scrambling, CRC is added and Polar coding is performed, and then rate matching is performed, and the PSBCH sequence after rate matching is scrambled by a second scrambling sequence, and then the scrambled PSBCH sequence is QPSK modulated and resource mapped, thereby sending the S-SSB containing the PSBCH.

[0206] The first information in this example is similar to the first information in Example 1, and the first scrambling process is similar to the scrambling process in Example 1, so it will not be repeated. This example will specifically introduce the second information and the second scrambling process.

[0207] The second information in this example includes at least one of the following:

[0208] at least some bits of the DFN;

[0209] At least some bits of the S-SSB index number, such as the two least significant bits or the three least significant bits of the S-SSB index number;

[0210] At least some bits of the time slot number, such as the two least significant bits or the three least significant bits of the time slot number.

[0211] The candidate sequence is related to the second information. The second scrambling process will be described below by taking different second information as examples.

[0212] Method 1: When the second information refers to the two least significant bits of the S-SSB index number, according to the value of the two bits, one is selected from four candidate sequences (or candidate subsequences) as the second scrambling sequence, and the second scrambling sequence is used to scramble the PSBCH sequence. When the second information refers to the three least significant bits of the S-SSB index number, according to the value of the three bits, one is selected from eight candidate sequences (or candidate subsequences) as the second scrambling sequence, and the second scrambling sequence is used to scramble the PSBCH sequence.

[0213] Assuming that the S-SSB index number is 6 bits, for example, 111001, then starting from the rightmost side, the first bit on the rightmost side is the first least significant bit, the second bit on the rightmost side is the second least significant bit, and so on, as shown in Table 3.

[0214] Table 3: Schematic diagram of the least significant bit of the S-SSB index number

[0215]

[0216] When the second information refers to the 2 or 3 least significant bits of the S-SSB index number, selecting a subsequence from 4 or 8 candidate subsequences as the second scrambling sequence according to the value of the 2 or 3 least significant bits of the S-SSB index number (0, 1) or (0, 0, 1), and using the second scrambling sequence to scramble the PSBCH sequence means:

[0217] For the PSBCH sequence b(0),…,b(M bit -1), where M bit is the PSBCH sequence length, which is scrambled using the following formula. The scrambled sequence is

[0218]

[0219] where c(i) is a pseudo-random sequence and is obtained by c init = SL-SSID is initialized.

[0220] Method 2: When the first information is the time slot number, the time slot number refers to the time slot number in the system wireless frame, or the time slot number in the direct frame. When the second information refers to the two least significant bits of the time slot number, according to the value of these two bits, one is selected from four candidate sequences (or candidate subsequences) as the second scrambling sequence, and the second scrambling sequence is used to scramble the PSBCH sequence. When the second information refers to the three least significant bits of the time slot number, according to the value of these three bits, one is selected from eight candidate sequences (or candidate subsequences) as the second scrambling sequence, and the second scrambling sequence is used to scramble the PSBCH sequence.

[0221] Assuming that the time slot number is 6 bits, for example, 111001, then starting from the rightmost side, the first bit on the rightmost side is the least significant bit 1, the second bit on the rightmost side is the least significant bit 2, and so on, as shown in Table 4.

[0222] Table 4: Least significant digits of time slot numbers

[0223]

[0224] When the second information refers to the 2 or 3 least significant bits of the time slot number, selecting a subsequence from 4 or 8 candidate subsequences as the second scrambling sequence according to the value of the 2 or 3 least significant bits of the time slot number (0, 1) or (0, 0, 1), and using the second scrambling sequence to scramble the PSBCH sequence means:

[0225] For the PSBCH sequence b(0),…,b(M bit -1), where M bit is the PSBCH sequence length, which is scrambled using the following formula. The scrambled sequence is

[0226]

[0227] where c(i) is a pseudo-random sequence and is obtained by c init = SL-SSID is initialized.

[0228] In this example, the number of bits included in the second information is different for different system configurations. Taking the system configuration including the working frequency band of PSBCH as an example, when the working frequency band of PSBCH belongs to FR1, v is the two least significant bits of the S-SSB index number, or v is the two least significant bits of the time slot number; when the working frequency band of PSBCH belongs to FR2, v is the three least significant bits of the S-SSB index number, or v is the three least significant bits of the time slot number.

[0229] Example 3:

[0230] The PSBCH is scrambled by a second scrambling sequence, and the scrambled PSBCH is sent. Specifically, according to the value of the second information, a second scrambling sequence is selected from the candidate sequence; the PSBCH sequence is scrambled by the second scrambling sequence, wherein the PSBCH sequence is generated after the PSBCH payload of the broadcast message in the PSBCH is interleaved and rate matched.

[0231] like Figure 4 As shown, the terminal generates a broadcast message, generates a PSBCH payload, and obtains a PSBCH payload bit sequence after interleaving, then adds CRC and performs Polar encoding, and then performs rate matching. The PSBCH sequence after rate matching is scrambled by a second scrambling sequence, and then the scrambled PSBCH sequence is QPSK modulated and resource mapped, thereby sending an S-SSB containing PSBCH.

[0232] The second information in this example is similar to the second information in Example 2, and the second scrambling process is similar to the scrambling process in Example 2, so it will not be repeated.

[0233] Example 4:

[0234] In order to improve flexibility, the scrambling method for PSBCH is determined according to the system configuration, and different system configurations can select different scrambling methods. For example, according to the system configuration, it is determined that the PSBCH is scrambled at least once. When it is determined that the PSBCH is scrambled multiple times, the scrambling method used in each scrambling process can be the same or different. In this way, the scrambling method of PSBCH can be flexibly determined according to the system configuration, which improves the flexibility of the PSBCH scrambling process configuration and is suitable for different scenarios, thereby improving the success rate of PSBCH decoding.

[0235] like Figure 3 As shown, the first scrambling process occurs after the interleaving of the PSBCH payload bit sequence, and the second scrambling process occurs after the PSBCH sequence rate matching. Depending on the system configuration, the PSBCH may only undergo the first scrambling process, or only undergo the second scrambling process, or need to undergo both the first scrambling process and the second scrambling process before being sent.

[0236] One implementation scheme is to control whether to perform the first or second scrambling process according to whether the working frequency band of the PSBCH belongs to FR1 or FR2. When the working frequency band of the PSBCH belongs to FR1, the first scrambling process is performed on the PSBCH; when the working frequency band of the PSBCH belongs to FR2, the first scrambling process and the second scrambling process are performed on the PSBCH.

[0237] The PSBCH scrambling method of the embodiment of the present invention is introduced above. In the process of scrambling the PSBCH, the specific bits in the timing information carried in the PSBCH may not be scrambled, such as: at least part of the bits in the timing information, bits representing the S-SSB index number, etc. Specifically, when the PSBCH payload bit sequence is scrambled using the first scrambling sequence, at least part of the bits in the timing information, bits representing the S-SSB index number, etc. may not be scrambled.

[0238] In the first embodiment, the terminal scrambles the physical direct link broadcast channel PSBCH through a scrambling sequence and sends the scrambled PSBCH. The scrambling sequence used for scrambling is related to the timing information carried by the PSBCH, which can reduce the mutual interference between the PSBCH channels between different synchronization clusters in the direct link, improve the decoding success rate of the PSBCH, and thus reduce the synchronization delay of the terminal.

[0239] Second embodiment

[0240] like Figure 5 As shown, an embodiment of the present invention also provides a terminal 50, including: a transceiver 51, a processor 52, and a memory 53, wherein the memory 53 stores a program executable by the processor 52; when the processor executes the program, the transceiver 51 is controlled to implement: sending a direct link synchronization signal block S-SSB, the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined based on at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct wireless frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number.

[0241] Optionally, at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS.

[0242] Optionally, the processor 52 is further configured to initialize the scrambling sequence according to the direct link synchronization signal identification number SL-SSID.

[0243] Optionally, the processor 52 is further configured to: scramble the PSBCH using a first scrambling sequence;

[0244] Alternatively, the PSBCH is scrambled by a second scrambling sequence;

[0245] Alternatively, the PSBCH is scrambled by a first scrambling sequence, and then the PSBCH is scrambled by a second scrambling sequence;

[0246] The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

[0247] Optionally, the processor 52 is used to: scramble the PSBCH payload bit sequence by using a first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

[0248] Optionally, the processor 52 is used to: scramble the PSBCH sequence by using a second scrambling sequence; wherein the PSBCH sequence is generated after the payload in the PSBCH is interleaved and rate matched.

[0249] Optionally, the processor 52 is specifically configured to: select, according to the first information, a sequence from a first candidate sequence set as a first scrambling sequence, and scramble the PSBCH by using the first scrambling sequence.

[0250] Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

[0251] Optionally, the processor is specifically configured to:

[0252] According to the second information, a sequence is selected from the second candidate sequence set as a second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

[0253] Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

[0254] Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

[0255] Optionally, at least some of the bits of DFN are the second and third least significant bits of DFN.

[0256] Optionally, at least some of the bits of the S-SSB index number are the 2 or 3 least significant bits of the S-SSB index number.

[0257] Optionally, at least part of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

[0258] Optionally, the time slot number is a time slot number within a system radio frame or a direct radio frame.

[0259] Optionally, in the process of scrambling the PSBCH, at least one item of information including at least part of the bits of the DFN in the first information, at least part of the bits of the S-SSB index number, and at least part of the bits of the time slot number are not scrambled.

[0260] It should be noted that the terminal in this embodiment is the same as the above Figure 1 The terminal corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the terminal, and can also achieve the same technical effect. In the terminal, the transceiver 51 and the memory 53, as well as the transceiver 51 and the processor 52 can be connected through the bus interface communication, the function of the processor 52 can also be implemented by the transceiver 51, and the function of the transceiver 51 can also be implemented by the processor 52. It should be noted that the above terminal provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as the method embodiment in this embodiment will not be specifically repeated here.

[0261] Third embodiment

[0262] like Figure 6 As shown, an embodiment of the present invention further provides an information sending device, which is applied to a terminal, and the device includes the following functional modules:

[0263] The sending module 61 is used to send a direct link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined based on at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct wireless frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number.

[0264] Optionally, at least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS.

[0265] Optionally, the device further includes: an initialization module, configured to initialize the scrambling sequence according to a direct link synchronization signal identification number SL-SSID.

[0266] Optionally, the device further includes: a scrambling module 62, the scrambling module 62 including:

[0267] A first scrambling submodule, configured to scramble the PSBCH using a first scrambling sequence;

[0268] Alternatively, a second scrambling submodule is used to scramble the PSBCH using a second scrambling sequence;

[0269] Alternatively, a third scrambling submodule is used to scramble the PSBCH using a first scrambling sequence, and then scramble the PSBCH using a second scrambling sequence;

[0270] The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

[0271] Optionally, the first scrambling submodule is specifically used to: scramble the PSBCH payload bit sequence by using a first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

[0272] Optionally, the second scrambling submodule is used to scramble the PSBCH sequence by using a second scrambling sequence; wherein the PSBCH sequence is generated after the payload in the PSBCH is interleaved and rate matched.

[0273] Optionally, the scrambling module 62 is specifically configured to: select a sequence from the first candidate sequences as a first scrambling sequence according to the first information, and scramble the PSBCH by using the first scrambling sequence.

[0274] Optionally, the number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

[0275] Optionally, each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

[0276] Optionally, the scrambling module 62 is specifically used for:

[0277] According to the second information, a sequence is selected from the second candidate sequence set as a second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

[0278] Optionally, the number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

[0279] Optionally, each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

[0280] Optionally, at least some of the bits of DFN are the second and third least significant bits of DFN.

[0281] Optionally, at least some of the bits of the S-SSB index number are the 2 or 3 least significant bits of the S-SSB index number.

[0282] Optionally, at least part of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

[0283] Optionally, the time slot number is a time slot number within a system radio frame or a direct radio frame.

[0284] Optionally, in the process of scrambling the PSBCH according to the first scrambling sequence, at least one item of information including at least part of the bits of the DFN, at least part of the bits of the S-SSB index number, and at least part of the bits of the time slot number in the first information is not scrambled.

[0285] It should be noted that the device in this embodiment is the same as the above Figure 1 The device corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the device, and can also achieve the same technical effect. The device may also include a processing module, etc., for processing the information sent by the sending module. It should be noted that the above device provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as those in the method embodiment in this embodiment will not be specifically repeated here.

[0286] Fourth embodiment

[0287] like Figure 7 As shown, an embodiment of the present invention further provides an information receiving method, which is applied to a terminal. The method may include the following steps:

[0288] Step 71: Receive a direct link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence. The scrambling sequence is determined by at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct radio frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number. The first information and the second information may be at least part of the bits of the target information carried by the S-SSB (such as the timing information carried by the PSBCH). Specifically, the scrambling sequence can be determined based on the timing information carried in the PSBCH. It is worth noting that the PSBCH may also include: time domain configuration information (such as subframe configuration information), frequency domain configuration information (such as bandwidth information, subcarrier spacing information, etc.), coverage indication information (such as synchronization cluster information), and other contents. In NR V2X, PSBCH is included in S-SSB, that is, S-SSB includes PSBCH. Step 12 can also be understood as sending S-SSB, which includes scrambled PSBCH.

[0289] Further, the method also includes: descrambling the PSBCH in the S-SSB by a scrambling sequence (or descrambling). Among them, the descrambling process is the inverse process of the scrambling process in the above-mentioned first embodiment. When the transmitting terminal adopts the first scrambling process to scramble the PSBCH, the terminal on the receiving side adopts the first descrambling process to descramble the PSBCH in the S-SSB. When the transmitting terminal adopts the second scrambling process to scramble the PSBCH, the terminal on the receiving side adopts the second descrambling process to descramble the PSBCH in the S-SSB. When the transmitting terminal adopts the first scrambling process and the second scrambling process to scramble the PSBCH, the terminal on the receiving side adopts the first descrambling process and the second descrambling process to descramble the PSBCH in the S-SSB. It is worth noting that the first information and the second information involved in the embodiment of the receiving terminal are similar to the first information and the second information mentioned in the first embodiment, and the selection method of the first information and the second information in the first embodiment and the selection method of the scrambling sequence are applicable to this embodiment, so they are not repeated here.

[0290] The transmitting terminal sends the PSBCH scrambled by the scrambling sequence, and the receiving side uses the corresponding scrambling sequence to descramble the PSBCH. This can reduce the mutual interference between PSBCH channels between different synchronization clusters in the direct link, improve the decoding success rate of PSBCH, and thus reduce the synchronization delay of the terminal.

[0291] Fifth embodiment

[0292] like Figure 8As shown, an embodiment of the present invention also provides a terminal 80, including: a transceiver 81, a processor 82, and a memory 83, wherein the memory 83 stores a program executable by the processor 82; when the processor executes the program, the transceiver 81 is controlled to implement: receiving a direct link synchronization signal block S-SSB, wherein the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined based on at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct wireless frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number.

[0293] Optionally, the processor 82 is further used to: descramble the PSBCH in the S-SSB using a scrambling sequence.

[0294] It should be noted that the terminal in this embodiment is the same as the above Figure 7 The terminal corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the terminal, and can also achieve the same technical effect. In the terminal, the transceiver 81 and the memory 83, as well as the transceiver 81 and the processor 82 can be connected through the bus interface communication, the function of the processor 82 can also be implemented by the transceiver 81, and the function of the transceiver 81 can also be implemented by the processor 82. It should be noted that the above terminal provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as the method embodiment in this embodiment will not be specifically repeated here.

[0295] Sixth embodiment

[0296] like Fig. 9 As shown, an embodiment of the present invention further provides an information receiving device, which is applied to a terminal, and the device includes the following functional modules:

[0297] The receiving module 91 is used to receive a direct link synchronization signal block S-SSB, where the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined based on at least one of the first information and the second information, and at least one of the first information and the second information includes at least one of the following: at least part of the bits of the direct wireless frame number DFN; at least part of the bits of the direct link synchronization broadcast channel block S-SSB index number; at least part of the bits of the time slot number.

[0298] The device also includes: a descrambling module, which is used to descramble the PSBCH in the S-SSB through a scrambling sequence.

[0299] It should be noted that the device in this embodiment is the same as the above Figure 7 The device corresponding to the method shown, the implementation methods in the above embodiments are all applicable to the embodiments of the device, and can also achieve the same technical effect. The device may also include a processing module, etc., for processing the information sent by the sending module. It should be noted that the above device provided by the embodiment of the present invention can implement all the method steps implemented by the above method embodiment, and can achieve the same technical effect, and the parts and beneficial effects that are the same as those in the method embodiment in this embodiment will not be specifically repeated here.

[0300] An embodiment of the present invention further provides a processor-readable storage medium, wherein the processor-readable storage medium stores processor-executable instructions, wherein the processor-executable instructions are used to cause the processor to execute the above Figure 1 or Figure 7 All implementations of the method in the above method embodiment are applicable to this embodiment and can achieve the same technical effect.

[0301] Those skilled in the art will appreciate that the units and algorithm steps of each example described in conjunction with the embodiments disclosed herein can be implemented in electronic hardware, or a combination of computer software and electronic hardware. Whether these functions are performed in hardware or software depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to be beyond the scope of the present invention.

[0302] Those skilled in the art can clearly understand that, for the convenience and brevity of description, the specific working processes of the systems, devices and units described above can refer to the corresponding processes in the aforementioned method embodiments and will not be repeated here.

[0303] In the embodiments provided by the present invention, it should be understood that the disclosed devices and methods can be implemented in other ways. For example, the device embodiments described above are only schematic. For example, the division of the units is only a logical function division. There may be other division methods in actual implementation, such as multiple units or components can be combined or integrated into another system, or some features can be ignored or not executed. Another point is that the mutual coupling or direct coupling or communication connection shown or discussed can be through some interfaces, indirect coupling or communication connection of devices or units, which can be electrical, mechanical or other forms.

[0304] The units described as separate components may or may not be physically separated, and the components shown as units may or may not be physical units, that is, they may be located in one place or distributed on multiple network units. Some or all of the units may be selected according to actual needs to achieve the purpose of the solution of this embodiment.

[0305] In addition, each functional unit in each embodiment of the present invention may be integrated into one processing unit, or each unit may exist physically separately, or two or more units may be integrated into one unit.

[0306] If the functions are implemented in the form of software functional units and sold or used as independent products, they can be stored in a computer-readable storage medium. Based on this understanding, the technical solution of the present invention, or the part that contributes to the prior art, or the part of the technical solution, can be embodied in the form of a software product. The computer software product is stored in a storage medium, including several instructions for a computer device (which can be a personal computer, server, or network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as USB flash drives, mobile hard disks, ROM, RAM, magnetic disks, or optical disks.

[0307] In addition, it should be noted that in the apparatus and method of the present invention, it is obvious that each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present invention. Moreover, the steps of performing the above-mentioned series of processing can naturally be performed in chronological order according to the order of description, but it is not necessary to perform them in chronological order, and some steps can be performed in parallel or independently of each other. For those of ordinary skill in the art, it is understood that all or any steps or components of the method and apparatus of the present invention can be implemented in any computing device (including processors, storage media, etc.) or a network of computing devices in hardware, firmware, software or a combination thereof, which can be achieved by those of ordinary skill in the art using their basic programming skills after reading the description of the present invention.

[0308] Therefore, the purpose of the present invention can also be achieved by running a program or a group of programs on any computing device. The computing device can be a well-known general device. Therefore, the purpose of the present invention can also be achieved by simply providing a program product containing a program code that implements the method or device. That is to say, such a program product also constitutes the present invention, and the storage medium storing such a program product also constitutes the present invention. Obviously, the storage medium can be any well-known storage medium or any storage medium developed in the future. It should also be pointed out that in the device and method of the present invention, it is obvious that each component or each step can be decomposed and / or recombined. These decompositions and / or recombinations should be regarded as equivalent schemes of the present invention. In addition, the steps of performing the above-mentioned series of processing can naturally be performed in chronological order according to the order of description, but it is not necessary to perform them in chronological order. Some steps can be performed in parallel or independently of each other.

[0309] The above is a preferred embodiment of the present invention. It should be pointed out that for ordinary personnel in this technical field, several improvements and modifications can be made without departing from the principles described in the present invention. These improvements and modifications are also within the scope of protection of the present invention.

Claims

1. A method for sending information, characterized in that: Applied to a terminal, the method comprises: Sending a direct link synchronization signal block S-SSB, wherein the S-SSB includes a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, wherein the at least one of the first information and the second information includes: at least part of the bits of the time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

2. The information sending method according to claim 1, characterized in that: Also includes: The scrambling sequence is initialized according to the direct link synchronization signal identification number SL-SSID.

3. The information sending method according to claim 1, characterized in that: The PSBCH is scrambled by a scrambling sequence, including: Scrambling the PSBCH by a first scrambling sequence; or, Scrambling the PSBCH by a second scrambling sequence; or, Scramble the PSBCH using the first scrambling sequence, and then scramble the PSBCH using the second scrambling sequence; The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

4. The information sending method according to claim 3, characterized in that: Scrambling the PSBCH by using the first scrambling sequence includes: The PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

5. The information sending method according to claim 3, characterized in that: Scrambling the PSBCH by using the second scrambling sequence includes: The PSBCH sequence is scrambled by the second scrambling sequence; wherein the PSBCH sequence is generated after the load in the PSBCH is interleaved and rate matched.

6. The information sending method according to claim 3, characterized in that: Scrambling the PSBCH by a first scrambling sequence, comprising: According to the first information, a sequence is selected from a first candidate sequence set as the first scrambling sequence, and the PSBCH is scrambled by using the first scrambling sequence.

7. The information sending method according to claim 6, characterized in that: The number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

8. The information sending method according to claim 6, characterized in that: Each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

9. The information sending method according to claim 3, characterized in that: Scrambling the PSBCH by a second scrambling sequence, comprising: According to the second information, a sequence is selected from a second candidate sequence set as the second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

10. The information sending method according to claim 9, characterized in that: The number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

11. The information sending method according to claim 9, characterized in that: Each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

12. The information sending method according to claim 1, characterized in that: The time slot number is a time slot number in a system radio frame or a direct radio frame.

13. A method for receiving information, characterized in that: Applied to a terminal, the method comprises: Receiving a direct link synchronization signal block S-SSB, the S-SSB comprising a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of first information and second information, the at least one of the first information and the second information comprising: at least part of bits of a time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

14. The information receiving method according to claim 13, characterized in that: Also includes: The PSBCH in the S-SSB is descrambled using the scrambling sequence.

15. A terminal, characterized in that: include: A transceiver, a processor, and a memory, wherein the memory stores a program executable by the processor; When the processor executes the program, the processor controls the transceiver to implement: sending a direct link synchronization signal block S-SSB, wherein the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, and the at least one of the first information and the second information includes: at least part of the bits of the time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

16. The terminal according to claim 15, characterized in that: The processor is used to initialize the scrambling sequence according to the direct link synchronization signal identification number SL-SSID.

17. The terminal according to claim 15, characterized in that: The processor is specifically used for: Scrambling the PSBCH by a first scrambling sequence; or, Scrambling the PSBCH by a second scrambling sequence; or, Scramble the PSBCH using the first scrambling sequence, and then scramble the PSBCH using the second scrambling sequence; The first scrambling sequence is determined according to the first information, and the second scrambling sequence is determined according to the second information.

18. The terminal according to claim 17, characterized in that: The processor is used to: The PSBCH payload bit sequence is scrambled by the first scrambling sequence; wherein the PSBCH payload bit sequence is generated after the payload in the PSBCH is interleaved.

19. The terminal according to claim 17, characterized in that: The processor is used to: The PSBCH sequence is scrambled by the second scrambling sequence; wherein the PSBCH sequence is generated after the load in the PSBCH is interleaved and rate matched.

20. The terminal according to claim 17, characterized in that: The processor is specifically used for: According to the first information, a sequence is selected from a first candidate sequence set as the first scrambling sequence, and the PSBCH is scrambled by using the first scrambling sequence.

21. The terminal according to claim 20, characterized in that: The number N1 of candidate sequences in the first candidate sequence set is 2 M1 , M1 is the number of bits in the first information.

22. The terminal according to claim 20, characterized in that: Each sequence in the first candidate sequence set is a part of the first sequence, or a subsequence of the first sequence.

23. The terminal according to claim 17, characterized in that: The processor is specifically used for: According to the second information, a sequence is selected from a second candidate sequence set as the second scrambling sequence, and the PSBCH is scrambled by using the second scrambling sequence.

24. The terminal according to claim 23, characterized in that The number N2 of candidate sequences in the second candidate sequence set is 2 M2 , M2 is the number of bits in the second information.

25. The terminal according to claim 23, characterized in that Each sequence in the second candidate sequence set is a part of the second sequence, or a subsequence of the second sequence.

26. The terminal according to claim 15, characterized in that The time slot number is a time slot number in a system radio frame or a direct radio frame.

27. An information sending device, characterized in that: Applied to a terminal, the device comprises: A sending module, configured to send a direct link synchronization signal block S-SSB, wherein the S-SSB includes a physical direct link broadcast channel PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, wherein the at least one of the first information and the second information includes: at least part of the bits of the time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

28. A terminal, characterized in that: include: A transceiver, a processor, and a memory, wherein a program executable by the processor is stored in the memory; when the processor executes the program, the transceiver is controlled to: receive a direct link synchronization signal block S-SSB, wherein the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of first information and second information, wherein the at least one of the first information and the second information includes: at least part of the bits of the time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

29. The terminal according to claim 28, characterized in that The processor is used to: The PSBCH in the S-SSB is descrambled using the scrambling sequence.

30. An information receiving device, characterized in that: Applied to a terminal, the device comprises: A receiving module, configured to receive a direct link synchronization signal block S-SSB, wherein the S-SSB includes a PSBCH scrambled by a scrambling sequence; wherein the scrambling sequence is determined according to at least one of the first information and the second information, wherein the at least one of the first information and the second information includes: at least part of the bits of the time slot number; At least one of the first information and the second information is carried by a PSBCH payload, or at least one of the first information and the second information is carried by a PSBCH demodulation reference signal DMRS; Wherein, in the process of scrambling the PSBCH, at least some bits of the time slot number are not scrambled; At least some of the bits of the time slot number are the 2 or 3 least significant bits of the time slot number.

31. A processor-readable storage medium, characterized in that: The processor-readable storage medium stores processor-executable instructions, and the processor-executable instructions are used to enable the processor to execute the information sending method described in any one of claims 1 to 12, or execute the information receiving method described in claim 13 or 14.

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