Storage device configured to support multiple hosts and method of operating the same

Abstract

A method for operating a storage device, wherein the storage device is configured to implement physical functions corresponding to hosts respectively, the method comprising: receiving performance information from each of the hosts; setting the performance level of each of the physical functions to a first level; processing a command from a first host through the corresponding first physical function; changing the performance level of the first physical function to a second level based on the performance information and the performance of serving the first host; and based on the performance level of at least one second physical function corresponding to the second host being the first level and the performance level of the first physical function being the second level, processing a second command from a second host through the at least one second physical function before processing a subsequent first command from the first host.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims the priority of Korean Patent Application No. 10-2020-0019883 filed on February 18, 2020 in the Korean Intellectual Property Office, the disclosure of which is incorporated herein by reference in its entirety. Technical Field

[0003] Some example embodiments of the inventive concepts described herein relate to a storage device, and more particularly, to a storage device configured to support a plurality of hosts and / or an operating method of the storage device. Background Art

[0004] Semiconductor memory devices are classified into: volatile memory devices, in which data stored in the semiconductor memory device disappear when the power supply of the semiconductor memory device is disconnected, such as static random access memory (SRAM) or dynamic random access memory (DRAM); or non-volatile memory devices, in which data stored in the semiconductor memory device are retained even when the power supply of the semiconductor memory device is disconnected, such as flash memory devices, phase change RAM (PRAM), magnetic RAM (MRAM), resistive RAM (RRAM) or ferroelectric RAM (FRAM).

[0005] A flash memory-based large-capacity storage medium communicates with an external device by using a high-speed interface. Nowadays, a multi-host storage system is being developed in which a single storage medium supports multiple hosts or multiple tenants. Summary of the invention

[0006] Some example embodiments of the present inventive concept provide a storage device and / or an operation method of the storage device, wherein the storage device is capable of improving the overall performance of a storage system by ensuring at least a minimum performance of each of a plurality of hosts or limiting its maximum performance. In some example embodiments, when a plurality of hosts access a single storage medium, while ensuring that at least a minimum performance of each host is met, the performance of each of the plurality of hosts can be improved or optimized based on reducing the possibility of overuse of limited physical resources by any host and avoiding exhaustion of limited physical resources of a single storage medium.

[0007] According to some example embodiments, a method for operating a storage device, the storage device being configured to implement a plurality of physical functions respectively corresponding to a plurality of host devices, the method may include: receiving performance information from each of the plurality of host devices; setting a performance level of each of the plurality of physical functions to a first level; processing at least one command from at least a first host device among the plurality of host devices through at least a first physical function among the plurality of physical functions, the first host device corresponding to the first physical function; based on processing the at least one command from at least the first host device through at least the first physical function, changing the performance level of the first physical function to a second level according to performance information associated with the first host device and performance serving the first host device; and based on the performance level of at least one second physical function among the plurality of physical functions being the first level and the performance level of the first physical function being the second level, processing a second command from at least one second host device among the plurality of host devices through the at least one second physical function before processing a subsequent first command from the first host device through the first physical function, wherein the at least one second host device corresponds to the at least one second physical function.

[0008] According to some example embodiments, a storage device may include: a nonvolatile storage device; and a storage control circuit configured to control the nonvolatile storage device under the control of a first host device and a second host device. The storage control circuit may include: a first non-volatile memory express (NVMe) controller circuit, the first NVMe controller circuit configured to process a first command from a first submission queue of the first host device; a second NVMe controller circuit, the second NVMe controller circuit configured to process a second command from a second submission queue of the second host device; and a processing circuit. The processing circuit may be configured to: perform command scheduling on the first command and the second command based on a performance level of each of the first NVMe controller circuit and the second NVMe controller circuit, and adjust the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit based on performance information received from the first host device and the second host device and the performance of serving the first host device and the second host device respectively through the first NVMe controller circuit and the second NVMe controller circuit.

[0009] According to some example embodiments, a method for operating a storage device, wherein the storage device is configured to communicate with multiple host devices, may include: receiving performance information from the multiple host devices; performing command scheduling on one or more commands from one or more of the multiple host devices; monitoring performance of the one or more host devices respectively serving the multiple host devices, the performance being served based on performing the command scheduling; and performing subsequent command scheduling on a first command from at least one first host device among the multiple host devices and a second command from at least one second host device among the multiple host devices based on the monitored performance and the performance information, so that the first command is processed before the second command is processed. BRIEF DESCRIPTION OF THE DRAWINGS

[0010] The above and other objects and features of the present inventive concept will become readily understood by describing in detail some exemplary embodiments of the present inventive concept with reference to the accompanying drawings.

[0011] Figure 1 is a block diagram illustrating a memory system according to some example embodiments of the inventive concept.

[0012] Figure 2 It is shown Figure 1 A block diagram of a storage controller.

[0013] Figure 3A , Figure 3B and Figure 3C Is used to describe Figure 1 A diagram of the physical functionality of a storage device.

[0014] Figure 4 It is shown Figure 1 A flow chart of the operation of a storage device.

[0015] Figure 5 Is used to describe Figure 4 A diagram of a flow chart of the operation of a storage device.

[0016] Figure 6 It is shown Figure 1 A flow chart of the operation of a storage device.

[0017] Figure 7 Is used to describe Figure 6 A diagram of a flow chart of the operation of a storage device.

[0018] Figure 8 It is shown Figure 1 A flow chart of the operation of a storage device.

[0019] Fig. 9 Is used to describe Figure 8A diagram of a flow chart of the operation of a storage device.

[0020] Fig.10 It is shown Figure 1 A flow chart of the operation of a storage device.

[0021] Fig.11 It is shown Figure 1 A flow chart of the operation of a storage device.

[0022] Fig.12 Is used to describe Figure 4 Diagram of a configuration for receiving performance information.

[0023] Fig.13 and Fig.14 It is used to describe storage device processing Figure 1 A diagram of the order of commands of the host.

[0024] Fig.15 is a block diagram illustrating an SSD system to which a memory system according to the inventive concept is applied.

[0025] Fig.16 is a block diagram illustrating an electronic device to which a storage system according to the inventive concept is applied.

[0026] Fig.17 is a block diagram illustrating a data center to which a storage system according to some example embodiments of the inventive concept is applied. DETAILED DESCRIPTION

[0027] Below, some exemplary embodiments of the inventive concept may be described in detail and clearly to such an extent that a person having ordinary skill in the art can easily realize the inventive concept.

[0028] Figure 1 is a block diagram illustrating a storage system according to some example embodiments of the inventive concept. Figure 1 , the storage system 10 may include a plurality of hosts 11 to 1n (also referred to herein as host devices) and a storage device 100 communicatively coupled to the plurality of hosts. In some example embodiments, the storage system 10 may include at least one of various information processing devices (e.g., computing devices) such as a personal computer, a laptop computer, a server, a workstation, a smart phone, and / or a tablet PC.

[0029] As part of performing one or more operations, the plurality of hosts 11 to 1n may each be configured to access the storage device 100. In some example embodiments, the plurality of hosts 11 to 1n may be computing nodes (e.g., computing devices) configured to operate independently of each other. In some example embodiments, the plurality of hosts 11 to 1n may each be a single-core processor (e.g., a single-core processing circuit) or a multi-core processor (e.g., a multi-core processing circuit) included in a corresponding computing node (e.g., computing device) or computing system. In some example embodiments, at least some of the plurality of hosts 11 to 1n may be different processors included in the same computing node (e.g., computing device) or computing system. In some example embodiments, the plurality of hosts 11 to 1n may be processors configured to process different applications.

[0030] The storage device 100 may operate under the control of each of the multiple hosts 11 to 1n. For example, the storage device 100 may include a storage controller 110 (also interchangeably referred to herein as a storage control circuit) and a non-volatile storage device 120. The storage controller 110 may be configured to control the non-volatile storage device 120 under the control of any of the multiple hosts 11 to 1n (including each of the multiple hosts 11 to 1n). Under the control of each of the multiple hosts 11 to 1n, the storage controller 110 may store data in the non-volatile storage device 120, or may provide data stored in the non-volatile storage device 120 to each of the multiple hosts 11 to 1n. Such storage and / or provision may at least partially implement the performance of the multiple hosts 11 to 1n, and may be referred to as the service performance of the multiple hosts 11 to 1n. In some example embodiments, the multiple hosts 11 to 1n and the storage device 100 may communicate with each other based on a PCI-express (Peripheral Component Interconnect Express) interface or a NVMe (Non-Volatile Memory Express) interface based on PCI-express. The interface between the plurality of hosts 11 to 1n and the storage device 100 and the structural characteristics of the interface will be described below with reference to the drawings.

[0031] The storage controller 110 and / or any part thereof (e.g., the performance manager 111) may include, may be included in, and / or may be implemented by: one or more instances of a processing circuit, such as hardware including a logic circuit; a hardware / software combination, such as a processor that executes software; or a combination thereof. For example, the processing circuit may more specifically include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a graphics processing unit (GPU), an application processor (AP), a digital signal processor (DSP), a microcomputer, a field programmable gate array (FPGA), a programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), a neural network processing unit (NPU), an electronic control unit (ECU), an image signal processor (ISP), etc. In some example embodiments, the processing circuit may include: a non-transitory computer-readable storage device storing a program of instructions, such as a solid state drive (SSD), etc.; and a processor configured to execute the program of instructions to implement the functions and / or methods performed by some or all of the storage controller 110 and / or any part thereof (e.g., the performance manager 111).

[0032] In some example embodiments, the storage device 100 may be a storage device or a single storage device configured to support multiple hosts or multiple tenants. In order to access the storage device 100, each of the multiple hosts 11 to 1n configured to access the storage device 100 independently of each other may require specific performance depending on the type or operation mode (for example, for a specified host, a specific number (e.g., number) of commands processed per unit time and / or a specific size of input / output processed per unit time). However, due to limitations of the physical resources (e.g., storage capacity) of the storage device 100, the storage device 100 may not be able to support the specific performance of each of the multiple hosts 11 to 1n under specific conditions (e.g., when a specific host among the multiple hosts 11 to 1n occupies all or most of the physical resources (e.g., storage capacity) of the storage device 100).

[0033] The storage device 100 according to some example embodiments of the present inventive concept may ensure (e.g., enable, realize, etc.) a reduced performance or minimum performance of each of the plurality of hosts 11 to 1n. For example, the storage controller 110 of the storage device 100 may include a performance manager 111, which is interchangeably referred to herein as a performance manager circuit. The performance manager 111 may be configured to set the performance level of each of the plurality of hosts 11 to 1n, and may schedule commands corresponding to the plurality of hosts 11 to 1n, respectively. In some example embodiments, the level (e.g., performance level) of each of the plurality of hosts 11 to 1n may be set based on the performance information (e.g., minimum performance or maximum performance) of each of the plurality of hosts 11 to 1n and the throughput of the plurality of hosts 11 to 1n. Each individual performance level (also referred to herein as a "level") may indicate the performance level at which the corresponding host and / or physical function is to operate (e.g., one level may indicate the highest performance level of the physical function PF and / or the host set to the one level, and another level may indicate the lowest performance level of the physical function PF and / or the host set to the other level). The performance manager 111 according to some example embodiments of the inventive concept can meet the performance requirements of the plurality of hosts 11 to 1n by scheduling commands based on the setting levels (e.g., performance levels) of the respective hosts 11 to 1n. Therefore, the performance of the storage system 10, the hosts 11 to 1n, and / or the storage device 100 can be improved based on ensuring that at least a minimum performance can be served for each of the hosts 11 to 1n without overwhelm the limited physical resources provided by the non-volatile storage device 120. The operation and configuration of the performance manager 111 will be described more fully below with reference to the accompanying drawings.

[0034] Figure 2 It is shown Figure 1 1 is a block diagram of a storage controller 110. Figure 1 and Figure 2 The storage controller 110 may include a performance manager 111 , a processor 112 , an SRAM 113 , a host interface circuit 114 , and a non-volatile memory interface circuit 115 .

[0035] The performance manager 111 may be configured to manage the performance (e.g., operation) of each of the plurality of hosts 11 to 1n by scheduling commands of the plurality of hosts 11 to 1n. For example, the performance manager 111 may include a command scheduler 111a, a performance (PF) level manager 111b, and a performance monitor 111c.

[0036] The performance manager 111 and / or any part thereof (e.g., the command scheduler 111a, the performance level manager 111b, and / or the performance monitor 111c) may include, may be included in, and / or may be implemented by: one or more instances of processing circuitry, such as hardware including logic circuitry; a hardware / software combination, such as a processor that executes software; or a combination thereof. For example, the processing circuitry may more specifically include, but is not limited to, a central processing unit (CPU), an arithmetic logic unit (ALU), a graphics processing unit (GPU), an application processor (AP), a digital signal processor (DSP), a microcomputer, a field programmable gate array (FPGA), a programmable logic unit, a microprocessor, an application specific integrated circuit (ASIC), a neural network processing unit (NPU), an electronic control unit (ECU), an image signal processor (ISP), and the like. In some example embodiments, the processing circuit may include: a non-transitory computer-readable storage device storing a program of instructions, such as a solid-state drive (SSD), SRAM 113, etc.; and a processor (e.g., processor 112) configured to execute the program of instructions to implement the functions and / or methods performed by some or all of the performance manager 111 and / or any part thereof (e.g., command scheduler 111a, performance level manager 111b and / or performance monitor).

[0037] The command scheduler 111a may be configured to schedule commands from the plurality of hosts 11 to 1n (e.g., schedule the implementation of operations according to the commands). For example, the command scheduler 111a may be configured to schedule commands from the respective hosts 11 to 1n based on the levels of the plurality of physical functions set by the performance level manager 111b.

[0038] The performance level manager 111b may be configured to set the level (e.g., performance level) of the physical function PF implemented by the storage device 100 corresponding to one or more of the multiple hosts 11 to 1n. For example, the performance level manager 111b may set the performance level of each of the multiple hosts 11 to 1n, and / or the performance level of each of the multiple physical functions PF corresponding to each independent host in the multiple hosts 11 to 1n, thereby setting the performance level (e.g., maximum performance, minimum performance, etc.) of the host and / or the physical function PF. The performance level manager 111b may be configured to set the level of each physical function PF based on performance information from one or more of the multiple hosts 11 to 1n (e.g., each host) and the performance monitored by the performance monitor 111c. In some example embodiments, the physical function PF may be a hardware or software component configured to provide functions defined by the NVMe interface standard. In some example embodiments, the physical function PF may be an NVMe controller (which may also be referred to herein as an NVMe controller device, an NVMe controller circuit, etc.) configured to support a single PCI-express function.

[0039] In some example embodiments, the physical function PF may be a PCI-express function that supports a single root I / O virtualization (SR-IOV) function, and the SR-IOV function is configured to allow the physical function PF to support one or more dependent virtual functions. Below, it is assumed that the physical function PF is an NVMe controller corresponding to at least one of the multiple hosts 11 to 1n, but the inventive concept is not limited to this. In addition, for ease of description, the term "physical function PF" may be used, but the physical function PF may be interchangeable with the configuration or terminology of the NVMe controller. Therefore, as described herein, the physical function PF "implemented" by the storage device 100 may include: a hardware component physical function PF included in the storage device 100 (e.g., a physical function PF device) and / or a software component physical function PF implemented by a processing circuit (e.g., a processor 112) of the storage device 100 (e.g., a program based on the processing circuit executing instructions stored in a memory (e.g., SRAM113)). Therefore, it will be understood that the storage device 100 can be configured to implement a plurality of physical functions PF corresponding to respective independent hosts among the plurality of hosts 11 to 1n. FIG. 3A to FIG. 3C The configuration of the physical function PF is described more fully.

[0040] The performance monitor 111 c may detect the performance of services provided from the storage device 100 to each of the plurality of hosts 11 to 1 n by monitoring commands processed at the storage device 100 .

[0041] In some example embodiments, when the performance (e.g., operation) of serving at least one of the plurality of hosts 11 to 1n satisfies the minimum performance of the at least one host (e.g., the minimum operating performance of the at least one host), the performance level manager 111b may change the level (e.g., performance level) of the corresponding physical function PF (e.g., the level may be reduced). When the performance of serving at least one of the plurality of hosts 11 to 1n exceeds the maximum performance (e.g., the maximum operating performance of the at least one host), the performance level manager 111b may change the level (e.g., performance level) of the corresponding physical function PF so that the corresponding physical function PF is disabled. The above-mentioned operation of the performance manager 111 will be described more fully below with reference to the accompanying drawings.

[0042] The processor 112 may control the overall operation of the storage controller 110. For example, the processor 112 may be configured to execute various applications (e.g., a flash translation layer (FTL)) on the storage controller 110. The SRAM 113 may be used as a buffer memory, a working memory, or a cache memory of the storage controller 110. In some example embodiments, the performance manager 111 may be implemented in the form of software, hardware, or a combination thereof. In the case where the performance manager 111 is implemented in the form of software, the performance manager 111 may be stored in the SRAM 113 in the form of a program of instructions, and the performance manager 111 stored in the SRAM 113 may be executed by the processor 112, for example, based on the processor 112 executing the program of instructions stored in the SRAM 113.

[0043] The host interface circuit 114 may communicate with a plurality of hosts 11 to 1n according to a given interface protocol. In some example embodiments, the given interface protocol may include at least one of various host interfaces such as the following: a PCI-express (Peripheral Component Interconnect Express) interface, an NVMe (Non-Volatile Memory Express) interface, a SATA (Serial ATA) interface, a SAS (Serial Attached SCSI) interface, and a UFS (Universal Flash Memory) interface, but the inventive concept is not limited thereto. In order to easily describe the technical idea of ​​the inventive concept, below, it is assumed that the host interface circuit 114 is implemented based on the NVMe interface. That is, the host interface circuit 114 may communicate with each of the plurality of hosts 11 to 1n through a physical layer based on a PCI-express interface, and may process information received from the plurality of hosts 11 to 1n through an NVMe controller based on an NVMe interface. In some example embodiments, an NVMe controller may be included in the host interface circuit 114, and the NVMe controller may correspond to the plurality of hosts 11 to 1n.

[0044] In some example embodiments, when the performance manager 111 is implemented in the form of hardware, the performance manager 111 may be included in the host interface circuit 114, or may be included in the NVMe controller of the host interface circuit 114.

[0045] The memory controller 110 may communicate with the nonvolatile memory device 120 through the nonvolatile memory interface circuit 115. In some example embodiments, the nonvolatile memory interface circuit 115 may be a NAND interface, and the NAND interface may support multiplexing / multi-channels of a plurality of nonvolatile memories included in the nonvolatile memory device 120.

[0046] Figure 3A , Figure 3B and Figure 3C Is used to describe Figure 1 For the sake of simplicity and convenience of description, components not necessary for describing the configuration, structure and function of the physical function PF will be omitted below.

[0047] In the following, the term "physical function PF" is used to easily describe the technical idea of ​​the present invention. The physical function PF may refer to an NVMe controller corresponding to each of the multiple hosts 11 to 1n. The NVMe controller may be implemented in the form of software, hardware, or a combination thereof. In some example embodiments, the physical function PF may indicate a PCI-express function configured to support an SR-IOV function. SR-IOV may indicate a function that allows a physical function to support one or more non-independent virtual functions. That is, in the following, the physical function PF may correspond to at least one of the multiple hosts 11 to 1n, and may be understood as being configured to process commands of the corresponding hosts of the multiple hosts 11 to 1n or commands of the submission queues managed by the corresponding hosts. Therefore, as described herein, the physical function PF "implemented" by the storage device 100 may include: a hardware component physical function PF included in the storage device 100 and / or a software component physical function PF implemented by a processing circuit (e.g., a processor 112) of the storage device 100 (e.g., a program based on the processing circuit executing instructions stored in a memory (e.g., SRAM 113)). A physical function PF including a hardware component physical function PF may be referred to herein as a "physical function means". Therefore, it will be understood that the storage device 100 may be configured to implement a plurality of physical functions PF corresponding to respective independent hosts among the plurality of hosts 11 to 1n. For ease of description, below, it is assumed that the storage device 100 communicates with three hosts 11, 12, and 13, but the inventive concept is not limited thereto.

[0048] Reference Figures 1 to 3C , the first host 11 to the third host 13 may respectively issue commands CMD1 to CMD3 for processing corresponding operations. For example, the first host 11 may issue a first command CMD1, and the first command CMD1 issued thereby may be queued in the first submission queue SQ1. The second host 12 may issue a second command CMD2, and the second command CMD2 issued thereby may be queued in the second submission queue SQ2. The third host 13 may issue a third command CMD3, and the third command CMD3 issued thereby may be queued in the third submission queue SQ3.

[0049] Figure 3ASome example embodiments shown manage a separate submission queue for each of the first host 11 to the third host 13, but the inventive concept is not limited thereto. For example, each of the first host 11 to the third host 13 may manage multiple submission queues. In some example embodiments, each of the first host 11 to the third host 13 may also manage a completion queue, which is configured to receive completions associated with multiple submission queues. In some example embodiments, each of the first host 11 to the third host 13 may issue management commands, and may also manage an admin queue and an admin completion queue, which is configured to receive completions associated with the admin queue. In some example embodiments, the submission queue, completion queue, admin queue, admin completion queue, etc. may be included in (e.g., implemented by) a controller memory buffer (CMB) (e.g., SRAM 113 or a separate memory buffer (not shown)) of the storage device 100. In some example embodiments, the submission queue, completion queue, admin queue, admin completion queue, etc. may be included in a host memory buffer (HMB) of the corresponding host.

[0050] The storage device 100 may communicate with the first to third hosts 11 to 13. In some example embodiments, the storage device 100 may communicate with the first to third hosts 11 to 13 through an interface belonging to the physical layer of the PCI-express interface (e.g., NVMe over PCI-express). In some example embodiments, the storage device 100 may communicate with the first to third hosts 11 to 13 through a network-based interface (e.g., NVMe-oF: NVMe over Fabrics) (e.g., Fibre Channel or Remote Direct Random Access Memory (RDMA)). Below, in order to clearly describe some example embodiments of the inventive concept, it is assumed that the storage controller 110 communicates with the first to third hosts 11 to 13 through the NVMe over PCI-express interface.

[0051] The storage device 100 may communicate with the first to third hosts 11 to 13 through various types of physical layers. The first to third physical functions PF1 to PF3 implemented by the storage device 100 may correspond to the first to third hosts 11 to 13, respectively (e.g., may correspond to respective independent hosts among the first to third hosts 11 to 13). For example, the first physical function PF1 may indicate a first NVMe controller configured to communicate with the first host 11 and process a first command CMD1 from the first host 11. The second physical function PF2 may indicate a second NVMe controller configured to communicate with the second host 12 and process a second command CMD2 from the second host 12. The third physical function PF3 may indicate a third NVMe controller configured to communicate with the third host 13 and process a third command CMD3 from the third host 13.

[0052] Each of the first to third physical functions PF1 to PF3 may perform an operation of the nonvolatile storage device 120 based on a command from a corresponding host, thereby serving the performance of the corresponding host. In some example embodiments, the nonvolatile storage device 120 may be managed by using a logically divided namespace NS or a physically or logically divided nonvolatile memory (NVM) set. Each of the first to third physical functions PF1 to PF3 may perform an operation corresponding to a command for a corresponding namespace or a corresponding NVM set.

[0053] The performance manager 111 may control the operations of the first to third physical functions PF1 to PF3 based on the levels of the first to third physical functions PF1 to PF3. For example, the performance manager 111 may schedule the physical functions to process the commands among the first to third physical functions PF1 to PF3 based on the levels of the first to third physical functions PF1 to PF3.

[0054] In some example embodiments, Figure 3A As shown, the first physical function PF1 to the third physical function PF3 can communicate with the first host 11 to the third host 13 through a physical port PT. Figure 3AAs shown, the storage controller 110a may include a physical port PT, first physical functions PF1 to third physical functions PF3, and a performance manager 111. The first physical functions PF1 to third physical functions PF3 may communicate with the first host 11 to third host 13 through a physical port PT. The physical port PT may be a physical layer configured to support a PCI-express interface. In some example embodiments, the first physical function PF1 to the third physical function PF3 may support a non-independent virtual function. In some example embodiments, at least one of the first physical function PF1 to the third physical function PF3 may be a non-independent virtual function.

[0055] In some example embodiments, Figure 3B As shown, the first physical function PF1 to the third physical function PF3 can communicate with the first host 11 to the third host 13 through a plurality of physical ports PT1 to PT3. Figure 3B As shown, the storage controller 110b may include first physical ports PT1 to PT3, first physical functions PF1 to PF3, and a performance manager 111. The first physical port PT1 to the third physical port PT3 may be an independent physical layer configured to support a PCI-express interface. The first physical function PF1 may communicate with the first host 11 through the first physical port PT1, the second physical function PF2 may communicate with the second host 12 through the second physical port PT2, and the third physical function PF3 may communicate with the third host 13 through the third physical port PT3.

[0056] In some example embodiments, Figure 3C As shown, at least one of the first host 11 to the third host 13 (eg, the first host 11) can communicate with at least two physical functions. Figure 3C As shown, the storage controller 110c may include the 0th physical port PT0 to the third physical port PT3, the 0th physical function PF0 to the third physical function PF3, and the performance manager 111. The first host 11 may communicate with the 0th physical function PF0 through the 0th physical port PT0, and may communicate with the first physical function PF1 through the first physical port PT1. That is, one host may communicate with at least two physical functions.

[0057] Reference FIG. 3A to FIG. 3CThe communication between the storage device 100 and the hosts 11 to 13 and the configuration of the physical function PF described are examples, and the inventive concept is not limited thereto. As described above, multiple physical functions PF may indicate NVMe controllers corresponding to multiple hosts (e.g., corresponding to each independent host in the multiple hosts), and multiple physical functions PF may be configured to communicate with the corresponding hosts through one (e.g., the same) physical port or through each (e.g., each independent) physical port. That is, below, it can be understood that one physical function PF corresponds to a single host.

[0058] Figure 4 It is shown Figure 1 Flowchart of the operation of a storage device of the present invention. Below, for the convenience of description, a description of one host managing one submission queue will be given. For example, it is assumed that the first physical function PF1 corresponds to the first host 11, and the first host 11 manages the first submission queue SQ1. In some example embodiments, the first physical function PF1 may be configured to process the first command CMD1 from the first submission queue SQ1. However, the inventive concept is not limited thereto. For example, one host may also manage multiple submission queues or any other command queues, and one physical function PF may be configured to process commands respectively associated with multiple submission queues.

[0059] Hereinafter, for convenience of description, the expression “submission queue of a physical function” is used. The submission queue of a physical function may refer to a submission queue managed by a host corresponding to the physical function.

[0060] In the following, for the convenience of description, it is assumed that the storage device 100 communicates with the first host 11 to the third host 13, and the first host 11 to the third host 13 correspond to the first physical function PF1 to the third physical function PF3, respectively. FIG. 3A to FIG. 3C The first to third physical functions PF1 to PF3 are described, and thus detailed descriptions thereof will not be repeated here. The above description is given only to easily describe an embodiment of the inventive concept, and the inventive concept is not limited thereto.

[0061] Reference Figure 1 , Figure 2 , Figure 3A and Figure 4In operation S101, the storage device 100 may receive performance information from the first host 11 to the third host 13, respectively. The performance information received from a given host may be understood as performance information associated with the given host, and may indicate, for example, the minimum performance of the given host, the maximum performance of the given host, etc. For example, the first host 11 to the third host 13 may each be a computing node, a processor, or an application (or process) driven independently. In some example embodiments, the first host 11 to the third host 13 may each require a given level of performance (e.g., maximum performance, minimum performance, etc.) that depends on the driving scheme or the application to be driven. The performance information received from the given host may indicate a given level of performance required by the given host. The storage device 100 may receive performance information provided by the first host 11 to the third host, respectively, in response to the performance requirements of the first host 11 to the third host 13.

[0062] In some example embodiments, the performance information may include information about the minimum performance and the maximum performance of each of the first to third hosts 11 to 13 (e.g., information indicating the minimum performance and the maximum performance of each of the first to third hosts 11 to 13). The minimum performance may indicate the minimum performance required by each of the first to third hosts 11 to 13, and the maximum performance may indicate the maximum performance required by each of the first to third hosts 11 to 13 or the maximum performance that needs to be limited. The storage device 100 according to some example embodiments of the inventive concept may provide each of the first to third hosts 11 to 13 with a performance that is equal to or higher than the minimum performance and equal to or lower than the maximum performance (e.g., may enable a given host to operate at a performance between (e.g., including the minimum performance and the maximum performance) indicated by, for example, the performance information received from each host). The storage device 100 that enables the host to operate at the performance may be referred to as "serving" the performance for the host.

[0063] In some example embodiments, the performance information of each of the first to third hosts 11 to 13 may be received during initialization of the storage device 100 or the first communication with the storage device 100 .

[0064] In operation S102, the storage device 100 may set the respective levels (e.g., performance levels) of all physical functions PF to a high level HIGH, which may be referred to as a “first level.” For example, the performance manager 111 (specifically, the performance level manager 111b) included in the storage controller 110 of the storage device 100 may set the levels of the first physical function PF1 to the third physical function PF3 corresponding to the first host 11 to the third host 13, respectively, to “HIHG.”

[0065] In operation S110 , the storage device 100 may determine whether the command CMD exists in a commit queue of a physical function PF having a high level HIGH (eg, a first physical function PF1 , in which the first host device 11 corresponds to the first physical function).

[0066] When a command CMD exists in the submission queue of the physical function PF with a high level HIGH, in operation S120, the storage device 100 may process the command CMD existing in the submission queue of the physical function PF with a high level HIGH. For example, in the case where the first physical function PF1 among the first physical function PF1 to the third physical function PF3 has a high level HIGH and the first command CMD1 exists in the first submission queue SQ1 of the first physical function PF1 (for example, at least one command from the first host device 11 corresponding to the first physical function PF1), the storage device 100 may process the first command CMD1 through the first physical function PF1. In detail, the storage controller 110 may obtain the first command CMD1 from the first submission queue SQ1, and may perform an operation corresponding to the first command CMD1 thus obtained for the nonvolatile storage device 120, thereby serving performance for the first host 11. In some example embodiments, when at least two of the first to third physical functions PF1 to PF3 have a high level "HIGH" and commands exist in the submission queues associated with the at least two physical functions, the storage device 100 may process the commands sequentially or non-sequentially according to an internal policy. In some example embodiments, the internal policy may be determined based on performance information of each of the first to third hosts 11 to 13.

[0067] In operation S130, the storage device 100 may determine whether there is a physical function that satisfies the minimum performance Perf_min (for example, the service performance at least satisfies the minimum performance Perf_min). For example, as described above, the performance information may include information about the minimum performance required for each of the first host 11 to the third host 13. In some example embodiments, the performance information received from each given host may include information indicating the minimum performance and / or the maximum performance required for the given host. In the example, the performance information received from the first host 11 may include information indicating the minimum performance and / or the maximum performance required for the first host 11. The performance manager 111 (specifically, the performance monitor 111c) included in the storage controller 110 of the storage device 100 may monitor the performance of each of the first host 11 to the third host 13 (or the first physical function PF1 to the third physical function PF3) periodically or randomly. In some example embodiments, the performance of each of the first to third hosts 11 to 13 (or the first to third physical functions PF1 to PF3) may be determined based on the number of commands processed per unit time or the size of input / output for the first to third hosts 11 to 13 (or the first to third physical functions PF1 to PF3). Therefore, as described herein, the "performance" of a given host device and / or the performance of "serving" a given host device may refer to: based on processing one or more commands from a given host device through a corresponding physical function PF, the number of commands processed per unit time (e.g., number) and / or the size of input / output processed per unit time for a given host. Therefore, the lowest performance of a host may be a specific threshold value for the number of commands processed per unit time (e.g., number) and / or the size of input / output processed per unit time for a given host, and the highest performance of a host may be a separate threshold value for the number of commands processed per unit time (e.g., number) and / or the size of input / output processed per unit time for a given host, and the highest performance of a host may be a separate threshold value for the number of commands processed per unit time (e.g., number) and / or the size of input / output processed per unit time for a given host.

[0068] The minimum performance of at least one of the first to third hosts 11 to 13 may be satisfied (e.g., at least satisfied) by operation S120. To reiterate, the "performance" of serving the host (e.g., the size of the input / output processed per unit time for a given host) may at least satisfy the minimum performance of the host. In some example embodiments, in operation S140, the storage device 100 may change the level of the physical function corresponding to the host that satisfies its minimum performance. For example, the performance manager 111 (specifically, the performance level manager 111b) included in the storage controller 110 of the storage device 100 may change the level of the physical function corresponding to the host that satisfies its minimum performance to a low level LOW, which may be referred to as a "second level". As an example, after processing at least one command CMD from the first host device 11 through the first physical function PF1 in S110-S120, the performance level of the first physical function PF1 may be changed to a second (e.g., low) level in S130-S140 based on the performance information associated with the first host device 11 and based on the performance of serving the first host device 11 through at least the first physical function PF1 by processing at least one command CMD1 from at least the first host device 11. The performance level of the first physical function PF1 may be changed to the second level based on determining that the performance of serving the first host 11 through the first physical function PF1 (e.g., in S110-S120) at least satisfies the minimum performance of the first host 11 as indicated in the performance information associated with the first host device 11.

[0069] In some example embodiments, changing the performance level of a physical function (e.g., first physical function PF1) may include, for example, monitoring the performance of serving a corresponding host (e.g., first host 11) through the physical function (e.g., PF1) in S120, and comparing the monitored performance with the minimum performance of the corresponding host in S130, and in response to determining based on the comparison that the monitored performance of serving the corresponding host device at least meets the minimum performance of the corresponding host, responsively changing the performance level of the physical function (e.g., PF1) from HIGH (e.g., first level) to LOW (e.g., second level).

[0070] After operation S140, the storage device 100 may perform operation S110. In some example embodiments, when there is no host satisfying its minimum performance, the storage device 100 may not perform operation S140 or may proceed to operation S110.

[0071] When the determination result of operation S110 indicates that the command does not exist in the submission queue of the physical function (e.g., the second physical function PF2) with a high level HIGH (or there is no physical function with a high level HIGH), in operation S150, the storage device 100 may determine whether the command exists in the submission queue of the physical function with a low level LOW (e.g., after the performance level of the first physical function PF1 is changed in S130-S140, the subsequent first command CMD1 exists in the submission queue of the first host device 11 corresponding to the first physical function PF1). When the command does not exist in the submission queue of the physical function with a low level LOW, the storage device 100 may not perform a separate operation.

[0072] When a command exists in the commit queue of a physical function PF having a low level LOW (e.g., the first physical function PF1 after the performance level of the first physical function PF1 is changed in S130-S140), in operation S160, the storage device 100 may process the command CMD existing in the commit queue of the physical function having the low level LOW. Operation S160 is similar to operation S120 except that the levels of the physical functions are different, and therefore, additional description will be omitted to avoid redundancy.

[0073] Therefore, in some example embodiments, based on the fact that the performance level of at least one second physical function (e.g., physical function PF2) corresponding to the second host device (e.g., host 12) among the multiple physical functions is a first level (e.g., HIGH) and the performance level of the first physical function PF1 is a second level (e.g., LOW), a second command (e.g., CMD2) from at least a second host device (e.g., host 12) among the multiple host devices 11 to 1n can be processed by the at least one second physical function (e.g., physical function PF2) before a subsequent first command (e.g., CMD1) from the first host device 11 is processed by the first physical function PF1.

[0074] As described above, the storage device 100 according to some example embodiments of the present invention can schedule commands of multiple hosts based on the level of the physical function PF. In some example embodiments, the storage device 100 can change the level of the corresponding physical function according to the minimum performance of each host being satisfied (for example, at least satisfying the performance of serving each host through the corresponding physical function). In this way, because the commands of the host with a low level LOW relative to the corresponding physical function PF are prioritized to the commands of the host that does not meet the minimum performance and therefore has a high level HIGH for the corresponding physical function PF (for example, the second physical function PF), it is possible to prevent a specific host from occupying the physical resources of the storage device, or to prevent the problem of being unable to ensure the minimum performance of another host. Therefore, a storage device with improved performance is provided.

[0075] Figure 5 Is used to describe Figure 4 FIG. 1 is a flowchart of an operation of a storage device. For ease of description, it is assumed that the first to third physical functions PF1 to PF3 correspond to the first to third hosts 11 to 13, respectively, and the first to third physical functions PF1 to PF3 respectively process commands of the first to third submission queues SQ1 to SQ3 managed by the first to third hosts 11 to 13. In addition, for ease of description, it is assumed that the commands respectively included in the first to third submission queues SQ1 to SQ3 have the same I / O size. Figure 5 Numerical values ​​shown in are simple examples for easily describing some exemplary embodiments of the present inventive concept, and the present inventive concept is not limited thereto.

[0076] Reference Figure 1 , Figure 2 , Figure 3A , Figure 4 and Figure 5 , at time 0 t0, the first host 11 may queue five first commands CMD1 in the first submission queue SQ1, the second host 12 may queue two second commands CMD2 in the second submission queue SQ2, and the third host 13 may queue four third commands CMD3 in the third submission queue SQ3. That is, at time 0 t0, the first submission queue SQ1 may include five first commands CMD1, the second submission queue SQ2 may include two second commands CMD2, and the third submission queue SQ3 may include four third commands CMD3.

[0077] At the 0th time t0, the performance manager 111 (specifically, the performance level manager 111b) may set the performance levels PF_LV of the first to third physical functions PF1 to PF3 corresponding to the first to third hosts 11 to 13, respectively, to a high level “H”.

[0078] During the period from t0 to t1, the storage device 100 may process commands CMD1 to CMD3 included in the first to third submission queues SQ1 to SQ3, respectively. Figure 4As described, at time t0, because the performance level PF_LV of the first physical function PF1 to the third physical function PF3 is set to the high level "H", and the commands CMD1, CMD2 and CMD3 are included in the first submission queue SQ1 to the third submission queue SQ3 corresponding to the first physical function PF1 to the third physical function PF3 respectively, the performance manager 111 (specifically, the command scheduler 111a) can perform scheduling so that the commands CMD1, CMD2 and CMD3 of the first submission queue SQ1 to the third submission queue SQ3 are processed.

[0079] In some example embodiments, the performance manager 111 (specifically, the command scheduler 111a) may schedule the commands CMD1, CMD2, and CMD3 of the first submission queue SQ1 to the third submission queue SQ3 based on the performance information of the first host 11 to the third host 13. For example, it is assumed that the lowest performances of the first host 11 to the third host 13 are 3 GB / s, 2 GB / s, and 1 GB / s, respectively. That is, the ratio of the lowest performances of the first host 11, the second host 12, and the third host 13 may be 3:2:1. In some example embodiments, the performance manager 111 (specifically, the command scheduler 111a) may perform scheduling (also referred to herein as "command scheduling") on one or more commands from one or more hosts, so that the command CMD1 of the first submission queue SQ1, the command CMD2 of the second submission queue SQ2, and the command CMD3 of the third submission queue SQ3 are processed at a ratio of 3:2:1 per unit time.

[0080] That is, during the period from t0 to t1, the storage device 100 may process three first commands CMD1 of the first submission queue SQ1, may process two second commands CMD2 of the second submission queue SQ2, and may process one third command CMD3 of the third submission queue SQ3. In some example embodiments, at the first time t1, the number of first commands CMD1 retained in the first submission queue SQ1 may be "2", the number of second commands CMD2 retained in the second submission queue SQ2 may be "0", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "3". However, the above-mentioned command scheduling method is an example, and the inventive concept is not limited thereto.

[0081] The performance of serving the host devices respectively based on executing command scheduling can be monitored, and the performance level of one or more corresponding physical functions can be changed based on the monitoring. For example, at the first time t1, the minimum performance of the third host 13 can be met. For example, the performance manager 111 (specifically, the performance monitor 111c) can monitor the performance of serving each of the first host 11 to the third host 13 in real time, regularly or randomly. It can be determined based on the performance monitoring result at the first time t1 that the minimum performance of the third host 13 is met.

[0082] In response to determining that the minimum performance of the third host 13 is satisfied, the performance manager 111 (specifically, the performance level manager 111b) may change the performance level PF_LV of the third physical function PF3 corresponding to the third host 13 from a high level "H" to a low level "L".

[0083] In the event that the monitored performance of the host does not satisfy (e.g., does not at least satisfy) the corresponding minimum performance of the host as indicated by the performance information, the performance level of the host may be maintained. For example, at time t1, the minimum performance of the first host 11 and the second host 12 may not be satisfied, and therefore, the performance level PV_LV of the first physical function PF1 and the second physical function PF2 corresponding to the first host 11 and the second host 12 may be maintained at a high level "H".

[0084] At the first time t1, because two first commands CMD1 are reserved in the first submission queue SQ1 corresponding to the first physical function PF1 whose performance level PF_LV is the high level "H" (e.g., based on the fact that the minimum performance of the first host 11 is not satisfied at t1), the storage device 100 may process the two first commands CMD1 of the first submission queue SQ1 from the first time t1 to the second time t2. At the second time t2, the number of the first commands CMD1 reserved in the first submission queue SQ1 may be "0", the number of the second commands CMD2 reserved in the second submission queue SQ2 may be "0", and the number of the third commands CMD3 reserved in the third submission queue SQ3 may be "3".

[0085] At the second time t2, since the command does not exist in the first submission queue SQ1 and the second submission queue SQ2 corresponding to the first physical function PF1 and the second physical function PF2 whose performance level PF_LV is the high level "H", the performance manager 111 (specifically, the command scheduler 111a) may perform scheduling so that three third commands CMD3 of the third submission queue SQ3 are processed during the period from t2 to t3. At the third time t3, the first host 11 may queue seven first commands CMD1 in the first submission queue SQ1, the second host 12 may queue four second commands CMD2 in the second submission queue SQ2, and the third host 13 may queue two third commands CMD3 in the third submission queue SQ3. That is, at the third time t3, the number of first commands CMD1 retained in the first submission queue SQ1 may be "7", the number of second commands CMD2 retained in the second submission queue SQ2 may be "4", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "2".

[0086] At the third time t3, since the first command CMD1 and the second command CMD2 exist in the first submission queue SQ1 and the second submission queue SQ2 corresponding to the first physical function PF1 and the second physical function PF2 whose performance level PF_LV is the high level "H", respectively, the performance manager 111 (specifically, the command scheduler 111a) may perform scheduling so that the first command CMD1 of the first submission queue SQ1 and the second command CMD2 of the second submission queue SQ2 are first processed during the period from t3 to t4. For example, the storage device 100 may process three first commands CMD1 of the first submission queue SQ1, and may process two second commands CMD2 of the second submission queue SQ2. At the fourth time t4, the number of the first commands CMD1 reserved in the first submission queue SQ1 may be "4", the number of the second commands CMD2 reserved in the second submission queue SQ2 may be "2", and the number of the third commands CMD3 reserved in the third submission queue SQ3 may be "2".

[0087] At the fourth time t4, it can be determined based on the monitoring result of the performance manager 111 (specifically, the performance monitor 111c) that the minimum performance of the second host 12 (i.e., the performance of 2 GB / s) is met. In some example embodiments, the performance manager 111 (specifically, the performance level manager 111b) can change the performance level PF_LV of the second physical function PF2 corresponding to the second host 12 that meets the minimum performance from a high level "H" to a low level "L". That is, at the fourth time t4, the performance level PF_LV of the first physical function PF1 can be a high level "H", the performance level PF_LV of the second physical function PF2 can be a low level "L", and the performance level PF_LV of the third physical function PF3 can be a low level "L".

[0088] In some example embodiments, since the first command CMD1 exists in the first submission queue SQ1 corresponding to the first physical function PF1 whose performance level PF_LV is the high level "H", the performance manager 111 (specifically, the command scheduler 111a) may perform scheduling so that the first command CMD1 of the first submission queue SQ1 is first processed during the period from t4 to t5. In some example embodiments, at the fifth time t5, the number of first commands CMD1 retained in the first submission queue SQ1 may be "0", the number of second commands CMD2 retained in the second submission queue SQ2 may be "2", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "2".

[0089] In some example embodiments, at the fifth time t5, because the first command CMD1 does not exist in the first submission queue SQ1 corresponding to the first physical function PF1 whose performance level PF_LV is a high level “H”, the second command CMD2 and the third command CMD3 of the second submission queue SQ2 and the third submission queue SQ3 corresponding to the second physical function PF2 and the third physical function PF3 whose performance level PF_LV is a low level “L” can be processed sequentially thereafter.

[0090] That is, when the minimum performance of a specific host among the multiple hosts is satisfied, the storage device 100 according to some example embodiments of the inventive concept may reduce or change the performance level PF_LV of the physical function corresponding to the specific host. Thereafter, since commands corresponding to the physical function having a relatively high performance level PF_LV are preferentially processed, the minimum performance of each of the multiple hosts may be ensured.

[0091] Figure 6 It is shown Figure 1 Detailed description of the same components is omitted for ease of description. Figure 1 , Figure 2 , Figure 3A and Figure 4 , the storage device 100 may perform operations S201, S202, S210, S220, S230, and S240. Operations S201, S202, S210, S220, S230, and S240 are similar to Figure 4 Operation S101, operation S102, operation S110, operation S120, operation S130, and operation S140 are described above, and thus additional description will be omitted to avoid redundancy.

[0092] When the determination result of operation S210 indicates that the command does not exist in the commit queue of the physical function PF at the high level "HIGH", the storage device 100 may perform operations S250 and S260. Operations S250 and S260 are similar to Figure 4 Operation S150 and operation S160 are described above, and thus additional description will be omitted to avoid redundancy.

[0093] In operation S270, the storage device 100 may determine whether there is a physical function that exceeds the highest performance Perf_max (for example, the service performance provided by the physical function exceeds the highest performance Perf_max). For example, as described above, the performance manager 111 (specifically, the performance monitor 111c) of the storage controller 110 may monitor the performance of each of the first host 11 to the third host 13. In some example embodiments, the performance of at least one of the first host 11 to the third host 13 may exceed the highest performance included in the performance information. For example, it is assumed that the highest performances of the first host 11, the second host 12, and the third host 13 are 3.2 GB / s, 2.2 GB / s, and 1.2 GB / s, respectively. During the operation of the storage device 100, the performance of serving the third host 13 may exceed 1.2 GB / s. In some example embodiments, it may be determined that the third physical function PF3 corresponding to the third host 13 exceeds the highest performance Perf_max.

[0094] When there is a physical function that exceeds the highest performance, in operation S280, the storage device 100 may disable the physical function that exceeds the highest performance Perf_max. In some example embodiments, the storage device 100 may set the performance level of the physical function that exceeds the highest performance Perf_max to the disable level DS. In some example embodiments, in the case where a specific physical function PF is disabled or the performance level PF_LV of the specific physical function PF is set to the disable level DS, a command corresponding to the specific physical function PF may not be processed. That is, the service of the specific physical function PF may not be provided. In some example embodiments, a command from a specific host may not be processed.

[0095] For example, refer to Figure 6 When the performance information received in S201 includes information indicating the maximum performance of the first host device 11, in response to determining in S270 that the performance serving the first host device 11 exceeds the maximum performance Perf_max of the first host device 11, in S280, the first physical function PF1 corresponding to the first host device 11 can be disabled.

[0096] As described above, when the performance of a specific physical function exceeds the highest performance, the storage device according to some example embodiments of the inventive concept can disable the specific physical function. In some example embodiments, because the performance of the specific physical function is limited to be equal to or lower than the highest performance, problems that occur when the specific physical function occupies physical resources of the storage device can be prevented.

[0097] Figure 7 Is used to describe Figure 6 FIG. 1 is a flowchart of the operation of the storage device. For the convenience of description, detailed descriptions of the same components are omitted. Figure 1 , Figure 2 , Figure 3A , Figure 6 and Figure 7 , at time 0 t0, the first host 11 may queue five first commands CMD1 in the first submission queue SQ1, the second host 12 may queue two second commands CMD2 in the second submission queue SQ2, and the third host 13 may queue seven third commands CMD3 in the third submission queue SQ3. At time 0 t0, the number of first commands CMD1 retained in the first submission queue SQ1 may be "5", the number of second commands CMD2 retained in the second submission queue SQ2 may be "2", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "7". As described in reference Figure 5 Given the above description, at the 0th time t0, the performance manager 111 may set the performance levels PF_LV of the first to third physical functions PF1 to PF3 to the high level “H”.

[0098] Thereafter, during the period from t0 to t1, the performance manager 111 may schedule commands of the first submission queue SQ1 to the third submission queue SQ3. At the first time t1, the number of first commands CMD1 retained in the first submission queue SQ1 may be "2", the number of second commands CMD2 retained in the second submission queue SQ2 may be "0", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "6", and the minimum performance of the third physical function PF3 may be satisfied. In this way, the performance manager 111 may change the performance level PF_LV of the third physical function PF3 from a high level "H" to a low level "L". Thereafter, the performance manager 111 may perform scheduling so that the first command CMD1 of the first submission queue SQ1 is processed during the period from t1 to t2, and the third command CMD3 of the third submission queue SQ3 is processed during the period from the second time t2 to the third time t3. At the second time t2, the number of first commands CMD1 retained in the first submission queue SQ1 may be "0", the number of second commands CMD2 retained in the second submission queue SQ2 may be "0", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "6"; at the third time t3, the number of first commands CMD1 retained in the first submission queue SQ1 may be "0", the number of second commands CMD2 retained in the second submission queue SQ2 may be "0", and the number of third commands CMD3 retained in the third submission queue SQ3 may be "3". Except for the different number of commands, the command scheduling from the 0th time t0 to the third time t3 is similar to that of the reference. Figure 5 The command scheduling is described, therefore, additional description will be omitted to avoid redundancy.

[0099] At the third time t3, the highest performance Perf_max of the third host 13 may be exceeded. For example, during the period from t2 to t3, the performance of the third host 13 may exceed the highest performance Perf_max due to the sequential execution of the third command CMD3 of the third submission queue SQ3 corresponding to the third host 13. In this way, the performance manager 111 (specifically, the performance level manager 111b) may disable the third physical function PF3 corresponding to the third host 13, or may change the performance level PF_LV of the third physical function PF3 to the disable level DS.

[0100] In some example embodiments, when the third physical function PF3 is disabled, an operation of the third host 13 corresponding to the third physical function PF3 (i.e., an operation corresponding to the third command CMD3 included in the third submission queue SQ3) may not be performed. In other words, even if the third command CMD3 exists in the third submission queue SQ3, during the period from t3 to t4, the storage device 100 may not perform a separate operation.

[0101] At the fourth time t4, the performance of the third host 13 may be lower than a given level. In some example embodiments, the performance manager 111 may change the performance level PF_LV of the third physical function PF3 corresponding to the third host 13 from the disabled level DS to the low level "L". Thereafter, during the period from t4 to t5, the performance manager 111 may perform scheduling so that the third command CMD3 of the third submission queue SQ3 corresponding to the third physical function PF3 is processed. In some example embodiments, the above-mentioned given level may be a value indicating a performance lower than the highest performance of the third host 13.

[0102] In some example embodiments, during the period from t3 to t4, in the case where the first command CMD1 and the second command CMD2 are present in the first submission queue SQ1 and the second submission queue SQ2 corresponding to the first physical function PF1 and the second physical function PF2 except for the third physical function PF3 that is thus disabled, the first command CMD1 and the second command CMD2 may be scheduled based on the performance level and the minimum performance of the corresponding physical functions.

[0103] That is, as described above, when the performance of a specific host among the multiple hosts exceeds the highest performance, the storage device 100 according to some example embodiments of the inventive concept can limit the performance of the specific host to the highest performance by disabling the physical function corresponding to the specific host. In this way, the problem of the specific host occupying the physical resources of the storage device 100 can be prevented.

[0104] Figure 8 It is shown Figure 1 Detailed description of the same components is omitted for ease of description. Figure 1 , Figure 2 , Figure 3A and Figure 8 In operation S310, the storage device 100 may change the performance level PF_LV of the physical function PF satisfying the minimum performance Perf_min from a high level "H" to a low level "L". For example, the storage device 100 may change the performance level PF_LV of the physical function PF satisfying the minimum performance Perf_min from a high level "H" to a low level "L". Figures 1 to 7 The method of operation described herein changes the performance level of the physical function while performing the operation to meet the minimum performance.

[0105] In operation S320, the storage device 100 may determine whether there is a physical function that does not meet the corresponding minimum performance Perf_min among the physical functions whose performance level PF_LV is a low level "L". For example, the physical function whose performance level PF_LV is a low level "L" may be a physical function that meets the corresponding minimum performance. However, later, due to the operation of the storage device 100 or command scheduling, the corresponding minimum performance Perf_min of a specific physical function may not be met. In some example embodiments, the storage device 100 may change the performance level PF_LV of the physical function that does not meet the corresponding minimum performance Perf_min (in other words, the physical function that does not meet the minimum performance Perf_min) from a low level "L" to a high level "H". In this way, a command corresponding to a physical function that does not meet the corresponding minimum performance Perf_min may be processed before a command corresponding to any other physical function (e.g., a physical function that meets the minimum performance Perf_min).

[0106] For example, return reference Figures 4 to 5 , S330 may include: after changing the performance level of the first physical function PF1 from HIGH to LOW in S130-S140, in response to determining that the subsequent performance of serving the first host device (e.g., 11) does not at least meet the minimum performance Perf_min, changing the performance level of the first physical function PF1 from the second level (e.g., low level LOW) to the first level (e.g., high level HIGH).

[0107] according to Figure 8 The operation of the flowchart is an example for describing how to re-change the performance level according to whether the minimum performance of the physical function is satisfied, and the present invention is not limited thereto. The storage device 100 according to the present invention may be executed in reference to Figures 1 to 7 The command described in the command scheduling operation is also executed according to whether the minimum performance of a specific physical function is met or not. Figure 8 The performance level of the flow chart re-changing operation.

[0108] Fig. 9 Is used to describe Figure 8 FIG. 1 is a flowchart of the operation of the storage device. For the convenience of description, detailed descriptions of the same components are omitted. Figure 1 , Figure 2 , Figure 3A , Figure 8 and Fig. 9, the storage device 100 may process first commands CMD1 to third commands CMD3 of first submission queues SQ1 to third submission queues SQ3 respectively corresponding to the first host 11 to the third host 13 from the 0th time t0 to the fourth time t4, and may adjust the physical levels of first physical functions PF1 to third physical functions PF3 respectively corresponding to the first host 11 to the third host 13 based on the performance information (i.e., the lowest performance or the highest performance) of the first host 11 to the third host 13. The operation of the storage device 100 during the period from t0 to t4 is similar to that of the reference Figure 5 The operations described are simple and thus additional description will be omitted to avoid redundancy.

[0109] exist Fig. 9 At the fourth time t4, when the performance served by the second physical function PF2 satisfies the corresponding minimum performance (i.e., the minimum performance included in the performance information of the second host 12), the performance manager 111 may change the performance level PF_LV of the second physical function PF2 from the high level "H" to the low level "L". The performance served by the third physical function PF3 may not satisfy the corresponding minimum performance (i.e., the minimum performance included in the performance information of the third host 13). In some example embodiments, the performance manager 111 (specifically, the performance level manager 111b) may change the performance level PF_LV of the third physical function PF3 from the low level "L" to the high level "H" again.

[0110] That is, in the following operations, a command corresponding to the third physical function PF3 may be processed before a command corresponding to any other physical function (e.g., a physical function that satisfies the minimum performance or a physical function whose performance level PF_LV is a low level "L", i.e., the second physical function PF2). Fig. 9 As shown, the performance manager 111 can perform a scheduling operation so that the first command CMD1 and the third command CMD3 of the first submission queue SQ1 and the third submission queue SQ3 corresponding to the first physical function PF1 and the third physical function PF3 whose performance level PF_LV is the high level "H" are processed first during the period from t4 to t5.

[0111] As described above, when the minimum performance of a specific physical function is met, the storage device 100 according to some example embodiments conceived by the present invention can change the performance level of the specific physical function; thereafter, when the specific physical function does not meet the minimum performance again, the storage device 100 can ensure the minimum performance of each of the multiple hosts by re-changing the performance level of the specific physical function.

[0112] Fig.10 It is shown Figure 1Detailed description of the same components is omitted for ease of description. Figure 1 , Figure 2 , Figure 3A and Fig.10 , the storage device 100 may perform operation S401. Operation S401 is similar to Figure 4 Operation S101 is described below, and thus additional description will be omitted to avoid redundancy.

[0113] In operation S402, the storage device 100 may set the performance level of all physical functions PF to the first level LV1. For example, in some of the above example embodiments, the performance level is classified as a high level "H" or a low level "L" (or further includes a disable level DS). However, in some example embodiments, including Fig.10 In the illustrated example embodiment, the storage device 100 may classify the performance level PF_LV into one of a plurality of levels (eg, LV1 to LV3).

[0114] For example, the performance information may include various performance information (e.g., minimum performance information, medium performance information, and maximum performance information) of each of the plurality of hosts. In a first operation, the performance level PF_LV of all physical functions PF may be set to a first level LV1. Thereafter, the performance level PF_LV of the physical function that meets the minimum performance may be changed to a second level LV2. Thereafter, the performance level PF_LV of the physical function that meets the medium performance may be changed to a third level LV3. In some example embodiments, as described above, the performance level of the physical function that exceeds the maximum performance may be set to a disable level DS.

[0115] In operation S410, the storage device 100 may determine whether a command exists in a commit queue of a physical function having a first level LV1. When a command exists in a commit queue of a physical function having a first level LV1, in operation S411, the storage device 100 may process the command existing in the commit queue of the physical function having the first level LV1.

[0116] When the command does not exist in the commit queue of the physical function with the first level LV1, the storage device 100 may determine whether the command exists in the commit queue of the physical function with the second level LV2 in operation S420. When the command exists in the commit queue of the physical function with the second level LV2, the storage device 100 may process the command existing in the commit queue of the physical function with the second level LV2 in operation S421.

[0117] When the command does not exist in the commit queue of the physical function with the second level LV2, the storage device 100 may determine whether the command exists in the commit queue of the physical function with the third level LV3 in operation S430. When the command exists in the commit queue of the physical function with the third level LV3, the storage device 100 may process the command existing in the commit queue of the physical function with the third level LV3 in operation S431.

[0118] Operation S411 , operation S421 , and operation S431 are similar to those of the above-described command processing method, and thus, additional description will be omitted to avoid redundancy.

[0119] Afterwards, in operation S440, the storage device 100 may update the performance level of the physical function based on the performance information of each host in the plurality of hosts and the processed command (or the performance served for each physical function). The manner of setting or updating the performance level is described in operation S402, and therefore, additional description will be omitted to avoid redundancy.

[0120] That is, as described above, the storage device 100 according to some example embodiments of the present invention can manage the performance level by using multiple levels based on the performance served by each of the multiple physical functions and the corresponding performance information of each of the multiple physical functions. That is, first, the physical function that does not meet the minimum performance (i.e., the physical function of the first level LV1) can be served, and secondly, the physical function that does not meet the medium performance (i.e., the physical function of the second level LV2) can be served, and again, the physical function that meets the medium performance and does not exceed the highest performance (i.e., the physical function of the third level LV3) can be served. Therefore, the storage device 100 according to some example embodiments of the present invention can meet the minimum performance, medium performance, and maximum performance required by each of the multiple hosts, and can prevent the physical resources of the storage device 100 from being occupied by a specific host. In some example embodiments, the level of the physical function can be changed to various levels according to the performance information provided and the way to implement the storage device 100.

[0121] Fig.11 It is shown Figure 1 Detailed description of the same components is omitted for ease of description. Figure 1 and Fig.11In operation S501, the storage device 100 may receive performance information from each of the plurality of hosts 11 to 1n. In some example embodiments, the performance information may include information about (e.g., indicating) the lowest performance and / or the highest performance of each of the plurality of hosts 11 to 1n. In some example embodiments, the performance information may be received from the plurality of hosts 11 to 1n during the initialization process of the storage device 100. In some example embodiments, the performance information may be received from the plurality of hosts 11 to 1n during the initialization connection process between the storage device 100 and each of the plurality of hosts 11 to 1n.

[0122] In operation S510, the storage device 100 may schedule commands of each of the plurality of hosts 11 to 1n based on the performance level of the corresponding physical function. Figures 1 to 10 The described method of operation schedules commands for each of the plurality of hosts 11 to 1n (or commands from a corresponding submission queue).

[0123] In operation S520, the storage device 100 may update the performance level of the physical function based on the performance information. Figures 1 to 10 In the operation method described in the present invention, the storage device 100 can update the performance level of the specific physical function according to whether the minimum performance of the specific physical function is met and whether the performance of the specific physical function exceeds the corresponding maximum performance. In some example embodiments, the storage device 100 can perform reference based on the updated performance level. Figures 1 to 10 Describes the command scheduling operation.

[0124] As described above, the storage device 100 according to some example embodiments of the inventive concept can meet the performance requirements of multiple hosts. Although not shown in the drawings, the storage device 100 can perform performance management operations on some of the multiple hosts in response to requests from some of the multiple hosts or performance information of the some of the multiple hosts (i.e., referring to Figures 1 to 11 ), and no performance management operations can be performed on the remaining hosts.

[0125] Fig.12 Is used to describe Figure 4 For simplicity of description, Fig.12 , the lowest performance and the highest performance index of each of the first to third physical functions PF1, PF2, and PF3 are shown, but the inventive concept is not limited thereto. For example, the performance index of any other host or any other physical function may be used.

[0126] Reference Figure 1 and Fig.12 , multiple hosts 11 to 1n can provide storage device 100 with Fig.12 The performance information or performance indicators shown. For example, the first host 11 may correspond to the first physical function PF1, and the first host 11 may provide the storage device 100 with information about the lowest performance and the highest performance of the first physical function PF1. Similarly, the second host 12 and the third host 13 may correspond to the second physical function PF2 and the third physical function PF3, respectively, and the second host 12 and the third host 13 may provide the storage device 100 with information about the lowest performance and the highest performance of the second physical function PF2 and information about the lowest performance and the highest performance of the third physical function PF3, respectively.

[0127] In some example embodiments, the minimum performance information may include information about the following items: the sequential write minimum performance SW_min1 to SW_min3, the sequential read minimum performance SR_min1 to SR_min3, the random write minimum performance RW_min1 to RW_min3, and the random read minimum performance RR_min1 to RR_min3 of the first physical function PF1 to the third physical function PF3. The maximum performance information may include information about the following items: the sequential write maximum performance SW_max1 to SW_max3, the sequential read maximum performance SR_max1 to SR_max3, the random write maximum performance RW_max1 to RW_max3, and the random read maximum performance RR_max1 to RR_max3 of the first physical function PF1 to the third physical function PF3.

[0128] In some example embodiments, the minimum performance information or the maximum performance information may be provided from each of the plurality of hosts 11 to 1n to the storage device 100 through a “set feature” command or a vendor command.

[0129] In some example embodiments, the memory controller 110 or 210 according to some example embodiments of the inventive concept may be based on Fig.12 The minimum performance information shown is used to control the performance level, as referenced Figures 1 to 10 In some example embodiments, the memory controller 110 or 210 according to some example embodiments of the inventive concept may be based on Fig.12 For maximum performance information, refer to Figures 1 to 11 The configuration of changing the performance level or disabling a specific physical function is described above, and therefore, additional description will be omitted to avoid redundancy.

[0130] Fig.13 and Fig.14 It is used to describe storage device processing Figure 1 The order of the host commands is shown in the figure. Fig.13 and Fig.14Describes the order in which the storage device 100 processes a command of a host (eg, the first host 11) or a physical function (eg, the first physical function PF1) corresponding to a host. That is, reference will be made to Fig.13 and Fig.14 The command processing sequence described is associated with a host or a physical function. Fig.13 and Fig.14 The command processing sequence described is shown with reference to Figures 1 to 11 Describes the command processing order of submission queues corresponding to one of multiple hosts or multiple physical functions.

[0131] Reference Figure 1 and Fig.13 , the first host 11 may manage the plurality of submission queues SQ1a to SQ1d. That is, the first host 11 may queue the first command in each of the plurality of submission queues SQ1a to SQ1d according to the currently running process or the core processing the process. In some example embodiments, at least one submission queue (e.g., SQ1a) of the plurality of submission queues SQ1a to SQ1d may be the management queue ASQ1.

[0132] The memory controller 110 (in detail, the first physical function PF1 ) of the memory device 100 may select one command among commands included in the plurality of submission queues SQ1 a to SQ1 d based on a round robin (RR) scheme and may process the selected command CMD_sel.

[0133] Reference Figure 1 and Fig.14 , the first host 11 may manage the plurality of submission queues SQ1a to SQ1i. That is, the first host 11 may queue the first command in each of the plurality of submission queues SQ1a to SQ1i according to the currently running process or the core processing the process. In some example embodiments, at least one submission queue (e.g., SQ1a) of the plurality of submission queues SQ1a to SQ1i may be the management queue ASQ1.

[0134] In some example embodiments, the first physical function PF1 corresponding to the first host 11 may select a command from a plurality of submission queues SQ1a to SQ1i based on a weighted round-robin (WRR) scheme, and may process the selected command CMD_sel. For example, among the plurality of submission queues SQ1a to SQ1i, submission queues SQ1b and SQ1c may be set to "urgent", submission queues SQ1d and SQ1e may be set to have a high weight, submission queues SQ1f and SQ1g may be set to have a medium weight, and submission queues SQ1h and SQ1i may be set to have a low weight. In some example embodiments, the attributes or priorities of the submission queues may be determined or set by a process of creating a submission queue (e.g., creating an I / O submission queue) or in a process of creating a completion queue corresponding to the submission queue (e.g., creating an I / O completion queue). That is, the attributes or priorities of the submission queues may be determined or managed by the first host 11.

[0135] The first physical function PF1 corresponding to the first host 11 may first process the commands of the submission queue SQ1a as the management queue ASQ1. Thereafter, the first physical function PF1 may process the commands of the submission queues SQ1b and SQ1c set as "urgent" according to the priority scheme Priority. The commands to be processed may be selected from the commands of the submission queues SQ1b and SQ1c through the first polling RR1.

[0136] Afterwards, the first physical function PF1 may process the commands of the submission queues SQ1d to SQ1i according to the priority scheme Priority. According to the weighted polling scheme WRR, firstly, the commands of the submission queues SQ1d and SQ1e with high weights may be selected from the commands of the submission queues SQ1d to SQ1i, secondly, the commands of the submission queues SQ1f and SQ1g with medium weights may be selected from the commands of the submission queues SQ1d to SQ1i, and again, the commands of the submission queues SQ1h and SQ1i with low weights may be selected from the commands of the submission queues SQ1d to SQ1i. The commands to be processed may be selected from the commands of the submission queues SQ1d and SQ1e with high weights through the second polling scheme RR2, the commands to be processed may be selected from the commands of the submission queues SQ1f and SQ1g with medium weights through the third polling scheme RR3, and the commands to be processed may be selected from the commands of the submission queues SQ1h and SQ1i with low weights through the fourth polling scheme RR4.

[0137] As described above, each of the plurality of hosts may manage a plurality of submission queues and priorities or weights of the submission queues, and the plurality of submission queues corresponding to each of the plurality of hosts may be arbitrated according to various schemes. In some example embodiments, the priorities or weights of the plurality of submission queues managed by each of the plurality of hosts may be determined in the process of creating the plurality of submission queues. That is, the priorities or weights of the plurality of submission queues may have a fixed level. In contrast, the performance level PF_LV of the physical function PF according to some example embodiments of the present invention may be configured differently from the priorities or weights of the plurality of submission queues described above, and may have a characteristic variable depending on whether the performance level of each of the plurality of hosts is met.

[0138] In some example embodiments, as described above, the storage device 100 according to some example embodiments of the present invention can directly control the priority and weight of each submission queue according to the performance requirements of multiple hosts being met. This is similar to controlling the configuration of the performance level PF_LV of the physical function PF, and therefore, additional description will be omitted to avoid redundancy. In some example embodiments, in the case where the storage device 100 directly controls the priority of the submission queue, the storage device 100 can provide information about the changed priority of the submission queue to multiple hosts, and the multiple hosts can queue commands based on the changed priority.

[0139] Independent of the priority or weight of the submission queue managed by each of the multiple hosts, the storage device 100 according to some example embodiments of the inventive concept can manage the performance levels of physical functions respectively corresponding to the multiple hosts based on whether the minimum performance of each of the multiple hosts is met and whether the performance of each of the multiple hosts exceeds the maximum performance, and can schedule commands from the multiple hosts based on the performance levels. Therefore, the performance requirements of the multiple hosts can be met.

[0140] Fig.15 is a block diagram showing an SSD system to which a storage system according to the present invention is applied. Fig.15 , the SSD system 1000 may include a host 1100 and a storage device 1200. The storage device 1200 may exchange a signal SIG with the host 1100 through a signal connector 1201, and may be supplied with power PWR through a power connector 1202. The storage device 1200 includes a solid state drive controller 1210 (e.g., an SSD controller), a plurality of nonvolatile memories 1221 to 122n, an auxiliary power supply 1230, and a buffer memory 1240.

[0141] The SSD controller 1210 may control the plurality of nonvolatile memories 1221 to 122n in response to a signal SIG received from the host 1100. The plurality of nonvolatile memories 1221 to 122n may operate under the control of the SSD controller 1210. The auxiliary power supply 1230 is connected to the host 1100 through the power connector 1202. The auxiliary power supply 1230 may be charged by the power PWR supplied from the host 1100. When the power PWR cannot be smoothly supplied from the host 1100, the auxiliary power supply 1230 may supply power to the storage device 1200.

[0142] The buffer memory 1240 may be used as a buffer memory of the storage device 1200. In some example embodiments, the buffer memory 1240 may be used as a reference Figures 1 to 14 A controller memory buffer CMB of the storage device 100 is described.

[0143] In some example embodiments, the host 1100 may be a reference Figures 1 to 14 The multi-host described, and the non-volatile storage device 120 (eg, SSD) may be referenced Figures 1 to 14 The storage device 100 described herein may be based on reference Figures 1 to 14 Describe the method of operation to operate.

[0144] Fig.16 is a block diagram showing an electronic device to which a storage system according to the concept of the present invention is applied. Fig.16 , the electronic device 2000 may include a main processor 2100, a touch panel 2200, a touch driver integrated circuit (TDI) 2202, a display panel 2300, a display driver integrated circuit (DDI) 2302, a system memory 2400, a storage device 2500, an audio processor 2600, a communication block 2700, and an image processor 2800. In some example embodiments, the electronic device 2000 may be one of various electronic devices such as a personal computer, a laptop computer, a server, a workstation, a portable communication terminal, a personal digital assistant (PDA), a portable media player (PMP), a digital camera, a smart phone, a tablet computer, and a wearable device.

[0145] The main processor 2100 may control the overall operation of the electronic device 2000. The main processor 2100 may control / manage operations of components of the electronic device 2000. The main processor 2100 may process various operations for operating the electronic device 2000.

[0146] The touch panel 2200 may be configured to sense a touch input from a user under the control of the touch driver integrated circuit 2202. The display panel 2300 may be configured to display image information under the control of the display driver integrated circuit 2302.

[0147] The system memory 2400 may store data used for the operation of the electronic device 2000. For example, the system memory 2400 may include a volatile memory such as a static random access memory (SRAM), a dynamic RAM (DRAM), or a synchronous DRAM (SDRAM), and / or a nonvolatile memory such as a phase change RAM (PRAM), a magnetoresistive RAM (MRAM), a resistive RAM (ReRAM), or a ferroelectric RAM (FRAM).

[0148] The storage device 2500 may store data regardless of whether it is powered. For example, the storage device 2500 may include at least one of various non-volatile memories such as flash memory, PRAM, MRAM, ReRAM, and FRAM. For example, the storage device 2500 may include an embedded memory and / or a removable memory of the electronic device 2000.

[0149] The audio processor 2600 may process an audio signal by using the audio signal processor 2610. The audio processor 2600 may receive an audio input through a microphone 2620, or may provide an audio output through a speaker 2630.

[0150] The communication block 2700 may exchange signals with an external device / system via an antenna 2710. The transceiver 2720 and the modulator / demodulator (MODEM) 2730 of the communication block 2700 may process signals exchanged with an external device / system based on at least one of the following various wireless communication protocols: Long Term Evolution (LTE), Worldwide Interoperability for Microwave Access (WiMax), Global System for Mobile Communications (GSM), Code Division Multiple Access (CDMA), Bluetooth, Near Field Communication (NFC), Wireless Fidelity (Wi-Fi), and Radio Frequency Identification (RFID).

[0151] The image processor 2800 may receive light through the lens 2810. The image device 2820 and the image signal processor 2830 included in the image processor 2800 may generate image information about an external object based on the received light.

[0152] In some example embodiments, the storage device 2500 may be a reference Figures 1 to 14 The storage device 100 described herein can support multiple hosts or multiple tenants. Figures 1 to 14 The storage device 2500 may satisfy the performance requirements for multiple cores included in the main processor 2100, or may satisfy the performance requirements for multiple processes that can be executed by the main processor 2100. In some example embodiments, the storage device 2500 may communicate with an external device or an external host through the communication block 2700, and may be based on the reference Figures 1 to 14 The described method meets the performance requirements of the main processor 2100, external devices or external hosts.

[0153] Fig.17 is a block diagram illustrating a data center to which a storage system according to some example embodiments of the inventive concept is applied. Fig.17 , the data center 3000 may include a plurality of computing nodes 3100 to 3400 (which may be servers). The plurality of computing nodes 3100 to 3400 may communicate with each other via a network NT. In some example embodiments, the network NT may be a storage-specific network such as a storage area network (SAN), or may be an Internet network such as TCP / IP. In some example embodiments, the network NT may include at least one of various communication protocols such as Fibre Channel, iSCSI protocol, FCoE, NAS, and NVMe-oF.

[0154] The plurality of computing nodes 3100 to 3400 may include processors 3110 , 3210 , 3310 , and 3410 , memories 3120 , 3220 , 3320 , and 3420 , storage devices 3130 , 3230 , 3330 , and 3430 , and interface circuits 3140 , 3240 , 3340 , and 3440 .

[0155] For example, the first computing node 3100 may include a first processor 3110, a first memory 3120, a first storage device 3130, and a first interface circuit 3140. In some example embodiments, the first processor 3110 may be implemented using a single core or multiple cores. The first memory 3120 may include a memory such as DRAM, SDRAM, SRAM, 3D XPoint memory, MRAM, PRAM, FeRAM, or ReRAM. The first memory 3120 may be used as a system memory, a working memory, or a buffer memory of the first computing node 3100. The first storage device 3130 may be a large-capacity storage medium such as a hard disk drive (HDD) or a solid-state drive (SSD). The first interface circuit 3140 may be a network interface controller (NIC) configured to support communication via a network NT.

[0156] In some example embodiments, the first processor 3110 of the first computing node 3100 may be configured to access the first memory 3120 based on a given memory interface. In some example embodiments, in some example embodiments of the shared memory architecture, the first processor 3110 of the first computing node 3100 may be configured to access the memories 3220, 3320, and 3420 of the remaining computing nodes 3200, 3300, and 3400 via the network NT. The interface circuit 3140 may include a network switch (not shown) configured to control or support access to the shared memory (i.e., the memory of any other computing node).

[0157] In some example embodiments, the first processor 3110 of the first computing node 3100 may be configured to access the first storage device 3130 based on a given storage interface. In some example embodiments, the first processor 3110 of the first computing node 3100 may be configured to access the storage devices 3230, 3330, and 3430 of the remaining computing nodes 3200, 3300, and 3400 via the network NT. The interface circuit 3140 may include a network switch (not shown) configured to control or support access to the storage device of any other computing node. In some example embodiments, the storage devices 3130 to 3430 respectively included in the plurality of computing nodes 3100 to 3140 may constitute a RAID volume.

[0158] The operations of the second to fourth computing nodes 3200 to 3400 may be similar to the operations of the first computing node 3100 described above, and thus, additional descriptions will be omitted to avoid redundancy.

[0159] In some example embodiments, various applications may be executed at the data center 3000. These applications may be configured to execute instructions for moving or copying data between the computing nodes 3100 to 3400, or may be configured to execute instructions for combining, processing, or reproducing various information present on the computing nodes 3100 to 3400. In some example embodiments, the application may be executed by one of the plurality of computing nodes 3100 to 3400 included in the data center 3000, or the application may be distributed and executed between the plurality of computing nodes 3100 to 3400.

[0160] In some example embodiments, data center 3000 may be used for high performance computing (HPC) (e.g., finance, petroleum, material science, weather forecasting), enterprise applications (e.g., scale-out databases), big data applications (e.g., NoSQL databases or in-memory replication).

[0161] In some example embodiments, at least one of the plurality of computing nodes 3100 to 3400 may be an application server. The application server may be configured to execute an application configured to perform various operations at the data center 3000. At least one of the plurality of computing nodes 3100 to 3400 may be a storage server. The storage server may be configured to store data generated or managed at the data center 3000.

[0162] In some example embodiments, the plurality of computing nodes 3100 to 3400 or parts thereof included in the data center 3000 may exist in the same site or in sites physically separated from each other, and may communicate with each other via the network NT based on wireless communication or wired communication. In some example embodiments, the plurality of computing nodes 3100 to 3400 included in the data center 3000 may be implemented by the same storage technology or may be implemented by different storage technologies.

[0163] Although not shown in the drawings, at least a portion of the plurality of computing nodes 3100 to 3400 of the data center 3000 may communicate with an external client node (not shown) via the network NT or via any other communication interface (not shown). At least a portion of the plurality of computing nodes 3100 to 3400 may automatically process a request (e.g., data storage or data transmission) according to a request of the external client node, or may process the request at any other computing node.

[0164] In some example embodiments, the number of computing nodes 3100 to 3400 included in the data center 3000 is exemplary, and the inventive concept is not limited thereto. In addition, in each computing node, the number of processors, the number of memories, and the number of storage devices are examples, and the inventive concept is not limited thereto.

[0165] In some example embodiments, the plurality of computing nodes 3100 to 3400 may be reference Figures 1 to 14 The plurality of hosts described herein, and the storage devices 3130 to 3430 respectively included in the plurality of computing nodes 3100 to 3400 may be configured to support reference Figures 1 to 14 Describes a multi-host or multi-tenant storage device. Based on reference Figures 1 to 14 The described operation method, the storage devices 3130 to 3430 respectively included in the plurality of computing nodes 3100 to 3400 can be configured to ensure the minimum performance of each computing node in the plurality of computing nodes 3100 to 3400 and limit the maximum performance.

[0166] According to the inventive concept, a storage device can ensure the minimum performance of each of a plurality of hosts. In some example embodiments, the storage device can prevent a specific host from occupying the physical resources of the storage device by limiting the performance of each of the plurality of hosts to the corresponding highest performance. Therefore, a storage device with improved performance and an operating method of the storage device are provided.

[0167] Although the inventive concept has been described with reference to certain example embodiments thereof, it will be apparent to those skilled in the art that various changes and modifications may be made thereto without departing from the spirit and scope of the inventive concept as set forth in the appended claims.

Claims

1. A method for operating a storage device, wherein the storage device is configured to implement a plurality of physical functions corresponding to a plurality of host devices respectively, wherein: The plurality of physical functions each include an NVMe controller circuit, or the plurality of physical functions are each configured to communicate with one or more host devices among the plurality of host devices through at least one physical port, the at least one physical port being based on a PCI-express interface, the method comprising: receiving performance information from each of the plurality of host devices; setting a performance level of each of the plurality of physical functions to a first level; processing, by at least a first physical function among the plurality of physical functions, at least one command from at least a first host device among the plurality of host devices, the first host device corresponding to the first physical function; Based on processing the at least one command from at least the first host device by at least the first physical function, changing the performance level of the first physical function to a second level according to performance information associated with the first host device and performance of servicing the first host device; and based on the performance level of at least one second physical function among the plurality of physical functions being the first level and the performance level of the first physical function being the second level, before processing a subsequent first command from the first host device through the first physical function, processing a second command from at least one second host device among the plurality of host devices through the at least one second physical function, wherein the at least one second host device corresponds to the at least one second physical function, wherein the performance information includes information indicating the lowest performance of at least the first host device among the plurality of host devices, Wherein, changing the performance level of the first physical function comprises: monitoring the performance of servicing the first host device via the first physical function; comparing the monitored performance to the minimum performance; and In response to determining, based on the comparison, that the monitored performance of servicing the first host device at least meets the minimum performance, the performance level of the first physical function is changed to the second level.

2. The method according to claim 1, further comprising: After the performance level of the first physical function is changed to the second level, in response to determining that subsequent performance of servicing the first host device does not at least meet the minimum performance, the performance level of the first physical function is changed from the second level to the first level.

3. The method according to claim 1, wherein: The performance information is received from each of the plurality of host devices during an initialization process.

4. The method according to claim 1, further comprising: In response to determining that there are no commands in the submission queue of the at least one second host device corresponding to the at least one second physical function having the first level of the performance level, processing the subsequent first command from the first host device by the first physical function having the second level of the performance level.

5. The method according to claim 1, wherein: The performance information includes information indicating a maximum performance of the first host device, and The method further comprises: In response to determining that a subsequent performance of servicing the first host device exceeds the maximum performance of the first host device, the first physical function corresponding to the first host device is disabled.

6. A storage device comprising: Non-volatile storage device; and a storage control circuit configured to control the nonvolatile storage device under the control of the first host device and the second host device, Wherein, the storage control circuit comprises: a first NVMe controller circuit configured to process a first command from a first submission queue of the first host device; a second NVMe controller circuit configured to process a second command from a second submission queue of the second host device; and A processing circuit, the processing circuit being configured to: performing command scheduling on the first command and the second command based on a performance level of each of the first NVMe controller circuit and the second NVMe controller circuit, and adjusting the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit based on performance information received from the first host device and the second host device and performance of serving the first host device and performance of serving the second host device by the first NVMe controller circuit and the second NVMe controller circuit, respectively, The processing circuit is further configured to: in an initial operation, set the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit to a first level, The performance information includes information indicating a first minimum performance of the first host device, and the processing circuit is configured to: in response to determining that the performance of serving the first host device at least meets the first minimum performance of the first host device, perform the following operations: adjusting the performance level of the first NVMe controller circuit corresponding to the first host device from the first level to a second level; After the adjustment, subsequent command scheduling is performed on the first command and the second command based on the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit, wherein the subsequent command scheduling includes: based on the performance level of the second NVMe controller circuit corresponding to the second host device being the first level and the performance level of the first NVMe controller circuit corresponding to the first host device being the second level, processing the second command by the second NVMe controller circuit before processing the first command.

7. The storage device according to claim 6, wherein: The performance information includes information indicating a first highest performance of the first host device, and The processing circuit is configured to disable the first NVMe controller circuit in response to determining that the performance of servicing the first host device exceeds the first maximum performance.

8. The storage device according to claim 6, wherein: The processing circuit is configured to: performing command scheduling on the first command and the second command based on the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit; Monitoring the performance of serving the first host device and the performance of serving the second host device through the first NVMe controller circuit and the second NVMe controller circuit, respectively; and Based on the performance information and the monitored performance of serving the first host device and the performance of serving the second host device respectively by the first NVMe controller circuit and the second NVMe controller circuit, the performance level of each of the first NVMe controller circuit and the second NVMe controller circuit is adjusted.

9. The storage device according to claim 6, wherein: The first NVMe controller circuit and the second NVMe controller circuit are configured to communicate with each independent host device in the first host device and the second host device through at least one physical port based on a PCI-express interface.

10. The storage device according to claim 6, wherein: The first host device and the second host device are external computing nodes configured to communicate with the first NVMe controller circuit and the second NVMe controller circuit over a network.

11. A method for operating a storage device, wherein the storage device is configured to communicate with a plurality of host devices, the method comprising: receiving performance information from the plurality of host devices; performing command scheduling on one or more commands from one or more host devices among the plurality of host devices; monitoring performance of the one or more host devices among the plurality of host devices respectively served, the performance served based on executing the command scheduling; and performing subsequent command scheduling on a first command from at least one first host device among the plurality of host devices and a second command from at least one second host device among the plurality of host devices based on the monitored performance and the performance information, so that the first command is processed before the second command is processed, wherein a first performance associated with the at least one first host device among the monitored performance does not at least meet a first minimum performance indicated by the performance information and associated with the at least one first host device; and a second performance associated with the at least one second host device among the monitored performance at least meets a second minimum performance indicated by the performance information and associated with the at least one second host device, The method further includes: in response to determining that the second performance exceeds a second highest performance indicated by the performance information and associated with the at least one second host device, performing command scheduling so that commands of the at least one second host device are not processed.

12. The method according to claim 11, further comprising: Based on the monitored performance and the performance information, the subsequent command scheduling is performed such that the second command is processed after all first commands from the at least one first host device among the plurality of host devices are processed.

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