A high-frequency transmission circuit with integrated magnetic isolation chip

Abstract

The present invention provides a high-frequency transmission circuit of an integrated magnetic isolation chip, which belongs to the technical field of electronic circuits, and includes a coding circuit, a transformer located on an isolation chip, and a decoding circuit. The present invention directly encodes the high level and low level of the signal, transmits the encoded differential signal through a transformer, and finally realizes the transmission of the final signal through a decoding circuit. The circuit is simple and the signal path is short, so its transmission delay is low; the differential transmission signal, so its common mode suppression is very high; the differential signal is generated by oscillating an oscillator, and the oscillator adopts a complementary cross-coupled oscillation circuit, does not need to drive a transformer, so its high-frequency power consumption is low; its oscillator frequency is very high, so the transmission rate is very high and the pulse width distortion is very small.

Description

Technical Field

[0001] The invention belongs to the technical field of electronic circuits, and in particular relates to a high-frequency transmission circuit integrating a magnetic isolation chip. Background Art

[0002] The function of the isolator is to isolate the circuit modules with independent functions in the circuit system in medical, communication, industrial bus control and other occasions, avoiding the mutual influence between the functional modules and protecting the sensitive circuits from damage by dangerous voltage and current. Figure 2 , Figure 3 and Figure 4 Two grounds, gnd and gnd2, are shown in FIG. 1 , and gnd1 and gnd2 may be at different potentials.

[0003] For a long time, optocouplers have been widely used as circuit isolation devices. However, optocouplers have obvious disadvantages, such as short life, low data transmission rate, unstable performance, and large size. A new isolation method that has emerged in the past decade is to use an on-chip integrated transformer as an isolation device for isolation, that is, magnetic coupling isolation. The on-chip integrated transformer is processed on a silicon wafer, and there is a layer of isolation material between the primary coil and the secondary coil of the transformer, which plays an isolation role. Magnetic coupling isolation uses the law of electromagnetic induction to achieve data communication on the isolation layer through the changing magnetic field between the two coils. Magnetic coupling isolation has the advantages of long life, high data transmission rate, stable performance, and small size. Figure 1 (a) is a schematic diagram of the chip architecture. In the figure, DIE1, DIE2 and DIE3 are encoder chips, decoder chips and silicon-based transformer chips respectively. DIE1 and DIE2 are designed using conventional CMOS processes, while DIE3 uses a self-developed manufacturing process. The three bare chips DIE1, DIE2 and DIE3 are integrated in a package and connected by package wires. Since the integrated magnetic coupling isolation device is small in size and the coil inductance is small, the coupling coefficient between the primary coil and the secondary coil of the transformer is higher in the high frequency band, which is more conducive to signal transmission. Therefore, the input low-frequency square wave signal is generally encoded and its frequency is increased to facilitate its transmission through the transformer. A commonly used method to increase the frequency is to perform edge detection on the input square wave signal, convert the rising and falling edges of the square wave signal into a short pulse with a duration of about two nanoseconds, and restore them to the rising or falling edges of the square wave after the pulse passes through the transformer. There is a problem with this method, which is how to distinguish the rising and falling edges. Figure 1 (b) is a flowchart of the encoding and decoding process. The mainstream encoding and decoding technology currently performs edge detection on the input square wave signal, such as Figure 3As shown, the rising and falling edges of the square wave signal are converted into a short pulse with a duration of about two nanoseconds. After the pulse passes through the transformer, it is restored to the rising or falling edge of the square wave. This method has the following problems: 1. Since encoding uses two pulses and decoding uses one pulse, it takes a certain amount of time to decode the pulse inside the circuit, so it cannot transmit high-frequency signals; 2. Its common-mode suppression capability is weak; 3. Since it uses a single and double pulse mechanism, it requires a larger output stage to drive the transformer, and the circuit is more complicated, so its power consumption is higher.

[0004] There is also a method of encoding and decoding using two transformers to transmit rising edge pulses and falling edge pulses respectively, such as Figure 2 As shown, it solves the problem of high-frequency signal transmission, but it still has many defects: 1. Two transformers are used, which increases the chip area; 2. The common-mode suppression capability is weak; 3. A larger output stage driving transformer is also required, so the power consumption is very high when high-frequency signals are transmitted. Summary of the invention

[0005] In view of the above-mentioned deficiencies in the prior art, the present invention provides a high-frequency transmission circuit with an integrated magnetic isolation chip, which achieves the purposes of high common-mode suppression, low power consumption, low transmission delay and high signal transmission rate.

[0006] In order to achieve the above purpose, the technical solution adopted by the present invention is:

[0007] This solution provides a high-frequency transmission circuit with an integrated magnetic isolation chip, including an encoding circuit, a transformer located on an isolation chip, and a decoding circuit;

[0008] The encoding circuit is used to encode the high level and the low level, and transmit the encoded differential high-frequency sinusoidal signal to the transformer;

[0009] The transformer is used to transmit the differential high-frequency sinusoidal signal to the two ports of the transformer secondary end by using the two ports of the transformer source end, induce two differential high-frequency sinusoidal signals, and transmit the two differential high-frequency sinusoidal signals to the decoding circuit;

[0010] The decoding circuit is used to perform shaping and filtering processing on the two differential high-frequency sinusoidal signals through a series combination of a resistor and a capacitor, and to amplify and decode the differential high-frequency sinusoidal signals after the shaping and filtering processing through a differential operational amplifier.

[0011] The beneficial effects of the present invention are as follows: in view of the low speed, high power consumption, low common-mode transient suppression and high transmission delay of the current magnetic coupling isolation technology, the present invention proposes a simple and easy encoding and decoding scheme for distinguishing the high level and low level of the input square wave signal, and no longer encodes the rising edge and the falling edge. A high level is used to generate an oscillation signal, a low level oscillator is cut off, and a low potential is input, thereby achieving the purposes of high common-mode suppression, low power consumption, low transmission delay and high signal transmission rate.

[0012] Further, the encoding circuit includes a PMOS field effect transistor M1, a PMOS field effect transistor M2, a PMOS field effect transistor M3, an NMOS field effect transistor MN4 and an NMOS field effect transistor MN5;

[0013] The source of the PMOS field effect tube M1 is connected to a power supply, the drain of the PMOS field effect tube M1 is respectively connected to the source of the PMOS field effect tube M2 and the source of the PMOS field effect tube M3, the gate of the PMOS field effect tube M2 is connected to the drain of the PMOS field effect tube M3, the gate of the PMOS field effect tube M3 is connected to the source of the PMOS field effect tube M2, the drain of the PMOS field effect tube M3 is short-connected to the drain of the NMOS field effect tube MN4, the drain of the PMOS field effect tube M2 is short-connected to the drain of the NMOS field effect tube MN5 The drain of the NMOS field effect transistor MN4 is short-connected, the gate of the NMOS field effect transistor MN4 is connected to the drain of the NMOS field effect transistor MN5, the gate of the NMOS field effect transistor MN5 is connected to the drain of the NMOS field effect transistor MN4, the source of the NMOS field effect transistor MN4 is grounded, the source of the NMOS field effect transistor MN5 is grounded, the drain of the PMOS field effect transistor M2, the drain of the PMOS field effect transistor M3 and the drain of the NMOS field effect transistor MN5 are all connected to one end of the source end of the transformer, and the drain end of the NMOS field effect transistor MN5 is connected to the other end of the source end of the transformer.

[0014] The beneficial effect of the above further scheme is: the encoding circuit in the present invention no longer uses edge detection of rising and falling edges to perform transmission encoding and decoding on the rising and falling edges, but directly encodes the high level and low level, and the high level input is passed through the encoder to generate a differential high-frequency sinusoidal signal that can be transmitted by a transformer.

[0015] Furthermore, the PMOS field effect transistor M1, the PMOS field effect transistor M2 and the PMOS field effect transistor M3 are all connected to the highest potential; and the NMOS field effect transistor MN4 and the NMOS field effect transistor MN5 are all connected to the lowest potential.

[0016] The beneficial effect of the above further scheme is that the present invention adopts a new encoding and decoding method, uses a high level to generate an oscillation signal, cuts off a low level oscillator, and inputs a low potential.

[0017] Furthermore, the parasitic capacitance of the PMOS field effect transistor M1, the parasitic capacitance of the PMOS field effect transistor M2, the parasitic capacitance of the PMOS field effect transistor M3, the parasitic capacitance of the NMOS field effect transistor MN4, the parasitic capacitance of the NMOS field effect transistor MN5 and the inductance of the transformer form a complementary oscillator.

[0018] The beneficial effects of the above further scheme are: the differential signal is generated by oscillating the oscillator, the oscillator adopts a complementary cross-coupled oscillation circuit, and does not need to drive a transformer, so its high-frequency power consumption is low; its oscillator frequency is very high, so the transmission rate is very high and the pulse width distortion is very small, and the complementary oscillator is used, which can greatly increase the oscillator frequency to meet the requirements of transmitting high-frequency signals. And there is no need to drive a transformer, so its power consumption is greatly reduced.

[0019] Furthermore, the decoding circuit includes a capacitor C1, a capacitor C2, a resistor R1, a resistor R2 and a differential operational amplifier;

[0020] One end of the resistor R1 is respectively connected to the non-inverting input end of the differential operational amplifier and one end of the transformer auxiliary source, the other end of the resistor R1 is connected to one end of the capacitor C1, the other end of the capacitor C1 is grounded, one end of the resistor R2 is respectively connected to the inverting input end of the differential operational amplifier and the other end of the transformer auxiliary source, the other end of the resistor R2 is connected to one end of the capacitor C2, the other end of the capacitor C2 is grounded, and the output end of the differential operational amplifier is the output end of the decoding circuit.

[0021] The beneficial effect of the above further scheme is: the decoder circuit mainly provides decoding. When the differential signal is transmitted, the transformer transmission waveform is shaped through two resistors and capacitors, and the erroneous waveform caused by transformer oscillation is filtered out. The transformer input waveform is amplified and shaped through the differential amplifier. BRIEF DESCRIPTION OF THE DRAWINGS

[0022] Figure 1 The figure is a schematic diagram of the chip architecture and data transmission process of the circuit isolator.

[0023] Figure 2 This is a schematic diagram of the dual transformer encoding and decoding structure for a forward single pulse.

[0024] Figure 3 Schematic diagram of the dual-single pulse encoding and decoding structure.

[0025] Figure 4 Schematic diagram of the long-short pulse encoding and decoding structure.

[0026] Figure 5 It is a schematic diagram of the structure of the present invention.

[0027] Figure 6 It is a circuit schematic diagram of the present invention. DETAILED DESCRIPTION

[0028] The specific implementation modes of the present invention are described below so that those skilled in the art can understand the present invention. However, it should be clear that the present invention is not limited to the scope of the specific implementation modes. For those of ordinary skill in the art, as long as various changes are within the spirit and scope of the present invention as defined and determined by the attached claims, these changes are obvious, and all inventions and creations utilizing the concept of the present invention are protected.

[0029] Example

[0030] Magnetic isolation mainly relies on transformers to isolate and transmit signals. Traditional isolators encode input signals, double pulses on the rising edge, single pulses on the falling edge, or other encoding and decoding methods for the rising and falling edges, such as Figure 1 As shown. This encoding method can accurately transmit data, but due to its own single and double pulse widths, and internal decoding circuits, its transmission data is limited. The currently known maximum transmission is 120Mbps. Since the transmission signal needs to drive the transformer, its single and double pulse drive transformer requires a large current, so its power consumption is relatively large. Since it only relies on the transformer for isolation and signal transmission, the common-mode transient suppression capability of the signal is low. The present invention adopts a new encoding and decoding method, no longer encodes for the rising and falling edges, uses a high level to generate an oscillation signal, the low-level oscillator is cut off, and a low potential is input. Therefore, high-frequency signals can be transmitted. Breakthrough the current isolator transmission rate. Theoretically calculated, it can reach above 200MHZ.

[0031] like Figure 5 As shown, the present invention provides a high-frequency transmission circuit of an integrated magnetic isolation chip, including an encoding circuit, a transformer located on an isolation chip, and a decoding circuit; the encoding circuit is used to encode high level and low level, and transmit the encoded differential high-frequency sinusoidal signal to the transformer; the transformer is used to transmit the differential high-frequency sinusoidal signal to the two ports of the secondary end of the transformer using the two ports of the source end of the transformer, induce two differential high-frequency sinusoidal signals, and transmit the two differential high-frequency sinusoidal signals to the decoding circuit; the decoding circuit is used to shape and filter the two differential high-frequency sinusoidal signals through a series combination of resistors and capacitors, and amplify and decode the differential high-frequency sinusoidal signals after the shaping and filtering through a differential operational amplifier.

[0032] In this embodiment, the present invention adopts a new encoding and decoding method, no longer encodes the rising edge and the falling edge, uses a high level to generate an oscillation signal, the low level oscillator is cut off, and the input is a low potential. Therefore, high-frequency signals can be transmitted. Breaking through the current isolator transmission rate. Theoretically calculated, it can reach more than 200MHZ. Figure 5 As shown, its overall architecture is consistent with ordinary digital isolation, and is composed of an encoding circuit, an isolation on-chip transformer, and a decoding circuit. The encoding circuit no longer uses edge detection for rising and falling edges, and transmits and decodes the rising and falling edges. Instead, it directly encodes the high and low levels. The high-level input generates a differential high-frequency sinusoidal signal that can be transmitted by a transformer through the encoder; the transformer is also an improved transformer, and its two ports at the source end can transmit two differential signals to the secondary end to induce two differential high-frequency sinusoidal signals; the decoding circuit receives the high-frequency sinusoidal signal transmitted by the transformer, shapes and filters the signal through a series combination of resistors and capacitors, and amplifies and decodes the signal through a differential operational amplifier circuit.

[0033] like Figure 6As shown, the encoding circuit includes a PMOS field effect tube M1, a PMOS field effect tube M2, a PMOS field effect tube M3, an NMOS field effect tube MN4 and an NMOS field effect tube MN5; the source of the PMOS field effect tube M1 is connected to the power supply, the drain of the PMOS field effect tube M1 is connected to the source of the PMOS field effect tube M2 and the source of the PMOS field effect tube M3 respectively, the gate of the PMOS field effect tube M2 is connected to the drain of the PMOS field effect tube M3, the gate of the PMOS field effect tube M3 is connected to the source of the PMOS field effect tube M2, the drain of the PMOS field effect tube M3 is short-circuited to the drain of the NMOS field effect tube MN4 The drain of the PMOS field effect tube M2 is short-connected with the drain of the NMOS field effect tube MN5, the gate of the NMOS field effect tube MN4 is connected with the drain of the NMOS field effect tube MN5, the gate of the NMOS field effect tube MN5 is connected with the drain of the NMOS field effect tube MN4, the source of the NMOS field effect tube MN4 is grounded, the source of the NMOS field effect tube MN5 is grounded, the drain of the PMOS field effect tube M2, the drain of the PMOS field effect tube M3 and the drain of the NMOS field effect tube MN5 are all connected to one end of the source end of the transformer, and the drain of the NMOS field effect tube MN5 is connected to the other end of the source end of the transformer. The PMOS field effect tubes M1, M2 and M3 are all connected to the highest potential; the NMOS field effect tubes MN4 and MN5 are all connected to the lowest potential. The parasitic capacitance of the PMOS field effect transistor M1, the parasitic capacitance of the PMOS field effect transistor M2, the parasitic capacitance of the PMOS field effect transistor M3, the parasitic capacitance of the NMOS field effect transistor MN4, the parasitic capacitance of the NMOS field effect transistor MN5 and the inductance of the transformer form a complementary oscillator.

[0034] In this embodiment, the input signal passes through a series of shaping filters and then enters the M1 tube that controls the on and off of the oscillator. Figure 6 As shown, all PMOS substrates are connected to the highest potential, and all NMOS substrates are connected to the lowest potential. The oscillator is a complementary cross-coupled oscillator, which forms an LC oscillation through the parasitic capacitance of the MOS tube and the inductance of the transformer. The X position and the Y position generate a differential oscillation signal, and its frequency is determined by the parasitic capacitance C of the M2, M3, M4, and M5 tubes and the parasitic inductance L of the transformer. The present invention adopts a complementary oscillator, which can greatly increase the oscillator frequency to meet the requirements of transmitting high-frequency signals. And there is no need to drive the transformer, so its power consumption is greatly reduced.

[0035] like Figure 6As shown, the decoding circuit includes a capacitor C1, a capacitor C2, a resistor R1, a resistor R2 and a differential operational amplifier; one end of the resistor R1 is respectively connected to the non-inverting input end of the differential operational amplifier and one end of the transformer auxiliary source, the other end of the resistor R1 is connected to one end of the capacitor C1, the other end of the capacitor C1 is grounded, one end of the resistor R2 is respectively connected to the inverting input end of the differential operational amplifier and the other end of the transformer auxiliary source, the other end of the resistor R2 is connected to one end of the capacitor C2, the other end of the capacitor C2 is grounded, and the output end of the differential operational amplifier is the output end of the decoding circuit.

[0036] In this embodiment, Figure 6 As shown, the decoder circuit mainly provides decoding and improves the common-mode transient suppression. When the differential signal is transmitted, the transformer transmission waveform is shaped through two resistors and capacitors, and the erroneous waveform caused by the transformer oscillation is filtered out. The transformer input waveform is amplified and shaped through the differential amplifier. The differential amplifier can effectively increase the common-mode transient suppression, thereby improving the common-mode transient suppression of the circuit. The amplified waveform is then decoded to achieve the decoding function. When the input is low level, the source end of the transformer is low level and no signal is transmitted. Therefore, the potential induced by the secondary end of the transformer is low level, and the two ends of the resistor are low level. The differential amplifier does not work, so it is connected to the gate of the MOS tube, so that the MOS tube is turned off.

[0037] In this embodiment, Figure 5 As shown in the figure, the high level of the input square wave signal is encoded into a very high frequency pulse signal. The number of pulse signals is determined by the length of the high level time, and the low level remains unchanged; after passing through the transformer, the decoding circuit decodes the pulse signal into a high level, and the continuous low level is restored to a low level. Theoretically, if the high level width is greater than 3 cycles of the high-frequency pulse signal, low pulse width distortion decoding can be achieved. The oscillator frequency can be designed to be relatively high. The higher the oscillator frequency, the higher the maximum frequency that can be transmitted, and the smaller the pulse width distortion of the entire circuit. In other words, when the oscillator frequency reaches above 1GHZ, the circuit can theoretically transmit a 330MHZ square wave signal, and the pulse width distortion is small at this time. In order to take into account the process deviation of integrated circuit processing and the influence of voltage and temperature, and improve the chip yield, the input signal frequency should have sufficient safety margin, so it can be designed to achieve square wave signal transmission above 250MHZ. In the simulation, the high-frequency oscillation frequency is set to 1GHZ, and the actual data transmission rate reaches 200MHZ, which is higher than the existing products on the market. The circuit proposed in this scheme can be implemented using a 0.13 micron integrated circuit manufacturing process.

[0038] The present invention adopts the above design, directly encodes the high level and low level of the signal, transmits the encoded differential signal through a transformer, and finally realizes the transmission of the final signal through a decoding circuit. The circuit is simple and the signal path is short, so its transmission delay is low; the signal is differentially transmitted, so its common mode suppression is very high; the differential signal is generated by oscillating an oscillator, and the oscillator adopts a complementary cross-coupled oscillation circuit and does not need to drive a transformer, so its high-frequency power consumption is low; its oscillator frequency is very high, so the transmission rate is very high and the pulse width distortion is very small.

Claims

1. A high-frequency transmission circuit with integrated magnetic isolation chip, characterized in that: It includes an encoding circuit, a transformer located on an isolation plate, and a decoding circuit; The encoding circuit is used to encode the high level and the low level, and transmit the encoded differential high-frequency sinusoidal signal to the transformer; The encoding circuit includes a PMOS field effect transistor M1, a PMOS field effect transistor M2, a PMOS field effect transistor M3, an NMOS field effect transistor MN4 and an NMOS field effect transistor MN5; The source of the PMOS field effect tube M1 is connected to a power supply, the drain of the PMOS field effect tube M1 is respectively connected to the source of the PMOS field effect tube M2 and the source of the PMOS field effect tube M3, the gate of the PMOS field effect tube M2 is connected to the drain of the PMOS field effect tube M3, the gate of the PMOS field effect tube M3 is connected to the source of the PMOS field effect tube M2, the drain of the PMOS field effect tube M3 is short-connected to the drain of the NMOS field effect tube MN4, the drain of the PMOS field effect tube M2 is short-connected to the drain of the NMOS field effect tube MN5, and the drain of the PMOS field effect tube M2 is short-connected to the drain of the NMOS field effect tube MN6. The drain is short-circuited, the gate of the NMOS field effect transistor MN4 is connected to the drain of the NMOS field effect transistor MN5, the gate of the NMOS field effect transistor MN5 is connected to the drain of the NMOS field effect transistor MN4, the source of the NMOS field effect transistor MN4 is grounded, the source of the NMOS field effect transistor MN5 is grounded, the drain of the PMOS field effect transistor M2, the drain of the PMOS field effect transistor M3 and the drain of the NMOS field effect transistor MN5 are all connected to one end of the source end of the transformer, and the drain of the NMOS field effect transistor MN5 is connected to the other end of the source end of the transformer; The transformer is used to transmit the differential high-frequency sinusoidal signal to the two ports of the transformer secondary end by using the two ports of the transformer source end, induce two differential high-frequency sinusoidal signals, and transmit the two differential high-frequency sinusoidal signals to the decoding circuit; The decoding circuit is used to perform shaping and filtering processing on the two differential high-frequency sinusoidal signals through a series combination of a resistor and a capacitor, and to amplify and decode the differential high-frequency sinusoidal signals after the shaping and filtering processing through a differential operational amplifier; The decoding circuit includes a capacitor C1, a capacitor C2, a resistor R1, a resistor R2 and a differential operational amplifier; One end of the resistor R1 is respectively connected to the non-inverting input end of the differential operational amplifier and one end of the transformer auxiliary source, the other end of the resistor R1 is connected to one end of the capacitor C1, the other end of the capacitor C1 is grounded, one end of the resistor R2 is respectively connected to the inverting input end of the differential operational amplifier and the other end of the transformer auxiliary source, the other end of the resistor R2 is connected to one end of the capacitor C2, the other end of the capacitor C2 is grounded, and the output end of the differential operational amplifier is the output end of the decoding circuit.

2. The high-frequency transmission circuit of the integrated magnetic isolation chip according to claim 1, characterized in that: The PMOS field effect transistor M1, the PMOS field effect transistor M2 and the PMOS field effect transistor M3 are all connected to the highest potential; the NMOS field effect transistor MN4 and the NMOS field effect transistor MN5 are all connected to the lowest potential.

3. The high-frequency transmission circuit of the integrated magnetic isolation chip according to claim 2, characterized in that: The parasitic capacitance of the PMOS field effect transistor M1, the parasitic capacitance of the PMOS field effect transistor M2, the parasitic capacitance of the PMOS field effect transistor M3, the parasitic capacitance of the NMOS field effect transistor MN4, the parasitic capacitance of the NMOS field effect transistor MN5 and the inductance of the transformer form a complementary oscillator.

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