High-precision compression method, device and electronic equipment suitable for hardware circuits

Abstract

The present invention provides a high-precision compression method, device and electronic device suitable for hardware circuits, which are applied to the field of image processing technology. The method comprises: acquiring a target image; inputting the target image into a convolutional neural network model; and outputting an image category corresponding to the target image. The convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model comprises at least one group of convolution kernel parameters as convolution kernel shared parameters.

Description

Technical Field

[0001] The present invention relates to the field of image processing technology, and in particular to a high-precision compression method, device and electronic equipment suitable for hardware circuits. Background Art

[0002] Convolutional neural network is one of the core algorithms in the field of image recognition, and it can have stable performance when there is sufficient learning data. However, since convolutional neural network models usually contain millions or even tens of millions of parameters and dozens or even hundreds of layers of networks, they usually require very large computational costs and storage space in practical applications.

[0003] In order to reduce storage and computing costs, in the prior art, redundant items in the convolutional neural network model are generally removed by parameter pruning, and parameters are shared according to the importance of the parameters. However, the effects of these methods are limited and cannot meet the compression requirements. Summary of the invention

[0004] The present invention provides a high-precision compression method, device and electronic device suitable for hardware circuits, which are used to solve the problems in the prior art that the convolutional neural network model has a large number of parameters and high storage and calculation costs during image processing.

[0005] The present invention provides a high-precision compression method suitable for hardware circuits, comprising: acquiring a target image; inputting the target image into a convolutional neural network model; and outputting an image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained through training based on images of different categories, and each convolutional layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters.

[0006] According to a high-precision compression method suitable for hardware circuits provided by the present invention, before obtaining the target image, the method also includes: obtaining convolution kernel parameters of all channels in a first convolution layer, the first convolution layer being any convolution layer in the convolution neural network model; selecting convolution kernel parameters of two channels in turn from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one group of convolution kernel parameters having a similarity difference value less than or equal to a first threshold, each group of convolution kernel parameters including convolution kernel parameters of at least two channels; performing a first operation on the convolution kernels of the channels corresponding to the at least one group of convolution kernel parameters; the first operation includes: determining the target convolution kernel parameters as the convolution kernel shared parameters of the channels corresponding to the target group convolution kernel parameters, the target convolution kernel parameters being one of the target group convolution kernel parameters, and the target group convolution kernel parameters being any one of the at least one group of convolution kernel parameters.

[0007] According to the present invention, a high-precision compression method suitable for hardware circuits is provided, wherein the convolution kernel parameters of two channels are selected in turn from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one group of convolution kernel parameters whose similarity difference value is less than or equal to a first threshold, including: normalizing the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel; subtracting the processed convolution kernel parameters of the first channel from the convolution kernel parameters of the second channel to obtain a target parameter matrix, and calculating the sum of the target parameter matrices; if the sum of the target parameter matrices is less than or equal to the first threshold, determining the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel as convolution kernel parameters in the same group; wherein the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all channels.

[0008] According to the present invention, a high-precision compression method suitable for hardware circuits is provided, and the method also includes: calculating the parameter matrix sum of the convolution kernel parameters of each channel among the convolution kernel parameters of all channels; replacing the convolution kernel whose parameter matrix sum among the convolution kernel parameters of all channels is less than or equal to a second threshold with a zero convolution kernel.

[0009] According to a high-precision compression method suitable for hardware circuits provided by the present invention, the target group of convolution kernel parameters includes convolution kernel parameters at all positions in different channels.

[0010] According to a high-precision compression method suitable for hardware circuits provided by the present invention, the target group of convolution kernel parameters includes convolution kernel parameters at the same position or multiple positions in different channels.

[0011] The present invention also provides a high-precision compression device suitable for hardware circuits, comprising: an acquisition module and a processing module; the acquisition module is used to acquire a target image; the processing module is used to input the target image into a convolutional neural network model; and output the image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one set of convolution kernel parameters as convolution kernel shared parameters.

[0012] According to a high-precision compression device suitable for hardware circuits provided by the present invention, the acquisition module is also used to acquire the convolution kernel parameters of all channels in the first convolution layer before acquiring the target image, and the first convolution layer is any convolution layer in the convolution neural network model; the processing module is used to select the convolution kernel parameters of two channels in turn from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one group of convolution kernel parameters whose similarity difference value is less than or equal to the first threshold, and each group of convolution kernel parameters includes the convolution kernel parameters of at least two channels; and perform a first operation on the convolution kernel of the channel corresponding to the at least one group of convolution kernel parameters; the first operation includes: determining the target convolution kernel parameter as the convolution kernel shared parameter of the channel corresponding to the target group convolution kernel parameter, the target convolution kernel parameter is one of the target group convolution kernel parameters, and the target group convolution kernel parameter is any one of the at least one group of convolution kernel parameters.

[0013] According to a high-precision compression device suitable for hardware circuits provided by the present invention, the processing module is specifically used to: normalize the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel; subtract the processed convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel to obtain a target parameter matrix, and calculate the sum of the target parameter matrices; if the sum of the target parameter matrices is less than or equal to the first threshold, determine the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel as convolution kernel parameters in the same group; wherein the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all the channels.

[0014] According to a high-precision compression device suitable for hardware circuits provided by the present invention, the processing module is also used to: calculate the parameter matrix sum of the convolution kernel parameters of each channel among the convolution kernel parameters of all channels; replace the convolution kernel whose parameter matrix sum among the convolution kernel parameters of all channels is less than or equal to a second threshold with a zero convolution kernel.

[0015] According to a high-precision compression device suitable for hardware circuits provided by the present invention, the target group of convolution kernel parameters includes convolution kernel parameters at all positions in different channels.

[0016] According to a high-precision compression device suitable for hardware circuits provided by the present invention, the target group of convolution kernel parameters includes convolution kernel parameters at the same position or multiple positions in different channels.

[0017] The present invention also provides an electronic device, comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein when the processor executes the program, the steps of any of the above-described high-precision compression methods applicable to hardware circuits are implemented.

[0018] The present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, implements the steps of any of the above-described high-precision compression methods applicable to hardware circuits.

[0019] The high-precision compression method, device and electronic device applicable to hardware circuits provided by the present invention can obtain a target image; input the target image into a convolutional neural network model; and output the image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained through training based on images of different categories, and each convolutional layer of the convolutional neural network model includes at least one group of convolutional kernel parameters as convolutional kernel shared parameters. Through this solution, since each convolutional layer of the convolutional neural network model includes at least one group of convolutional kernel parameters as convolutional kernel shared parameters, the convolutional kernel parameters in the convolutional layer can be greatly compressed, thereby saving storage and computing costs in the image processing process. BRIEF DESCRIPTION OF THE DRAWINGS

[0020] In order to more clearly illustrate the technical solutions in the present invention or the prior art, the following briefly introduces the drawings required for use in the embodiments or the description of the prior art. Obviously, the drawings described below are some embodiments of the present invention. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying creative work.

[0021] Figure 1 This is one of the flow charts of the high-precision compression method applicable to hardware circuits provided by the present invention;

[0022] Figure 2 This is the second flow chart of the high-precision compression method applicable to hardware circuits provided by the present invention;

[0023] Figure 3 It is one of the convolution kernel sharing parameter schematic diagrams of the high-precision compression method applicable to hardware circuits provided by the present invention;

[0024] Figure 4 This is the second schematic diagram of convolution kernel sharing parameters of the high-precision compression method applicable to hardware circuits provided by the present invention;

[0025] Figure 5 This is the third flow chart of the high-precision compression method applicable to hardware circuits provided by the present invention;

[0026] Figure 6 It is a structural schematic diagram of a high-precision compression device applicable to a hardware circuit provided by the present invention;

[0027] Figure 7It is a structural schematic diagram of the electronic device provided by the present invention. DETAILED DESCRIPTION

[0028] In order to make the purpose, technical solution and advantages of the present invention clearer, the technical solution of the present invention will be clearly and completely described below in conjunction with the drawings of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, not all of the embodiments. Based on the embodiments of the present invention, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of the present invention.

[0029] It should be noted that, in the embodiments of the present invention, words such as "exemplary" or "for example" are used to indicate examples, illustrations or descriptions. Any embodiment or design described as "exemplary" or "for example" in the embodiments of the present invention should not be interpreted as being more preferred or more advantageous than other embodiments or designs. Specifically, the use of words such as "exemplary" or "for example" is intended to present related concepts in a specific way.

[0030] It should be noted that, in this article, the terms "comprise", "include" or any other variants thereof are intended to cover non-exclusive inclusion, so that a process, method, article or device including a series of elements includes not only those elements, but also other elements not explicitly listed, or also includes elements inherent to such process, method, article or device. In the absence of further restrictions, an element defined by the sentence "comprises a ..." does not exclude the presence of other identical elements in the process, method, article or device including the element. In addition, it should be pointed out that the scope of the method and device in the embodiment of the present invention is not limited to performing functions in the order shown or discussed, and may also include performing functions in a substantially simultaneous manner or in reverse order according to the functions involved, for example, the described method may be performed in an order different from that described, and various steps may also be added, omitted, or combined. In addition, the features described with reference to certain examples may be combined in other examples.

[0031] In order to clearly describe the technical solutions of the embodiments of the present invention, in the embodiments of the present invention, the words "first", "second", etc. are used to distinguish between the same items or similar items with basically the same functions and effects. Those skilled in the art can understand that the words "first", "second", etc. are not limiting the quantity and execution order.

[0032] The embodiments of the present invention describe some exemplary embodiments for the purpose of explanation. It should be understood that the present invention can be implemented in other ways that are not specifically shown in the drawings.

[0033] The above implementation is described in detail below with reference to specific embodiments and drawings.

[0034] like Figure 1 As shown, an embodiment of the present invention provides a high-precision compression method applicable to a hardware circuit, and the high-precision compression method applicable to a hardware circuit can be applied to a high-precision compression device applicable to a hardware circuit. The high-precision compression method applicable to a hardware circuit may include S101-S103:

[0035] S101. A high-precision compression device suitable for hardware circuits acquires a target image.

[0036] S102. A high-precision compression device suitable for hardware circuits inputs the target image into a convolutional neural network model.

[0037] S103. The high-precision compression device applicable to the hardware circuit outputs the image category corresponding to the target image.

[0038] Among them, the above-mentioned convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters.

[0039] In an embodiment of the present invention, since each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters, the convolution kernel parameters in the convolution layer can be greatly compressed, thereby saving storage and computing costs in the image processing process.

[0040] Optional, such as Figure 2 As shown, before acquiring the target image, the high-precision compression method applicable to the hardware circuit may further include S201-S203.

[0041] S201. A high-precision compression device suitable for hardware circuits obtains convolution kernel parameters of all channels in a first convolution layer.

[0042] The first convolutional layer is any convolutional layer in the convolutional neural network model.

[0043] S202. A high-precision compression device suitable for hardware circuits selects convolution kernel parameters of two channels in turn from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one set of convolution kernel parameters whose similarity difference value is less than or equal to a first threshold.

[0044] The first convolution layer may include multiple channels, each channel may correspond to a convolution kernel, and the high-precision compression device suitable for hardware circuits may select convolution kernel parameters of two channels in turn from the convolution kernel parameters corresponding to all the convolution kernels for pairwise comparison.

[0045] The following takes the convolution kernel parameters of two channels selected as the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel as an example to illustrate the similarity comparison process of the two convolution kernel parameters.

[0046] Step 1: A high-precision compression device suitable for hardware circuits can first normalize the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel to eliminate the order of magnitude difference between the two convolution kernel parameters; then subtract the processed convolution kernel parameters of the first channel from the convolution kernel parameters of the second channel to obtain a target parameter matrix, and finally calculate the sum of the target parameter matrix.

[0047] It should be noted that the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are both parameter matrices, and the similarity difference value of the two convolution kernel parameters can be obtained by taking the difference and summing them.

[0048] Step 2: The high-precision compression device suitable for hardware circuits can compare the calculated sum of the target parameter matrices, that is, the similarity difference value of the two convolution kernel parameters, with a preset first threshold. If the sum of the target parameter matrices is less than or equal to the first threshold, it means that the similarity difference value of the two convolution kernel parameters is small, and the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel can be determined as the convolution kernel parameters in a set of convolution kernel parameters.

[0049] It should be noted that the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all the above channels.

[0050] By using the above pairwise comparison method, at least one group of convolution kernel parameters with a similarity difference value less than or equal to the first threshold value can be obtained from the convolution kernel parameters of all channels. Each group of convolution kernel parameters may include the convolution kernel parameters of at least two channels.

[0051] S203. A high-precision compression device suitable for a hardware circuit performs a first operation on the convolution kernels of channels corresponding to at least one set of convolution kernel parameters.

[0052] Among them, the above-mentioned first operation may include: determining the target convolution kernel parameter as the convolution kernel shared parameter of the channel corresponding to the target group convolution kernel parameter, the target convolution kernel parameter is one of the target group convolution kernel parameters, and the target group convolution kernel parameter is any one of at least one group of convolution kernel parameters.

[0053] That is to say, the high-precision compression device suitable for hardware circuits can select any one convolution kernel parameter from a set of convolution kernel parameters as the convolution kernel shared parameter of the channel corresponding to the set of convolution kernel parameters. Exemplarily, a set of convolution kernel parameters includes convolution kernel parameter 1, convolution kernel parameter 2 and convolution kernel parameter 3. The high-precision compression device suitable for hardware circuits can select a parameter from convolution kernel parameter 1, convolution kernel parameter 2 and convolution kernel parameter 3. Assuming that the selected convolution kernel parameter is convolution kernel parameter 2, the high-precision compression device suitable for hardware circuits can use convolution kernel parameter 2 as the convolution kernel shared parameter of the three channels corresponding to the three convolution kernel parameters.

[0054] Optionally, the target group convolution kernel parameters may include convolution kernel parameters at all positions in different channels. Figure 3 As shown, if the similarity difference values ​​of the convolution kernel parameters at all positions in channel 2, channel 4 and channel 5 are less than or equal to the first threshold, the convolution kernel parameters of channel 2, the convolution kernel parameters of channel 4 and the convolution kernel parameters of channel 5 can be determined as the target group convolution kernel parameters, and the target convolution kernel parameters can be one of the convolution kernel parameters of channel 2, the convolution kernel parameters of channel 4 and the convolution kernel parameters of channel 5.

[0055] It should be noted that if a convolution layer has 256*256 (256 channels, each channel has 256 convolution kernels) convolution kernels, and the similarity difference value of the convolution kernel parameters of the i-th channel and the j-th channel is less than or equal to the first threshold, then these convolution kernels are replaced with the same set of convolution kernels. Assuming that there are n channels with the same / similar convolution kernel parameters, the replacement can reduce (n-1)*256 convolution kernel parameters.

[0056] Optionally, the target group convolution kernel parameters may include convolution kernel parameters at the same position or multiple positions in different channels. Figure 4 As shown, if the similarity difference values ​​of the convolution kernel parameters at two positions in channel 2, channel 4 and channel 5 are all less than or equal to the first threshold, the convolution kernel parameters at the two positions of channel 2, the convolution kernel parameters at the two positions of channel 4 and the convolution kernel parameters at the two positions of channel 5 can be determined as the target group convolution kernel parameters, and the target convolution kernel parameters can be one of the convolution kernel parameters at the two positions of channel 2, the convolution kernel parameters at the two positions of channel 4 and the convolution kernel parameters at the two positions of channel 5.

[0057] It should be noted that if a convolution layer has 256*256 (256 channels, 256 convolution kernels in each channel) convolution kernels, the similarity difference value of the convolution kernel corresponding to the i-th position in all channels is less than or equal to the first threshold, and assuming that there are n positions where the similarity difference value of the convolution kernel parameters is less than or equal to the first threshold, the replacement will reduce (n-1)*256 convolution kernel parameters.

[0058] In an embodiment of the present invention, since the convolution kernel parameters of all channels in a convolution layer can be compared for similarity, and the convolution kernels of the channels corresponding to at least one group of convolution kernel parameters whose similarity difference values ​​are less than or equal to the first threshold are shared, the convolution kernel parameters in the convolution layer can be greatly compressed, thereby saving storage and computing costs.

[0059] Optional, combined Figure 2 ,like Figure 5 As shown, the high-precision compression method applicable to hardware circuits may further include S204 and S205.

[0060] S204. A high-precision compression device suitable for hardware circuits calculates the parameter matrix sum of the convolution kernel parameters of each channel among the convolution kernel parameters of all channels.

[0061] S205. A high-precision compression device suitable for hardware circuits replaces the parameter matrix and the convolution kernels less than or equal to the second threshold in the convolution kernel parameters of all channels with zero convolution kernels.

[0062] There are a large number of convolution kernels close to zero in the convolution kernel. Since their effect in the convolution kernel is negligible, these convolution kernels can be replaced with zero convolution kernels. Specifically, after the high-precision compression device suitable for hardware circuits determines the parameter matrix sum of the convolution kernel parameters of each channel, each parameter matrix sum can be compared with the second threshold in turn. If the parameter matrix sum of a channel is less than or equal to the preset second threshold, the convolution kernel of the channel can be replaced with a zero convolution kernel.

[0063] It should be noted that the high-precision compression device suitable for hardware circuits can execute S204 and S205 before executing S202 and S203, or can execute S204 and S205 after executing S202 and S203. The specific details can be determined based on actual usage, and the embodiments of the present application are not limited to this.

[0064] In the embodiment of the present invention, since the convolution kernel close to zero can be replaced with a zero convolution kernel, the convolution kernel parameters in the convolution layer can be further compressed, thereby saving storage and computing costs.

[0065] The above mainly introduces the solution provided by the embodiment of the present invention from the perspective of the method. In order to achieve the above functions, it includes hardware structures and / or software modules corresponding to the execution of each function. Those skilled in the art should easily realize that, in combination with the units and algorithm steps of each example described in the embodiment disclosed in this article, the embodiment of the present invention can be implemented in the form of hardware or a combination of hardware and computer software. Whether a function is executed in the form of hardware or computer software driving hardware depends on the specific application and design constraints of the technical solution. Professional and technical personnel can use different methods to implement the described functions for each specific application, but such implementation should not be considered to exceed the scope of the present invention.

[0066] The high-precision compression method applicable to hardware circuits provided in the embodiment of the present invention can be executed by a high-precision compression device applicable to hardware circuits, or a control module for image processing in the high-precision compression device applicable to hardware circuits. In the embodiment of the present invention, the high-precision compression device applicable to hardware circuits executing the high-precision compression method applicable to hardware circuits is taken as an example to illustrate the high-precision compression device applicable to hardware circuits provided in the embodiment of the present invention.

[0067] It should be noted that the embodiment of the present invention can divide the functional modules of the high-precision compression device suitable for the hardware circuit according to the above method example. For example, each functional module can be divided according to each function, or two or more functions can be integrated into one processing module. The above integrated module can be implemented in the form of hardware or in the form of software functional modules. Optionally, the division of modules in the embodiment of the present invention is schematic and is only a logical function division. There may be other division methods in actual implementation.

[0068] like Figure 6 As shown, an embodiment of the present invention provides a high-precision compression device 600 suitable for hardware circuits. The high-precision compression device 600 suitable for hardware circuits includes: an acquisition module 601 and a processing module 602. The acquisition module 601 is used to acquire a target image; the processing module 602 is used to input the target image into a convolutional neural network model; and output the image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters.

[0069] Optionally, the above-mentioned acquisition module 601 can be used to acquire the convolution kernel parameters of all channels in the first convolution layer before acquiring the target image, and the first convolution layer is any convolution layer in the convolution neural network model; the processing module 602 can be used to select the convolution kernel parameters of two channels in turn from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one group of convolution kernel parameters whose similarity difference value is less than or equal to the first threshold, and each group of convolution kernel parameters includes convolution kernel parameters of at least two channels; and perform a first operation on the convolution kernel of the channel corresponding to the at least one group of convolution kernel parameters; the first operation includes: determining the target convolution kernel parameters as the convolution kernel shared parameters of the channel corresponding to the target group convolution kernel parameters, the target convolution kernel parameters are one of the target group convolution kernel parameters, and the target group convolution kernel parameters are any one of the at least one group of convolution kernel parameters.

[0070] Optionally, the above-mentioned processing module 602 can be specifically used to: normalize the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel; subtract the processed convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel to obtain a target parameter matrix, and calculate the sum of the target parameter matrices; if the sum of the target parameter matrices is less than or equal to the first threshold, the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are determined as convolution kernel parameters in the same group; wherein the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all channels.

[0071] Optionally, the above processing module 602 can also be used to: calculate the parameter matrix sum of the convolution kernel parameters of each channel among the convolution kernel parameters of all channels; replace the convolution kernel whose parameter matrix sum among the convolution kernel parameters of all channels is less than or equal to the second threshold with a zero convolution kernel.

[0072] Optionally, the above-mentioned target group convolution kernel parameters include convolution kernel parameters of all positions in different channels.

[0073] Optionally, the above-mentioned target group convolution kernel parameters include convolution kernel parameters at the same position or multiple positions in different channels.

[0074] In the embodiment of the present invention, in the embodiment of the present invention, since each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters, the convolution kernel parameters in the convolution layer can be greatly compressed, thereby saving storage and computing costs in the image processing process.

[0075] Figure 7 An example of a physical structure diagram of an electronic device is shown in FIG. Figure 7As shown, the electronic device may include: a processor 1010, a communication interface 1020, a memory 1030 and a communication bus 1040, wherein the processor 1010, the communication interface 1020 and the memory 1030 communicate with each other through the communication bus 1040. The processor 1010 may call the logic instructions in the memory 1030 to execute a high-precision compression method applicable to a hardware circuit, the method comprising: acquiring a target image; inputting the target image into a convolutional neural network model; outputting an image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolutional layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters.

[0076] In addition, the logic instructions in the above-mentioned memory 1030 can be implemented in the form of software functional units and can be stored in a computer-readable storage medium when sold or used as an independent product. Based on such an understanding, the technical solution of the present invention, in essence, or the part that contributes to the prior art or the part of the technical solution, can be embodied in the form of a software product, which is stored in a storage medium and includes several instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to perform all or part of the steps of the method described in each embodiment of the present invention. The aforementioned storage medium includes: various media that can store program codes, such as a USB flash drive, a mobile hard disk, a read-only memory (ROM), a random access memory (RAM), a disk or an optical disk.

[0077] On the other hand, the present invention also provides a computer program product, which includes a computer program stored on a non-transitory computer-readable storage medium, and the computer program includes program instructions. When the program instructions are executed by a computer, the computer can execute the high-precision compression method suitable for hardware circuits provided by the above methods, and the method includes: obtaining a target image; inputting the target image into a convolutional neural network model; outputting an image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one set of convolution kernel parameters as convolution kernel shared parameters.

[0078] On the other hand, the present invention also provides a non-transitory computer-readable storage medium having a computer program stored thereon, which, when executed by a processor, is implemented to execute the above-mentioned high-precision compression methods suitable for hardware circuits, the methods comprising: acquiring a target image; inputting the target image into a convolutional neural network model; outputting an image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one set of convolution kernel parameters as convolution kernel shared parameters.

[0079] The device embodiments described above are merely illustrative, wherein the units described as separate components may or may not be physically separated, and the components displayed as units may or may not be physical units, that is, they may be located in one place, or they may be distributed on multiple network units. Some or all of the modules may be selected according to actual needs to achieve the purpose of the scheme of this embodiment. Ordinary technicians in this field can understand and implement it without paying creative labor.

[0080] Through the description of the above implementation methods, those skilled in the art can clearly understand that each implementation method can be implemented by means of software plus a necessary general hardware platform, and of course, it can also be implemented by hardware. Based on this understanding, the above technical solution is essentially or the part that contributes to the prior art can be embodied in the form of a software product, and the computer software product can be stored in a computer-readable storage medium, such as ROM / RAM, a disk, an optical disk, etc., including a number of instructions for a computer device (which can be a personal computer, a server, or a network device, etc.) to execute the methods described in each embodiment or some parts of the embodiments.

[0081] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or make equivalent replacements for some of the technical features therein. However, these modifications or replacements do not deviate the essence of the corresponding technical solutions from the spirit and scope of the technical solutions of the embodiments of the present invention.

Claims

1. A high-precision compression method suitable for hardware circuits, characterized in that: include: Get the target image; Inputting the target image into a convolutional neural network model; Outputting the image category corresponding to the target image; The convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters; Before acquiring the target image, the method further includes: Obtain convolution kernel parameters of all channels in a first convolution layer, where the first convolution layer is any convolution layer in the convolutional neural network model; Selecting convolution kernel parameters of two channels in turn from the convolution kernel parameters of all the channels for pairwise comparison, to obtain at least one group of convolution kernel parameters whose similarity difference value is less than or equal to the first threshold, each group of convolution kernel parameters includes convolution kernel parameters of at least two channels; Performing a first operation on the convolution kernel of the channel corresponding to the at least one set of convolution kernel parameters; The first operation includes: determining the target convolution kernel parameter as the convolution kernel shared parameter of the channel corresponding to the target group convolution kernel parameter, the target convolution kernel parameter is one of the target group convolution kernel parameters, and the target group convolution kernel parameter is any one of the at least one group of convolution kernel parameters.

2. The high-precision compression method applicable to hardware circuits according to claim 1, characterized in that: The step of sequentially selecting convolution kernel parameters of two channels from the convolution kernel parameters of all channels for pairwise comparison to obtain at least one set of convolution kernel parameters whose similarity difference value is less than or equal to a first threshold value includes: Normalizing the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel; Subtracting the processed convolution kernel parameters of the first channel from the convolution kernel parameters of the second channel to obtain a target parameter matrix, and calculating the sum of the target parameter matrices; If the sum of the target parameter matrices is less than or equal to the first threshold, determining the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel as convolution kernel parameters in the same group; The convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all the channels.

3. The high-precision compression method applicable to hardware circuits according to claim 1 or 2, characterized in that: The method further comprises: Calculate the parameter matrix sum of the convolution kernel parameters of each channel among the convolution kernel parameters of all channels; The parameter matrix of the convolution kernel parameters of all channels and the convolution kernels that are less than or equal to the second threshold are replaced with zero convolution kernels.

4. The high-precision compression method applicable to hardware circuits according to claim 3, characterized in that: The target group of convolution kernel parameters includes convolution kernel parameters at all positions in different channels.

5. The high-precision compression method applicable to hardware circuits according to claim 3, characterized in that: The target group of convolution kernel parameters includes convolution kernel parameters at the same position or multiple positions in different channels.

6. A high-precision compression device suitable for hardware circuits, characterized in that: include: Acquisition module and processing module; The acquisition module is used to acquire the target image; The processing module is used to input the target image into a convolutional neural network model; and output the image category corresponding to the target image; wherein the convolutional neural network model is a compressed neural network model obtained by training based on images of different categories, and each convolution layer of the convolutional neural network model includes at least one group of convolution kernel parameters as convolution kernel shared parameters; The acquisition module is further used to acquire convolution kernel parameters of all channels in a first convolution layer before acquiring the target image, where the first convolution layer is any convolution layer in the convolutional neural network model; The processing module is also used to select the convolution kernel parameters of two channels in turn from the convolution kernel parameters of all the channels for pairwise comparison to obtain at least one group of convolution kernel parameters whose similarity difference value is less than or equal to the first threshold, and each group of convolution kernel parameters includes the convolution kernel parameters of at least two channels; and perform a first operation on the convolution kernel of the channel corresponding to the at least one group of convolution kernel parameters; the first operation includes: determining the target convolution kernel parameters as the convolution kernel shared parameters of the channel corresponding to the target group convolution kernel parameters, the target convolution kernel parameters are one of the target group convolution kernel parameters, and the target group convolution kernel parameters are any one of the at least one group of convolution kernel parameters.

7. The high-precision compression device suitable for hardware circuit according to claim 6, characterized in that: The processing module is specifically used to: normalize the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel; subtract the processed convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel to obtain a target parameter matrix, and calculate the sum of the target parameter matrices; if the sum of the target parameter matrices is less than or equal to the first threshold, determine the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel as convolution kernel parameters in the same group; wherein the convolution kernel parameters of the first channel and the convolution kernel parameters of the second channel are any two selected from the convolution kernel parameters of all channels.

8. An electronic device comprising a memory, a processor, and a computer program stored in the memory and executable on the processor, wherein: When the processor executes the program, the steps of the high-precision compression method applicable to a hardware circuit according to any one of claims 1 to 5 are implemented.

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