A serial port circuit

Abstract

The present invention relates to a serial port circuit, and belongs to the technical field of serial port communication equipment. The serial port circuit comprises: a NAND gate circuit, the input end of the NAND gate circuit comprises a first input end and a second input end, the first input end is used to connect the read-write control signal of the controller, the second input end is used to connect the serial port control signal of the controller, the output end of the NAND gate circuit comprises an RS485 receiving enable output end, an RS485 transmitting enable output end, and an RS232 transmitting and receiving enable output end; at least one RS485 transceiver, each RS485 transceiver comprises an RS485 receiver and an RS485 transmitter, the enable end of each RS485 receiver is connected to the RS485 receiving enable output end, and the enable end of each RS485 transmitter is connected to the RS485 transmitting enable output end; at least one RS232 transceiver, the enable end of each RS232 transceiver is connected to the RS232 transmitting and receiving enable output end. The RS485 transceiver and the RS232 transceiver in the serial port circuit of the present invention can share one external interface to realize RS485 communication and RS232 communication, thereby greatly reducing the number of external interfaces.

Description

Technical Field

[0001] The invention relates to a serial port circuit, belonging to the technical field of serial port communication equipment. Background Art

[0002] Power system distribution terminals and low-voltage products must have a certain number of RS485 and RS232 interfaces to facilitate the connection of peripherals. In order to reduce the number of serial ports, the existing serial port RS485 and RS232 designs are mainly implemented through the following three methods:

[0003] 1. Design an external serial port interface including an RS485 and RS232 communication interface. The microcontroller needs to have two UART interfaces. The RS485 and RS232 communication interfaces are connected to the two UART interfaces of the microcontroller respectively. However, this method requires the use of two UART interfaces of the microcontroller for one external serial port interface, which requires the number of UART interfaces of the microcontroller to be doubled than the actual demand, which causes inconvenience in chip selection.

[0004] 2. Design an external serial port interface including an RS485 and RS232 communication interface. The microcontroller needs to have a UART interface. The corresponding RS485 or RS232 data transmission channel connected to the microcontroller is selected through the jumper to the corresponding communication interface. Although this method uses only one microcontroller UART interface for an external serial port interface, the jumper needs to be manually operated. In some field use environments, the controller housing needs to be opened for jumpering, which has the disadvantages of low reliability and inconvenience.

[0005] 3. Design an external serial port interface including an RS485 and RS232 communication interface. The microcontroller needs to have a UART interface. The corresponding RS485 or RS232 data transmission channel connected to the microcontroller is selected through software to the corresponding communication interface. Although this method omits the jumper operation based on method 2, the external communication interface cannot be combined, occupies more external interfaces, and has a large volume.

[0006] Therefore, it is necessary to propose a technical solution to reduce the serial port circuit of the external interface. Summary of the invention

[0007] The purpose of this application is to provide a serial port circuit and propose an effective technical solution for reducing the number of external interfaces.

[0008] To achieve the above purpose, the present application proposes a technical solution of a serial port circuit, the serial port circuit comprising:

[0009] The NAND gate circuit comprises a first input terminal and a second input terminal, wherein the first input terminal is used to connect the read / write control signal of the controller, the second input terminal is used to connect the serial port control signal of the controller, and the output terminal of the NAND gate circuit comprises an RS485 receiving enable output terminal, an RS485 sending enable output terminal, and an RS232 sending / receiving enable output terminal; the NAND gate circuit is used to realize the following functions: when the read / write control signal and the serial port control signal are both at a high level, the RS485 receiving enable output terminal outputs a low level; when at least one of the read / write control signal and the serial port control signal is at a low level, the RS485 receiving enable output terminal outputs a high level; when the read / write control signal is at a low level and the serial port control signal is at a high level, the RS485 sending enable output terminal outputs a high level. The enable output terminal outputs a high level; when the read / write control signal and the serial port control signal are both high or both low, or when the read / write control signal is high and the serial port control signal is low, the RS485 transmit enable output terminal outputs a low level; the high / low level output by the RS232 receive enable output terminal is consistent with the serial port control signal, and the high / low level output by the RS232 transmit enable output terminal is opposite to the serial port control signal; at least one RS485 transceiver, each RS485 transceiver includes an RS485 receiver and an RS485 transmitter, the enable terminal of each RS485 receiver is connected to the RS485 receive enable output terminal, and the enable terminal of each RS485 transmitter is connected to the RS485 transmit enable output terminal;

[0010] At least one RS232 transceiver, the enable end of each RS232 transceiver is connected to the RS232 transceiver enable output end.

[0011] The technical solution of the serial port circuit of the present invention has the beneficial effect that: the present invention controls the enable end of the RS485 transceiver and the RS232 transceiver through the logic of the NAND gate circuit, and when the RS485 transceiver is in the state of receiving enable and sending disable or receiving disable and sending enable, the RS232 transceiver is in a high impedance state, blocking the communication of the RS232 transceiver; when the RS232 transceiver is in the state of receiving enable and sending enable, the RS485 transceiver is in a high impedance state, blocking the communication of the RS485 transceiver. Since the logic control of the NAND gate of the present invention can make the RS485 transceiver and the RS232 transceiver switch communication, the RS485 transceiver and the RS232 transceiver can share an external interface to realize RS485 communication and RS232 communication, greatly reducing the number of external interfaces and reducing the volume of equipment.

[0012] Furthermore, the RS232 transceiver enable output terminal includes an RS232 receive enable output terminal and an RS232 send enable output terminal, the RS232 transceiver includes an RS232 receiver and an RS232 transmitter, the enable terminal of each RS232 receiver is connected to the RS232 receive enable output terminal, and the enable terminal of each RS232 transmitter is connected to the RS232 send enable output terminal. When the serial port control signal is at a high level, the RS232 receive enable output terminal outputs a high level and the RS232 send enable output terminal outputs a low level; when the serial port control signal is at a low level, the RS232 receive enable output terminal outputs a low level and the RS232 send enable output terminal outputs a high level.

[0013] Furthermore, the RS232 transceiver enable output end is a port, the RS232 transceiver includes an RS232 receiver and an RS232 transmitter, the enable ends of the RS232 receiver and the RS232 transmitter are both connected to the RS232 transceiver enable output end, when the serial port control signal is a high level, the RS232 transceiver enable output end outputs a high level; when the serial port control signal is a low level, the RS232 transceiver enable output end outputs a low level.

[0014] Furthermore, the NAND gate circuit includes a first NAND gate, a second NAND gate, a third NAND gate, and a fourth NAND gate, the input end of the first NAND gate is connected to the read-write control end and the serial port control end of the controller, and the output end is connected to the enable end of each RS485 receiver; the input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, the output end is connected to the input end of the third NAND gate, and the output end of the third NAND gate is connected to the enable end of each RS485 transmitter; the input end of the fourth NAND gate is connected to the serial port control end of the controller, and the output end of the fourth NAND gate is connected to the enable end of each RS232 transmitter; the enable end of each RS232 receiver is connected to the serial port control end of the controller; the read-write control end is used to output a read-write control signal, and the serial port control end is used to output a serial port control signal.

[0015] Furthermore, the NAND gate circuit includes a first NAND gate, a second NAND gate and a third NAND gate, the input end of the first NAND gate is connected to the read-write control end and the serial port control end of the controller, and the output end is connected to the enable end of each RS485 receiver; the input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, and the output end is connected to the input end of the third NAND gate, and the output end of the third NAND gate is connected to the enable end of each RS485 transmitter; the enable end of each RS232 transceiver is connected to the serial port control end of the controller; the read-write control end is used to output the read-write control signal, and the serial port control end is used to output the serial port control signal.

[0016] Furthermore, an RS485 transceiver and an RS232 transceiver in the serial port circuit form a group of transceivers, and the communication ends of each group of transceivers are collectively connected to a communication end of the controller.

[0017] Furthermore, in the serial port circuit, one RS485 transceiver and one RS232 transceiver form a group of transceivers, and the bus ends of each group of transceivers are collectively connected to an external interface.

[0018] Furthermore, each external interface is integrated into one wiring terminal.

[0019] Furthermore, the RS485 transceiver includes a THVD1450E chip.

[0020] Furthermore, the RS232 transceiver includes a MAX3221E chip. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] Figure 1 It is a schematic diagram of the serial port circuit of the present invention;

[0022] Figure 2 It is a circuit structure diagram of the serial port circuit of the present invention. DETAILED DESCRIPTION

[0023] Serial port circuit embodiment 1:

[0024] The main idea of ​​the present invention is that, in order to reduce the external interface of the serial communication device, the present invention can realize the selective communication of the external interface RS485 and RS232 through a NAND gate circuit connected to a controller, an RS485 transceiver, an RS232 transceiver, and an external interface, wherein the communication type is controlled by the controller, the input end of the NAND gate circuit is connected to the serial port control end and the read-write control end of the controller, the output end of the NAND gate is connected to the enable end of the RS485 transceiver and the RS232 transceiver, and the switching of the external interface communication type is realized by controlling the RS485 transceiver or the RS232 transceiver to be in a high-impedance state or a conducting state, that is, the RS485 transceiver or the RS232 transceiver shares an external interface to realize the RS485 communication and RS232 communication of the device.

[0025] Specifically, the serial port circuit is as follows Figure 1 , 2As shown, it includes a NAND gate circuit, two RS485 transceivers, two RS232 transceivers, and two external interfaces. The two RS485 transceivers are a first RS485 transceiver and a second RS485 transceiver, and the RS485 transceiver includes an RS485 receiver and an RS485 transmitter; the two RS232 transceivers are a first RS232 transceiver and a second RS232 transceiver, and the RS232 transceiver includes an RS232 receiver and an RS232 transmitter. The RS485 transceiver includes a THVD1450E chip, and the RS232 transceiver includes a MAX3221E chip. The two external interfaces are a first external interface and a second external interface.

[0026] The first external interface and the second external interface are integrated in a wiring terminal CN1, such as Figure 2 As shown, the first external interface is an interface corresponding to pin 1 and pin 2 of the wiring terminal CN1, and the second external interface is an interface corresponding to pin 4 and pin 5 of the wiring terminal CN1. Of course, as other implementations, each external interface can also be provided with a separate wiring terminal, and the present invention is not limited to this.

[0027] The NAND gate circuit is a NAND gate circuit with two input terminals, including a THVD1450E chip. The NAND gate circuit includes two input terminals and four output terminals; the two input terminals are respectively a first input terminal and a second input terminal, and the first input terminal is connected to the read-write control terminal of the controller CPU (hereinafter referred to as the controller) for receiving the read-write control signal output by the controller The second input terminal is connected to the serial port control terminal of the controller and is used to receive the serial port control signal output by the controller. The four output terminals are RS485 receive enable output terminal, RS485 transmit enable output terminal, RS232 receive enable output terminal and RS232 transmit enable output terminal. The RS485 receive enable output terminal is used to output the RS485 receive enable signal. The RS485 transmit enable output terminal is used to output the RS485 transmit enable signal DE, and the RS232 receive enable output terminal is used to output the RS232 receive enable signal RS232 send enable output terminal is used to output RS232 send enable signal

[0028] The enable end of each RS485 receiver is connected to the RS485 receive enable output end, the enable end of each RS485 transmitter is connected to the RS485 transmit enable output end, the enable end of each RS232 receiver is connected to the RS232 receive enable output end, and the enable end of each RS232 transmitter is connected to the RS232 transmit enable output end.

[0029] Specifically, the NAND gate circuit includes a first NAND gate, a second NAND gate, a third NAND gate, and a fourth NAND gate.

[0030] The input end of the first NAND gate is connected to the read-write control end of the controller and the serial port control end of the controller, and the output end (i.e., the RS485 receiving enable output end) is connected to the enable end of each RS485 receiver;

[0031] The input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, and the output end is connected to the input end of the third NAND gate, and the output end of the third NAND gate (i.e., the RS485 transmission enable output end) is connected to the enable end of each RS485 transmitter;

[0032] The input end of the fourth NAND gate is connected to the serial port control end, and the output end of the fourth NAND gate (i.e., the RS232 transmit enable output end) is connected to the enable end of each RS232 transmitter; the enable end of each RS232 receiver is connected to the serial port control end of the controller (i.e., the RS232 receive enable output end).

[0033] In the serial port circuit, an RS485 transceiver and an RS232 transceiver form a group of transceivers, and the communication ends of each group of transceivers are collectively connected to a communication end of the controller, and the bus ends of each group of transceivers are collectively connected to an external interface. Specifically, the communication ends of the first RS485 transceiver and the first RS232 transceiver are collectively connected to the first communication end of the controller (including input RXD1 and output TXD1), and the communication ends of the second RS485 transceiver and the second RS232 transceiver are collectively connected to the second communication end of the controller (including input RXD2 and output TXD2). The bus ends of the first RS485 transceiver and the first RS232 transceiver are connected to the first external interface (including RSRS485A1 / RSRS232RXD1, RSRS485B1 / RSRS232TXD1) after being combined, and the bus ends of the second RS485 transceiver and the second RS232 transceiver are connected to the second external interface (including RSRS485A2 / RSRS232RXD2, RSRS485B2 / RSRS232TXD2) after being combined.

[0034] The logic of the NAND gate is: when the read-write control signal With serial control signal When both are high level 1, the RS485 receive enable output terminal outputs the RS485 receive enable signal Low level 0, otherwise, RS485 receives the enable signal Is high level 1; when the read and write control signal Low level 0, serial port control signal When it is high level 1, the RS485 transmit enable signal DE output from the RS485 transmit enable output terminal is high level 1. In other cases, the RS485 transmit enable signal DE is low level 0. The RS232 receive enable signal output from the RS232 receive enable output terminal is low level 0. High / low level and serial port control signal Same; the signal output from the output terminal of the fourth NAND gate is High / low level and serial port control signal on the contrary.

[0035] The logic of the specific NAND gate circuit is shown in Table 1:

[0036] Table 1 Logic of NAND gate circuit

[0037]

[0038] The present invention realizes the switching principle of RS485 communication and RS232 communication as follows:

[0039] When RS485 communication is required and in monitoring state: the controller controls Set high level 1 to control Set high level 1, then is low level 0, DE is low level 0, After passing through the NOT gate, it becomes a high level 1, which enables the RS485 transceiver to accept and disables transmission (the RS485 transceiver is turned on at a high level); at the same time, Low level 0, =High level 1, because the enable end of the RS232 receiver is high level, when the RS232 transmitter is low level, the RS232 transceiver is in high impedance state (the control structure of the RS232 transmitter is more complicated, but only one enable end can control the state of the RS232 transceiver, so the attached Figure 2 The structure of the MAX3221E transmitter is simplified in the figure, and only one control enable terminal is drawn. Therefore, the RS232 transceiver is a bidirectional output high impedance at this time, which does not affect the RS485 transceiver communication.

[0040] When RS485 communication is required and in the sending state: the controller controls Set high level 1 to control Set to low level 0, then is high level, DE is high level, After passing through the NOT gate, it becomes a low level 0, which enables the RS485 transceiver to send and disables reception. Low level 0, When it is high level 1, the RS232 transceiver is bidirectional output high impedance and does not affect the communication of RS485 transceiver.

[0041] When RS232 communication is required and in full-duplex mode: the controller controls Set low level 0, control Set high or low level 1 / 0, then is high level 1, DE is low level 0, After passing through the NOT gate, it becomes a low level 0, making the RS485 transceiver a bidirectional output high impedance; at the same time, High level 1, It is low level 0. Since the enable end of the RS232 receiver is at a low level and the RS232 transmitter is at a high level, the RS232 transceiver is in a bidirectional conduction state. Therefore, at this time, the RS232 transceiver is in a bidirectional output enable state.

[0042] The UART interface of the controller (a communication terminal is set in the UART interface), the serial port control terminal and the read-write control terminal are connected to the serial port circuit (i.e., the digital circuit) proposed by the present invention. Through the control of the serial port control signal and the read-write control signal of the controller, when the RS485 transceiver is turned on and the RS232 transceiver is in a high-impedance state, the TTL signal of the controller can be converted into an RS485 signal and transmitted to the external interface, or the RS485 signal received from the external interface is input into the controller, and the RS232 signal is blocked at the same time; when the RS232 transceiver is turned on and the RS485 transceiver is in a high-impedance state, the TTL signal can be converted into an RS232 signal and transmitted to the external interface, or the RS232 signal received from the external interface is input into the controller, and the RS485 signal is blocked at the same time.

[0043] The present invention does not limit the specific implementation forms of the RS485 transceiver, RS232 transceiver, and NAND gate circuit, as long as the corresponding functions can be realized.

[0044] The present invention realizes that the communication mode can be changed without disassembling the device (the device is a serial communication device such as a power distribution network automation remote terminal, a low-voltage protection measurement and control device, etc.), which is safe and reliable; the external communication interface is merged, the terminals are reduced, and the space is saved; and a group of communication ends of the serial port circuit are connected to the UART interface of a controller, the number of UART interfaces is required to be minimized, and the device design scheme is optimized.

[0045] Serial port circuit embodiment 2:

[0046] The serial port circuit proposed in this embodiment is different from that in Embodiment 1 in the number of NAND gates in the NAND gate circuit. In view of the particularity of the enable control of the MAX3221E chip mentioned above, when the enable end of the RS232 receiver is at a high level and the RS232 transmitter is at a low level, the RS232 transceiver is in a high impedance state. When the enable end of the RS232 receiver is at a low level and the RS232 transmitter is at a high level, the RS232 transceiver is in a bidirectional conduction state. Therefore, a fourth NAND gate is required for enabling the RS232 transceiver. In this embodiment, the enable end of the RS232 transmitter does not need to add an enable signal, and the enable control of the RS232 transceiver can be completed by using the same enable signal as the RS232 receiver, that is, the enable end of the RS232 transmitter and the enable end of the RS232 receiver are both connected to the RS232 receive enable output end to receive the output RS232 receive enable signal. No fourth NAND gate is needed.

[0047] Specifically, the NAND gate circuit includes a first NAND gate, a second NAND gate and a third NAND gate.

[0048] The input end of the first NAND gate is connected to the read-write control end and the serial port control end of the controller, and the output end is connected to the enable end of each RS485 receiver;

[0049] The input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, and the output end is connected to the input end of the third NAND gate. The output end of the third NAND gate is connected to the enable end of each RS485 transmitter; the enable end of each RS232 transceiver (including RS232 receiver and RS232 transmitter) is connected to the serial port control end of the controller.

[0050] Since there is only one RS232 enable output terminal, the RS232 receive enable output terminal and the RS232 transmit enable output terminal are collectively referred to as the RS232 transceiver enable output terminal. When the serial port control signal is high, the RS232 transceiver enable output terminal outputs a high level; when the serial port control signal is low, the RS232 transceiver enable output terminal outputs a low level.

[0051] Based on the first embodiment, this embodiment reduces the number of NAND gates, simplifies the circuit structure, and is more practical.

Claims

1. A serial port circuit, characterized in that: include: The NAND gate circuit includes a first input terminal and a second input terminal, the first input terminal is used to connect the read-write control signal of the controller, the second input terminal is used to connect the serial port control signal of the controller, and the output terminal of the NAND gate circuit includes an RS485 receive enable output terminal, an RS485 send enable output terminal, and an RS232 send-receive enable output terminal; the NAND gate circuit is used to realize the following functions: when the read-write control signal and the serial port control signal are both high level, the RS485 receive enable output terminal outputs a low level, and when the read-write control signal When at least one of the read / write control signal and the serial port control signal is low, the RS485 receive enable output terminal outputs a high level; when the read / write control signal is low and the serial port control signal is high, the RS485 transmit enable output terminal outputs a high level; when the read / write control signal and the serial port control signal are both high or both low, or when the read / write control signal is high and the serial port control signal is low, the RS485 transmit enable output terminal outputs a low level; the high / low level output by the RS232 receive enable output terminal is consistent with the serial port control signal, and the high / low level output by the RS232 transmit enable output terminal is opposite to the serial port control signal; At least one RS485 transceiver, each RS485 transceiver includes an RS485 receiver and an RS485 transmitter, the enable end of each RS485 receiver is connected to the RS485 receive enable output end, and the enable end of each RS485 transmitter is connected to the RS485 transmit enable output end; At least one RS232 transceiver, the enable end of each RS232 transceiver is connected to the RS232 transceiver enable output end.

2. The serial port circuit according to claim 1, characterized in that: The RS232 transceiver enable output terminal includes an RS232 receive enable output terminal and an RS232 send enable output terminal, the RS232 transceiver includes an RS232 receiver and an RS232 transmitter, the enable terminal of each RS232 receiver is connected to the RS232 receive enable output terminal, the enable terminal of each RS232 transmitter is connected to the RS232 send enable output terminal, when the serial port control signal is at a high level, the RS232 receive enable output terminal outputs a high level, and the RS232 send enable output terminal outputs a low level; when the serial port control signal is at a low level, the RS232 receive enable output terminal outputs a low level, and the RS232 send enable output terminal outputs a high level.

3. The serial port circuit according to claim 1, characterized in that: The RS232 transceiver enable output end is a port, and the RS232 transceiver includes an RS232 receiver and an RS232 transmitter. The enable ends of the RS232 receiver and the RS232 transmitter are both connected to the RS232 transceiver enable output end. When the serial port control signal is at a high level, the RS232 transceiver enable output end outputs a high level; when the serial port control signal is at a low level, the RS232 transceiver enable output end outputs a low level.

4. The serial port circuit according to claim 2, characterized in that: The NAND gate circuit comprises a first NAND gate, a second NAND gate, a third NAND gate and a fourth NAND gate, wherein the input end of the first NAND gate is connected to the read-write control end and the serial port control end of the controller, and the output end is connected to the enable end of each RS485 receiver; the input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, and the output end is connected to the input end of the third NAND gate, and the output end of the third NAND gate is connected to the enable end of each RS485 transmitter; the input end of the fourth NAND gate is connected to the serial port control end of the controller, and the output end of the fourth NAND gate is connected to the enable end of each RS232 transmitter; the enable end of each RS232 receiver is connected to the serial port control end of the controller; the read-write control end is used to output a read-write control signal, and the serial port control end is used to output a serial port control signal.

5. The serial port circuit according to claim 1 or 3, characterized in that: The NAND gate circuit comprises a first NAND gate, a second NAND gate and a third NAND gate, wherein the input end of the first NAND gate is connected to the read-write control end and the serial port control end of the controller, and the output end is connected to the enable end of each RS485 receiver; the input end of the second NAND gate is connected to the output end of the first NAND gate and the serial port control end of the controller, and the output end is connected to the input end of the third NAND gate, and the output end of the third NAND gate is connected to the enable end of each RS485 transmitter; the enable end of each RS232 transceiver is connected to the serial port control end of the controller; the read-write control end is used to output a read-write control signal, and the serial port control end is used to output a serial port control signal.

6. The serial port circuit according to claim 1, characterized in that: In the serial port circuit, one RS485 transceiver and one RS232 transceiver form a group of transceivers, and the communication ends of each group of transceivers are connected to one communication end of the controller.

7. The serial port circuit according to claim 1, characterized in that: In the serial port circuit, an RS485 transceiver and an RS232 transceiver form a group of transceivers, and the bus ends of each group of transceivers are connected to an external interface.

8. The serial port circuit according to claim 7, characterized in that: Each external interface is integrated into a terminal block.

9. The serial port circuit according to claim 1, characterized in that: The RS485 transceiver includes a THVD1450E chip.

10. The serial port circuit according to claim 2, characterized in that: The RS232 transceiver includes a MAX3221E chip.

Images