A three-phase electric energy meter field tester with resistance to harmonic interference

Abstract

The invention discloses a harmonic interference resistant three-phase electric energy meter field tester, comprising: a three-phase clamp current sensor, a three-phase clamp voltage sensor, a signal filtering and amplifying circuit, an A / D converter, a standard meter reference voltage and reference current input interface, a shaping circuit, a standard crystal oscillator, an FPGA frequency multiplication data acquisition unit, a frequency division phase-locked loop, a CPU data processing unit, an LED display output circuit and a power supply unit. The invention adds a frequency division phase-locked loop between the A / D converter and the FPGA frequency multiplication data acquisition unit, and uses the phase-locked loop to keep the frequency phase consistent with the input signal of the synchronous acquisition pulse, so as to realize the adaptability and anti-interference of frequency tracking. Under the condition that the phase difference between the voltage and current signals of the tested running electric energy meter and the voltage and current signals of the standard meter is constant, the frequency must be equal, and the frequency division feedback loop is used to feedback and adjust the output, so as to keep the output digital signal undistorted, thereby improving the anti-harmonic and anti-interference capabilities.

Description

Technical Field

[0001] The invention belongs to the technical field of electric energy meter calibrators, and in particular relates to a three-phase electric energy meter field calibrator capable of resisting harmonic interference. Background Art

[0002] The electric energy meter in actual operation may have defects or faults of different degrees and types due to the operating environment, time and electric energy meter version. For example, internal faults of the electric energy meter, electric energy meter tolerance, voltage circuit pressure loss or current circuit current loss or external faults will have a certain impact on the measurement accuracy of the smart meter, thereby causing certain losses to the existing electricity statistics and accounting. According to the requirements of the current asset life cycle management cycle in my country, the regulations and systems for electric energy meter calibration and operation sampling are currently being implemented, mainly including laboratory preparation and on-site electric energy meter operation sampling. The existing laboratory sampling simulates the voltage, current and frequency of the electric energy meter in the journey working environment, and inputs the electrical quantity information into the standard electric energy meter and the calibrated electric energy meter respectively to obtain the error characteristics of the electric energy meter itself. This is equivalent to offline calibration, which cannot fully meet the actual working environment of the electric energy meter calibration site. Therefore, it is also necessary to conduct on-site online calibration to reflect the real error characteristics of the electric energy meter. Online calibration is that the operation and maintenance personnel of the metering device carry a portable electric energy meter calibrator to the site for power-off calibration.

[0003] The actual operating environment and conditions of the running electric energy meter are not necessarily the same, and the degree of influence by external factors varies. Whether the metering accuracy of the electric energy meter can be guaranteed under various complex conditions such as a large number of harmonics, interharmonics, spike pulses, attenuated DC and nonlinear loads connected to the power grid, through online verification, the experimental data obtained is in line with reality and can truly reflect the error characteristics of the electric energy meter, thus providing important support for the accurate judgment of the metering performance of the electric energy meter. However, due to the interference of temperature, humidity, frequency, harmonics and the susceptibility to interference from natural conditions such as weather, the on-site online verification is subject to interference.

[0004] Although the portable calibrator has a certain correction factor, the correction factor is obtained by simulating the data in the laboratory under normal power frequency, which cannot fully meet the needs of on-site work. In addition, the operation sampling table is a must for the daily work of the power supply station every month, so the research on the anti-harmonic interference calibrator has important practical significance. Summary of the invention

[0005] The present invention overcomes the deficiencies of the prior art and aims to solve the technical problem of providing a three-phase electric energy meter field tester capable of improving the resistance to suppressing harmonic interference.

[0006] In order to solve the above technical problems, the technical solution adopted by the present invention is: a three-phase electric energy meter field tester with resistance to harmonic interference, including: a three-phase clamp current sensor, a three-phase clamp voltage sensor, a signal filtering and amplifying circuit, an A / D converter, a standard meter reference voltage and reference current input interface, a shaping circuit, a standard crystal oscillator, an FPGA frequency multiplication data acquisition unit, a frequency division phase-locked loop, a CPU data processing unit, an LED display output circuit and a power supply unit;

[0007] The input end of the three-phase clamp current sensor and the input end of the three-phase clamp voltage sensor are respectively connected to the current end and the voltage end of the ammeter; the output end of the three-phase clamp current sensor and the output end of the three-phase clamp voltage sensor are respectively connected to the input end of the signal filtering and amplifying circuit and the input end of the shaping circuit; the output end of the signal filtering and amplifying circuit, the standard meter reference voltage and reference current input interface are respectively connected to the input end of the A / D converter; the output end of the shaping circuit and the standard crystal oscillator are respectively connected to the input end of the FPGA frequency multiplication data acquisition unit; the output end of the FPGA frequency multiplication data acquisition unit is connected to the LED display output circuit through the CPU data processing unit; the FPGA frequency multiplication data acquisition unit is bidirectionally connected to the frequency division phase-locked loop; the frequency division phase-locked loop is bidirectionally connected to the A / D converter; the power supply unit supplies power to the CPU data processing unit and peripheral circuits.

[0008] Furthermore, the frequency division phase-locked loop includes a dual second-order generalized integrator frequency-locked loop, a delayed signal elimination filter and a sliding average filter. The input end of the dual second-order generalized integrator frequency-locked loop is bidirectionally connected to the FPGA frequency multiplication data acquisition unit, and the output end of the dual second-order generalized integrator frequency-locked loop is connected to the input end of the A / D converter in turn through the delayed signal elimination filter and the sliding average filter.

[0009] Furthermore, the power supply unit includes a current source unit, an LD light source, a signal processing unit, a waveform generator, a photocell, a DC-DC converter, a temperature control protection and external temperature detection circuit, a drive and protection circuit and a backup power supply unit. The external power supply sequentially passes through the current source unit, the LD light source, the signal processing unit, the waveform generator, the photocell and the DC-DC converter to power the peripheral circuit. The CPU data processing unit is bidirectionally connected to the temperature control protection and external temperature detection circuit. The CPU data processing unit is connected to the LD light source through the drive and protection circuit. The CPU data processing unit powers the peripheral circuit through the backup power supply unit.

[0010] Furthermore, the frequency division phase locked loop also includes a phase detector and a feedback loop, and the phase detector is connected to the feedback loop in sequence through a double second-order generalized integrator frequency locked loop, a delayed signal elimination filter, and a sliding average filter.

[0011] Furthermore, the feedback loop includes a frequency feedback loop and a phase feedback loop.

[0012] Furthermore, it also includes a built-in storage unit, which is connected to the output end of the CPU data processing unit.

[0013] Preferably, the shaping circuit comprises a voltage amplifier and a Schmitt trigger of model LMC662CN, and the voltage amplifier and the Schmitt trigger are electrically connected.

[0014] Preferably, a sampling resistor is further included, and the three-phase clamp current sensor is respectively connected to the input end of the signal filtering and amplifying circuit and the input end of the shaping circuit through the sampling resistor.

[0015] Preferably, it also includes a keyboard, which is connected to the input end of the CPU data processing unit.

[0016] Preferably, the signal processing unit includes amplification and filtering processing for the electrical signal.

[0017] Compared with the prior art, the present invention has the following beneficial effects:

[0018] 1. The present invention discloses a three-phase electric energy meter field tester with resistance to harmonic interference. A three-phase clamp current sensor and a three-phase clamp voltage sensor are directly connected to the current terminal and the voltage terminal of the meter to collect voltage and current signals of the meter under test. A CPU data processing unit processes the collected data and transmits the data to an LED display output circuit for display. A shaping circuit shapes the collected signal into pulses of the same frequency. A sampling time reference is provided by a standard crystal oscillator for testing clock errors installed in a keypad of the tester. Within a sampling period, an A / D converter is controlled to perform analog-to-digital conversion after being processed by an FPGA frequency multiplication data acquisition unit. A frequency division phase-locked loop is inserted between the A / D converter and the FPGA frequency multiplication data acquisition unit. The frequency division phase-locked loop is used to extract the same pulse signal to achieve the purpose of suppressing harmonic interference. At the same time, a multiplication feedback mechanism is used to calculate the phase difference between the reference pulse and the collected pulse, so that a better filtering effect can be obtained.

[0019] 2. The present invention adds a frequency-dividing phase-locked loop between the A / D converter and the FPGA frequency-multiplying data acquisition unit, and uses the phase-locked loop to keep the frequency phase consistent with the input signal of the synchronous acquisition pulse, thereby realizing the adaptability and anti-interference of frequency tracking. Under the condition that the phase difference between the voltage and current signals of the tested running electric energy meter and the voltage and current signals of the standard meter is constant, the frequencies must be equal, and the frequency-dividing feedback loop is used to perform feedback adjustment on the output to keep the output digital signal undistorted, thereby improving the anti-harmonic and anti-interference capabilities.

[0020] 3. The power supply unit of the present invention consists of two parts: laser power supply and backup battery. The current source unit 1201 outputs current, and after being processed by the signal processing unit, a continuous and stable LD working current is output, which is converted into current and transmitted to the DC-DC converter, and then converted by the DC-DC converter to power the peripheral circuit; the CPU data processing unit collects the temperature of the LD light source and the external environment through the temperature control protection and external temperature detection circuit, and feeds back to the CPU data processing unit. When the CPU data processing unit detects that the temperature signal is not in the high-efficiency working range of the LD light source, a pulse signal is given to the driving and protection circuit to stop the output to the LD light source, and the backup power supply unit is connected to power the high-voltage side peripheral circuit; the present invention can further increase the service life of the calibrator by adding laser power supply to the power supply part. BRIEF DESCRIPTION OF THE DRAWINGS

[0021] The present invention will be further described in detail below in conjunction with the accompanying drawings;

[0022] Figure 1 It is a structural schematic diagram of a three-phase electric energy meter field tester that is resistant to harmonic interference according to the present invention;

[0023] Figure 2 It is a structural schematic diagram of a frequency division phase locked loop in a three-phase electric energy meter field tester that is resistant to harmonic interference according to the present invention;

[0024] Figure 3 It is a structural schematic diagram of a power supply unit in a three-phase electric energy meter field tester that is resistant to harmonic interference according to the present invention;

[0025] In the figure: 1 is a three-phase clamp current sensor, 2 is a three-phase clamp voltage sensor, 3 is a signal filtering and amplifying circuit, 4 is an A / D converter, 5 is a standard table reference voltage and reference current input interface, 6 is a shaping circuit, 7 is a standard crystal oscillator, 8 is an FPGA frequency multiplication data acquisition unit, 9 is a frequency division phase-locked loop, 91 is a dual second-order generalized integrator frequency-locked loop, 92 is a delay signal elimination filter, 93 is a sliding average filter, 94 is a phase detector, 95 is a feedback loop, 10 is a CPU data processing unit, 11 is an LED display output circuit, 12 is a power supply unit, 1201 is a current source unit, 1202 is an LD light source, 1203 is a signal processing unit, 1204 is a waveform generator, 1205 is a photocell, 1206 is a DC-DC converter, 1207 is a temperature control protection and external temperature detection circuit, 1208 is a drive and protection circuit, 1209 is a backup power supply unit, 13 is a built-in storage unit, and 14 is a keyboard. DETAILED DESCRIPTION

[0026] In order to make the purpose, technical solutions and advantages of the embodiments of the present invention clearer, the technical solutions in the embodiments of the present invention will be clearly and completely described below in conjunction with the drawings in the embodiments of the present invention. Obviously, the described embodiments are part of the embodiments of the present invention, rather than all the embodiments; based on the embodiments in the present invention, all other embodiments obtained by ordinary technicians in this field without making creative work are within the scope of protection of the present invention.

[0027] like Figure 1 As shown, a three-phase electric energy meter field tester with resistance to harmonic interference includes: a three-phase clamp current sensor 1, a three-phase clamp voltage sensor 2, a signal filtering and amplifying circuit 3, an A / D converter 4, a standard meter reference voltage and reference current input interface 5, a shaping circuit 6, a standard crystal oscillator 7, an FPGA frequency multiplication data acquisition unit 8, a frequency division phase-locked loop 9, a CPU data processing unit 10, an LED display output circuit 11 and a power supply unit 12; the shaping circuit includes a voltage amplifier and a Schmitt trigger of model LMC662CN, and the voltage amplifier and the Schmitt trigger are electrically connected.

[0028] The input end of the three-phase clamp current sensor 1 and the input end of the three-phase clamp voltage sensor 2 are respectively connected to the current end and the voltage end of the electric meter, the output end of the three-phase clamp current sensor 1 and the output end of the three-phase clamp voltage sensor 2 are respectively connected to the input end of the signal filtering and amplifying circuit 3 and the input end of the shaping circuit 6, the output end of the signal filtering and amplifying circuit 3, the standard meter reference voltage and reference current input interface 5 are respectively connected to the input end of the A / D converter 4, the output end of the shaping circuit 6 and the standard crystal oscillator 7 are respectively connected to the input end of the FPGA frequency multiplication data acquisition unit 8, the output end of the FPGA frequency multiplication data acquisition unit 8 is connected to the LED display output circuit 11 through the CPU data processing unit 10, the FPGA frequency multiplication data acquisition unit 8 is bidirectionally connected to the frequency division phase-locked loop 9, the frequency division phase-locked loop 9 is bidirectionally connected to the A / D converter 4, and the power supply unit 12 supplies power to the CPU data processing unit 10 and peripheral circuits.

[0029] Furthermore, the calibrator further includes a built-in storage unit 13 and a keyboard 14 . The built-in storage unit 13 is connected to the output end of the CPU data processing unit 10 , and the keyboard 14 is connected to the input end of the CPU data processing unit 10 .

[0030] Furthermore, the three-phase clamp current sensor is respectively connected to the input end of the signal filtering and amplifying circuit and the input end of the shaping circuit through sampling resistors.

[0031] Specifically, a three-phase clamp current sensor 1 and a three-phase clamp voltage sensor 2 are directly connected to the current terminal and the voltage terminal of the meter, and are used to collect the voltage and current signals of the meter under test. The CPU data processing unit 10 processes the collected data and transmits the data to the LED display output circuit 11 for display; the shaping circuit 6 shapes the collected signal into pulses of the same frequency, and the sampling time reference is provided by the standard crystal oscillator 7 for testing the clock error installed in the keypad of the calibrator. Within a sampling period, after being processed by the FPGA multiplication data acquisition unit 8, the A / D converter 4 is controlled to perform analog-to-digital conversion. A frequency division phase-locked loop 9 is inserted between the A / D converter 4 and the FPGA multiplication data acquisition unit 8, and the same pulse signal is extracted by the frequency division phase-locked loop 9 to achieve the purpose of suppressing harmonic interference. At the same time, through the multiplication feedback mechanism, the phase difference between the reference pulse and the collected pulse is calculated, and a better filtering effect can be obtained.

[0032] like Figure 2 As shown, the frequency division phase locked loop 9 includes a dual second-order generalized integrator frequency locked loop 91, a delayed signal elimination filter 92 and a sliding average filter 93. The input end of the dual second-order generalized integrator frequency locked loop 91 is bidirectionally connected to the FPGA frequency multiplication data acquisition unit 8, and the output end of the dual second-order generalized integrator frequency locked loop 91 is connected to the input end of the A / D converter 4 through the delayed signal elimination filter 92 and the sliding average filter 93 in sequence.

[0033] The frequency division phase locked loop 9 also includes a phase detector 94 and a feedback loop 95. The phase detector 94 is connected to the feedback loop 95 in sequence through a dual second-order generalized integrator frequency locked loop 91, a delayed signal elimination filter 92, and a sliding average filter 93. The feedback loop 95 includes a frequency feedback loop and a phase feedback loop.

[0034] In this embodiment, the dual second-order generalized integrator frequency-dividing phase-locked loop 9 is an adaptive filter, and its functions mainly include data preprocessing coordinate transformation, and the voltage signal after coordinate transformation is calculated by the dual second-order generalized integrator to eliminate part of the harmonic components, and the sliding average filter 92 separates the positive and negative sequence components of the grid voltage when the grid is unbalanced, and realizes frequency tracking at the same time; the delayed signal elimination filter 93 can filter the harmonics of a specific frequency according to the principle of periodic point symmetry of the sinusoidal signal. At this time, there is a feedback loop 95, which includes two feedback loops of frequency feedback and phase feedback. Therefore, even if there is a short-term or large amount of high-frequency harmonic interference in the system, the phase-locked loop can accurately track the grid voltage frequency and phase signal through the adjustment of the feedback link. Among them, the second-order generalized integrator is a solution based on the 90° phase angle offset of the input sinusoidal signal. The input voltage signal can generate a two-phase orthogonal signal after integral calculation, one output signal tracks the input signal, and the other signal realizes a 90° phase angle offset of the input signal.

[0035] The frequency division phase-locked loop 9 in this embodiment uses a dual second-order generalized integrator phase-locked loop (DSOGI-PLL) to lock the voltage signal with the same frequency as the pulse signal, which is a typical frequency tracking phase-locked loop structure. It mainly includes a software phase-locked loop structure consisting of a dual second-order generalized integrator frequency-locked loop 91, a delayed signal elimination filter 92 and a sliding average filter 93. The three-phase clamp current sensor 1 and the three-phase clamp voltage sensor 2 convert the voltage, current and other signals on the side of the measured meter into small voltage and small current signals suitable for collection by the collection unit, and perform signal conditioning, filtering, A / D conversion and other processing on the collected small voltage and small current signals. The FPGA frequency multiplication data collection unit 8 is used to store the conversion result of the A / D converter 4 in real time. After the feedback loop 95, the digital channel and the analog channel output accurate digital and analog quantities, and finally transmit them to the CPU data processing unit 10 for unified calculation to obtain digital quantities such as voltage, current, and power. The CPU data processing unit 10 arranges and combines the calculated data in a certain format, and sends them to the built-in storage unit 13 for summary and classification and the LED display output circuit 11 for display.

[0036] This embodiment uses a frequency-dividing phase-locked loop 9 to ensure synchronous output of the same frequency, separate the frequency of the measured signal for locking, and filter out other harmonic interference. The measured signal can be quickly locked in a short time, and can be stored and fed back in real time, so as to achieve synchronous interval sampling of multiple points within one sampling cycle; the feedback mechanism further reduces the signal error.

[0037] like Figure 3 As shown, the power supply unit 12 includes a current source unit 1201, an LD light source 1202, a signal processing unit 1203, a waveform generator 1204, a photocell 1205, a DC-DC converter 1206, a temperature control protection and external temperature detection circuit 1207, a drive and protection circuit 1208 and a backup power supply unit 1209. The external power supply sequentially passes through the current source unit 1201, the LD light source 1202, the signal processing unit 1203, the waveform generator 1204, the photocell 1205 and the DC-DC converter 1206 to supply power to the peripheral circuits. The CPU data processing unit 10 is bidirectionally connected to the temperature control protection and external temperature detection circuit 1207. The CPU data processing unit 10 is connected to the LD light source 1202 through the drive and protection circuit 1208. The CPU data processing unit 10 supplies power to the peripheral circuits through the backup power supply unit 1209; the signal processing unit 1203 includes amplifying and filtering the electrical signal.

[0038] Specifically, the power supply unit 12 is composed of two parts: laser power supply and backup battery. The current source unit 1201 outputs current, which is processed by the signal processing unit 1203 to output a continuous and stable LD working current, which is converted into current and transmitted to the DC-DC converter 1206. After conversion by the DC-DC converter 1206, the peripheral circuit is powered. The peripheral circuits such as Figure 3 The data acquisition, processing and display unit in the data acquisition, processing and display unit; the CPU data processing unit 10 collects the temperature of the LD light source 1202 and the external environment through the temperature control protection and external temperature detection circuit 1207, and feeds back to the CPU data processing unit 10. When the CPU data processing unit 10 detects that the temperature signal is not in the high-efficiency working range of the LD light source 1202, it gives a pulse signal to the driving and protection circuit 1208 to stop the output to the LD light source 1202, and connects the backup power supply unit 1209 to power the high-voltage side peripheral circuits, such as the three-phase clamp current sensor 1 and the three-phase clamp voltage sensor 2 to collect the voltage signal and current signal on the side of the measured meter. When the laser circuit fails, its working principle is the same as described above; this embodiment can further increase the service life of the calibrator by adding laser energy supply to the power supply part.

[0039] The present invention discloses a three-phase electric energy meter field tester with resistance to harmonic interference. When a three-phase clamp current sensor 1 and a three-phase clamp voltage sensor 2 collect voltage signals and current signals of an electric energy meter under test running on site, the sensors transmit these sampled values ​​to a signal filtering and amplifying circuit 3 and a shaping circuit 6 respectively. At this time, the three-phase clamp current sensor 1 converts the three-phase currents Ia, Ib, and Ic into small current signals through a current transformer, and then converts them into small current signals through a 0.4kΩ sampling resistor; the three-phase clamp voltage sensor 2 converts the voltage into a small voltage signal through a voltage transformer, and after signal conditioning and filtering by a signal filtering and amplifying circuit 3, directly inputs the signal to an A / D converter 4.

[0040] The A / D converter 4 has three interfaces. The first interface is connected to the acquisition signal. The converted voltage is input into the A / D converter 4 for analog-to-digital conversion to obtain the digital signal required by the CPU data processing unit 10. The second interface is the standard table reference voltage and reference current input interface 5. The third interface is the feedback interface of the frequency-dividing phase-locked loop 9. At this time, the acquisition enters the shaping circuit 6 for data shaping. The shaping circuit 6 uses a voltage amplifier of model LMC662CN to shape the output signal to be processed. The Schmitt trigger is used to shape the sampled original waveform into a signal with the same pulse as the calibration instrument. The FPGA frequency multiplication data acquisition unit 8 is used for data acquisition. A frequency division phase-locked loop 9 is inserted between the A / D converter 4 and the FPGA frequency multiplication data acquisition unit 8. The FPGA frequency multiplication data acquisition unit 8 inputs the frequency multiplication processed data into the frequency division phase-locked loop 9. The frequency division phase-locked loop 9 locks the voltage signal with the same frequency as the pulse signal by using a dual second-order generalized integrator phase-locked loop (DSOGI-FLL), and adds a multiplication phase detector 94 to multiply the calculated input signal and the output signal. The obtained product is output through the filter and the phase detector to obtain the phase difference of the input and output signals. Through the feedback loop 95, the received The received digital signal is compared and analyzed in a feedback manner, and the output signal is locked to the input signal through feedback to realize the phase-locked function. The pulse signal controlled by the phase-locked loop is input to the A / D converter 4. The A / D converter 4 synchronously amplifies the sampling signal and the standard meter signal according to the pulse signal output by the frequency-dividing phase-locked loop 9. Finally, the amplified sampling signal and the standard meter signal are synchronously input to the CPU data processing unit 10 for calculation to achieve the purpose of anti-harmonic interference. Finally, the obtained calculation results are respectively input to the built-in storage unit 13 and the LED display output circuit 11.

[0041] The present invention adds a frequency division phase-locked loop between the A / D converter and the FPGA frequency multiplication data acquisition unit, and utilizes the phase-locked loop to keep the frequency phase consistent with the input signal of the synchronous acquisition pulse, thereby realizing the adaptability and anti-interference of frequency tracking. Under the condition that the phase difference between the voltage and current signals of the tested running electric energy meter and the voltage and current signals of the standard meter is constant, the frequencies are definitely equal, and the frequency division feedback loop is utilized to perform feedback adjustment on the output, so as to keep the output digital signal undistorted and improve the anti-harmonic and anti-interference capabilities.

[0042] Finally, it should be noted that the above embodiments are only used to illustrate the technical solutions of the present invention, rather than to limit it. Although the present invention has been described in detail with reference to the aforementioned embodiments, those skilled in the art should understand that they can still modify the technical solutions described in the aforementioned embodiments, or replace some or all of the technical features therein with equivalents. However, these modifications or replacements do not cause the essence of the corresponding technical solutions to deviate from the scope of the technical solutions of the embodiments of the present invention.

Claims

1. A three-phase electric energy meter field tester with resistance to harmonic interference, characterized in that: include: Three-phase clamp current sensor, three-phase clamp voltage sensor, signal filter amplifier circuit, A / D converter, standard table reference voltage and reference current input interface, shaping circuit, standard crystal oscillator, FPGA frequency multiplication data acquisition unit, frequency division phase-locked loop, CPU data processing unit, LED display output circuit and power supply unit; The input end of the three-phase clamp current sensor and the input end of the three-phase clamp voltage sensor are respectively connected to the current end and the voltage end of the ammeter, the output end of the three-phase clamp current sensor and the output end of the three-phase clamp voltage sensor are respectively connected to the input end of the signal filter amplifier circuit and the input end of the shaping circuit, the output end of the signal filter amplifier circuit, the standard meter reference voltage and reference current input interface are respectively connected to the input end of the A / D converter, the output end of the shaping circuit and the standard crystal oscillator are respectively connected to the input end of the FPGA frequency multiplication data acquisition unit, the output end of the FPGA frequency multiplication data acquisition unit is connected to the LED display output circuit through the CPU data processing unit, the FPGA frequency multiplication data acquisition unit is bidirectionally connected to the frequency division phase-locked loop, the frequency division phase-locked loop is bidirectionally connected to the A / D converter, and the power supply unit supplies power to the CPU data processing unit and the peripheral circuit; The frequency division phase-locked loop includes a dual second-order generalized integrator frequency-locked loop, a delayed signal elimination filter and a sliding average filter, the input end of the dual second-order generalized integrator frequency-locked loop is bidirectionally connected to the FPGA frequency multiplication data acquisition unit, and the output end of the dual second-order generalized integrator frequency-locked loop is connected to the input end of the A / D converter in sequence through the delayed signal elimination filter and the sliding average filter; The frequency division phase locked loop also includes a phase detector and a feedback loop, wherein the phase detector is connected to the feedback loop in sequence through a dual second-order generalized integrator frequency locked loop, a delayed signal elimination filter, and a sliding average filter; The feedback loop includes a frequency feedback loop and a phase feedback loop.

2. According to claim 1, a three-phase electric energy meter field tester with resistance to harmonic interference is characterized in that: The power supply unit includes a current source unit, an LD light source, a signal processing unit, a waveform generator, a photocell, a DC-DC converter, a temperature control protection and external temperature detection circuit, a drive and protection circuit and a backup power supply unit. The external power supply sequentially passes through the current source unit, the LD light source, the signal processing unit, the waveform generator, the photocell and the DC-DC converter to supply power to the peripheral circuit. The CPU data processing unit is bidirectionally connected to the temperature control protection and external temperature detection circuit. The CPU data processing unit is connected to the LD light source through the drive and protection circuit. The CPU data processing unit supplies power to the peripheral circuit through the backup power supply unit.

3. According to the three-phase electric energy meter field tester with anti-harmonic interference as claimed in claim 1, it is characterized by: It also includes a built-in storage unit, which is connected to the output end of the CPU data processing unit.

4. According to the three-phase electric energy meter field tester with anti-harmonic interference according to claim 1, it is characterized by: The shaping circuit comprises a voltage amplifier and a Schmitt trigger of model LMC662CN, and the voltage amplifier and the Schmitt trigger are electrically connected.

5. According to the three-phase electric energy meter field tester with anti-harmonic interference as claimed in claim 1, it is characterized by: It also includes a sampling resistor, and the three-phase clamp current sensor is respectively connected to the input end of the signal filtering and amplifying circuit and the input end of the shaping circuit through the sampling resistor.

6. The three-phase electric energy meter field tester with resistance to harmonic interference according to claim 1 is characterized by: The device also comprises a keyboard, which is connected to the input end of the CPU data processing unit.

7. The three-phase electric energy meter field tester with resistance to harmonic interference according to claim 2 is characterized by: The signal processing unit includes amplification and filtering processing for the electrical signal.

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