Semiconductor substrate and method for forming the same

Abstract

A semiconductor substrate and a method for forming the same, the semiconductor substrate comprising a first silicon substrate, an oxide layer, a second silicon substrate and an epitaxial layer. The oxide layer is disposed on the first silicon substrate. The second silicon substrate is disposed on the oxide layer. The second silicon substrate has a thickness between 10 nm and 10 μm. The epitaxial layer is disposed on the second silicon substrate. Since the thickness of the second silicon substrate is thinner, the stress caused by the epitaxial layer on the second silicon substrate is also smaller, so that the quality of the epitaxial layer is better, and therefore, the semiconductor substrate has the characteristic of not being easy to warp.

Description

Technical Field

[0001] The present disclosure relates to a semiconductor substrate and a method of forming a semiconductor substrate. Background Art

[0002] With the advancement of the semiconductor integrated circuit (IC) industry, manufacturers need to optimize and improve the process to produce smaller and better-performing products. In the semiconductor process, the performance of the substrate will affect the subsequent manufacturing process and the quality of IC products. For example, the silicon on insulator (SOI) substrate has the advantages of reducing leakage current, increasing saturation current and low power consumption, and is widely studied and applied.

[0003] In the process technology of using silicon substrate to grow epitaxial layer to form semiconductor substrate, stress may be concentrated on the silicon substrate due to lattice defects of epitaxial layer. When stress is released, it will cause dislocation of epitaxial layer, thus causing the silicon substrate to deform or twist, or even break. In addition, the lattice constant of epitaxial layer and silicon substrate is greatly different, and the thermal expansion coefficient of epitaxial layer and silicon substrate is also greatly different, which can easily cause the semiconductor substrate to warp and make the epitaxial layer quality poor.

[0004] In view of the above, there is an urgent need for a semiconductor substrate and a method for forming the semiconductor substrate that can solve the above problems. Summary of the invention

[0005] The present disclosure provides a semiconductor substrate, comprising a first silicon substrate, an oxide layer, a second silicon substrate and an epitaxial layer. The oxide layer is disposed on the first silicon substrate. The second silicon substrate is disposed on the oxide layer. The second silicon substrate has a thickness between 10 nm and 10 μm. The epitaxial layer is disposed on the second silicon substrate.

[0006] In some embodiments, the first silicon substrate has a first resistance value, the second silicon substrate has a second resistance value, and the first resistance value is smaller than the second resistance value.

[0007] In some embodiments, the first silicon substrate has a first resistance between 0.0001 and 1 Ohm-cm.

[0008] In some embodiments, the second silicon substrate has a second resistance between 1 and 10,000 Ohm-cm.

[0009] In some embodiments, the first silicon substrate has a first resistance between 0.0001 and 1 Ohm-cm, and the second silicon substrate has a second resistance between 1 and 10,000 Ohm-cm.

[0010] In some embodiments, the first silicon substrate is an ultra-heavily doped chip.

[0011] In some embodiments, the epitaxial layer includes gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium gallium phosphide, indium gallium antimonide, or combinations thereof.

[0012] The present disclosure provides a method for forming a semiconductor substrate, comprising the following steps: receiving a composite substrate; the composite substrate comprising a first silicon substrate, an oxide layer and a second silicon substrate; the oxide layer is disposed on the first silicon substrate; the second silicon substrate is disposed on the oxide layer, wherein the second silicon substrate has a thickness between 10 nm and 10 μm; and forming an epitaxial layer on the second silicon substrate.

[0013] In some embodiments, receiving the composite substrate includes the following steps: forming an oxide layer on the first silicon substrate or on the second silicon substrate; bonding the second silicon substrate to the oxide layer when the oxide layer is formed on the first silicon substrate, or bonding the first silicon substrate to the oxide layer when the oxide layer is formed on the second silicon substrate; and thinning the second silicon substrate.

[0014] In some embodiments, receiving the composite substrate includes the following steps: forming a first oxide layer on a first silicon substrate, forming a second oxide layer on a second silicon substrate, bonding the first oxide layer to the second oxide layer, and thinning the second silicon substrate.

[0015] It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory only and are intended to provide further explanation of the invention as claimed. BRIEF DESCRIPTION OF THE DRAWINGS

[0016] The detailed description of the present disclosure will be fully understood when read in conjunction with the accompanying drawings. It should be noted that, in accordance with standard industry practice, the features are not drawn to scale and are only used for illustration purposes. In fact, the size of the features may be arbitrarily increased or reduced for the purpose of clarity of discussion.

[0017] Figure 1 A method for forming a semiconductor substrate is shown according to some embodiments of the present disclosure.

[0018] Figures 2 to 4 is a schematic cross-sectional view of a semiconductor substrate in different formation stages according to some embodiments of the present disclosure.

[0019] The reference numerals are described as follows:

[0020] 100: Methods

[0021] 110: Operation

[0022] 120: Operation

[0023] 210: The first silicon substrate

[0024] 220: Oxide layer

[0025] 230: Second silicon substrate

[0026] 230a: second silicon substrate

[0027] 240: Composite substrate

[0028] 340: Composite substrate

[0029] 400: Semiconductor substrate

[0030] 410: Epitaxial layer DETAILED DESCRIPTION

[0031] In order to make the description of the present disclosure more detailed and complete, reference may be made to the accompanying drawings and various embodiments described below, in which the same numbers in the drawings represent the same or similar elements.

[0032] The following will illustrate multiple embodiments of the present invention with the accompanying drawings. For the purpose of clear description, many practical details will be described together in the following description. However, it should be understood that these practical details should not be used to limit the present invention. That is, in some embodiments of the present invention, these practical details are not necessary. In addition, in order to simplify the drawings, some conventional structures and elements will be shown in a simple schematic manner in the drawings.

[0033] Although a series of operations or steps are used hereinafter to illustrate the method disclosed herein, the order shown in these operations or steps should not be construed as a limitation of the present invention. For example, certain operations or steps can be performed in different orders and / or simultaneously with other steps. In addition, it is not necessary to perform all the operations, steps and / or features shown to implement the embodiments of the present invention. In addition, each operation or step described herein may include several sub-steps or actions.

[0034] In the semiconductor manufacturing process, a semiconductor substrate can be formed by directly bonding a handle wafer to a device wafer, then processing the device wafer to form a device layer, and then forming an epitaxial layer on the device layer.

[0035] The present disclosure provides a method for forming a semiconductor substrate. Figures 1 to 4 . Figure 1 A method 100 for forming a semiconductor substrate according to some embodiments of the present disclosure is shown. The method 100 includes operation 110 and operation 120. Figures 2 to 4 is a schematic cross-sectional view of a semiconductor substrate in different formation stages according to some embodiments of the present disclosure.

[0036] Please refer to Figures 1 to 3In some embodiments, in operation 110, Figure 2 As shown, a composite substrate 240 is received, and the composite substrate 240 includes a first silicon substrate 210, an oxide layer 220, and a second silicon substrate 230. The oxide layer 220 is disposed on the first silicon substrate 210. The second silicon substrate 230 is disposed on the oxide layer 220. The second silicon substrate 230 is thinned to form a Figure 3 The composite substrate 340 is shown. Figure 2 After being thinned, the second silicon substrate 230 will form a Figure 3 The second silicon substrate 230a is shown. In some embodiments, receiving the composite substrate 240 includes the following steps: forming an oxide layer 220 on the first silicon substrate 210, and bonding the second silicon substrate 230 to the oxide layer 220. In other embodiments, receiving the composite substrate 240 includes the following steps: forming an oxide layer 220 on the second silicon substrate 230, and bonding the first silicon substrate 210 to the oxide layer 220. In other embodiments, receiving the composite substrate 240 includes the following steps: forming a first oxide layer (not shown) on the first silicon substrate 210. Forming a second oxide layer (not shown) on the second silicon substrate 230. Bonding the first oxide layer to the second oxide layer. The first oxide layer and the second oxide layer together form the oxide layer 220.

[0037] In some embodiments, Figure 3 The second silicon substrate 230a shown has a thickness ranging from 10 nm to 10 μm, such as 0.5 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm, 2.5 μm or 3 μm.

[0038] In some embodiments, the first silicon substrate 210 has a first resistance, the second silicon substrate 230 has a second resistance, and the first resistance is less than the second resistance. Similarly, in some embodiments, the first silicon substrate 210 has a first resistance, the second silicon substrate 230a has a second resistance, and the first resistance is less than the second resistance.

[0039] In some embodiments, the first silicon substrate 210 has a first resistance between 0.0001 and 1 Ohm-cm. The first resistance is, for example, 0.0001, 0.0002, 0.0003, 0.0004, 0.0005, 0.0006, 0.0007, 0.0008, 0.0009, 0.001, 0.01, 0.02, 0.03, 0.04, or 0.05 Ohm-cm. In some embodiments, the second silicon substrate 230 and the second silicon substrate 230a have a second resistance between 1 and 10000 Ohm-cm. The second resistance is, for example, 1000, 3000, 5000, 7000, 8000, 9000, or 10000 Ohm-cm. In some embodiments, the first silicon substrate 210 has a first resistance between 0.0001 and 1 Ohm-cm, and the second silicon substrate 230 has a second resistance between 1 and 10,000 Ohm-cm. Similarly, in some embodiments, the first silicon substrate 210 has a first resistance between 0.0001 and 1 Ohm-cm, and the second silicon substrate 230a has a second resistance between 1 and 10,000 Ohm-cm.

[0040] Please refer to Figure 1 and Figure 3 In some other embodiments, in operation 110, Figure 3 As shown, a composite substrate 340 is received, and the composite substrate 340 includes a first silicon substrate 210 , an oxide layer 220 , and a second silicon substrate 230 a . The oxide layer 220 is disposed on the first silicon substrate 210 . The second silicon substrate 230 a is disposed on the oxide layer 220 .

[0041] Please refer to Figure 1 and Figure 4 In operation 120, an epitaxial layer 410 is formed on the second silicon substrate 230a. In other words, the epitaxial layer 410 is formed on the composite substrate 340. In some embodiments, the method of forming the epitaxial layer 410 includes, but is not limited to, a chemical vapor deposition (CVD) epitaxy process or a molecular beam epitaxy (MBE) process. In some embodiments, the epitaxial layer 410 includes, but is not limited to, gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, indium gallium phosphide, indium gallium antimonide, or a combination thereof.

[0042] Please continue to refer to Figure 4. The present disclosure provides a semiconductor substrate 400, which includes a composite substrate 340 and an epitaxial layer 410. The composite substrate 340 includes a first silicon substrate 210, an oxide layer 220, and a second silicon substrate 230a. The oxide layer 220 is disposed on the first silicon substrate 210. The second silicon substrate 230a is disposed on the oxide layer 220. In some embodiments, the second silicon substrate 230a has a thickness between 10 nm and 10 μm. The thickness is, for example, 0.5 μm, 0.8 μm, 1 μm, 1.2 μm, 1.5 μm, 1.8 μm, 2 μm, 2.5 μm, or 3 μm. The epitaxial layer 410 is disposed on the second silicon substrate 230a.

[0043] It is worth noting that when the thickness of the second silicon substrate 230a is thinner, the composite substrate 340 is also thinner, so the stress caused by the epitaxial layer 410 on the composite substrate 340 will be smaller. In other words, the stress caused by the epitaxial layer 410 on the second silicon substrate 230a will also be smaller.

[0044] Please continue to refer to Figure 4 . In some embodiments, the first silicon substrate 210 has a first resistance, the second silicon substrate 230a has a second resistance, and the first resistance is less than the second resistance. In some embodiments, the first silicon substrate 210 has a first resistance between 0.0001 and 0.05 Ohm-cm. The first resistance is, for example, 0.0001, 0.0002, 0.0003, 0.0004, 0.0005, 0.0006, 0.0007, 0.0008, 0.0009, 0.001, 0.01, 0.02, 0.03, 0.04, or 0.05 Ohm-cm. In some embodiments, the second silicon substrate 230a has a second resistance between 1000 and 10000 Ohm-cm. The second resistance is, for example, 1000, 3000, 5000, 7000, 8000, 9000 or 10000 Ohm-cm. When the first silicon substrate 210 has a low resistance, the composite substrate 340 has a high mechanical strength and can resist the stress caused by the epitaxial layer 410, thereby improving the quality of the epitaxial layer 410 and reducing defects caused by epitaxial layer dislocations, further preventing the semiconductor substrate 400 from warping or breaking.

[0045] In some embodiments, the first silicon substrate 210 is a heavily doped chip. In some embodiments, the material of the first silicon substrate 210 includes boron, phosphorus, arsenic, antimony or a combination thereof. When the concentration of dopants in the first silicon substrate 210 is higher, the resistance value of the first silicon substrate 210 is lower.

[0046] In some embodiments, the epitaxial layer 410 includes gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, gallium indium phosphide, gallium indium antimonide, or a combination thereof. In some embodiments, the epitaxial layer 410 is a gallium nitride epitaxial layer.

[0047] In some embodiments, a silicon substrate with different crystal orientations may be selected as the first silicon substrate 210 according to design requirements. For example, the crystal orientation of the first silicon substrate 210 is (100), but is not limited thereto. In some embodiments, a silicon substrate with different crystal orientations may be selected as the second silicon substrate 230a according to design requirements. For example, the crystal orientation of the second silicon substrate 230a is (111), but is not limited thereto.

[0048] The semiconductor substrate disclosed in the present invention includes a composite substrate and an epitaxial layer. The composite substrate includes a first silicon substrate, an oxide layer and a second silicon substrate. The second silicon substrate has a thickness between 10 nm and 10 μm. Since the thickness of the second silicon substrate is thinner, the stress caused by the epitaxial layer on the composite substrate will also be smaller, so that the quality of the epitaxial layer is better, and therefore, the semiconductor substrate disclosed in the present invention has the characteristic of not being easy to warp.

[0049] Although the present invention has been described in considerable detail with reference to certain embodiments, other embodiments are possible. Therefore, the spirit and scope of the appended claims should not be limited to the description of the embodiments contained herein.

[0050] It is obvious to those skilled in the art that various modifications and variations can be made to the structure of the present invention without departing from the scope or spirit of the present invention. In view of the foregoing, the present invention is intended to cover modifications and variations of the present invention that fall within the scope of the appended claims.

Claims

1. A semiconductor substrate, characterized in that: include: a first silicon substrate; an oxide layer disposed on the first silicon substrate; a second silicon substrate disposed on the oxide layer; as well as An epitaxial layer is disposed on the second silicon substrate having a thickness between 10 nm and 3 μm and directly contacts the second silicon substrate. The second silicon substrate is used to reduce the stress caused by the epitaxial layer on the first silicon substrate, the oxide layer and the second silicon substrate. The epitaxial layer includes gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, gallium indium phosphide, gallium indium antimonide or a combination thereof.

2. The semiconductor substrate according to claim 1, wherein The first silicon substrate has a first resistance value, the second silicon substrate has a second resistance value, and the first resistance value is smaller than the second resistance value.

3. The semiconductor substrate according to claim 1, wherein The first silicon substrate has a first resistance between 0.0001 and 1 Ohm-cm.

4. The semiconductor substrate according to claim 1, wherein The second silicon substrate has a second resistance between 1 and 10000 Ohm-cm.

5. The semiconductor substrate according to claim 4, wherein: The first silicon substrate has a first resistance between 0.0001 and 1 Ohm-cm.

6. The semiconductor substrate according to claim 1, wherein: The first silicon substrate is an ultra-heavy doped chip.

7. A method for forming a semiconductor substrate, characterized in that: include: receiving a composite substrate, the composite substrate comprising a first silicon substrate, an oxide layer and a second silicon substrate, the oxide layer being disposed on the first silicon substrate, and the second silicon substrate being disposed on the oxide layer; and An epitaxial layer is formed on the second silicon substrate having a thickness between 10 nm and 3 μm and directly contacts the second silicon substrate. The second silicon substrate is used to reduce the stress caused by the epitaxial layer to the first silicon substrate, the oxide layer and the second silicon substrate. The epitaxial layer includes gallium nitride, gallium phosphide, gallium arsenide, indium phosphide, gallium indium phosphide, gallium indium antimonide or a combination thereof.

8. The method according to claim 7, characterized in that Receiving the composite substrate comprises the following steps: forming the oxide layer on the first silicon substrate or the second silicon substrate; When the oxide layer is formed on the first silicon substrate, the second silicon substrate is bonded to the oxide layer, or when the oxide layer is formed on the second silicon substrate, the first silicon substrate is bonded to the oxide layer; and The second silicon substrate is thinned.

9. The method according to claim 7, characterized in that Receiving the composite substrate comprises the following steps: forming a first oxide layer on the first silicon substrate; forming a second oxide layer on the second silicon substrate; bonding the first oxide layer to the second oxide layer; and The second silicon substrate is thinned.

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