A calibration method for real-time chip power consumption prediction

Abstract

The present invention belongs to the technical field of chip power consumption prediction, and particularly relates to a verification method for real-time chip power consumption prediction. Based on the real-time working current of the chip, the present invention verifies the power consumption data calculated theoretically through the idea of parallel experimental testing and numerical calculation and multiple checks of the chip temperature, and then determines the accuracy of the predicted chip power consumption. The chip power consumption prediction method proposed by the present invention can provide technical support for the engineering application of domestic chips, and has good economic and social benefits in popularization and application.

Description

Technical Field

[0001] The present invention belongs to the technical field of chip power consumption prediction, and particularly relates to a verification method for real-time chip power consumption prediction. Background Art

[0002] The power consumption of integrated circuits will be converted into a large amount of heat energy and released from a relatively small core. During normal operation, the energy density on the core is very high, and this overly concentrated heat will cause the internal working temperature of the chip to rise sharply and lead to chip damage. Therefore, in the chip heat dissipation design and the software management stage after the chip is put into operation, accurate estimation, management, and control of power consumption are essential.

[0003] In the chip design stage, power consumption of different chips can be predicted more flexibly and conveniently by using on-chip structure-level, instruction-level, and circuit-level power consumption evaluation methods. Scientific research institutions at home and abroad have carried out a large number of in-depth studies on this aspect. Software such as Wattch, SimplePower, SoftWatt, Sim-Godson, and SimOS-Godson have been developed successively at home and abroad, and a variety of instruction-level power consumption models have been established, and the prediction of the maximum power consumption of chips has also been realized with the support of EDA tools. Generally speaking, the on-chip power consumption analysis method can evaluate the power consumption of chips with different architectures in the chip design stage.

[0004] However, problems such as the lack of support for real-time power consumption analysis at the structural design level, poor accuracy of the instruction-level power consumption model, and the inability of the circuit-level power consumption evaluation to support the power consumption evaluation of large test programs have emerged, making this on-chip power consumption evaluation method unable to predict the power consumption in the chip application stage. In this case, there is an urgent need to develop a chip power consumption prediction method with real-time and authenticity. Summary of the Invention

[0005] In view of this, based on the real-time working current of the chip, the present invention verifies the power consumption data calculated theoretically through the idea of parallel experimental testing and numerical calculation and multiple checks of the chip temperature, and then determines the accuracy of the predicted chip power consumption. The chip power consumption prediction method proposed by the present invention can provide technical support for the engineering application of domestic chips, and has good economic and social benefits in popularization and application.

[0006] To achieve the above object, the specific technical solutions adopted by the present invention are as follows:

[0007] A verification method for real-time chip power consumption prediction, comprising the following steps:

[0008] A), Chip workbench construction:

[0009] Identify the nuclear power or high-speed power supply network around the chip and the PCB on which it is installed, and arrange a set of power monitoring points on the nuclear power or high-speed power supply network around; Connect a regulated power supply to the power monitoring points;

[0010] B), Install thermocouples and current collectors:

[0011] Attach the thermocouples to the calibrated temperature points on the chip surface, and connect the ammeter to the power monitoring points;

[0012] C), Adjust the working state of the functional circuit:

[0013] Adjust the working state of the chip functional circuit, determine the working load of the chip, and determine the ambient temperature;

[0014] D), Collect the chip temperature:

[0015] Set multiple temperature collection points for the chip and measure the temperatures of the temperature collection points;

[0016] Record the temperature change curves of each collection point; Record the temperature value when the temperature change curve is stable; Calculate the average temperature of the chip from each of the temperature values;

[0017] E), Collect the chip current:

[0018] Collect the supply current and supply voltage of the chip in the working state;

[0019] F), Obtain the power consumption through theoretical calculation:

[0020] Obtain the power of the chip based on the supply current and the supply voltage;

[0021] G), Simulation calculation:

[0022] Set a thermal model and environmental parameters for the chip;

[0023] H), Numerically calculate the chip surface temperature:

[0024] Simulate and calculate the chip surface temperature through the thermal model, the power, and the environmental parameters;

[0025] I), Data comparison:

[0026] Compare the average temperature and the chip surface temperature. If the relative error is less than or equal to 10%, then perform multiple working condition judgments; If the relative error is greater than 10%, then terminate the test and judge that the test is inaccurate;

[0027] Among them, the method of the multiple working condition judgments is: Repeat the steps C)-I) until the working states of all functional circuits are completed for testing.

[0028] Further, in the above A), the regulated power supply satisfies the normal operation of the chip, and the load of the connected cable satisfies the maximum current-carrying capacity of the chip.

[0029] Further, the temperature acquisition points at least include the four corners and the center point of the chip.

[0030] Further, the working states of the functional circuit at least include the no-load state and the full-load state. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] In order to more clearly illustrate the technical solutions of the embodiments of the present invention, the drawings required for the embodiments will be briefly introduced below. Obviously, the drawings in the following description are only some embodiments of the present invention. For those of ordinary skill in the art, without creative efforts, other drawings can be obtained based on these drawings.

[0032] Figure 1 It is a flowchart of the verification method for real-time chip power consumption prediction in the specific embodiment of the present invention. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0033] The embodiments of the present invention will be described in detail below with reference to the drawings.

[0034] The following specific examples illustrate the embodiments of the present invention. Those skilled in the art can easily understand other advantages and effects of the present invention from the content disclosed in this specification. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of them. The present invention can also be implemented or applied through other different specific embodiments. Various details in this specification can also be modified or changed based on different viewpoints and applications without departing from the spirit of the present invention. It should be noted that, without conflict, the following embodiments and the features in the embodiments can be combined with each other. All other embodiments obtained by those of ordinary skill in the art without creative efforts based on the embodiments of the present invention belong to the scope of protection of the present invention.

[0035] It should be noted that the following description relates to various aspects of embodiments within the scope of the appended claims. It will be apparent that the aspects described herein can be embodied in a wide variety of forms, and any specific structure and / or function described herein is merely illustrative. Based on the present invention, those skilled in the art should understand that one aspect described herein can be implemented independently of any other aspect, and two or more of these aspects can be combined in various ways. For example, any number of the aspects set forth herein can be used to implement a device and / or practice a method. Additionally, this device can be implemented and this method can be practiced using other structures and / or functionality in addition to one or more of the aspects set forth herein.

[0036] It should also be noted that the diagrams provided in the following embodiments only schematically illustrate the basic concept of the present invention. The diagrams only show the components related to the present invention and are not drawn according to the number, shape, and size of the components in actual implementation. The type, quantity, and ratio of each component in actual implementation can be arbitrarily changed, and the component layout type may also be more complex.

[0037] In addition, in the following description, specific details are provided to facilitate a thorough understanding of the examples. However, those skilled in the art will understand that the aspects described can be practiced without these specific details.

[0038] In one embodiment of the present invention, a method for verifying real-time chip power consumption prediction is proposed, as Figure 1 shown, including the following steps:

[0039] A), Chip workbench setup:

[0040] Determine the chip and the peripheral nuclear power or high-speed power supply network of the PCB on which it is installed, and arrange a set of power monitoring points on the peripheral nuclear power or high-speed power supply network; Connect a regulated power supply to the power monitoring points;

[0041] B), Install thermocouples and current collectors:

[0042] Attach the thermocouples to the calibrated temperature points on the chip surface, and connect the ammeter to the power monitoring points;

[0043] C), Adjust the working state of the functional circuit:

[0044] Adjust the working state of the chip functional circuit, determine the working load of the chip, and determine the ambient temperature;

[0045] D), Collect chip temperature:

[0046] Set multiple temperature collection points for the chip and measure the temperatures of the temperature collection points;

[0047] Record the temperature change curves of each of the said acquisition points; record the temperature values when the temperature change curves are stable; obtain the average temperature of the said chip based on each of the said temperature values;

[0048] E), Collect the chip current:

[0049] Collect the supply current and supply voltage of the chip in the said operating state;

[0050] F), Obtain the power consumption through theoretical calculation:

[0051] Obtain the power of the said chip based on the said supply current and the said supply voltage;

[0052] G), Simulation calculation:

[0053] Set a thermal model and environmental parameters for the said chip;

[0054] H), Numerically calculate the chip surface temperature:

[0055] Obtain the chip surface temperature through simulation calculation using the said thermal model, the said power, and the said environmental parameters;

[0056] I), Data comparison:

[0057] Compare the said average temperature and the said chip surface temperature. If the relative error is less than or equal to 10%, then perform multiple working condition judgments; if the relative error is greater than 10%, then terminate the test and determine that the test is inaccurate;

[0058] Among them, the method for the said multiple working condition judgments is: repeat the said C)-I) until the working states of all functional circuits are completed for testing.

[0059] In this embodiment, in the said A), the regulated power supply meets the normal operation of the said chip, and the load of the connected cable meets the maximum current carrying capacity of the said chip.

[0060] In this embodiment, the said temperature acquisition points at least include the four corners and the center point of the said chip.

[0061] In this embodiment, the said working states of the functional circuits at least include the no-load state and the full-load state.

[0062] The following combines Figure 1 to further illustrate this embodiment:

[0063] As Figure 1 shown, the power consumption prediction method based on chip temperature verification includes the following operating steps:

[0064] A), Chip workbench construction:

[0065] Set up the product workbench where the chip is located, connect the regulated power supply to the power detection point, ensure that the connected cable meets the maximum current-carrying capacity of the load, and ensure that the connected device does not affect the normal operation of the product;

[0066] B), Install the thermocouple / current collector:

[0067] Attach the thermocouple to the calibrated temperature point on the chip surface, and connect the ammeter to the detection point;

[0068] C), Adjust the working state of the functional circuit:

[0069] Use the configuration software to adjust the working state of the functional circuit, determine the chip working load, and determine the ambient temperature;

[0070] D), Collect the chip temperature:

[0071] Collect the temperature change curves of five points including the four corners and the center point of the chip over time, record the temperature value at stability, and measure multiple times to calculate the average chip temperature;

[0072] E), Collect the chip current:

[0073] Collect the supply current of the chip under the real-time working state;

[0074] F), Obtain the power consumption through theoretical calculation:

[0075] Calculate the chip power according to the measured chip current and voltage;

[0076] G), Simulation calculation:

[0077] Determine the initial values of the simulation calculation, the chip thermal model, and the environmental parameters;

[0078] H), Obtain the chip temperature:

[0079] Collect the temperatures of five points including the four corners and the center point of the chip, and calculate the average chip temperature;

[0080] I), Data comparison module:

[0081] When the data comparison module determines that the relative error between the two is within 10%, it immediately enters the multi-condition judgment module;

[0082] J) Multi-condition judgment module:

[0083] When the multi-condition module determines that multiple condition tests have been completed;

[0084] K) Test termination.

[0085] In an embodiment of the present invention, in step I), when the data comparison module determines that the relative error between the two is greater than 10%, it enters step K).

[0086] In an embodiment of the present invention, in step J), when the multiple working condition judgment module determines that the multiple working condition tests have not been completed, steps C) to I) are repeated.

[0087] As mentioned above, the above are only specific embodiments of the present invention, but the protection scope of the present invention is not limited thereto. Any changes or substitutions that can be easily conceived by those skilled in the art within the technical scope disclosed by the present invention should be covered within the protection scope of the present invention. Therefore, the protection scope of the present invention shall be subject to the protection scope of the claims.

Claims

1. A method for verifying real-time chip power consumption prediction, characterized in that Including the following steps: A), Chip workbench setup: Determine the chip and the peripheral nuclear power or high-speed power supply network of the PCB on which it is installed, and arrange a group of power monitoring points on the peripheral nuclear power or high-speed power supply network; Connect the regulated power supply to the power monitoring points; B), Install the thermocouple and current collector: Attach the thermocouple to the calibrated temperature points on the chip surface, and connect the current collector to the power monitoring points; C), Adjust the working state of the functional circuit: Adjust the working state of the chip functional circuit, determine the working load of the chip, and determine the ambient temperature; The working state of the functional circuit includes at least the no-load state and the full-load state; D), Collect the chip temperature: Set multiple temperature collection points for the chip and measure the temperatures of the temperature collection points; Record the temperature change curves of each of the collection points; Record the temperature value when the temperature change curve is stable; Calculate the average temperature of the chip from the temperature values; E), Collect the chip current: Collect the supply current and supply voltage of the chip in the working state; F), Obtain the power consumption through theoretical calculation: Obtain the power of the chip based on the supply current and the supply voltage; G), Simulation calculation: Set the thermal model and environmental parameters for the chip; H), Numerically calculate the chip surface temperature: Simulate and calculate the chip surface temperature through the thermal model, the power, and the environmental parameters; I), Data comparison: Compare the average temperature and the chip surface temperature. If the relative error is less than or equal to 10%, then perform multiple working condition judgments; If the relative error is greater than 10%, then the test terminates and it is judged that the test is inaccurate; Among them, the method of the multiple working condition judgments is: Repeat C)-I) until the working states of all functional circuits are tested.

2. The calibration method for real-time chip power consumption prediction according to claim 1, wherein In A), the regulated power supply satisfies the normal operation of the chip, and the load of the connected cable satisfies the maximum current carrying capacity of the chip.

3. The calibration method for real-time chip power consumption prediction according to claim 1, characterized in that The temperature collection points include at least the four corners and the center point of the chip.

Images