Split double-sided wafer and mask holder

Abstract

An electrostatic clamp and a method for manufacturing the same are disclosed. The electrostatic clamp includes a first stack and a second stack, wherein the first stack is joined to the second stack. Each of the first stack and the second stack includes: a clamp body; one or more electrodes disposed on the clamp body; a dielectric plate disposed on the one or more electrodes; and a plurality of channels inside the clamp body.

Description

[0001] CROSS-REFERENCE TO RELATED APPLICATIONS

[0002] This application claims priority to U.S. Provisional Patent Application No. 62 / 853,900, filed on May 29, 2019, which is hereby incorporated by reference in its entirety. Technical Field

[0003] The present invention relates to an electrostatic chuck for supporting an object (eg, a mask or a substrate) in a vacuum system (eg, an extreme ultraviolet (EUV) lithography system). Background Art

[0004] A lithographic apparatus is a machine that applies a desired pattern to a substrate, usually to a target portion of a substrate. A lithographic apparatus can be used, for example, in the manufacture of an integrated circuit (IC). In this case, a patterning device (which is alternatively referred to as a mask or reticle) can be used to generate a circuit pattern to be formed on a single layer of an IC. The pattern can be transferred to a target portion (e.g., a portion including one or more dies) on a substrate (e.g., a silicon wafer). The transfer of the pattern is usually performed via imaging onto a layer of a radiation-sensitive material (resist) disposed on the substrate. Typically, a single substrate will include a network of adjacent target portions that are patterned continuously. Known lithographic apparatus include: a so-called stepper, in which each target portion is irradiated by exposing the entire pattern to the target portion at one time; and a so-called scanner, in which each target portion is irradiated by scanning the pattern by a radiation beam in a given direction (the "scanning" direction), while simultaneously scanning the target portion in parallel or antiparallel to the scanning direction. The pattern can also be transferred from a patterning device to a substrate by imprinting the pattern onto the substrate.

[0005] To print a pattern on a substrate, a lithography apparatus may use electromagnetic radiation. The wavelength of the electromagnetic radiation determines the minimum feature size printed in the resist. As semiconductor technology moves toward sub-20nm nodes, lithography systems with extreme ultraviolet (EUV) radiation are used to provide critical dimensions. Extreme ultraviolet (EUV) radiation may have a wavelength in the range of 4nm to 20nm, such as 6.7nm or 13.5nm.

[0006] During the lithography process, the mask and substrate are held in place in the lithography apparatus by a clamp. A lithography apparatus using EUV radiation may require that the EUV radiation beam path or at least a large part thereof must be held in a vacuum during the lithography operation. Therefore, in an EUV lithography apparatus, an electrostatic clamp is used instead of a conventional vacuum clamp.

[0007] Furthermore, lithographic apparatus using EUV radiation may require temperature regulation of, for example, the mask and / or substrate. Heat generated by absorbed EUV radiation or unwanted non-EUV radiation may cause deformation of the mask and / or substrate. To reduce deformation, a coolant may be circulated through the electrostatic chuck.

[0008] During IC manufacturing, many lithography levels are used to manufacture functional products, where each lithography level may have a different mask. Therefore, during operation in a semiconductor device, the lithography equipment frequently changes masks and wafers.

[0009] Therefore, there is a need for reliable and cost-effective wafer and reticle clamps for EUV lithography equipment. Summary of the invention

[0010] Embodiments of electrostatic chucks and methods of making the same are described in this disclosure.

[0011] In some embodiments, the electrostatic clamp includes a first stack and a second stack, wherein the first stack is engaged with the second stack. Each of the first stack and the second stack includes a clamp body, one or more electrodes disposed on the clamp body, a dielectric plate disposed on the electrodes, and a plurality of channels within the clamp body.

[0012] In some embodiments, the first stack and the second stack are joined by optical contact bonding.

[0013] In some embodiments, the first stack includes a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the fixture body.

[0014] In some embodiments, the first stack and the second stack are joined by electrical force generated between a conductive layer of the first stack and one or more electrodes of the second stack.

[0015] In some embodiments, the clamp body includes an insulator having an ultra-low coefficient of expansion.

[0016] In some embodiments, the plurality of channels are configured to carry a thermally regulated liquid or gas.

[0017] In some embodiments, each of the first stack and the second stack further includes an insulating layer configured to electrically isolate the one or more electrodes.

[0018] In some embodiments, the dielectric plate includes a plurality of burls.

[0019] Another aspect of the present invention provides a method for manufacturing an electrostatic chuck. The method includes forming a first stack of electrostatic chucks, forming a second stack of electrostatic chucks, and bonding the first stack to the second stack.

[0020] In some embodiments, the forming of the first and second stacks of electrostatic chucks includes forming a plurality of channels in a chuck body, forming one or more electrodes on the chuck body, forming an insulating layer on the chuck body, and forming a dielectric plate on the one or more electrodes. In some embodiments, the method further includes forming a plurality of burls on the dielectric plate.

[0021] In some embodiments, the bonding of the first stack to the second stack includes polishing bottom surfaces of the first stack and the second stack of the electrostatic chuck, wherein the bottom surface and the dielectric plate are on opposite sides of the respective chuck bodies of the first stack and the second stack. The bonding of the first stack to the second stack also includes forming an optical contact bond between the polished bottom surfaces of the first stack and the second stack.

[0022] In some embodiments, the bonding of the first stack to the second stack includes depositing a conductive layer on a bottom surface of the first stack, wherein the bottom surface of the first stack and the dielectric plate are on opposite sides of the fixture body. The bonding of the first stack to the second stack also includes applying a first voltage to the conductive layer of the first stack, and applying a second voltage different from the first voltage to one or more electrodes of the second stack.

[0023] Another aspect of the present invention provides a lithography device having the electrostatic chuck.

[0024] In some embodiments, the lithographic apparatus further comprises an illumination device configured to illuminate the pattern on the patterning device, and a projection system configured to project an image of the pattern onto a substrate, wherein the substrate is disposed on the electrostatic chuck.

[0025] In some embodiments, the first stack includes a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the fixture body.

[0026] In some embodiments, the first stack and the second stack are connected by electricity generated between a conductive layer of the first stack and one or more electrodes of the second stack.

[0027] In some embodiments, the lithographic apparatus further comprises an illumination device configured to illuminate a pattern on a patterning device, wherein an image of the patterning device is projected onto a projection system onto the substrate, wherein the patterning device is disposed on the electrostatic chuck.

[0028] In some embodiments, the first stack includes a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the fixture body.

[0029] In some embodiments, the first stack and the second stack are connected by electricity generated between a conductive layer of the first stack and one or more electrodes of the second stack.

[0030] Other features and advantages of the present invention, as well as the structure and operation of various embodiments of the present invention are described in detail below with reference to the accompanying drawings. Note that the present invention is not limited to the specific embodiments described herein. Such embodiments are presented herein for illustrative purposes only. Based on the teachings contained herein, other embodiments will be clear to those skilled in the relevant art. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The accompanying drawings, which are incorporated herein and constitute a part of the specification, illustrate the present invention and, together with the description, further serve to explain the principles of the invention and enable one skilled in the relevant art to make and use the invention.

[0032] Figure 1 is a schematic diagram of a reflective lithography apparatus according to an exemplary embodiment.

[0033] Figure 2 is a more detailed schematic diagram of a reflective lithography apparatus according to an exemplary embodiment.

[0034] Figure 3 is a schematic diagram of a lithography cell according to an exemplary embodiment.

[0035] Figure 4A and Figure 4B is a schematic diagram of an electrostatic chuck according to some embodiments of the present disclosure.

[0036] Figure 5 is a schematic diagram of an electrostatic chuck with a double stack according to one embodiment of the present disclosure.

[0037] Figure 6 is a schematic diagram of an electrostatic chuck with a double stack according to another embodiment of the present invention.

[0038] Figure 7 An exemplary method for forming a first stack of an electrostatic chuck having a dual stack according to some embodiments of the present disclosure is shown.

[0039] FIG. 8A to FIG. 8D Cross-sectional views of a first stack of an electrostatic chuck having a double stack at various process stages are shown according to some embodiments of the present disclosure.

[0040] Fig. 9 An exemplary method for forming an electrostatic chuck having a dual stack according to some embodiments of the present invention is described.

[0041] Fig. 10A and 10B Cross-sectional views of an electrostatic chuck with a double stack at different process stages according to some embodiments of the present disclosure are shown.

[0042] Fig.11An exemplary method for forming an electrostatic chuck having a dual stack according to some embodiments of the present invention is described.

[0043] FIG. 12A to FIG. 12C Cross-sectional views of an electrostatic chuck with a double stack at various process stages are shown according to some embodiments of the present invention.

[0044] The features and advantages of the present invention will become more apparent from the detailed description set forth below in conjunction with the accompanying drawings, in which the same reference numerals identify corresponding elements throughout the drawings. In the drawings, similar reference numerals generally represent identical, functionally similar, and / or structurally similar elements. In addition, generally, the leftmost digit of a reference numeral identifies the drawing in which the reference numeral first appears. Unless otherwise indicated, the drawings provided throughout this disclosure should not be construed as drawings drawn to scale. Specific embodiments

[0045] This specification discloses one or more embodiments incorporating features of the present invention. The disclosed embodiments merely illustrate the present invention. The scope of the present invention is not limited to the disclosed embodiments. The present invention is defined by the appended claims.

[0046] The described embodiments and references in the specification to "one embodiment," "an embodiment," "an example embodiment," etc., indicate that the described embodiments may include particular features, structures, or characteristics, but not every embodiment may include the particular features, structures, or characteristics. Moreover, such phrases do not necessarily refer to the same embodiment. In addition, when a particular feature, structure, or characteristic is described in conjunction with an embodiment, it should be understood that it is within the knowledge of those skilled in the art to implement such feature, structure, or characteristic in conjunction with other embodiments (whether or not explicitly described).

[0047] For convenience in describing the relationship of one element or feature to another element or feature as shown in the figures, spatially relative terms may be used herein, such as "below", "below", "lower", "above", "above", "upper", etc. The spatially relative terms are intended to encompass different orientations of the device in use or operation in addition to the orientations depicted in the figures. The device may be otherwise oriented (rotated 90 degrees or at other orientations), and accordingly, relative descriptors used herein may be interpreted similarly spatially.

[0048] As used herein, the term "approximately" refers to a value of a given quantity that can vary based on a particular technology. Depending on the particular technology, the term "approximately" can refer to a value of a given quantity that varies, for example, by 10% to 30% (e.g., ±10%, ±20%, or ±30% of the value).

[0049] The embodiments of the present disclosure may be implemented in hardware, firmware, software, or any combination thereof. The embodiments of the present disclosure may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include a read-only memory (ROM); a random access memory (RAM); a disk storage medium; an optical storage medium; a flash memory device; an electrical, optical, acoustic, or other form of propagation signal (e.g., a carrier wave, an infrared signal, a digital signal, etc.), etc. In addition, firmware, software, routines, and / or instructions may be described herein as performing certain actions. However, it should be understood that this description is merely for convenience, and that this action is actually caused by a computing device, processor, controller, or other device that executes firmware, software, routines, instructions, etc.

[0050] However, before describing such embodiments in further detail, it is beneficial to provide an example environment in which embodiments of the present disclosure may be implemented.

[0051] Exemplary Reflective Lithography System

[0052] Figure 1 is a schematic diagram of a lithographic apparatus 100 in which an embodiment of the present invention may be implemented. The lithographic apparatus 100 includes the following: an illumination system (illuminator) IL configured to condition a radiation beam B (e.g., extreme ultraviolet radiation); a support structure (e.g., a mask stage) MT configured to support a patterning device (e.g., a mask, a reticle, or a dynamic patterning device) MA connected to a first positioner PM configured to accurately position the patterning device MA; and a substrate stage (e.g., a wafer stage) WT configured to hold a substrate (e.g., a wafer coated with a resist) W and connected to a second positioner PW configured to accurately position the substrate W. The lithographic apparatus 100 also has a reflective projection system PS configured to project a pattern imparted to the radiation beam B by the patterning device MA onto a target portion (e.g., including one or more dies) C of the substrate W.

[0053] The illumination system IL may include various types of optical components, such as refractive, reflective, catadioptric, magnetic, electromagnetic, electrostatic or other types of optical components, or any combination thereof, for directing, shaping or controlling the radiation beam B.

[0054] The support structure MT holds the patterning device MA in a manner that depends on the orientation of the patterning device MA relative to the reference frame, the design of the lithographic apparatus 100, and other conditions, such as whether the patterning device MA is held in a vacuum environment. The support structure MT may use mechanical, vacuum, electrostatic or other clamping techniques to hold the patterning device MA. The support structure MT may be, for example, a frame or a table, which may be fixed or movable as required. By using sensors, the support structure MT may ensure that the patterning device MA is in a desired position, for example relative to the projection system PS.

[0055] The term “patterning device” MA should be broadly interpreted as referring to any device that can be used to impart a pattern to the cross-section of the radiation beam B, for example a device that can produce a pattern in a target area C of the substrate W. The pattern imparted to the radiation beam B may correspond to a specific functional layer in a device produced in the target portion C to form an integrated circuit.

[0056] In some embodiments, the patterning device MA may be reflective (e.g., Figure 1 100). Examples of patterning devices MA include reticles, masks, programmable mirror arrays, or programmable LCD panels. Masks are well known in lithography and include mask types such as binary, alternating phase shift, or attenuated phase shift, as well as various hybrid mask types. Examples of programmable mirror arrays employ a matrix arrangement of small mirrors, each of which can be individually tilted to reflect an incoming radiation beam in different directions. The tilted mirrors impart a pattern in the radiation beam B, which is reflected by the matrix of small mirrors.

[0057] The term "projection system" PS may include any type of projection system, including refractive, reflective, catadioptric, magnetic, electromagnetic and electrostatic optical systems, or any combination thereof, to suit the exposure radiation used, or other factors, such as the use of an immersion liquid or the use of a vacuum on the substrate W. A vacuum environment may be used for EUV or electron beam radiation, since other gases would absorb too much radiation or electrons. Therefore, a vacuum environment may be provided to the entire beam path with the aid of a vacuum wall and a vacuum pump.

[0058] The lithographic apparatus 100 may be of a type having two (dual stage) or more substrate tables WT (and / or two or more mask tables). In such a "multi-stage" machine, additional substrate tables WT may be used in parallel, or preparatory steps may be performed on one or more tables while exposure is being carried out using one or more other substrate tables WT. In some cases, the additional table may not be a substrate table WT.

[0059] The illuminator IL receives a radiation beam from a radiation source SO. For example, when the source SO is an excimer laser, the source SO and the lithographic apparatus 100 may be separate physical entities. In other cases, such as when the source SO is a mercury lamp, the source SO may be an integral part of the lithographic apparatus 100. In some embodiments, the source SO is configured to generate an EUV radiation beam.

[0060] The radiation beam B is incident on a patterning device (e.g., a mask) MA held on a support structure (e.g., a mask table) MT and is patterned by the patterning device MA. In the lithographic apparatus 100, the radiation beam B is reflected from the patterning device (e.g., a mask) MA. After reflecting from the patterning device (e.g., a mask) MA, the radiation beam B passes through a projection system PS, which focuses the radiation beam B onto a target portion C of a substrate W. With the aid of a second positioner PW and a position sensor IF2 (e.g., an interferometric device, a linear encoder, or a capacitive sensor), the substrate table WT can be precisely moved (e.g., so as to position different target portions C in the path of the radiation beam B). Similarly, a first positioner PM and another position sensor IF1 can be used to precisely position the patterning device (e.g., a mask) MA relative to the path of the radiation beam B. The patterning device (e.g., mask) MA and the substrate W can be aligned using mask alignment marks M1, M2 and substrate alignment marks P1, P2.

[0061] With the aid of a second positioner PW and a position sensor IF (e.g. an interferometric device, a linear encoder or a capacitive sensor), the substrate table WT can be precisely moved (e.g. in order to position a different target portion C in the path of the radiation beam B). Similarly, the first positioner PM and another position sensor ( Figure 1 B) can be used to accurately position the mask MA relative to the path of the radiation beam B (for example, after mechanical retrieval from a mask library, or during scanning).

[0062] Typically, movement of the mask table MT can be achieved with the aid of a long-stroke module (coarse positioning) and a short-stroke module (fine positioning) which form part of the first positioner PM. Similarly, movement of the substrate table WT can be achieved using a long-stroke module and a short-stroke module which form part of the second positioner PW. In the case of a stepper (as opposed to a scanner), the mask table MT may be connected only to a short-stroke actuator, or it may be fixed. Mask alignment marks M1, M2 and substrate alignment marks P1, P2 may be used to align the mask MA and the substrate W. Although the substrate alignment marks (as shown) occupy dedicated target portions, they may be located in the space between target portions (referred to as scribe alignment marks). Similarly, in the case where more than one die is provided on the mask MA, the mask alignment marks may be located between the dies.

[0063] In some embodiments, the mask table MT and the patterning device MA can be in a vacuum chamber V, where a vacuum robot IVR can be used to move the patterning device, such as a mask, into and out of the vacuum chamber. The in-vacuum robot needs to be calibrated to smoothly transfer any payload (e.g., a mask) to the fixed kinematic support of the transfer station.

[0064] The lithographic apparatus 100 may be used in at least one of the following modes:

[0065] 1. In step mode, the support structure (e.g. mask table) MT and the substrate table WT remain substantially stationary while an entire pattern imparted to the radiation beam B is projected at one time onto a target portion C (i.e. one static exposure). The substrate table WT is then moved in the X and / or Y direction so that a different target portion C can be exposed.

[0066] 2. In scan mode, the support structure (e.g. mask table) MT and the substrate table WT are scanned synchronously while a pattern imparted to the radiation beam B is projected onto a target portion C (i.e. a single dynamic exposure). The speed and direction of the substrate table WT relative to the support structure (e.g. mask table) MT may be determined by the (de-)magnification and image reversal characteristics of the projection system PS.

[0067] 3. In another mode, the support structure (e.g., mask table) MT is kept substantially stationary to hold the programmable patterning device, and the substrate table WT is moved or scanned while a pattern imparted to the radiation beam B is projected onto a target portion C. A pulsed radiation source SO may be employed, and the programmable patterning device is updated as required after each movement of the substrate table WT or between successive radiation pulses during a scan. This mode of operation may be readily applied to maskless lithography utilizing a programmable patterning device, such as a programmable mirror array.

[0068] Combinations and / or variations on the above-described modes of use or entirely different modes of use may also be employed.

[0069] Figure 2 The lithographic apparatus 100 is shown in more detail, comprising a source collector apparatus SO, an illumination system IL and a projection system PS.

[0070] The source collector device 50 is constructed and arranged so that a vacuum environment can be maintained in the closed structure 220. The source collector device 50 includes a source chamber 211 and a collector chamber 212, and is configured to generate and transmit EUV radiation.

[0071] EUV radiation may be generated by a gas or vapor, such as Xe gas, Li vapor or Sn vapor, wherein an EUV radiation emitting plasma 210 is generated to emit radiation in the EUV range of the electromagnetic spectrum. The at least partially ionized EUV radiation emitting plasma 210 may be generated, for example, by an electrical discharge or a laser beam. In order to effectively generate radiation, a partial pressure of Xe, Li, Sn vapor or any other suitable gas or vapor of, for example, 10 Pa may be required. In one embodiment, an excited tin (Sn) plasma is provided to generate EUV radiation.

[0072] The radiation emitted by the EUV radiation emitting plasma 210 enters the collector chamber 212 from the source chamber 211 via an optional gas barrier or contaminant trap 230 (also referred to as a contaminant barrier or foil trap in some cases) that is located in or behind an opening in the source chamber 211. The contaminant trap 230 may include a channel structure. The contaminant collector 230 may also include a gas barrier or a combination of a gas barrier and a channel structure. The contaminant trap or contaminant barrier 230 further noted herein includes at least a channel structure.

[0073] The collector chamber 212 may include a radiation collector CO, which may be a so-called grazing incidence collector. The radiation collector CO has an upstream radiation collector side 251 and a downstream radiation collector side 252. Radiation passing through the collector CO may be reflected from the grating spectral filter 240 to be focused on a virtual source point IF. The virtual source point IF is often referred to as an intermediate focus, and the source collector arrangement is arranged so that the intermediate focus IF is located at or near an opening 219 in the enclosed structure 220. The virtual source point IF is an image of the radiation emitting plasma 210. The grating spectral filter 240 is particularly used to suppress infrared (IR) radiation.

[0074] The radiation then passes through an illumination system IL which may include a faceted field mirror arrangement 222 and a faceted pupil mirror arrangement 224 arranged to provide a desired angular distribution of the radiation beam 221 at the patterning device MA and a desired uniformity of radiation intensity at the patterning device MA. When the radiation beam 221 is reflected at the patterning device MA held by the support structure MT, a patterned beam 226 is formed and the patterned beam 226 is imaged by the projection system PS via reflective elements 228, 229 onto a substrate W held by a wafer stage or substrate table WT.

[0075] There may typically be more elements in the illumination optics unit IL and the projection system PS than shown. Depending on the type of lithographic apparatus, a grating spectral filter 240 may optionally be present. In addition, there may be more than Figure 2 More reflectors are shown, for example, with Figure 2 Compared to what is shown, there may be one to six additional reflective elements in the projection system PS.

[0076] like Figure 2 As shown, the light collector CO is depicted as a nested light collector with grazing incidence reflectors 253, 254 and 255, just as an example of a light collector (or light collector mirror). The grazing incidence reflectors 253, 254 and 255 are arranged axially symmetrically around the optical axis O, and this type of light collector CO is preferably used in combination with a discharge produced plasma source, which is generally called a DPP source.

[0077] Exemplary Lithography Cell

[0078] Figure 3 A lithography unit 300 is shown, sometimes also referred to as a lithography unit or cluster. The lithography apparatus 100 may form part of the lithography unit 300. The lithography unit 300 may also include one or more devices for performing pre-exposure and post-exposure processes on a substrate. Conventionally, these one or more devices include: a spin coater SC for depositing a resist layer, a developer DE for developing the exposed resist, a cooling plate CH, and a baking plate BK. A substrate handler or robot RO picks up substrates from input / output ports I / O1, I / O2, moves them between different processing devices, and then transfers them to a feed station LB of the lithography apparatus 100. These devices are generally collectively referred to as track devices under the control of a track control unit TCU, which itself is controlled by a management control system SCS, which also controls the lithography apparatus via a lithography control unit LACU. Therefore, different devices can be operated to maximize throughput and processing efficiency.

[0079] Exemplary Electrostatic Chuck

[0080] Figure 4A and 4B A cross-sectional schematic diagram of exemplary electrostatic clamps 400 and 402 according to some embodiments is shown, which can be configured to hold an object 403 during operation in a lithographic apparatus 100. Object 403 can be a patterning device (e.g., a mask) or a substrate (e.g., a wafer). In one example, electrostatic clamp 400 can be used to hold a patterning device (e.g., a mask) MA on a support structure MT of the lithographic apparatus 100, and electrostatic clamp 402 can be used to hold a substrate (e.g., a wafer) W on a substrate table WT. In this example, electrostatic clamp 400 is also referred to as a mask clamp 400, and electrostatic clamp 402 is also referred to as a wafer clamp 402.

[0081] According to one embodiment, electrostatic chucks 400 and 402 include a chuck body 404, a dielectric plate 406, and an electrode 408. In some embodiments, electrostatic chucks 400 and 402 also include a plurality of channels 410 embedded within chuck body 404.

[0082] The fixture body 404 has opposite and parallel surfaces 404f and 404b. The surface 404f is closer to the object 403 (e.g., a mask or a wafer). The surface 404b may be closer to the photolithography apparatus 100 (in the Figure 1-2 The mask chuck 412 on the support structure MT in FIG. Figure 4A ). The surface 404b may be located near the lithographic apparatus 100 (in Figure 1 to Figure 2 The wafer chuck 413 on the substrate table WT in Figure 4B ).

[0083] In some embodiments, the clamp body 404 can be made of an insulator that is configured to provide mechanical support to the object and isolate the electrostatic field during operation of the electrostatic clamps 400 and 402, as explained further below. In some embodiments, the insulator can have an ultra-low coefficient of thermal expansion and can include, for example, an ultra-low expansion silicon-based material (e.g., manufactured by Corning). ), glass materials, ceramic materials, silicon-based glass ceramic materials (e.g., manufactured by SCHOTT ) or any combination thereof. By using materials with ultra-low thermal expansion, thermal stresses can be reduced during high temperature manufacturing of the electrostatic clamps 400 and 402. High thermal stresses may result in deformation of the electrostatic clamps 400 and 402, which may be transferred to the object 403 during a clamping operation when the object 403 is mounted on the electrostatic clamp 400 or 402 on the substrate table WT or the support structure MT.

[0084] In some embodiments, the dielectric plate 406 may be made of an insulator and may also have an ultra-low coefficient of thermal expansion. In some embodiments, the dielectric plate 406 may be made of the same material as the fixture body 404 so that thermal stress caused by thermal expansion mismatch between heterogeneous materials may be minimized. In some embodiments, the dielectric plate 406 may also be made of a material having properties that substantially match those of the mask or wafer.

[0085] In some embodiments, dielectric plate 406 may further include a plurality of burls 414, wherein burls 414 contact object 403 or chuck 412 during a clamping operation. Burls 414 have a relatively small lateral dimension (e.g., Figure 4A403), so that the total contact area with the object 403 can be reduced. In this way, the burls 414 can help provide a close contact with the object 403 because, statistically, contamination particles are less likely to land on a smaller surface area than a large flat surface. In addition, given a certain clamping force, the pressure between the electrostatic clamp 400 or 402 and the object 403 is increased with a smaller contact area. Therefore, a closer contact can be formed.

[0086] In some embodiments, the electrodes 408 of the electrostatic chuck 400 or 402 are located between the chuck body 404 and the dielectric layer 406, and each electrode 408 is separated from another electrode by an insulating layer 416. In some embodiments, the electrodes 408 and the insulating layer 416 are coplanar. In some embodiments, the electrodes 408 can be made of any suitable conductive material, such as a metal or metal alloy, such as aluminum, chromium, platinum, gold, or any combination thereof. In some embodiments, the insulating layer 416 can be made of any suitable insulator, such as silicon oxide, silicon nitride, silicon oxynitride, polyimide, spin-on glass, etc.

[0087] Electrode 408 may apply a voltage in the range of 100 to 5000 V and may generate an electric field across dielectric plate 406, wherein the electric field may induce opposite charges (also referred to as "image charges") on the conductive surface of object 403. The attraction between the electrode and the image charges keeps the object in close contact with electrostatic clamp 400 or 402. In some embodiments, object 403 comprises a semiconductor wafer, wherein the semiconductor material on the back side of the semiconductor wafer may have a conductive surface. Thus, electrostatic clamp 402 may induce an image charge on the back side of the semiconductor wafer and thereby hold the wafer in place (at Figure 4B In some embodiments, object 403 includes a mask, wherein the back side of the mask may be coated with a conductive film. Similarly, electrostatic clamp 400 may introduce an image charge on the back side of the mask, thereby holding the mask in place (in Figure 4A inverted).

[0088] In some embodiments, the voltage applied to the electrode 408 can generate a large electric field on the dielectric plate 406, however, the leakage current can be very small. In some embodiments, the thickness and material of the dielectric plate 406 are selected so that the leakage current between the electrode 408 and the object 403 can be ignored, and the breakdown voltage associated with the high electric field is higher than the operating voltage range of the electrostatic clamps 400 and 402. The image charge induced on the conductive surface of the object 403 is also called static charge. Similarly, the distance between each electrode 408 and the material of the insulating layer 416 is selected so that the leakage current between the electrodes 408 is also ignored, and the breakdown voltage of the insulating layer 416 is higher than the operating voltage range of the electrostatic clamps 400 and 402.

[0089] exist Figure 4B In the embodiment, an electrostatic chuck (eg, a wafer chuck) 402 includes a bottom dielectric plate 418, a bottom insulating layer 420, and a bottom electrode 422, wherein the bottom dielectric plate 418, the bottom insulating layer 420, and the bottom electrode 422 are configured to hold a wafer located at Figure 1 to Figure 2 4. The wafer holder on the wafer chuck 413 on the substrate table WT in FIG. The materials and structures of the bottom dielectric plate 418, the bottom insulating layer 420, and the bottom electrode 422 are similar to the dielectric plate 406, the insulating layer 416, and the electrode 408, respectively. Since the wafer holder 413 is generally made of or coated with a metal material and can be electrically grounded (or directly applied with an external voltage), a single bottom electrode 422 can be sufficient for the wafer holder 402. In this example, due to the difference in potential (e.g., different voltage values), an electric field can be directly established between the bottom electrode 422 and the wafer chuck 413. In this way, the wafer holder 402 can be held on the wafer chuck 413 by electricity.

[0090] although Figure 4A and Figure 4B Only four electrodes 408 are shown, but it should be understood that the electrostatic chuck 400 or 402 may include fewer or more electrodes. Similarly, Figure 4B The bottom electrode 422 in is not limited to a single electrode.

[0091] In some embodiments, the channel 410 of the electrostatic chuck 400 and 402 is parallel to the surface 404f or 404b. The channel 410 can be configured to carry a thermally regulated liquid or gas, such as but not limited to water, air, alcohol, glycol, or a phase change coolant (e.g., Freon, carbon dioxide). An external pump (not shown) can be used to regulate the temperature and drive the liquid or gas to circulate through the channel 410.

[0092] The circulating thermally conditioned liquid or gas may help regulate the temperature of the electrostatic clamps 400 and 402 to a desired temperature. The temperature regulation of the electrostatic clamps 400 and 402 may include absorbing unwanted heat by the thermally conditioned fluid from the electrostatic clamps 400 and 402. The unwanted heat may be transferred from the clamped object 403 to the electrostatic clamps 400 and 402 through the clamping surfaces and / or burls.

[0093] In some embodiments, the lithographic apparatus 100 is an EUV system. An object 403, such as a mask or a wafer, can absorb EUV radiation during operation, and the absorbed light energy can cause heat and increased temperature in the object 403, thereby causing deformation (e.g., warping) of the object and thereby causing errors in pattern transfer during lithography. By cooling the wafer via the channel 410, the temperature of the electrostatic chucks 400 and 402 can be kept relatively constant. Excess heat from the object 403 (e.g., a wafer or a mask) can be dissipated by the cooled chucks 400 or 402.

[0094] like Figure 4B As shown, electrostatic chuck 402 can be used as a wafer chuck. In this example, electrostatic chuck 402 relies on electricity to hold wafer 403 in place and connected to wafer chuck 413. Electric force can be generated between electrode 408 and the image charge on wafer 403. Electric force can also be generated between bottom electrode 422 and wafer chuck 413 (e.g., electrical ground).

[0095] like Figure 4A As shown, electrostatic clamp 400 can be used as a mask clamp. In this example, electrostatic clamp 400 can hold mask 403 in place by the electric force between electrodes 408 and the image charge induced in the mask. In some embodiments, template clamp 400 can be attached to template chuck 412 by "optical contact" at surface 404b. In this example, "optical contact" refers to direct bonding between substantially defect-free and highly polished surfaces without using any bonding material, such as epoxy resin or any other adhesive material. "Optical contact" can be generated by intermolecular interactions, such as van der Waals forces between bonding surfaces. In some embodiments, annealing can convert van der Waals forces into stronger covalent bonds, and the bonding structure can be thereby enhanced.

[0096] In the manufacturing process of integrated circuits (ICs), photolithography is widely used to form design patterns on semiconductor wafers. In manufacturing equipment, a large number of semiconductor wafers are processed in a photolithography tool. The number of wafers that can be processed in a certain period of time (e.g., wafers per hour) is a quality factor of productivity. Therefore, the wafer holder for the photolithography tool needs to facilitate quick and easy replacement of wafers, as well as easy replacement of damaged or worn wafer holders due to high usage. Figure 4B The illustrated wafer chuck 402 implements these features, however, dual electrodes are difficult and expensive to manufacture on a single electrostatic chuck.

[0097] Although advanced semiconductor technology nodes require more than 50 lithography levels, each with a specially designed mask, changing masks occurs less frequently than changing wafers. Figure 4AThe electrostatic clamp 400 shown has an electrode 408 on one side close to the mask 403, which can be manufactured more easily and cheaply. However, the attachment of the mask clamp 400 to the mask chuck 412 is by optical contact (or direct bonding), which can only be performed by a person skilled in the art in a special environment. When there is a problem that the mask clamp 400 needs to be replaced, the entire mask clamp 400 and the mask chuck 412 must be replaced and can only be disassembled in a special environment. This problem negatively affects productivity and increases manufacturing costs.

[0098] In the present disclosure, an electrostatic chuck with a dual stack and a method for manufacturing the same are disclosed. The electrostatic chuck with a dual stack can provide fast and easy wafer / mask changes, as well as fast and easy wafer / mask chuck changes. The disclosed dual stack of electrostatic chucks can be manufactured in parallel, thereby improving cycle time and throughput.

[0099] Exemplary electrostatic chuck with double stack

[0100] Figure 5 An exemplary electrostatic clamp 500 having a dual stack (e.g., a first stack 501 and a second stack 502) according to some embodiments of the present disclosure is shown. The first stack 501 of the electrostatic clamp 500 includes a first dielectric plate 506 and a first electrode 508. The second stack 502 of the electrostatic clamp 500 includes a second dielectric plate 518 and a second electrode 522. In this example, the first stack 501 and the second stack 502 are connected as a whole at the clamp body 504. The first dielectric plate 506 and the second dielectric plate 518 are located on opposite sides of the clamp body 504. The first electrode 508 is sandwiched between the first dielectric plate 506 and the clamp body 504. The second electrode 522 is sandwiched between the second dielectric plate 518 and the clamp body 504. In some embodiments, each of the first and second stacks 501 and 502 of the electrostatic clamp 500 includes a plurality of channels 510 embedded in the clamp body 504.

[0101] In some embodiments, the electrostatic clamp 500 can be configured to clamp to the chuck 512 and the object 503 during operation in the lithographic apparatus 100. The object 503 can be a patterning device (e.g., a mask) or a substrate (e.g., a wafer). In one example, the electrostatic clamp 500 can be used to hold the patterning device (e.g., a mask) MA on the chuck 512 of the support structure MT of the lithographic apparatus 100. In another example, the electrostatic clamp 500 can also be used to hold the substrate (e.g., a wafer) W on the chuck 512 of the substrate table WT. In this way, the electrostatic clamp 500 with a double stack can be used as a mask clamp or a wafer clamp.

[0102] In some embodiments, electrostatic chuck 500 may be clamped to object 503 by first electrode 508 and to chuck 512 by second electrode 522. During the clamping operation, object 503 and chuck 512 are in contact with first and second dielectric plates 506 and 518, respectively.

[0103] In some embodiments, the clamp body 504 can be made of an insulator, similar to the Figure 4A and 4B In this example, the clamp body 504 may be made of an insulator having an ultra-low thermal expansion coefficient, and may include, for example, an ultra-low expansion silicon-based material (e.g., manufactured by Corning). ), glass materials, ceramic materials, silicon-based glass ceramic materials (e.g., manufactured by SCHOTT ) or any combination thereof.

[0104] In some embodiments, the first and second dielectric plates 506 and 518 may be made of an insulator similar to the dielectric plates 406 or 418. The first and second dielectric plates 506 and 518 may be made of an insulator having an ultra-low coefficient of thermal expansion. In some embodiments, the first and second dielectric plates 506 and 518 may be made of the same material as the fixture body 504 so that thermal stress caused by thermal expansion mismatch between heterogeneous materials may be minimized.

[0105] In some embodiments, the first and second dielectric plates 506 and 518 may also include a plurality of burls 514, wherein the burls 514 may provide better contact with the object 503 or the chuck 512 during a clamping operation. The size and function of the burls 514 are similar to Figure 4A and Figure 4B The burl 414 is shown.

[0106] In some embodiments, the first and second electrodes 508 and 522 of the electrostatic chuck 500 are also electrically isolated by the first and second insulating layers 516 and 520, respectively. In some embodiments, the first and second electrodes 508 and 522 are coplanar with the first and second insulating layers 516 and 520, respectively. In some embodiments, the first and second electrodes 508 and 522 can be made of any suitable conductive material, such as a metal or metal alloy, such as aluminum, chromium, platinum, gold, or any combination thereof. In some embodiments, the first and second insulating layers 516 and 520 can be made of any suitable insulator, such as silicon oxide, silicon nitride, silicon oxynitride, polyimide, spin-on glass, etc.

[0107] In some embodiments, similar to Figure 4A and Figure 4BElectrodes 408 and 422 in the first and second electrodes 508 and 522 can apply a voltage in the range of 100 to 5000 V, and can generate an electric field on the first and second dielectric plates 506 and 518, respectively. The electric field passing through the first and second dielectric plates 506 and 518 can induce opposite charges (also called "image charges") on the conductive surfaces of the object 503 and the chuck 512, respectively, thereby generating an attractive force between the first electrode 508 and the image charges on the object 503 and between the second electrode 522 and the image charges on the chuck 512. In this way, the electrostatic chuck 500 can keep the object 503 and the chuck 512 in close contact.

[0108] In some embodiments, the object 503 may be a semiconductor wafer, wherein the back side 503b of the semiconductor wafer may have a conductive surface. Thus, the electrostatic clamp 500 may introduce an image charge on the back side 503b of the semiconductor wafer, and thus hold the wafer in place. In some embodiments, the object 503 may be a mask, wherein the back side 503b of the mask may be coated with a conductive film, such as a chromium layer. Similarly, the electrostatic clamp 500 may introduce an image charge on the back side 503b of the mask, thereby holding the mask in place.

[0109] In some embodiments, the electrostatic clamp 500 can be configured to clamp to a Figure 1-2 The chuck 512 is mounted on the support structure MT or the substrate table WT in the embodiment. In some embodiments, the chuck 512 may be made of a metal material or coated with a metal material. In this example, the chuck 512 may be electrically grounded or directly applied with an external voltage. Therefore, when different electrical biases are applied, an electric field may be directly established between the second electrode 522 and the chuck 512. The power from the electric field may hold the electrostatic clamp 500 on the chuck 512. Note that the number of the first and second electrodes 508 and 522 is not limited to Figure 5 The electrostatic chuck 500 may include fewer or more electrodes, as known to those skilled in the art.

[0110] Similar to Figure 4A and Figure 4B The dielectric plates 406 / 418 in the electrostatic chuck 500 may be selected such that the thickness and material of the first and second dielectric plates 506 and 518 may be selected such that the leakage current between the first and second dielectric plates 506 / 518 and the object 503 / chuck 512 is negligible and the breakdown voltage associated with the high electric field is above the operating voltage range of the electrostatic chuck 500. Similarly, the width and material of the first and second insulating layers 516 and 520 may be selected such that the gap between the electrodes (e.g. Figure 5 The leakage current between each first electrode 508 in the embodiment of the present invention can also be ignored, and the breakdown voltage of the first and second insulating layers 516 and 520 is higher than the operating voltage range of the electrostatic chuck 500.

[0111] In some embodiments, the electrostatic chuck 500 includes at least two rows of channels 510, each row extending parallel to the surface of the electrostatic chuck 500, one row near the first electrode 508 and the other row near the second electrode 522. Figure 4A and Figure 4B In the channels 410, the channels 510 can be configured to carry a thermally regulated liquid or gas, such as, but not limited to, water, air, alcohol, ethylene glycol, or a phase change coolant (e.g., Freon, carbon dioxide). An external pump (not shown) can be used to regulate the temperature and drive the liquid or gas to circulate through the channels 510. The circulating thermally regulated liquid or gas can help regulate the temperature of the electrostatic clamp 500 to a desired temperature. The construction of at least two rows of channels 510 enables thermal control of opposite sides of the electrostatic clamp 500 separately. For example, the channels 510 closer to the first electrode 508 can circulate cooling water and can be used to cool the object 503 during the clamping operation. In another example, the channels 510 closer to the second electrode 522 can circulate warm water so that the chuck 512 can be maintained at room temperature during the clamping operation.

[0112] Figure 6 An exemplary electrostatic chuck 600 having a dual stack (e.g., a first stack 601 and a second stack 602) according to some embodiments of the present disclosure is shown. In this example, the first stack 601 is stacked on the second stack 602. The first and second stacks 601 and 602 of the electrostatic chuck 600 include first and second chuck bodies 604 and 605, respectively. In some embodiments, a first electrode 608 and a first dielectric plate 606 are disposed on top of the first chuck body 604. A second electrode 622 and a second dielectric plate 618 are disposed on the second chuck body 605. A conductive layer 624 is disposed on the first chuck body 604 on a side opposite to the first electrode 608 and the first dielectric plate 606. In this example, the conductive layer 624, the second dielectric plate 618, and the second electrode 622 are located between the first chuck body 604 and the second chuck body 605. In some embodiments, the electrostatic chuck 600 includes a plurality of channels 610 embedded in the first chuck body 604 and a plurality of channels 611 embedded in the second chuck body 605. Each of the first and second dielectric plates 606 and 618 includes a plurality of burls 614. The electrostatic chuck 600 also includes first and second insulating layers 616 and 620 configured to isolate the first and second electrodes 608 and 622, respectively.

[0113] In some embodiments, the first and second dielectric plates 606 and 618 are similar to Figure 55. In some embodiments, the first and second dielectric plates 506 and 518 of the electrostatic chuck 500 in FIG. 5. In some embodiments, the first and second electrodes 608 and 622 are similar to the first and second electrodes 508 and 522 of the electrostatic chuck 500. In some embodiments, the first and second insulating layers 616 and 620 are similar to the first and second insulating layers 516 and 520 of the electrostatic chuck 500. In some embodiments, the first and second channels 610 and 611 are similar to the channels 510 of the electrostatic chuck 500. In some embodiments, the burl 614 is similar to the burl 514 of the electrostatic chuck 500.

[0114] In some embodiments, the electrostatic clamp 600 can be configured to hold the object 603 when the first electrode 608 is appropriately biased with certain voltages. For example, positive and negative voltages can be applied alternately to the first electrodes 608. Each first electrode 608 can be adjacent to two reversely biased first electrodes 608. Similar to the first electrode 508 of the electrostatic clamp 500, the first electrode 608 can induce a mirror charge on the conductive surface 603b of the object 603. The electric field and thus the electric attraction between the first electrode 608 and the mirror charge on the object 603 can be strong enough to keep the object 603 in close contact with the electrostatic clamp 600.

[0115] In some embodiments, certain voltages may be applied to the second electrode 622 and the conductive layer 624 so that the potentials of the second electrode 622 and the conductive layer 624 may be different, thereby generating an attractive electric field and a force on the second dielectric plate 618. For example, the second electrode 622 may have a positive voltage applied, and the conductive layer 624 may have a negative voltage applied or be electrically grounded. In another example, the second electrode 622 may have a negative voltage applied or be electrically grounded, and the conductive layer 624 may have a positive voltage applied. The force between the second electrode 622 and the conductive layer 624 may be strong enough to bond the first stack 601 and the second stack 602 together as an electrostatic chuck 600.

[0116] In some embodiments, the electrostatic clamp 600 can be attached to the chuck 612 by direct bonding (also known as optical contact bonding). Optical contact bonding can be performed between two substantially defect-free and highly polished surfaces without the use of any adhesive such as epoxy. Optical contact bonding can be generated by attractive intermolecular interactions, such as van der Waals forces between the bonding surfaces. In some embodiments, post-bonding annealing can change the bonding forces from van der Waals bonds to stronger covalent bonds, thereby enhancing optical contact bonding.

[0117] Exemplary Method for Forming a Dual Stack Electrostatic Chuck

[0118] Figure 7 , Fig. 9 and Fig.11Flowcharts 700, 900 and 1100 are shown, according to an embodiment, illustrating a method for forming an electrostatic chuck having a dual stack. It should be understood that it may not be necessary Figure 7 , Fig. 9 and Fig.11 In addition, some steps can be performed simultaneously or in parallel. Figure 7 , Fig. 9 and Fig.11 The different orders shown are executed. FIG. 8A to FIG. 8D , FIG. 10A to FIG. 10B and FIG. 12A to FIG. 12C Flowcharts 700, 900, and 1100 are described. However, flowcharts 700, 900, and 1100 are not limited to these exemplary embodiments.

[0119] Figure 7 A flow chart 700 is shown for fabricating a first stack of an electrostatic chuck having a dual stack, according to some embodiments of the present disclosure. FIG. 8A to FIG. 8D A cross-sectional view of a first stack 800 is shown according to various process steps of flowchart 700 .

[0120] exist Figure 7 At process step 702 in the embodiment, a fixture body 804 having a plurality of channels 810 is formed, which has Fig. 8A The clamp body 804 may be similar to Figure 5 The fixture body 504 and Figure 6 The first / second clamp body 604 / 605 in the clamp body. The clamp body 804 can be made of an insulator with an ultra-low thermal expansion coefficient, and can include (for example) an ultra-low expansion silicon-based material (for example, manufactured by Corning). ), glass materials, ceramic materials, silicon-based glass ceramic materials (e.g., manufactured by SCHOTT ) or any combination thereof.

[0121] The surface of the fixture body 804 may be polished (or machined) to obtain a smoothness with a root mean square (RMS) roughness of about 0.5 nm or less. The polishing (or machining) process may include any suitable polishing process for glass or ceramic using, for example, cerium oxide slurry.

[0122] After polishing, an acid etch may be performed using, for example, an acid mixture including hydrofluoric acid, on the surface of the fixture body 804. The acid etch may remove several microns (e.g., approximately 5 microns) of the fixture body 804. This removal of material from the polished surface may help relieve stress in the fixture body 804 that may be induced by the machining process.

[0123] Channel 810 may be similar to Figure 5Channel 510 and Figure 6 In some embodiments, the channel 810 can be formed by using photolithography and glass etching processes. It should be noted that Fig. 8A The rectangular cross-sectional shape of the channel 810 in FIG. 8 is for illustrative purposes and is not limiting. According to various embodiments, the channel 810 may have other cross-sectional shapes (eg, conical, trapezoidal) without departing from the scope of the present invention.

[0124] exist Figure 7 At process step 704 in the Figure 8B In the exemplary structure of FIG. 1 , one or more electrodes 808 are formed on the fixture body 804. The one or more electrodes 808 may be similar to Figure 5 The first electrode 508 and Figure 6 The first electrode 608 in. Forming one or more electrodes 808 includes depositing a conductive film and patterning it using photolithography and etching. The conductive film can be a metal or metal alloy, such as aluminum, chromium, platinum, gold, or any combination thereof. The conductive film can be deposited using any conventional method suitable for metals, such as sputtering, electroplating, thermal evaporation, atomic layer deposition (ALD), or chemical vapor deposition (CVD). In some embodiments, forming one or more electrodes 808 can also include deposition using a shadow mask.

[0125] exist Figure 7 At process step 706, using Figure 8C In the exemplary structure shown in FIG. 8 , an insulating layer 816 is formed on the fixture body 804. In some embodiments, the insulating layer 816 may be similar to Figure 5 The first / second insulating layer 516 / 520 and Figure 6 The first / second insulating layer 616 / 620 in. The insulating layer 816 can be any suitable insulator, such as silicon oxide, silicon oxynitride, silicon nitride, polyimide, spin-on glass, or any combination thereof. The formation of the insulating layer 816 may include deposition and patterning. The insulating layer 816 may be deposited using any conventional method suitable for dielectric materials, such as but not limited to CVD, sputtering, evaporation, and spin coating. The insulating layer 816 may then be patterned using photolithography and etching. In some embodiments, the formation of the insulating layer 816 may also include a planarization process, such as chemical mechanical polishing, so that the insulating layer 816 may be coplanar with one or more electrodes 808.

[0126] exist Figure 7 At process step 708, using Fig.8D, a dielectric plate 806 is formed on the fixture body 804. In some embodiments, the dielectric plate 806 can be formed on top of one or more electrodes 808 and the insulating layer 816. In some embodiments, the dielectric plate 806 can be similar to the first / second dielectric plates 506 / 518 and the first / second dielectric plates 606 / 618. In some embodiments, the dielectric plate 806 can also be made of an insulator with an ultra-low thermal expansion coefficient. In some embodiments, the dielectric plate 806 can be made of the same material as the fixture body 804 so that thermal stress caused by thermal expansion mismatch between heterogeneous materials can be minimized.

[0127] In some embodiments, dielectric plate 806 further includes a plurality of burls 814. Burls 814 may be Figure 5 The knob 514 and Figure 6 The burl 614 in the dielectric plate 806. The burl 814 can be formed by patterning the dielectric plate 806 using photolithography and etching. The etching of the dielectric plate 806 includes wet etching or dry etching (e.g., reactive ion etching). It should be noted that the rectangular cross-sectional shape of the burl 814 is for illustrative purposes and not limiting. According to various embodiments, the burl 814 may have other cross-sectional shapes (e.g., spherical, conical, trapezoidal) without departing from the scope of the present invention.

[0128] In completion Figure 7 After process step 708 in FIG. 8 , a first stack 800 (eg, Fig.8D The first stack 800 may be similar to Figure 5 The first stack 501 and Figure 6 The first stack 601 in.

[0129] Fig. 9 A flow chart 900 is illustrated for fabricating an electrostatic chuck having a dual stack according to some embodiments of the present invention. FIG. 10A to FIG. 10B A cross-sectional view of an electrostatic chuck 1010 with a double stack according to flowchart 900 is shown at various process steps.

[0130] exist Fig. 9 At process step 902 in FIG. 1 , a first stack for an electrostatic chuck having a double stack is formed. Figure 7 The flowchart 700 in FIG. 1 forms a first stack. An example of a first stack is Fig.8D A first stack 800 is shown.

[0131] exist Fig. 9 At process step 904 in FIG. 1 , a second stack is formed for an electrostatic chuck having a double stack. An example of a second stack is shown in FIG. Fig. 10A The second stack 1000 is shown in FIG. Figure 7 Similar process steps in the flowchart 700 in FIG. 7 form the second stack 1000. In one example, the second stack 1000 may have a single electrode 1022. The number of electrodes of the second stack 1000 may be greater and is not limited to the scope of the present disclosure.

[0132] exist Fig. 9 At process step 906 in FIG. 1 , the first stack 800 and the second stack 1000 of the electrostatic chuck are bonded together by optical contact bonding. Thus, an electrostatic chuck 1010 having a double stack is formed. Fig. 10B The structure of the first stack 800 and the second stack 1000 during optical contact bonding is shown. In this configuration, the second stack 1000 is flipped upside down, and the bonding interface is located between the clamp bodies of the first and second stacks. The electrostatic clamp 1010 after bonding can be Figure 5 The electrostatic clamp 500 in.

[0133] The optical contact bonding process may include polishing and cleaning the bottom surfaces 800b and 1000b of the bonding interface prior to optical contact bonding. The bottom surfaces 800b and 1000b may be polished to a root mean square (RMS) roughness of about 0.5 nm or less using any suitable polishing process, such as but not limited to a cerium oxide slurry polishing process. Subsequently, the first stack 800 may be directly bonded to the second stack 1000 by pressing the bottom surface 800b against the bottom surface 1000b under a pressure appropriate for the substrate material being used. Optionally, the electrostatic chuck 1010 with the dual stack may be annealed at a temperature in the range of about 200-1200 degrees Celsius to enhance bonding.

[0134] According to one embodiment, optical contact bonding (also referred to as direct bonding) is bonding between substantially defect-free and highly polished surfaces (e.g., bottom surfaces 800b and 1000b) without using any bonding material, such as epoxy or any adhesive material. Optical contact bonding can be generated by attractive intermolecular interactions, such as van der Waals forces between bonding surfaces (e.g., bottom surfaces 800b and 1000b). Annealing the optical contact bond (as described above) can transform, for example, van der Waals bonds between bonding surfaces into stronger covalent bonds, thereby strengthening the optical contact bonding structure.

[0135] Fig.11 A flow chart 1100 is illustrated for fabricating an electrostatic chuck having a dual stack according to some embodiments of the present invention. FIG. 12A to FIG. 12C A cross-sectional view of an electrostatic chuck 1210 having a double stack at various process steps according to flow chart 1100 is shown.

[0136] In process step 1102, a first stack for an electrostatic chuck is formed having a first electrode and a first dielectric plate. The first stack may be Fig.8D The first stack 800 in the Figure 7 700 in the flowchart to manufacture.

[0137] In process step 1104, a second stack for an electrostatic chuck is formed having a second electrode and a second dielectric plate. The second stack may be Fig. 10A The second stack 1000 shown in FIG. Fig. 9 The method is fabricated as described in process step 904 .

[0138] At process step 1106 , the second stack 1000 is bonded onto the chuck 1212 by direct bonding (eg, optical contact bonding). Fig. 12A An exemplary structure is shown in FIG. 1 , where the chuck 1212 can be a wafer chuck, a mask chuck, or any suitable chuck in a vacuum system.

[0139] In process step 1108, a conductive layer is disposed on the first stack 800, wherein the first electrode and the conductive layer are on opposite sides of the first stack. Fig. 12B 12 is a diagram showing an exemplary structure 1200, in which a conductive layer 1224 is shown as a single electrode. However, the number of conductive layers 1224 (eg, electrodes) is not limited thereto and can be any suitable number. The conductive layer 1224 can be used in the same manner as described above. Figure 8B The first electrode 808 is formed by similar materials and processes.

[0140] In process step 1110, the first stack and the second stack are joined by applying different voltages on the second electrode and the conductive layer. Fig. 12C The configuration of the first stack 1200 with the first electrode 808 and the conductive layer 1224 and the second stack 1000 with the second electrode 1022 during the bonding process is shown. The electrostatic clamp 1210 when completed is similar to Figure 6 Of the 600.

[0141] As described above, the first stack 800 and the second stack 1000 can be manufactured in parallel during manufacturing. Fig. 9 and 10) or by electric power controlled by electrodes on the first stack and the second stack (as Fig.11 12) by joining the first stack 800 and the second stack 1000, an electrostatic clamp having a double stack can be formed. Fig. 10B The electrostatic chuck 1010 with double stacking or Figure 5 Electrostatic chuck 500 and Fig. 12C The electrostatic chuck 1210 with double stacking or Figure 6 By applying a voltage to the first electrode 808, Figure 5 Electrostatic chuck 500 or Figure 6 The electrostatic chuck 600 in the embodiment allows for quick and easy installation and removal of the wafer / mask during operation. At the same time, the electrostatic chuck 500 can also allow for quick and easy installation and removal of the chuck by voltage control of the second electrode 522. The electrostatic chuck 600 can also allow for quick and easy installation and removal of the chuck by voltage control of the second electrode 622 and the conductive layer 624.

[0142] These embodiments may be further described using the following terms:

[0143] 1. An electrostatic clamp, comprising:

[0144] a first stack and a second stack, wherein the first stack is joined to the second stack, and each of the first stack and the second stack comprises:

[0145] The fixture body;

[0146] One or more electrodes, disposed on the fixture body;

[0147] a dielectric plate disposed on the one or more electrodes; and

[0148] A plurality of channels are provided within the interior of the fixture body.

[0149] 2. The electrostatic chuck of clause 1, wherein the first stack and the second stack are joined by optical contact bonding.

[0150] 3. An electrostatic chuck according to clause 1, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the chuck body.

[0151] 4. The electrostatic chuck of clause 3, wherein the first stack and the second stack are joined by electrical force generated between the conductive layer of the first stack and the one or more electrodes of the second stack.

[0152] 5. The electrostatic chuck of clause 1, wherein the chuck body comprises an insulator having an ultra-low coefficient of expansion.

[0153] 6. An electrostatic chuck according to clause 1, wherein the plurality of channels are configured to carry a thermally conditioned liquid or gas.

[0154] 7. The electrostatic chuck of clause 1, wherein each of the first stack and the second stack further comprises an insulating layer configured to electrically isolate the one or more electrodes.

[0155] 8. The electrostatic chuck of clause 1, wherein the dielectric plate comprises a plurality of burls.

[0156] 9. A method for manufacturing an electrostatic chuck, comprising:

[0157] forming a first stack of electrostatic chucks;

[0158] forming a second stack of said electrostatic chucks; and

[0159] The first stack is joined to the second stack.

[0160] 10. The method of clause 9, wherein forming the first stack and the second stack of the electrostatic chuck comprises:

[0161] forming a plurality of channels in a fixture body;

[0162] forming one or more electrodes on the fixture body;

[0163] forming an insulating layer on the jig body; and

[0164] A dielectric plate is formed on the one or more electrodes.

[0165] 11. The method of clause 10, further comprising forming a plurality of burls on the dielectric plate.

[0166] 12. The method of clause 10, wherein the joining of the first stack and the second stack comprises:

[0167] polishing bottom surfaces of the first and second stacks of the electrostatic chuck, wherein the bottom surface and the dielectric plate are on opposite sides of respective chuck bodies of the first and second stacks; and

[0168] An optical contact bond is formed between the polished bottom surfaces of the first stack and the second stack.

[0169] 13. The method of clause 10, wherein the joining of the first stack and the second stack comprises:

[0170] disposing a conductive layer on a bottom surface of the first stack, wherein the bottom surface of the first stack and the dielectric plate are located on opposite sides of the fixture body;

[0171] applying a first voltage across the conductive layer of the first stack; and

[0172] A second voltage different from the first voltage is applied to the one or more electrodes of the second stack.

[0173] 14. A lithographic apparatus comprising an electrostatic chuck according to clause 1.

[0174] 15. The lithographic apparatus of clause 14, further comprising:

[0175] an illumination device configured to illuminate the pattern on the patterning device; and

[0176] a projection system configured to project an image of the pattern onto a substrate;

[0177] The substrate is disposed on the electrostatic chuck.

[0178] 16. The lithographic apparatus of clause 15, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the chuck body.

[0179] 17. The lithographic apparatus of clause 16, wherein the first stack and the second stack are connected by an electrical connection created between the conductive layer of the first stack and the one or more electrodes of the second stack.

[0180] 18. The lithographic apparatus of clause 14, further comprising:

[0181] an irradiation device configured to irradiate a pattern on a patterning device, wherein the patterning device is disposed on the electrostatic chuck; and

[0182] A projection system is configured to project an image of the pattern onto a substrate.

[0183] 19. The lithographic apparatus of clause 18, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the chuck body.

[0184] 20. The lithographic apparatus of clause 19, wherein the first stack and the second stack are connected by electrical power generated between the conductive layer of the first stack and the one or more electrodes of the second stack.

[0185] Although specific reference may be made herein to the use of an electrostatic clamp in a lithography apparatus, it will be appreciated that the electrostatic clamp described herein may have other applications, such as use in mask inspection apparatus, wafer inspection apparatus, aerial image metrology apparatus, and more generally in any apparatus that measures or processes objects such as wafers (or other substrates) or masks (or other patterning devices) under vacuum or ambient (non-vacuum) conditions, such as, for example, in a plasma etching apparatus or a deposition apparatus.

[0186] Although specific reference may be made herein to the use of lithographic equipment in the manufacture of ICs, it should be understood that the lithographic equipment described herein may have other applications, such as the manufacture of integrated optical systems, guidance and detection patterns for magnetic domain memories, flat panel displays, LCDs, thin film heads, etc. Those skilled in the art will understand that in the context of such alternative applications, any use of the term "wafer" or "die" herein is considered to be synonymous with the more general term "substrate" or "target portion", respectively. The substrate referred to herein may be processed before or after exposure, such as in a track unit (a tool that typically applies a layer of resist on a substrate and develops the exposed resist), a measurement unit, and / or an inspection unit. Where applicable, the disclosure herein may be applied to such and other substrate processing tools. In addition, a substrate may be processed more than once, for example, to manufacture a multi-layer IC, so the term "substrate" used herein may also refer to a substrate that has included multiple processed layers.

[0187] Although specific reference has been made above to the use of embodiments of the invention in the context of optical lithography, it will be appreciated that the invention may be used in other applications, such as imprint lithography, and is not limited to optical lithography where the context permits. In imprint lithography, the topography in the patterning device defines the pattern produced on the substrate. The topography of the patterning device may be pressed into a layer of resist provided to the substrate, and the resist is then cured by applying electromagnetic radiation, heat, pressure, or a combination thereof. After the resist has cured, the patterning device is removed from the resist, leaving a pattern therein.

[0188] It should be understood that the phraseology or terminology herein is for the purpose of description rather than limitation, so that the phraseology or terminology of this specification will be interpreted by those skilled in the relevant art based on the teachings herein.

[0189] As used herein, the term "substrate" describes a material on which a layer of material is added. In some embodiments, the substrate itself can be patterned, and the material added on the substrate can also be patterned, or can remain unpatterned.

[0190] Embodiments of the present invention may be implemented in hardware, firmware, software, or any combination thereof. Embodiments of the present invention may also be implemented as instructions stored on a machine-readable medium, which may be read and executed by one or more processors. A machine-readable medium may include any mechanism for storing or transmitting information in a form readable by a machine (e.g., a computing device). For example, a machine-readable medium may include a read-only memory (ROM); a random access memory (RAM); a disk storage medium; an optical storage medium; a flash memory device; an electrical, optical, acoustic, or other form of propagation signal, etc. In addition, firmware, software, routines, and / or instructions may be described herein as performing certain actions. However, it should be understood that such description is merely for convenience, and that such actions are actually caused by a computing device, processor, controller, or other device that executes the firmware, software, routines, and / or instructions.

[0191] The following examples are illustrative but non-limiting of embodiments of the present disclosure. Other suitable modifications and adaptations of the various conditions and parameters normally encountered in the art and well known to those skilled in the relevant art are within the spirit and scope of the present disclosure.

[0192] Although specific reference may be made herein to the use of the apparatus and / or system according to the present invention in the manufacture of integrated circuits, it should be clearly understood that such an apparatus and / or system has many other possible applications. For example, it may be used to manufacture integrated optical systems, guidance and detection patterns for magnetic domain memories, LCD panels, thin film magnetic heads, etc. Those skilled in the art will appreciate that in the context of such alternative applications, any use of "template", "wafer" or "chip" herein should be considered to be replaced by the more general terms "mask", "substrate" and "target portion", respectively.

[0193] While specific embodiments of the invention have been described above, it will be appreciated that the invention may be practiced otherwise than as described. The description is not intended to limit the invention.

[0194] It should be understood that the "Detailed Description" section (rather than the "Summary" and "Abstract" sections) is intended to be used to interpret the claims. The "Summary" and "Abstract" sections may set forth one or more but not all exemplary embodiments of the present invention contemplated by the inventors, and therefore, are not intended to limit the present invention and the appended claims in any way.

[0195] The present invention has been described above with the aid of functional building blocks, which illustrate the implementation of specific functions and their relationships. For ease of description, the boundaries of these functional building blocks have been arbitrarily defined herein. Other boundaries may be defined as long as the specified functions and their relationships are properly performed.

[0196] The foregoing description of specific embodiments will reveal the general characteristics of the invention so fully that others can, by applying the knowledge of those skilled in the art, readily modify such specific embodiments and / or adapt them to various applications without undue experimentation without departing from the general concept of the invention. Therefore, based on the teaching and guidance given herein, such adaptations and modifications are intended to be within the meaning and range of equivalents of the disclosed embodiments.

[0197] The breadth and scope of the present invention should not be limited by any of the above-described exemplary embodiments, but should be defined only in accordance with the following claims and their equivalents.

Claims

1. An electrostatic clamp, comprising: a first stack and a second stack, wherein the first stack is joined to the second stack, and each of the first stack and the second stack comprises: The fixture body; One or more electrodes, disposed on the fixture body; a dielectric plate disposed on the one or more electrodes; and A plurality of channels, inside the fixture body, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes of the first stack are located on opposite sides of the fixture body, and The conductive layer and the one or more electrodes of the second stack are located on opposite sides of the dielectric plate. 2 . The electrostatic chuck of claim 1 , wherein the first stack and the second stack are joined by optical contact bonding. The electrostatic chuck of claim 1 , wherein the dielectric plate comprises a plurality of burls. 4 . The electrostatic chuck of claim 1 , wherein the first stack and the second stack are joined by electric force generated between the conductive layer of the first stack and the one or more electrodes of the second stack. 5 . The electrostatic chuck of claim 1 , wherein the chuck body comprises an insulator having an ultra-low coefficient of expansion.

6. The electrostatic chuck of claim 1, wherein the plurality of channels are configured to carry a thermally conditioned liquid or gas. 7 . The electrostatic chuck of claim 1 , wherein each of the first stack and the second stack further comprises an insulating layer configured to electrically isolate the one or more electrodes.

8. A method for manufacturing an electrostatic chuck, comprising: forming a first stack of electrostatic chucks; forming a second stack of said electrostatic chucks; as well as joining the first stack to the second stack, wherein the first stack and the second stack forming the electrostatic chuck include: forming a plurality of channels in the fixture body; forming one or more electrodes on the fixture body; forming an insulating layer on the fixture body; forming a dielectric plate on the one or more electrodes, Wherein joining the first stack with the second stack comprises: disposing a conductive layer on a bottom surface of the first stack, wherein the bottom surface of the first stack and the dielectric plate are on opposite sides of the fixture body; applying a first voltage across the conductive layer of the first stack; and A second voltage different from the first voltage is applied to the one or more electrodes of the second stack.

9. The method of claim 8, wherein joining the first stack to the second stack comprises: polishing bottom surfaces of the first and second stacks of the electrostatic chuck, wherein the bottom surface and the dielectric plate are on opposite sides of respective chuck bodies of the first and second stacks; as well as An optical contact bond is formed between the polished bottom surfaces of the first stack and the second stack.

10. The method of claim 8, further comprising forming a plurality of burls on the dielectric plate.

11. A lithographic apparatus comprising the electrostatic chuck according to claim 1.

12. The lithographic apparatus according to claim 11, further comprising: an irradiation device configured to irradiate the pattern on the patterning device; as well as a projection system configured to project an image of the pattern onto a substrate; The substrate is disposed on the electrostatic chuck.

13. The lithographic apparatus of claim 12, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the chuck body. 14 . The lithographic apparatus of claim 13 , wherein the first stack and the second stack are joined by electrical force generated between the conductive layer of the first stack and the one or more electrodes of the second stack.

15. The lithographic apparatus according to claim 11, further comprising: an irradiation device configured to irradiate a pattern on a patterning device, wherein the patterning device is disposed on the electrostatic chuck; as well as A projection system is configured to project an image of the pattern onto a substrate.

16. The lithographic apparatus of claim 15, wherein the first stack comprises a conductive layer, wherein the conductive layer and the one or more electrodes are on opposite sides of the chuck body. 17 . The lithographic apparatus of claim 16 , wherein the first stack and the second stack are joined by electrical power generated between the conductive layer of the first stack and the one or more electrodes of the second stack.

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