High voltage isolation structure and manufacturing method thereof
By performing multi-layer conductivity type ion implantation and epitaxial layer growth in the isolation region of the semiconductor integrated circuit, a high-voltage isolation structure is formed, which solves the problem of poor isolation between high-voltage circuits, and achieves effective isolation and voltage resistance while suppressing leakage.
Patent Information
- Application Number
- CN202111092769.7
- Authority / Receiving Office
- CN · China
- Patent Type
- Patents(China)
- Current Assignee / Owner
- Filing Date
- 2021-09-17
- Publication Date
- 2024-12-10
- Estimated Expiration
- 2041-09-17
AI Technical Summary
In the half-bridge driving circuit, the width of the high-voltage isolation ring is too small or the concentration is too low, resulting in the inability to effectively isolate between the high-voltage circuits, and even problems of penetration and large leakage occur.
By performing multi-layer conductivity type ion implantation on the first conductivity type substrate of the isolation region, buried layer A and buried layer B are formed, and the conductive type epitaxial layer and the well region are formed in the epitaxial layer, ensuring the high-voltage isolation structure Voltage resistance, while increasing doping concentration to prevent rapid depletion and expansion.
It effectively avoids leakage between high-voltage circuits, ensures the voltage withstand performance of the high-voltage isolation structure, prevents the high-voltage isolation structure from rapidly expanding after being depleted in the horizontal direction, and realizes effective isolation between high-voltage circuits.
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Figure CN113921385B_ABST
Abstract
Description
Technical Field
[0001] The present application relates to the technical field of semiconductor integrated circuit manufacturing, and in particular to a high-voltage isolation structure and a manufacturing method thereof. Background Art
[0002] In a half-bridge drive circuit, high-voltage devices and low-voltage devices need to be integrated on the same chip. The voltage converter (Level Shift, LS) is designed to be located between the high-voltage devices and the low-voltage devices to switch the input signal from one voltage domain to another to achieve communication between devices located in different voltage areas.
[0003] Usually, the drain end of the voltage converter is close to the high-voltage device, and the drain end of the voltage converter and the high-voltage device are both high voltages, and the drain end of the voltage converter and the high-voltage device, which are both high voltages, are separated by a high-voltage isolation ring with a withstand voltage of more than 600 volts. The related technology achieves high withstand voltage performance of the high-voltage isolation ring by reducing the width and concentration of the high-voltage isolation ring.
[0004] However, under some conditions, the operating voltage VB of the high-voltage device will be 10 volts to 30 volts higher than the drain voltage VD of the voltage converter. If the width of the high-voltage isolation ring is too small or the concentration is too low, the high-voltage isolation ring will be completely depleted quickly. Moreover, since the substrate concentration is very low, the depletion layer will also expand downward to a wider extent, making it impossible to effectively isolate the high-voltage circuits, and even causing a large leakage problem due to the penetration. Summary of the invention
[0005] The present application provides a high-voltage isolation structure and a manufacturing method thereof, which can solve the problem in the related art that the high-voltage circuit cannot be effectively isolated or even penetrates to cause large leakage.
[0006] In order to solve the technical problem described in the background technology, the first aspect of the present application provides a method for manufacturing a high-voltage isolation structure, the method for manufacturing a high-voltage isolation structure comprising the following steps:
[0007] Providing a first conductive type substrate of a base layer; the base layer at least comprises a high voltage device region, a voltage conversion region and an isolation region, wherein the isolation region is isolated between the high voltage device region and the voltage conversion region;
[0008] In the first conductive type substrate of the isolation region, performing first conductive type ion implantation with a first implantation energy to form a first conductive type buried layer A portion;
[0009] In a first conductive type substrate located on the first conductive type buried layer portion A, first conductive type ion implantation is performed with a second implantation energy to form a primary structure of a first conductive type buried layer portion B, so that the primary structure of the first conductive type buried layer portion B contacts downwardly with the first conductive type buried layer portion A; wherein the first implantation energy is higher than the second implantation energy;
[0010] In the first conductive type substrate on one side of the first conductive type buried layer portion A, a second conductive type buried layer primary structure is formed by implanting second conductive type ions;
[0011] Growing a second conductive type epitaxial layer on the first conductive type substrate, wherein a thermal process during the growth of the second conductive type epitaxial layer causes the primary structure of the first conductive type buried layer portion B to extend into the second conductive type epitaxial layer to form the first conductive type buried layer portion B, and causes the primary structure of the second conductive type buried layer to extend into the second conductive type epitaxial layer to form the second conductive type buried layer;
[0012] In the first conductive type epitaxial layer located on the first conductive type buried layer portion B, a first conductive type well region is formed by first conductive type ion implantation, so that the first conductive type well region contacts the first conductive type buried layer portion B downward.
[0013] Optionally, the step of performing first conductivity type ion implantation with a first implantation energy in the first conductivity type substrate of the isolation region to form a first conductivity type buried layer portion A includes:
[0014] In the first conductive type substrate of the isolation region, first conductive type ion implantation is performed with a first implantation energy ranging from 1500Kev to 3000Kev to form a first conductive type buried layer A portion, so that the first conductive type buried layer A portion extends downward from the upper surface of the first conductive type substrate.
[0015] Optionally, the step of performing first conductivity type ion implantation with a second implantation energy in the first conductivity type substrate located on the first conductivity type buried layer portion A to form a primary structure of the first conductivity type buried layer portion B, so that the primary structure of the first conductivity type buried layer portion B contacts downwardly with the first conductivity type buried layer portion A, comprises:
[0016] In a first conductive type substrate located on the first conductive type buried layer A portion, first conductive type ion implantation is performed with a second injection energy in the energy range of 50 KeV to 100 KeV to form a primary structure of a first conductive type buried layer B portion, so that the primary structure of the first conductive type buried layer B portion extends downward from the upper surface of the first conductive type substrate, and the primary structure of the first conductive type buried layer B portion contacts downward with the first conductive type buried layer A portion.
[0017] Optionally, the method for manufacturing the high-voltage isolation structure further includes, after forming the first conductive type buried layer portion B and before forming the first conductive type well region:
[0018] A field oxide layer is fabricated so that the field oxide layer at least covers the first conductive type epitaxial layer at the location of the isolation region.
[0019] Optionally, the step of forming a first conductivity type well region by implanting first conductivity type ions in the first conductivity type epitaxial layer located on the first conductivity type buried layer portion B, so that the first conductivity type well region downwardly contacts the first conductivity type buried layer portion B, comprises:
[0020] In the first conductive type epitaxial layer located on the first conductive type buried layer B, a first conductive type well region is formed by selective first conductive type ion implantation, so that the first conductive type well region contacts the first conductive type buried layer B downward and contacts the field oxide layer upward.
[0021] In order to solve the technical problem described in the background technology, the second aspect of the present application further provides a high-voltage isolation structure, which is manufactured by the manufacturing method of the high-voltage isolation structure described in the first aspect of the present application;
[0022] The high-voltage isolation structure is located in the base layer at the isolation area, and the isolation area is isolated between the high-voltage device area and the voltage conversion area; the base layer includes a first conductive type substrate and a second conductive type epitaxial layer, and the second conductive type epitaxial layer is formed on the first conductive type substrate;
[0023] The high-voltage isolation structure comprises: a first conductive type buried layer A portion, a first conductive type buried layer B portion and a first conductive type well region;
[0024] The first conductive type buried layer B portion is located at the adjacent surface of the first conductive type substrate and the second conductive type epitaxial layer, the lower portion of the first conductive type buried layer B portion extends into the first conductive type substrate, and the upper portion of the first conductive type buried layer B portion extends into the second conductive type epitaxial layer;
[0025] The first conductive type buried layer portion A is located in the first conductive type substrate, and the first conductive type buried layer portion A is in contact with the first conductive type buried layer portion B upwards;
[0026] The first conductive type well region is located in the second conductive type epitaxial layer, and the first conductive type well region is downwardly in contact with the first conductive type buried layer B portion.
[0027] Optionally, the first conductive type buried layer A portion is formed by first conductive type ion implantation with a first implantation energy ranging from 1500 KeV to 3000 KeV.
[0028] Optionally, the first conductive type buried layer B portion is formed by first conductive type ion implantation with a second implantation energy ranging from 50 KeV to 100 KeV.
[0029] Optionally, at least the first conductivity type epitaxial layer at the location of the isolation region is covered with a field oxide layer.
[0030] Optionally, the first conductivity type well region contacts the field oxide layer upward.
[0031] Optionally, a second conductive type buried layer is formed in the base layer located on at least one side of the high-voltage isolation structure, and the second conductive type buried layer is located at an adjacent surface position of the first conductive type substrate and the second conductive type epitaxial layer;
[0032] The lower portion of the second conductive type buried layer extends into the first conductive type substrate, and the upper portion extends into the second conductive type epitaxial layer.
[0033] The technical solution of the present application has at least the following advantages: the present application makes the first injection energy for forming the first conductive type buried layer A part higher than the second injection energy for forming the first conductive type buried layer B part, and the first conductive type buried layer A part is in direct contact with the first conductive type substrate, so as to increase the doping concentration at the contact position between the first conductive type buried layer A part and the first conductive type substrate. Therefore, even if the concentration of the first conductive type substrate is very light, or the width of the isolation structure is very small, the high-voltage isolation structure can avoid rapid downward expansion after lateral depletion, thereby effectively isolating the high-voltage circuits, and suppressing leakage without affecting the withstand voltage performance of the high-voltage isolation structure. BRIEF DESCRIPTION OF THE DRAWINGS
[0034] In order to more clearly illustrate the specific implementation methods of the present application or the technical solutions in the prior art, the drawings required for use in the specific implementation methods or the description of the prior art will be briefly introduced below. Obviously, the drawings described below are some implementation methods of the present application. For ordinary technicians in this field, other drawings can be obtained based on these drawings without paying any creative work.
[0035] Figure 1 A flow chart of a method for manufacturing a high voltage isolation structure provided by an embodiment of the present application is shown;
[0036] Figure 1a A schematic diagram of the cross-sectional structure of the device after step S2 is completed is shown;
[0037] Figure 1b A schematic diagram of the cross-sectional structure of the device after step S4 is completed is shown;
[0038] Figure 1c A schematic diagram of the cross-sectional structure of the device after step S5 is completed is shown;
[0039] Figure 1d The cross-sectional structure diagram of the device after the field oxide layer is completed is shown;
[0040] Figure 2 Shown by Figure 1 A schematic cross-sectional view of a high-voltage isolation structure manufactured by the manufacturing method of the high-voltage isolation structure is shown. DETAILED DESCRIPTION
[0041] The following will be combined with the accompanying drawings to clearly and completely describe the technical solutions in this application. Obviously, the described embodiments are part of the embodiments of this application, not all of them. Based on the embodiments in this application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.
[0042] In the description of the present application, it should be noted that the terms "center", "upper", "lower", "left", "right", "vertical", "horizontal", "inner", "outer", etc., indicating the orientation or positional relationship, are based on the orientation or positional relationship shown in the drawings, and are only for the convenience of describing the present application and simplifying the description, rather than indicating or implying that the device or element referred to must have a specific orientation, be constructed and operated in a specific orientation, and therefore cannot be understood as limiting the present application. In addition, the terms "first", "second", and "third" are used for descriptive purposes only, and cannot be understood as indicating or implying relative importance.
[0043] In the description of this application, it should be noted that, unless otherwise clearly specified and limited, the terms "installed", "connected", and "connected" should be understood in a broad sense, for example, it can be a fixed connection, a detachable connection, or an integral connection; it can be a mechanical connection or an electrical connection; it can be a direct connection, or it can be indirectly connected through an intermediate medium, it can also be the internal connection of two components, it can be a wireless connection, or it can be a wired connection. For ordinary technicians in this field, the specific meanings of the above terms in this application can be understood according to specific circumstances.
[0044] In addition, the technical features involved in the different embodiments of the present application described below can be combined with each other as long as they do not conflict with each other.
[0045] The first conductivity type described in the present application is opposite to the second conductivity type, wherein both the first conductivity type and the second conductivity type can be N-type or P-type. When the first conductivity type is N-type, the second conductivity type is P-type; when the first conductivity type is P-type, the second conductivity type is N-type.
[0046] The following uses the first conductivity type being P type and the second conductivity type being N type as an example to illustrate the technical solution of the present application.
[0047] Figure 1 A flow chart of a method for manufacturing a high voltage isolation structure provided by an embodiment of the present application is shown. Figure 1 It can be seen that the method for manufacturing the high voltage isolation structure includes the following steps S1 to S6 performed in sequence, wherein:
[0048] Step S1: providing a P-type substrate of a base layer; the base layer at least comprises a high-voltage device region, a voltage conversion region and an isolation region, wherein the isolation region is isolated between the high-voltage device region and the voltage conversion region.
[0049] The high voltage device area is used to form a high voltage device, the voltage conversion area is used to form a voltage converter, the drain end of the formed voltage converter is close to the high voltage device, and the isolation area is used to form a high voltage isolation structure that isolates the high voltage device from the drain end of the voltage converter.
[0050] Step S2: performing P-type ion implantation in the P-type substrate of the isolation region with a first implantation energy to form a P-type buried layer A portion.
[0051] Reference Figure 1a , which shows a schematic diagram of the cross-sectional structure of the device after step S2 is completed, from Figure 1a It can be seen from the figure that a P-type buried layer A portion 142 is formed in the P-type substrate 11 at the location of the isolation region 130.
[0052] Step S3: In the P-type substrate located on the P-type buried layer portion A, P-type ion implantation is performed with a second implantation energy to form a primary structure of the P-type buried layer portion B, so that the primary structure of the P-type buried layer portion B is in contact with the P-type buried layer portion A downward; wherein the first implantation energy is higher than the second implantation energy.
[0053] Since the first injection energy used to form the P-type buried layer portion A is higher than the second injection energy used to form the P-type buried layer portion B, and the P-type buried layer portion A is in direct contact with the P-type substrate, the doping concentration at the contact position between the P-type buried layer portion A and the P-type substrate can be increased.
[0054] Step S4: forming a primary structure of an N-type buried layer by implanting N-type ions in the P-type substrate on one side of the P-type buried layer A portion.
[0055] Reference Figure 1b , which shows a schematic diagram of the cross-sectional structure of the device after step S4 is completed, from Figure 1b As can be seen in the figure, a P-type buried layer B-portion primary structure 1411 is formed in the P-type substrate 11 on the P-type buried layer A-portion 142, and the P-type buried layer B-portion primary structure 1411 extends downward from the upper surface of the P-type substrate 11. In addition, the P-type buried layer B-portion primary structure 1411 is in contact with the P-type buried layer A-portion 142. An N-type buried layer primary structure 151 is formed on one side of the vertically stacked P-type buried layer A-portion 142 and the P-type buried layer B-portion primary structure 1411, and the N-type buried layer primary structure 151 extends downward from the upper surface of the P-type substrate 11. The N-type buried layer primary structure 151 of this embodiment is connected across the isolation region 130 and the high-voltage device region 110.
[0056] Step S5: growing an N-type epitaxial layer on the P-type substrate. The thermal process during the growth of the N-type epitaxial layer causes the primary structure of the P-type buried layer portion B to expand into the N-type epitaxial layer to form a P-type buried layer portion B, and causes the primary structure of the N-type buried layer to expand into the N-type epitaxial layer to form an N-type buried layer.
[0057] Reference Figure 1c , which shows a schematic diagram of the cross-sectional structure of the device after step S5 is completed, from Figure 1c It can be seen that the P-type buried layer B portion 141 formed after expansion is located at the adjacent surface of the P-type substrate 11 and the N-type epitaxial layer 12, and the lower portion of the P-type buried layer B portion 141 extends into the P-type substrate 11, and the upper portion extends into the N-type epitaxial layer 12. Similarly, the N-type buried layer 150 formed after expansion is also located at the adjacent surface of the P-type substrate 11 and the N-type epitaxial layer 12, and the lower portion of the N-type buried layer 150 extends into the P-type substrate 11, and the upper portion extends into the N-type epitaxial layer 12.
[0058] Step S6: In the N-type epitaxial layer located on the P-type buried layer B portion, a P-type well region is formed by P-type ion implantation, so that the P-type well region contacts the P-type buried layer B portion downward.
[0059] Reference Figure 2 , which shows a schematic diagram of a cross-sectional structure of a device formed after the manufacturing method of the high-voltage isolation structure provided by the present application is completed, from Figure 2 It can be seen from the figure that the P-type well region 143 contacts the P-type buried layer B portion 141 downward.
[0060] The P-type buried layer A portion 142, the P-type buried layer B portion 141 and the P-type well region 143 are stacked sequentially from bottom to top to form a P-type high voltage isolation structure. The bottom of the P-type high voltage isolation structure (i.e., the P-type buried layer A portion) contacts the P-type substrate, so that the P-type substrate is connected to the ground end, so that a path is formed starting from the P-type well region 143, sequentially passing through the P-type buried layer B portion 141, the P-type buried layer A portion 142 and the P-type substrate 11, and finally connected to the ground end.
[0061] In this embodiment, the first injection energy for forming the first conductive type buried layer A portion is higher than the second injection energy for forming the first conductive type buried layer B portion, and the first conductive type buried layer A portion is in direct contact with the first conductive type substrate, so as to increase the doping concentration at the contact position between the first conductive type buried layer A portion and the first conductive type substrate. Therefore, even if the first conductive type substrate concentration is very low or the width of the isolation structure is very small, the high-voltage isolation structure can be prevented from rapidly expanding downward after being lateral depleted, thereby effectively isolating the high-voltage circuits and suppressing leakage without affecting the withstand voltage performance of the high-voltage isolation structure.
[0062] Optionally, when performing step S2, P-type ion implantation may be performed in the P-type substrate at the isolation region position with a first implantation energy ranging from 1500Kev to 3000Kev to form a P-type buried layer portion A, so that the P-type buried layer portion A extends downward from the upper surface of the P-type substrate to form Figure 1a The device structure shown.
[0063] When performing step S3, P-type ion implantation can be performed in the P-type substrate located on the P-type buried layer A portion with a second implantation energy ranging from 50 KeV to 100 KeV to form a primary structure of the P-type buried layer B portion, so that the primary structure of the P-type buried layer B portion extends downward from the upper surface of the P-type substrate, and the primary structure of the P-type buried layer B portion contacts downward with the P-type buried layer A portion, so as to form Figure 1b The device structure shown.
[0064] The method for manufacturing a high-voltage isolation structure provided in an embodiment of the present application may further include: after step S5 is completed and before step S6 is performed, the following steps are performed: a field oxide layer is formed, so that the field oxide layer at least covers the P-type epitaxial layer at the isolation region position to form Figure 1d The device structure shown. Figure 1d It can be seen from the figure that the formed field oxide layer 160 at least covers the P-type epitaxial layer 12 at the location of the isolation region 130 .
[0065] After the field oxide layer is made, in the process of step S6, the P-type well region injection area can be defined by photolithography, and then the P-type well region is formed in the P-type well region injection area by P-type ion implantation. The location of the P-type well region injection area is consistent with the location of the P-type buried layer B formed after step S5.
[0066] After step S6 is completed, the drain 121 of the voltage conversion device can be formed in the voltage conversion area 120, and the source or drain 111 of the high voltage device can be formed in the high voltage device area 110 by source-drain ion implantation in the related art to form Figure 2 The device structure shown.
[0067] Figure 2 Shown by Figure 1 A cross-sectional view of a high-voltage isolation structure manufactured by a manufacturing method of the high-voltage isolation structure shown in FIG. Figure 2 It can be seen that the base layer 10 includes a high-voltage device region 110 and a voltage conversion region 120, and an isolation region 130 is formed in at least the base layer 10 between the high-voltage device region 110 and the voltage conversion region 120, and a high-voltage isolation structure 140 is formed in the isolation region 130. Among them, a high-voltage device with a relatively high operating voltage VB is formed in the high-voltage device region 110, and a voltage conversion device is formed in the voltage conversion region 120. The drain terminal 121 of the voltage conversion device is close to the high-voltage device, and the drain terminal voltage VD of the voltage conversion device is the same as the operating voltage VB of the high-voltage device.
[0068] The base layer 10 includes a P-type substrate 11 and an N-type epitaxial layer 12 formed on the P-type substrate 11 .
[0069] The high voltage isolation structure 140 includes a P-type buried layer B portion 141 , a P-type buried layer A portion 142 and a P-type well region 143 .
[0070] The P-type buried layer B portion 141 is located at the adjacent surface of the P-type substrate 11 and the N-type epitaxial layer 12 , the lower portion of the P-type buried layer B portion 141 extends into the P-type substrate 11 , and the upper portion of the P-type buried layer B portion 141 extends into the N-type epitaxial layer 12 .
[0071] The P-type buried layer A portion 142 is located in the P-type substrate 11 , and the P-type buried layer A portion 142 contacts the lower surface of the P-type buried layer B portion 141 upward.
[0072] The P-type well region 143 is located in the N-type epitaxial layer 12 . The P-type well region 143 extends upward to the upper surface of the N-type epitaxial layer 12 and extends downward to contact the upper surface of the P-type buried layer B portion 141 .
[0073] The P-type substrate 11 is grounded, so that a path is formed starting from the P-type well region 143, sequentially passing through the P-type buried layer B portion 141, the P-type buried layer A portion 142 and the P-type substrate 11, and finally connected to the ground end.
[0074] The P-type buried layer A portion 142 is formed by P-type ion implantation at a first implantation energy ranging from 1500Kev to 3000Kev, and the P-type buried layer B portion 141 is formed by P-type ion implantation at a second implantation energy ranging from 50Kev to 100Kev.
[0075] The P-type epitaxial layer 12 at least at the location of the isolation region 130 is covered with a field oxide layer 160 , and the P-type well region 143 contacts the field oxide layer 160 upward.
[0076] An N-type buried layer 150 is formed in the base layer 10 located on at least one side of the high-voltage isolation structure 140. The N-type buried layer 150 is located at the adjacent surface of the P-type substrate 11 and the N-type epitaxial layer 12. The lower part of the N-type buried layer 150 extends into the P-type substrate 11, and the upper part extends into the N-type epitaxial layer 12.
[0077] In this embodiment, the first injection energy for forming the first conductive type buried layer A portion is higher than the second injection energy for forming the first conductive type buried layer B portion, and the first conductive type buried layer A portion is in direct contact with the first conductive type substrate, so as to increase the doping concentration at the contact position between the first conductive type buried layer A portion and the first conductive type substrate. Therefore, even if the first conductive type substrate concentration is very low or the width of the isolation structure is very small, the high-voltage isolation structure can be prevented from rapidly expanding downward after being lateral depleted, thereby effectively isolating the high-voltage circuits and suppressing leakage without affecting the withstand voltage performance of the high-voltage isolation structure.
[0078] Obviously, the above embodiments are merely examples for the purpose of clear explanation, and are not intended to limit the implementation methods. For those skilled in the art, other different forms of changes or modifications can be made based on the above description. It is not necessary and impossible to list all the implementation methods here. The obvious changes or modifications derived therefrom are still within the scope of protection created by this application.
Claims
1. A method for manufacturing a high voltage isolation structure, characterized in that: The manufacturing method of the high voltage isolation structure comprises the following steps: Providing a first conductive type substrate of a base layer; the base layer at least comprises a high voltage device region, a voltage conversion region and an isolation region, wherein the isolation region is isolated between the high voltage device region and the voltage conversion region; In the first conductive type substrate of the isolation region, performing first conductive type ion implantation with a first implantation energy to form a first conductive type buried layer A portion; In a first conductive type substrate located on the first conductive type buried layer portion A, first conductive type ion implantation is performed with a second implantation energy to form a primary structure of a first conductive type buried layer portion B, so that the primary structure of the first conductive type buried layer portion B contacts downwardly with the first conductive type buried layer portion A; wherein the first implantation energy is higher than the second implantation energy; In the first conductive type substrate on one side of the first conductive type buried layer portion A, a second conductive type buried layer primary structure is formed by implanting second conductive type ions; Growing a second conductive type epitaxial layer on the first conductive type substrate, wherein a thermal process during the growth of the second conductive type epitaxial layer causes the primary structure of the first conductive type buried layer portion B to extend into the second conductive type epitaxial layer to form the first conductive type buried layer portion B, and causes the primary structure of the second conductive type buried layer to extend into the second conductive type epitaxial layer to form the second conductive type buried layer; In the second conductive type epitaxial layer located on the first conductive type buried layer portion B, a first conductive type well region is formed by first conductive type ion implantation, so that the first conductive type well region contacts the first conductive type buried layer portion B downward.
2. The method for manufacturing a high voltage isolation structure according to claim 1, characterized in that: The step of performing first conductivity type ion implantation with a first implantation energy in the first conductivity type substrate of the isolation region to form a first conductivity type buried layer A portion comprises: In the first conductive type substrate of the isolation region, first conductive type ion implantation is performed with a first implantation energy ranging from 1500Kev to 3000Kev to form a first conductive type buried layer A portion, so that the first conductive type buried layer A portion extends downward from the upper surface of the first conductive type substrate.
3. The method for manufacturing a high voltage isolation structure according to claim 1, characterized in that: The step of implanting first conductive type ions with a second implantation energy in the first conductive type substrate located on the first conductive type buried layer portion A to form a primary structure of the first conductive type buried layer portion B, so that the primary structure of the first conductive type buried layer portion B contacts downwardly with the first conductive type buried layer portion A, comprises: In a first conductive type substrate located on the first conductive type buried layer A portion, first conductive type ion implantation is performed with a second injection energy in the energy range of 50 KeV to 100 KeV to form a primary structure of a first conductive type buried layer B portion, so that the primary structure of the first conductive type buried layer B portion extends downward from the upper surface of the first conductive type substrate, and the primary structure of the first conductive type buried layer B portion contacts downward with the first conductive type buried layer A portion.
4. The method for manufacturing a high voltage isolation structure according to claim 1, characterized in that: The method for manufacturing the high-voltage isolation structure further includes the following steps after forming the first conductive type buried layer B portion and before forming the first conductive type well region: A field oxide layer is fabricated so that the field oxide layer at least covers the first conductive type epitaxial layer at the location of the isolation region.
5. The method for manufacturing a high voltage isolation structure according to claim 4, characterized in that: The step of forming a first conductivity type well region in the first conductivity type epitaxial layer located on the first conductivity type buried layer portion B by implanting first conductivity type ions so that the first conductivity type well region contacts downward with the first conductivity type buried layer portion B comprises: In the first conductive type epitaxial layer located on the first conductive type buried layer B, a first conductive type well region is formed by selective first conductive type ion implantation, so that the first conductive type well region contacts the first conductive type buried layer B downward and contacts the field oxide layer upward.
6. A high voltage isolation structure, characterized in that: The high-voltage isolation structure is manufactured by the manufacturing method of the high-voltage isolation structure according to claim 1; The high-voltage isolation structure is located in the base layer at the isolation area, and the isolation area is isolated between the high-voltage device area and the voltage conversion area; the base layer includes a first conductive type substrate and a second conductive type epitaxial layer, and the second conductive type epitaxial layer is formed on the first conductive type substrate; The high-voltage isolation structure comprises: a first conductive type buried layer A portion, a first conductive type buried layer B portion and a first conductive type well region; The first conductive type buried layer B portion is located at the adjacent surface of the first conductive type substrate and the second conductive type epitaxial layer, the lower portion of the first conductive type buried layer B portion extends into the first conductive type substrate, and the upper portion of the first conductive type buried layer B portion extends into the second conductive type epitaxial layer; The first conductive type buried layer portion A is located in the first conductive type substrate, and the first conductive type buried layer portion A is in contact with the first conductive type buried layer portion B upwards; The first conductive type well region is located in the second conductive type epitaxial layer, and the first conductive type well region is downwardly in contact with the first conductive type buried layer B portion.
7. The high voltage isolation structure according to claim 6, characterized in that: The first conductive type buried layer A portion is formed by first conductive type ion implantation with a first implantation energy ranging from 1500Kev to 3000Kev.
8. The high voltage isolation structure according to claim 6, characterized in that: The first conductive type buried layer B portion is formed by implanting first conductive type ions at a second implantation energy ranging from 50 KeV to 100 KeV.
9. The high voltage isolation structure according to claim 6, characterized in that: The first conductive type epitaxial layer at least at the location of the isolation region is covered with a field oxide layer.
10. The high voltage isolation structure according to claim 9, characterized in that: The first conductivity type well region contacts the field oxide layer upward.
11. The high voltage isolation structure according to claim 6, characterized in that: forming a second conductive type buried layer in a base layer located on at least one side of the high voltage isolation structure, wherein the second conductive type buried layer is located at an adjacent surface of the first conductive type substrate and the second conductive type epitaxial layer; The lower portion of the second conductive type buried layer extends into the first conductive type substrate, and the upper portion extends into the second conductive type epitaxial layer.
Citation Information
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