A current-resistant siC pin diode based on BN

By introducing an N-type heavily doped BN voltage-enhancing layer into the SiC PIN diode, the problem of insufficient current capability is solved, and the current capability is improved and the heat is evenly distributed, thus enhancing the overall performance of the SiC PIN diode.

CN113964205BActive Publication Date: 2025-12-09(LIUYANG) GLOBAL POWER TECH CO LTD
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Patent Information

Application Number
CN202111170344.3
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-10-08
Publication Date
2025-12-09
Estimated Expiration
2041-10-08

AI Technical Summary

Technical Problem

Existing SiC PIN diodes have limited current capability when achieving high voltage withstand capability, and their heat distribution is uneven.

Method used

Introducing an N-type heavily doped BN breakdown voltage enhancement layer into a SiC PIN diode increases current capability and improves heat dissipation. This is achieved by adding an N-type heavily doped BN breakdown voltage enhancement layer with a thickness of 3 micrometers and a doping concentration of 2*1017cm-3 above the N-type heavily doped semiconductor transport layer, thereby improving current capability and heat distribution.

Benefits of technology

While maintaining the same voltage withstand capability, the current capacity is increased by 2 times, and the heat is mainly concentrated on the SiC material, resulting in a more even heat distribution.

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Abstract

The application provides a BN-based current-resistant SiCPIN diode, which comprises the following: the lower side of an N-type heavily doped semiconductor transport layer is connected to the upper side of an N-type ohmic electrode; the lower side of an N-type heavily doped BN voltage-resistant improving layer is connected to the upper side of the N-type heavily doped semiconductor transport layer; the lower side of an N-type intrinsic layer is connected to the upper side of the N-type heavily doped BN voltage-resistant improving layer; the lower side of a P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer; and the lower side of a P-type ohmic electrode is connected to the upper side of the P-type heavily doped semiconductor transport layer, so as to ensure the voltage-resistant capability of the SiCPIN diode, greatly improve the current capability, and make heat more easily spread downwards, so that the longitudinal heat distribution of the PIN diode is mainly concentrated in the SiC material.
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Description

TECHNICAL FIELD

[0001] The application relates to a BN-based current-resistant SiC PIN diode. BACKGROUND

[0002] SiC devices Silicon carbide (SiC) material is widely concerned and researched due to its superior physical properties. High-temperature and high-power electronic devices have the advantages of high input impedance, fast switching speed, high working frequency, high-temperature resistance and high-voltage resistance, and have been widely applied in switching power supplies, high-frequency heating, automobile electronics and power amplifiers.

[0003] However, due to the material properties, the band gap is fixed, and the current capacity is sacrificed when a high-voltage level SiC PIN diode is realized, so the current capacity of the high-voltage level SiC PIN diode is relatively small. SUMMARY

[0004] The technical problem to be solved by the application is to provide a BN-based current-resistant SiC PIN diode, which can greatly improve the current capacity of the SiC PIN diode under the condition of ensuring the voltage resistance of the SiC PIN diode, and make the heat more easily spread downward, so that the longitudinal heat distribution of the PIN diode is mainly concentrated in the SiC material.

[0005] The application is implemented as follows: a BN-based current-resistant SiC PIN diode comprises:

[0006] an N-type ohmic electrode;

[0007] an N-type heavily doped semiconductor transport layer, the lower side of the N-type heavily doped semiconductor transport layer being connected to the upper side of the N-type ohmic electrode;

[0008] an N-type heavily doped BN voltage-resistant improving layer, the lower side of the N-type heavily doped BN voltage-resistant improving layer being connected to the upper side of the N-type heavily doped semiconductor transport layer;

[0009] an N-type intrinsic layer, the lower side of the N-type intrinsic layer being connected to the upper side of the N-type heavily doped BN voltage-resistant improving layer;

[0010] a P-type heavily doped semiconductor transport layer, the lower side of the P-type heavily doped semiconductor transport layer being connected to the upper side of the N-type intrinsic layer;

[0011] and a P-type ohmic electrode, the lower side of the P-type ohmic electrode being connected to the upper side of the P-type heavily doped semiconductor transport layer.

[0012] Further, the thickness of the N-type heavily doped BN voltage-resistant improving layer is 3 microns.

[0013] Further, the doping concentration of the N-type heavily doped BN voltage improving layer is 2*10 17 cm -3 .

[0014] Further, the doping concentration of the N-type heavily doped BN voltage improving layer is 2 times of the N-type intrinsic layer.

[0015] The advantages of the present application are as follows: the BN-based current-resistant SiC PIN diode of the present application adds a voltage improving layer, reduces the thickness of the N-type intrinsic layer, keeps the thickness of the PIN diode unchanged, and keeps the voltage resistance unchanged while increasing the current resistance by about 2 times; the thermal conductivity of BN material is relatively high, higher than that of SiC material, so that heat is more easily diffused downward, and the longitudinal heat distribution of the PIN diode is mainly concentrated on the SiC material. BRIEF DESCRIPTION OF DRAWINGS

[0016] The present application will be further described below with reference to the accompanying drawings and embodiments.

[0017] Figure 1 FIG. 1 is a structural schematic diagram of a high-voltage SiC PIN diode according to Embodiment 1 of the present application;

[0018] Figure 2 FIG. 2 is a space charge region schematic diagram of a working process of a high-voltage SiC PIN diode according to Embodiment 2 of the present application; Figure One

[0019] Figure 3 FIG. 3 is a space charge region schematic diagram of a working process of a high-voltage SiC PIN diode according to Embodiment 2 of the present application; Figure Two . DETAILED DESCRIPTION

[0020] As shown in FIG. 1, the BN-based current-resistant SiC PIN diode of the present application comprises: Figure 1

[0021] an N-type ohmic electrode;

[0022] an N-type heavily doped semiconductor transport layer, the lower side of the N-type heavily doped semiconductor transport layer being connected to the upper side of the N-type ohmic electrode;

[0023] an N-type heavily doped BN voltage improving layer, the lower side of the N-type heavily doped BN voltage improving layer being connected to the upper side of the N-type heavily doped semiconductor transport layer;

[0024] an N-type intrinsic layer, the lower side of the N-type intrinsic layer being connected to the upper side of the N-type heavily doped BN voltage improving layer, and the thickness of the N-type intrinsic layer being 3 microns (the thickness of the N-type intrinsic layer in the prior art is 6 microns); ​​

[0025] a P-type heavily doped semiconductor transport layer, a lower side of the P-type heavily doped semiconductor transport layer being connected to an upper side of the N-type intrinsic layer;

[0026] and a P-type ohmic electrode, an upper side of the P-type ohmic electrode being connected to a lower side of the P-type heavily doped semiconductor transport layer;

[0027] The thickness of the N-type heavily doped BN voltage improving layer is 3 microns, the doping concentration of the N-type heavily doped BN voltage improving layer is 2*10 17 cm -3 The doping concentration of the N-type heavily doped BN voltage improving layer is twice that of the N-type intrinsic layer, by setting the doping concentration, the current capacity is improved, and by the thickness of the N-type heavily doped BN voltage improving layer, the voltage is improved.

[0028] The high-voltage SiC PIN diode structure is a longitudinal structure and is a bipolar device.

[0029] In the existing technical solution, the concept of ultra-wide bandgap semiconductor is very vague and has not become a new research direction, so this method is not considered in the existing technology. Through research, the N-type heavily doped BN voltage improving layer is added above the N-type heavily doped semiconductor transport layer on the basis of the original structure. The reason for choosing the N-type heavily doped BN voltage improving layer is that the BN material has a wide bandgap, which is twice that of SiC material, and has the characteristic of improving the voltage resistance. The bandgap of BN material is 6.4eV, which is about twice that of SiC material, which means that the voltage resistance of BN material is about twice that of SiC material. On the basis of the existing technology, N-type heavy doping of BN material with half the thickness can be realized. Because the doping concentration of BN material is twice that of SiC material, the voltage resistance characteristic does not change, but the current capacity increases by 2 times. This characteristic is consistent with the scheme of improving the current under the condition of ensuring the voltage resistance.

[0030] Because the doping concentration of BN layer material is high, its resistance is small, and it can realize the application of large current.

[0031] The thermal conductivity of BN material is relatively high, and the thermal conductivity is 9.4W / cm / K, which is slightly higher than that of SiC material. This will make it easier for heat to spread downward, so that the longitudinal heat distribution of the PIN diode is mainly concentrated on the SiC material.

[0032] Please refer to Figure 2 , Figure 3The medium-voltage and large-current SiC PIN working process space charge area schematic diagram provided by the embodiment of the present application is divided into two parts, the N-type intrinsic layer and the N-type heavily doped BN voltage improving layer, the thicknesses of which are consistent, but the voltage resistance of the N-type heavily doped BN voltage improving layer is twice that of the N-type intrinsic layer. The space charge area originally extends directly to the transmission layer, now the transmission direction is changed to the N-type heavily doped BN voltage improving layer, and the space charge area extends to the N-type heavily doped BN voltage improving layer; the PIN diode sacrifices a small amount of voltage resistance level under the condition of the same thickness, and the main reason is that the space charge area is formed when the PIN diode is reversely pressurized, and the space charge area diffuses from the N-type intrinsic layer to the N-type heavily doped BN voltage improving layer.

[0033] When the space charge area diffuses to the N-type heavily doped BN voltage improving layer, because the doping concentration of the N-type heavily doped BN voltage improving layer is twice that of the N-type intrinsic layer, the space charge area expansion depth is one-half of the original under the same voltage, so the total thickness of the improved N-type intrinsic voltage area and the BN voltage area is three-fourths of the thickness of the N-type intrinsic layer in the prior art, and the voltage resistance level is unchanged.

[0034] The thickness and voltage resistance capacity of the PIN diode are unchanged, and the current capacity is increased by about twice.

[0035] Although the specific embodiments of the present application are described above, those skilled in the art should understand that the specific embodiments described are only illustrative, and are not intended to limit the scope of the present application, and equivalent modifications and changes made by those skilled in the art in accordance with the spirit of the present application should be covered within the scope of the claims of the present application.

Claims

1. A current-resistant SiC PIN diode based on BN, characterized in that: include: An N-type ohmic electrode; An N-type heavily doped semiconductor transport layer, wherein the lower side of the N-type heavily doped semiconductor transport layer is connected to the upper side of the N-type ohmic electrode; An N-type heavily doped BN breakdown voltage enhancement layer is provided, wherein the lower side of the N-type heavily doped BN breakdown voltage enhancement layer is connected to the upper side of the N-type heavily doped semiconductor transport layer. An N-type intrinsic layer, wherein the lower side of the N-type intrinsic layer is connected to the upper side of the N-type heavily doped BN breakdown voltage enhancement layer; A P-type heavily doped semiconductor transport layer, wherein the lower side of the P-type heavily doped semiconductor transport layer is connected to the upper side of the N-type intrinsic layer; And a P-type ohmic electrode, the lower side of which is connected to the upper side of the P-type heavily doped semiconductor transport layer. The thickness of the N-type heavily doped BN breakdown voltage enhancement layer is 3 micrometers; The doping concentration of the N-type heavily doped BN breakdown voltage enhancement layer is 2*10. 17 cm -3 ; The doping concentration of the N-type heavily doped BN breakdown voltage enhancement layer is twice that of the N-type intrinsic layer.

Citation Information

Patent Citations

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    CN109817728A

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