A low-orbit satellite navigation signal receiving module based on time-division channel multiplexing

Abstract

The present invention discloses a low-orbit satellite navigation signal receiving module based on time-division channel multiplexing, which performs down-conversion processing on the input low-orbit satellite navigation signal, and then configures a pseudo code generator according to the corresponding navigation satellite signal format, and performs multi-channel correlation operation on the generated pseudo code sequence and the satellite signal after frequency conversion, and reports the multi-channel correlation value to the processor for tracking loop processing; the receiving channel of the module adopts a time-division multiplexing design, and one FPGA physical channel can support the simultaneous tracking of multiple low-orbit navigation satellite signals. The present invention can significantly reduce the channel logic resource occupation in the low-orbit satellite navigation signal receiving terminal while maintaining the satellite tracking capability of the receiving terminal unchanged, which helps to reduce the power consumption of the receiving terminal and has a wide range of engineering implementation significance.

Description

Technical Field

[0001] The present invention relates to the field of satellite navigation technology, and in particular to a low-orbit satellite navigation signal receiving module based on time-division channel multiplexing. Background Art

[0002] With the official launch of the BeiDou-3 global navigation satellite system, the BeiDou business has entered a new era of global services. Low-orbit satellite navigation enhancement technology can assist the BeiDou system in improving the accuracy of global autonomous navigation and enhancing the comprehensiveness and stability of service capabilities. Moreover, with the continuous advancement of technology and the vigorous development of commercial aerospace, the cost of R&D and manufacturing of low-orbit satellites has gradually decreased, making the application of low-orbit satellite navigation enhancement a hot topic in current research. Low-orbit satellite signal information enhancement is the core link of low-orbit satellite navigation enhancement technology. By transmitting low-orbit satellite navigation signals and providing navigation enhancement information to ground user terminals, it can effectively accelerate the convergence process of precise positioning and improve the availability and reliability of navigation services. Therefore, it is very necessary to support the reception of low-orbit navigation satellite signals in navigation satellite signal receiving terminals, which is also the development trend of future navigation receiving terminals.

[0003] There are currently four major satellite navigation systems in the world, mainly the US Global Positioning System (GPS), the Russian Global Positioning System (GLONASS), the European Galileo Satellite Navigation System (GALILEO) and China's Beidou Satellite Navigation System (BDS). In addition, there are several regional satellite navigation systems, including the Indian Regional Navigation Satellite System (IRNSS), the Japanese Quasi-Zenith Satellite System (QZSS), etc. Receiving terminals that support multiple systems and multiple frequencies have great advantages in terms of the number of visible satellites and positioning availability, and have gradually become a design trend. Today's navigation satellite receiving terminals receive more and more systems and frequencies, and the receiving channels have expanded from the traditional dozens to hundreds today. In addition, additional channels are required to support the reception of low-orbit satellite navigation signals, which poses a huge challenge to the design of receiving terminals.

[0004] From the perspective of engineering implementation, the key point of the receiving channel of low-orbit satellite navigation signals lies in the balance between channel resources and receiving capabilities. For receiving terminals using the DSP+FPGA solution architecture, the traditional mode uses more resource occupation to increase the number of received satellites, which requires large-scale FPGA chips to support, while sacrificing volume and power consumption. The use of large-capacity FPGAs in receiving terminals to achieve low-orbit satellite navigation signal reception will greatly increase hardware costs and will not take advantage of the large-scale promotion and application of low-orbit satellite navigation signal receiving terminals. Therefore, it is necessary to use time-division channel multiplexing technology to simultaneously achieve the reception of low-orbit satellite navigation signals without occupying a large amount of FPGA resources. Summary of the invention

[0005] In view of this, the present invention proposes a low-orbit satellite navigation signal receiving module based on time-division channel multiplexing, which can realize the reception of low-orbit navigation satellite signals on a receiving terminal based on DSP+FPGA architecture, while reducing the FPGA logic resource occupation on the basis of ensuring the processing capability of the receiver, thereby reducing the power consumption of the receiving terminal.

[0006] In order to achieve the above object, the present invention adopts the following technical solutions:

[0007] A low-orbit satellite navigation signal receiving module based on time-division channel multiplexing is applied to a navigation receiving terminal, comprising a radio frequency unit, a power module unit, a data storage unit, an interface unit, a DSP unit and an FPGA; the DSP unit is used to realize a receiving and processing unit of low-orbit satellite navigation signals, as well as functions of ephemeris analysis, positioning solution and working strategy control; the FPGA is used to realize a capture and processing unit of low-orbit satellite navigation signals and a multiplexing receiving channel unit; in the multiplexing receiving channel unit, a physical receiving channel realizes multiple logical receiving channels by multiplexing; the FPGA and the DSP unit are interconnected by an EMIF bus; wherein:

[0008] The RF unit is connected to the DSP unit through the SPI bus interface. After the navigation receiving terminal is started, the DSP unit completes the initialization configuration of the RF unit. The output pin of the RF unit is connected to the input pin of the FPGA. After the configuration is completed, the RF unit outputs the digital satellite navigation signal to the FPGA for subsequent processing.

[0009] The power module unit is connected with the radio frequency unit, the data storage unit, the interface unit, the FPGA and the DSP unit to realize power-on and power-off control of these modules;

[0010] The data storage unit is connected to the FPGA and DSP units through corresponding interfaces. After completing the sampling, quantization and preliminary processing of the satellite data in the FPGA, the results are output to the data storage unit. Then the DSP unit obtains the satellite data to be processed from the data storage unit and performs subsequent signal tracking synchronization and information analysis processing.

[0011] The interface unit is connected with the FPGA and DSP units. The information input and output of the navigation receiving terminal are completed through the interaction between the FPGA and DSP units and the interface unit. The external output protocols of the interface unit include SPI, IIC and UART.

[0012] According to the configuration of the navigation receiving terminal, FPGA completes the capture operation of the digital low-orbit satellite navigation signal. If the satellite signal is successfully captured, the logic receiving channel is opened, and the frequency conversion, carrier stripping and pseudo code stripping operations of the satellite signal are completed in the logic receiving channel to realize high-speed processing of the satellite signal. The processing results are output to the data storage unit and the DSP unit is informed for subsequent processing.

[0013] The DSP unit is used to realize loop processing and information synchronization of low-orbit navigation satellite signals. If both are successful, the navigation message is demodulated, and when the number of satellites meets the requirements, positioning, speed measurement and timing are realized. In addition, the DSP unit is also used to complete the working strategy control of the entire receiving module.

[0014] Furthermore, the receiving module works as follows: the radio frequency unit receives an analog signal from the antenna, performs down-conversion, filtering, and amplification operations on the signal to obtain an intermediate frequency satellite signal, and then performs ADC sampling processing on the intermediate frequency signal to generate a digital signal, and the generated digital signal is passed to the FPGA for processing; the FPGA captures the digital signal and determines the captured satellite number and uncertainty range according to the configuration of the DSP unit; if the capture is successful, the multiplexing receiving channel unit is turned on to track the visible satellite;

[0015] The specific steps include the following:

[0016] Step 1: When the receiving module is started, the DSP unit completes the initialization configuration of the multiplexed receiving channel unit in the FPGA. The digital low-orbit satellite navigation signal in the FPGA enters the multiplexed receiving channel unit after down-conversion, filtering, quantization, and extraction;

[0017] Step 2: In the multiplexing receiving channel unit, the processed digital navigation signal is stored. When the satellite signal needs to be tracked, the multiplexing receiving channel unit broadcasts the satellite signal data and the control logic according to the multiplexing frequency, and adopts the ping-pong logic to ensure that the satellite data is stored and broadcast at the same time; a physical receiving channel of the multiplexing receiving channel unit performs serial processing on different logical receiving channels under the command of the control logic, and each logical receiving channel realizes signal tracking of one satellite;

[0018] Step 3: After a logical receiving channel starts tracking, the configuration information of this channel is loaded, and the carrier digital controlled oscillator, pseudo code digital controlled oscillator, down converter, pseudo code generator, correlator and pseudo code correlation interval are configured according to the corresponding information. After the configuration is completed, the channel state is restored and the intermediate variable data cached after the last processing is completed is loaded;

[0019] Step 4: within the set data cycle, the pseudo code and the frequency-converted data are sent to the correlator for correlation operation, and the obtained correlation result data is latched and sent to the data storage unit;

[0020] Step 5: The data storage unit reports the relevant result data to the DSP unit for tracking loop operation, and at the same time, the FPGA saves all state parameters of the current logic receiving channel, and then starts the signal processing flow of the next logic receiving channel;

[0021] Step 6: Complete continuous processing of satellite signal correlation values ​​in the DSP unit to achieve signal tracking and synchronization, obtain observations of low-orbit satellite pseudorange, carrier, Doppler, and carrier-to-noise ratio, demodulate the navigation message, and complete the reception and processing of low-orbit satellite signals; when the number of satellites reaches the positioning requirement, realize satellite positioning solution.

[0022] Furthermore, in step 3, the pseudocode generator is configured according to the low-orbit navigation satellite signal system to be tracked, and the configuration content includes the pseudocode generation method, pseudocode rate and signal modulation method; wherein the pseudocode generation method is determined based on the shift register architecture, and the modulation methods include BPSK, QPSK and BOC (1,1).

[0023] Furthermore, in step 4, the interval of the correlators is adjusted according to the sampling rate interval or the chip number interval, and the number of the correlators is 3 or 5.

[0024] Furthermore, in step 5, when the physical receiving channel completes the processing of all logical receiving channels, a completion interrupt is reported, and the DSP unit obtains the data results generated by the channel after responding to the interrupt.

[0025] Furthermore, the physical receiving channel supports reception of different types of low-orbit satellite navigation signals, and also supports reception of signals of GPS, BDS, GLONASS, and GALILEO OS frequencies.

[0026] Compared with the prior art, the technical solution of the present invention has the following advantages:

[0027] 1. The present invention adopts a low-orbit satellite navigation signal receiving channel method based on channel multiplexing, which greatly reduces the logic resource occupation of FPGA, allowing the original receiving terminal to achieve extended tracking of low-orbit navigation satellite signals at a relatively low cost, and can improve the utilization efficiency of FPGA resources while maintaining the processing capacity of the receiving terminal, while reducing power consumption.

[0028] 2. In the present invention, the entire low-orbit satellite navigation signal receiving channel method based on channel multiplexing is very flexible, and multiple links such as the number of multiplexed channels, sampling frequency, working frequency, pseudo code generator, and correlator can be flexibly configured, which greatly facilitates subsequent design and upgrade expansion.

[0029] 3. The present invention can maintain compatibility with the existing GNSS signal reception and can support some existing GNSS frequency signals with just a little configuration, greatly enriching the scalability application of the receiving terminal.

[0030] In summary, the present invention can realize the reception of low-orbit satellite navigation signals on a receiving terminal using a DSP+FPGA architecture, while reducing FPGA resource occupancy and alleviating power consumption of the receiving terminal on the basis of ensuring the processing capability of the receiver. BRIEF DESCRIPTION OF THE DRAWINGS

[0031] The following drawings are only used for the purpose of illustrating the preferred embodiment and are not considered to be limiting of the present invention. In the entire drawings, the same reference symbols are used to represent the same components.

[0032] Figure 1 It is a workflow diagram of the receiving module in an embodiment of the present invention.

[0033] Figure 2 It is a structural schematic diagram of a receiving module in an embodiment of the present invention. DETAILED DESCRIPTION

[0034] The exemplary embodiments of the present disclosure will be described in more detail below with reference to the accompanying drawings. Although exemplary embodiments of the present disclosure are shown in the accompanying drawings, it should be understood that the present disclosure can be implemented in various forms and should not be limited by the embodiments set forth herein. On the contrary, these embodiments are provided to enable a more thorough understanding of the present disclosure and to fully convey the scope of the present disclosure to those skilled in the art.

[0035] Reference Figure 1 and Figure 2 , a low-orbit satellite navigation signal receiving module based on time-division channel multiplexing, including a radio frequency unit, a power module unit, a data storage unit, an interface unit, a DSP and an FPGA; the DSP is used to implement the reception and processing unit, ephemeris analysis, positioning solution and work strategy control of low-orbit navigation satellite signals, and the FPGA is used to implement the capture and processing unit and the receiving channel unit of the low-orbit satellite navigation signal. The receiving channel unit adopts a time-division multiplexing design, and one FPGA physical tracking channel can support the simultaneous tracking of multiple low-orbit navigation satellite signals. Among them:

[0036] The RF unit is connected to the DSP through the SPI bus interface. After the receiving terminal is started, the DSP completes the initialization configuration of the RF unit. At the same time, the RF unit output pin is connected to the FPGA input pin. After the configuration is completed, the RF unit outputs the digital navigation satellite signal to the FPGA for subsequent processing.

[0037] The power module unit is connected with the radio frequency unit, the data storage unit, the interface unit, the FPGA and the DSP to realize power-on and power-off control of all modules.

[0038] The data storage unit is connected to the FPGA and DSP through corresponding interfaces. The FPGA completes the sampling of satellite data, quantization and preliminary processing, and then outputs the corresponding data storage unit. Then, the DSP obtains the satellite data to be processed from the data processing unit and performs subsequent signal tracking synchronization and information analysis.

[0039] The interface unit is connected with FPGA and DSP. The information input and output of the navigation receiving terminal are completed through the interactive operation between FPGA and DSP and the interface unit. The external output protocols of the interface unit include SPI, IIC and UART.

[0040] The FPGA and DSP are interconnected through the EMIF bus. The FPGA first completes the capture operation of the digital low-orbit satellite navigation signal according to the terminal configuration. If the satellite signal is successfully captured, the receiving channel is opened at this time, and the frequency conversion, carrier stripping, pseudo code stripping and other operations of the satellite signal are completed in the receiving channel to achieve high-speed processing of the satellite signal. The processing results are output to the data storage unit and the DSP is informed for subsequent processing. The loop processing and information synchronization of the low-orbit navigation satellite signal are implemented in the DSP. If all are successful, the navigation message can be demodulated. When the number of satellites meets the requirements, the positioning, speed measurement and timing can be solved. At the same time, the working strategy control of the entire receiving module is completed in the DSP.

[0041] When receiving and processing low-orbit satellite navigation signals, the RF unit first receives an analog signal from the antenna, then performs down-conversion, filtering, amplification and other processing operations on the signal to obtain an intermediate frequency satellite signal, and then performs ADC sampling processing on the intermediate frequency signal to generate digital signal sampling data, and the generated digital signal is passed to the FPGA for processing. The FPGA first captures the digital intermediate frequency signal, and determines the captured satellite number and uncertainty range based on the configuration of the DSP. If the low-orbit satellite signal is successfully captured, the multiplexed receiving channel is opened to track the visible satellite.

[0042] Specifically, the receiving module works as follows:

[0043] Step 1: When the receiving module is started, the DSP unit completes the initialization configuration of the multiplexed receiving channel unit in the FPGA. The digital low-orbit satellite navigation signal in the FPGA is down-converted, filtered, quantized, and extracted before entering the multiplexed receiving channel unit. In the receiving unit, the processed digital navigation signal is stored according to the established configuration. When the satellite signal needs to be tracked, the receiving unit broadcasts the satellite signal data and the control logic according to the set multiplexing frequency. Ping-pong logic is used here to ensure that the storage and broadcasting of satellite data can be carried out simultaneously.

[0044] Step 2: In the receiving unit, a physical channel performs serial processing on different logical channels under the command of the time-division channel multiplexing control logic, and each logical channel implements signal tracking of a satellite.

[0045] Step 3: After a logical channel starts tracking, first load the configuration information of this channel, configure the carrier numerical control oscillator, pseudo code numerical control oscillator, down converter, pseudo code generator, correlator and pseudo code correlation interval according to the corresponding information, restore the channel state after configuration, and load the intermediate variable data cached after the last processing.

[0046] Step 4: Within the set data cycle, the pseudo code and the frequency-converted data are correlated, and the resulting data is latched and sent to the data storage unit.

[0047] Step 5: The relevant data results in the data storage unit are reported to the DSP for tracking loop operation. At the same time, after all state parameters of the current logic channel are saved in the FPGA, the signal processing flow of the next logic channel is started.

[0048] Step 6: DSP completes continuous processing of satellite signal correlation values, realizes signal tracking and synchronization, obtains low-orbit satellite pseudorange, carrier, Doppler, carrier-to-noise ratio and other observation quantities, demodulates the navigation message, completes the reception and processing of low-orbit satellite signals, and realizes satellite positioning solution when the number of satellites reaches the positioning requirement.

[0049] The above RF unit can adopt a four-channel RF chip design, and deploying two chips can complete the coverage of the commonly used satellite signal frequency range. At the same time, it is connected to the DSP through the SPI bus, and the RF unit can be flexibly configured through the DSP. The RF unit output is connected to the pin of the FPGA to realize the handover of digital satellite signals.

[0050] The data storage unit receives the satellite data pre-processed in the FPGA, notifies the DSP module to process the data, and reports the data to the DSP as required.

[0051] In step 1, the time-division channel multiplexing control logic uniformly controls all physical receiving channels. The control logic implements the storage and broadcasting of satellite data and generates various control signals. The above operations are effective for all channels, that is, no matter how many physical receiving channels are opened, they are all scheduled by the same control logic. At the same time, the number of logical channels in the physical receiving channel can be flexibly configured according to the actual needs of the application, and the typical configuration value range is 1-5.

[0052] In step 3, the pseudo code generator can be configured according to the low-orbit navigation satellite signal system to be tracked, including the pseudo code generation method, pseudo code rate and signal modulation method. The pseudo code generation method should be based on the shift register architecture, and the modulation methods include BPSK, QPSK and BOC (1,1).

[0053] In step 4, the interval and number of correlators are flexibly configurable. The interval of the correlators supports adjustment according to the sampling rate interval or the number of code chips, and the number of correlators can be selected as 3, 5 or more.

[0054] In step 5, the channel-related values ​​interact with the processor in an interrupt mode, that is, after the physical channel completes the processing of all logical channels, it reports the completion interrupt, and the processor obtains the data results generated by the channel after responding to the interrupt. The method is applied to the low-orbit navigation satellite signal receiving terminal based on the DSP+FPGA architecture.

[0055] In the above-mentioned receiving module, the physical channel can not only support the reception of different types of low-orbit satellite navigation signals, but also expand the support for the reception of signals of some GNSS (GPS / BDS / GLONASS / GALILEO OS) frequencies through configuration.

[0056] The module works more specifically as follows:

[0057] Step 1: After the digitized low-orbit navigation satellite signal is down-converted, filtered, quantized, and extracted, the configured time-division channel multiplexing control module stores the data. The control module also broadcasts the satellite signal data and control logic according to the set multiplexing frequency.

[0058] In step 1, the time division channel multiplexing control module controls all physical receiving channels, including channel opening, channel operation and channel closing. During the implementation process, according to the set number of logical channels, channel opening, channel operation and channel closing are controlled in sequence.

[0059] According to the specific parameters of the low-orbit navigation satellite signal to be tracked, configure the down-conversion module, filtering module, quantization module, extraction module, and data storage and forwarding module. The down-conversion module, filtering module, quantization module, extraction module, and data storage and forwarding module are all overall configurations, that is, the above modules work on all physical channels, and all logical channels in the physical channel have the same data source when tracking satellites. After configuration, all physical channels corresponding to the same signal use the above module data.

[0060] Step 2: Under the control of the time-division channel multiplexing control module, a physical channel performs serial processing on different logical channels, and each logical channel completes the tracking of one satellite.

[0061] In step 2, the number of logical channels processed serially by a physical channel is configurable, with a typical value of 1-5. At the same time, the clock frequency used for sampling low-orbit navigation satellite signal data and the working clock frequency for the logical channel are both adjustable. The relationship between the two needs to satisfy: working clock frequency > sampling clock frequency * number of logical channels.

[0062] For example, according to typical application requirements, the number of physical channels can be set to 3 and the number of logical channels can be set to 4. In this way, the equivalent number of receiving channels of the receiving terminal relative to the traditional solution is 12, that is, up to 12 low-orbit navigation satellite signals can be tracked simultaneously. The sampling frequency is configured according to the characteristics of the RF module used by the receiving terminal. The working clock frequency of the multiplexing architecture is finally determined based on the above configuration.

[0063] Step 3: After a logical channel starts tracking, first load the configuration information of this channel, configure the carrier digital control oscillator module, pseudo code digital control oscillator module, down-conversion module, pseudo code generator module, and correlator module according to the configuration information, and restore the channel after the configuration is completed, and load the channel data processed last time.

[0064] After the logic channel starts, the channel configuration information is loaded serially in sequence, and the configuration information of each logic module and the last state parameters are restored.

[0065] The pseudo code generator can be configured according to the low-orbit navigation satellite signal system, including pseudo code generation method, pseudo code rate and signal modulation method. The pseudo code generation method is based on the shift register architecture. According to the designed satellite signal system, the corresponding register length and tap position are configured to generate the corresponding satellite pseudo code. At the same time, the pseudo code frequency can also be configured according to demand, supporting a series of typical frequencies such as 1.023M, 2.046M, 4.092M, 10.23M, etc.

[0066] The interval and number of correlators are flexible and adjustable. The correlator spacing can be configured to be adjusted according to the sampling rate interval or the number of chips, and the number of correlators can be selected to be 3, 5 or more.

[0067] When the logical channel is first opened, the pseudo code generation mode, pseudo code rate and signal modulation mode of this channel are configured according to the low-orbit navigation satellite signal system. The pseudo code generation mode, tap selection, pseudo code frequency and modulation mode are determined. The above configuration remains unchanged until the logical channel is completely cleared.

[0068] Step 3 supports different types of signal modulation, including BPSK, QPSK and BOC signals, and the correlation value supports data channel I / Q and pilot channel I / Q output.

[0069] Step 4: Within the set data period, the pseudo code and the frequency conversion data are correlated, and the resulting data is latched.

[0070] When the logical channel is first opened, the correlator interval and the number of correlators are configured according to the functional requirements of the receiving terminal. The correlator supports the I / Q output of the data branch and the I / Q output of the pilot branch, and the output can be configured according to the requirements.

[0071] After the physical channel completes the processing of all logical channels, it reports the completion interrupt, and the processor obtains the observation data generated by the channel after responding to the interrupt.

[0072] Step 5: The relevant data results are reported to the processor for loop operation, the state parameters of each module of the current logical channel are saved, and the processing flow of the next logical channel is started.

[0073] The channel-related values ​​interact with the processor in an interrupt mode, that is, after the physical channel completes the processing of all logical channels, it reports the completion interrupt, and the processor obtains the observation data generated by the channel after responding to the interrupt.

[0074] The receiving module is based on the DSP+FPGA architecture and can be applied to low-orbit navigation satellite signal receivers. It performs low-orbit navigation satellite signal capture and channel correlation and other navigation signal processing in the FPGA, and performs loop processing and navigation information processing in the DSP.

[0075] In addition, the receiving terminal channel can be flexibly configured according to application requirements. It can track low-orbit navigation satellite signals as well as some GNSS conventional frequency signals.

[0076] In summary, the present invention performs down-conversion processing on the input low-orbit satellite navigation signal, and then configures the pseudo code generator according to the corresponding navigation satellite signal format, performs multi-channel correlation operation on the generated pseudo code sequence and the satellite signal after frequency conversion, and reports the multi-channel correlation value to the processor for tracking loop processing. The present invention can significantly reduce the channel logic resource occupation in the low-orbit navigation satellite signal receiving terminal while maintaining the satellite tracking capability of the receiving terminal unchanged, which helps to reduce the power consumption of the receiving terminal and has a wide range of engineering implementation significance.

[0077] It should be noted that the specific embodiments of the present invention are described in detail above in conjunction with the accompanying drawings, but the present invention is not limited to the above embodiments. Those skilled in the art can make various modifications or improvements without departing from the spirit and scope of the claims of this application.

Claims

1. A low-orbit satellite navigation signal receiving module based on time-division channel multiplexing, applied to a navigation receiving terminal, characterized in that: It includes a radio frequency unit, a power module unit, a data storage unit, an interface unit, a DSP unit and an FPGA; the DSP unit is used to realize the receiving and processing unit of the low-orbit satellite navigation signal, as well as the functions of ephemeris analysis, positioning solution and working strategy control; the FPGA is used to realize the capturing and processing unit of the low-orbit satellite navigation signal and the multiplexing receiving channel unit; In the multiplexed receiving channel unit, one physical receiving channel realizes multiple logical receiving channels by multiplexing; the FPGA and DSP units are interconnected through the EMIF bus; wherein: The RF unit is connected to the DSP unit through the SPI bus interface. After the navigation receiving terminal is started, the DSP unit completes the initialization configuration of the RF unit. The output pin of the RF unit is connected to the input pin of the FPGA. After the configuration is completed, the RF unit outputs the digital satellite navigation signal to the FPGA for subsequent processing. The power module unit is connected with the radio frequency unit, the data storage unit, the interface unit, the FPGA and the DSP unit to realize power-on and power-off control of these modules; The data storage unit is connected to the FPGA and DSP units through corresponding interfaces. After completing the sampling, quantization and preliminary processing of the satellite data in the FPGA, the results are output to the data storage unit. Then the DSP unit obtains the satellite data to be processed from the data storage unit and performs subsequent signal tracking synchronization and information analysis processing. The interface unit is connected with the FPGA and DSP units. The information input and output of the navigation receiving terminal are completed through the interaction between the FPGA and DSP units and the interface unit. The external output protocols of the interface unit include SPI, IIC and UART. According to the configuration of the navigation receiving terminal, FPGA completes the capture operation of the digital low-orbit satellite navigation signal. If the satellite signal is successfully captured, the logic receiving channel is opened, and the frequency conversion, carrier stripping and pseudo code stripping operations of the satellite signal are completed in the logic receiving channel to realize high-speed processing of the satellite signal. The processing results are output to the data storage unit and the DSP unit is informed for subsequent processing. The DSP unit is used to realize the loop processing and information synchronization of low-orbit navigation satellite signals. If both are successful, the navigation message is demodulated. When the number of satellites meets the requirements, positioning, speed measurement and timing are realized. In addition, the DSP unit is also used to complete the working strategy control of the entire receiving module. The working mode of the receiving module is that the RF unit receives the analog signal from the antenna, performs down-conversion, filtering and amplification operations on the signal to obtain the intermediate frequency satellite signal, and then performs ADC sampling processing on the intermediate frequency signal to generate a digital signal, and the generated digital signal is passed to the FPGA for processing; the FPGA captures the digital signal and determines the captured satellite number and uncertainty range according to the configuration of the DSP unit; if the capture is successful, the multiplexed receiving channel unit is turned on to track the visible satellite; The specific steps include the following: Step 1: When the receiving module is started, the DSP unit completes the initialization configuration of the multiplexed receiving channel unit in the FPGA. The digital low-orbit satellite navigation signal in the FPGA enters the multiplexed receiving channel unit after down-conversion, filtering, quantization, and extraction; Step 2: In the multiplexing receiving channel unit, the processed digital navigation signal is stored. When the satellite signal needs to be tracked, the multiplexing receiving channel unit broadcasts the satellite signal data and the control logic according to the multiplexing frequency, and adopts the ping-pong logic to ensure that the satellite data is stored and broadcast at the same time; a physical receiving channel of the multiplexing receiving channel unit performs serial processing on different logical receiving channels under the command of the control logic, and each logical receiving channel realizes signal tracking of one satellite; Step 3: After a logical receiving channel starts tracking, the configuration information of this channel is loaded, and the carrier digital controlled oscillator, pseudo code digital controlled oscillator, down converter, pseudo code generator, correlator and pseudo code correlation interval are configured according to the corresponding information. After the configuration is completed, the channel state is restored and the intermediate variable data cached after the last processing is completed is loaded; Step 4: within the set data cycle, the pseudo code and the frequency-converted data are sent to the correlator for correlation operation, and the obtained correlation result data is latched and sent to the data storage unit; Step 5: The data storage unit reports the relevant result data to the DSP unit for tracking loop operation, and at the same time, the FPGA saves all state parameters of the current logic receiving channel, and then starts the signal processing flow of the next logic receiving channel; Step 6: Complete continuous processing of satellite signal correlation values ​​in the DSP unit to achieve signal tracking and synchronization, obtain observations of low-orbit satellite pseudorange, carrier, Doppler, and carrier-to-noise ratio, demodulate the navigation message, and complete the reception and processing of low-orbit satellite signals; when the number of satellites reaches the positioning requirement, realize satellite positioning solution.

2. A low-orbit navigation satellite signal receiving module based on time-division channel multiplexing according to claim 1, characterized in that: In step 3, the pseudo code generator is configured according to the low-orbit navigation satellite signal system to be tracked, and the configuration content includes the pseudo code generation method, pseudo code rate and signal modulation method; wherein the pseudo code generation method is determined based on the shift register architecture, and the modulation methods include BPSK, QPSK and BOC (1,1).

3. According to the low-orbit satellite navigation signal receiving channel module based on channel multiplexing of claim 1, it is characterized in that: In step 4, the interval of the correlators is adjusted according to the sampling rate interval or the chip number interval, and the number of the correlators is 3 or 5.

4. The low-orbit satellite navigation signal receiving channel module based on channel multiplexing according to claim 1, characterized in that: In step 5, when the physical receiving channel completes the processing of all logical receiving channels, a completion interrupt is reported, and the DSP unit obtains the data results generated by the channel after responding to the interrupt.

5. The low-orbit satellite navigation signal receiving channel module based on channel multiplexing according to claim 1, characterized in that: The physical receiving channel supports reception of different types of low-orbit satellite navigation signals, and also supports reception of signals of GPS, BDS, GLONASS, and GALILEO OS frequencies.

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