Chip packaging structure and chip packaging method

Abstract

The present application discloses a chip packaging structure and a chip packaging method thereof. The chip packaging structure includes a packaging shell that wraps a chip wafer body, an isolation layer is provided on the upper part of the packaging shell, and the lower part of the isolation layer is in close contact with the upper layer of the chip; a pin output layer is provided on the packaging shell on one side of the isolation layer, and a plurality of pins are provided on the pin output layer, and the pins are electrically connected to the chip circuit; the packaging shell outside the pin output layer extends downward to the insulating layer or substrate; an external connecting wire is also provided in the packaging shell outside the pin output layer, and the top of the external connecting wire is electrically connected to the pin output layer through a second external connecting conductive block, and the bottom of the external connecting wire is electrically connected to the integrated optical circuit through a first external connecting conductive block; an optical interface layer is provided on the packaging shell on one side of the isolation layer, and the optical interface layer extends from the top through the packaging shell to the integrated optical circuit, and the optical interface layer is a waveguide material.

Description

Technical Field

[0001] The present invention relates to the field of semiconductors, and in particular to a chip packaging structure and a chip packaging method. Background Art

[0002] Optoelectronic integrated chips belong to the research of new applications. For example, the prior art discloses an optoelectronic monolithic integrated system based on lithium niobate-silicon wafers, which includes an integrated optical path module, a photoelectric conversion module and an integrated circuit module integrated on the same substrate through a semiconductor CMOS process to achieve monolithic integration, and respectively performs transmission and processing of optical signals, conversion of optical signals into electrical signals, and transmission and processing of electrical signals. This technology can give full play to the excellent electro-optical properties of lithium niobate materials and the advantages of silicon-based materials. However, similar monolithic integrated optoelectronic integrated chips in the prior art belong to the research of new applications. In actual implementation, the packaging supporting the prior art cannot handle the optical path interface and electrical signal pin allocation well. In particular, due to the limited volume space of the interface configuration, the optical path transmission is not stable enough, and therefore the signal is not stable enough. Summary of the Invention

[0003] In order to overcome the deficiencies of the existing technology, the present invention provides a chip packaging structure and a chip packaging method.

[0004] The technical solution adopted by the present invention to solve its technical problem is:

[0005] A chip packaging structure includes a packaging shell that wraps a chip wafer body, an isolation layer is provided on the upper portion of the packaging shell, and the lower portion of the isolation layer is in close contact with the upper layer of the chip; a pin output layer is provided on the packaging shell on one side of the isolation layer, and a plurality of pins are provided on the pin output layer, and the pins are electrically connected to the chip circuit; the packaging shell outside the pin output layer extends downward to the insulating layer or substrate; an external connecting wire is also provided in the packaging shell outside the pin output layer, and the top of the external connecting wire is electrically connected to the pin output layer through a second external connecting conductive block, and the bottom of the external connecting wire is electrically connected to an integrated optical circuit through a first external connecting conductive block; an optical interface layer is provided on the packaging shell on one side of the isolation layer, and the optical interface layer extends from the top through the packaging shell to the integrated optical circuit, and the optical interface layer is made of waveguide material.

[0006] Furthermore, an optical detection and compensation layer is provided on the isolation layer adjacent to the optical interface layer, and a blocking layer is provided on the upper part of the optical detection and compensation layer. The optical detection and compensation layer provides an interface to support optical path detection or optical path compensation. The blocking layer can be removed during detection or compensation of the optical path, and the blocking layer can be refilled after detection or when compensation of the optical path is not needed.

[0007] Furthermore, the optical detection and compensation layer is connected to the optical modulation circuit and the optical signal circuit through an external optical path and determines the stability of the optical path signal based on the electrical signal mapping detection output by the pin output layer. After determining the optical path parameters that need to be compensated, the optical detection and compensation layer is also used to connect the optical signal for optical path compensation to enhance the stability of the optical signal.

[0008] Furthermore, electrical detection and enhancement contacts are provided on the packaging shell where the external connection wires are located. The electrical detection and enhancement contacts are used to detect or enhance internal electrical signals. The electrical detection and enhancement contacts provide an electrical interface to support internal electrical signal detection or enhancement.

[0009] Furthermore, the electrical detection and enhanced contact detection of internal electrical signals are determined based on the electrical signal mapping detection of the pin output layer pins, and are also determined based on the optical detection and compensation layer optical path signal mapping detection.

[0010] Furthermore, the pin output layer is connected to the packaged top frame through a pin adapter board, and a reserved wire groove is opened on the top frame above the optical interface layer. Both sides of the top frame are fixed by fixed shoulders, and the fixed shoulders are fixed on the PCB board.

[0011] A chip packaging method includes an initial packaging step:

[0012] Forming a package shell around the chip on the second insulating layer / substrate, and forming an isolation layer in the middle of the integrated circuit silicon layer;

[0013] An optical interface layer is formed in the packaging shell on one side of the isolation layer, wherein one end of the optical interface layer is exposed and the other end is connected to the integrated optical circuit silicon wafer layer and the integrated optical circuit lithium niobate wafer layer;

[0014] forming a pin output layer on the upper portion of the integrated circuit silicon layer on one side of the isolation layer, and electrically connecting the pins on the pin output layer to corresponding contacts on the integrated circuit silicon layer;

[0015] An external connection wire is formed in the packaging shell on one side of the pin output layer, a first external connection conductive block is formed at the bottom of the external connection wire and is electrically connected to the integrated optical circuit silicon wafer layer and the integrated optical circuit lithium niobate wafer layer, a second external connection conductive block is formed on the top of the external connection wire and is electrically connected to the pin output layer; an electrical detection and enhancement contact is formed on the packaging shell, and the middle part of the external connection wire is electrically connected to the electrical detection and enhancement contact.

[0016] Furthermore, the above-mentioned packaging method also includes detecting and adjusting the packaging: connecting the external optical path and the optical modulation circuit and the optical signal circuit through the optical detection and compensation layer, determining the stability of the optical path signal based on the electrical signal mapping detection of the pin output of the pin output layer, and after determining the optical path parameters that need to be compensated, connecting the optical signal with the optical detection and compensation layer to perform optical path compensation to enhance the stability of the optical signal; detecting the internal electrical signal through electrical detection and enhanced contacts, and when detecting the internal electrical signal, determining it based on the electrical signal mapping detection of the pin output of the pin output layer, and also determining it based on the optical path signal mapping detection of the optical detection and compensation layer, and externally connecting the enhanced signal through electrical detection and enhanced contacts.

[0017] The beneficial effect of the present invention is that when the present application is applied to a monolithic integrated optoelectronic chip, it can handle the optical path interface and electrical signal pin allocation very well, and can achieve stable signal transmission of the optical path as much as possible. In the further packaging, the present application can also connect the external optical path and the optical modulation circuit and the optical signal circuit through the optical detection and compensation layer, and determine the stability of the optical path signal based on the electrical signal mapping detection of the pin output of the pin output layer. After determining the optical path parameters that need to be compensated, the optical detection and compensation layer connects the optical signal to perform optical path compensation to enhance the stability of the optical signal; detect the internal electrical signal through electrical detection and enhanced contacts, and when detecting the internal electrical signal, it is determined based on the electrical signal mapping detection of the pin output of the pin output layer, and also based on the optical path signal mapping detection of the optical detection and compensation layer, and the signal is enhanced by external connection through electrical detection and enhanced contacts. BRIEF DESCRIPTION OF THE DRAWINGS

[0018] Figure 1 It is a schematic cross-sectional view of the packaging structure of an embodiment of the present application.

[0019] Figure 2 It is a cross-sectional schematic diagram of the packaging structure of an embodiment of the present application in the package.

[0020] Figure 3 It is a cross-sectional schematic diagram of the flip-chip packaging structure of the embodiment of the present application in a PCB application.

[0021] The present invention will be further described below with reference to the accompanying drawings and examples. DETAILED DESCRIPTION

[0022] In specific implementation, Figure 1As shown, the chip packaging structure of the present application includes a packaging shell 101 that wraps the chip wafer body, an isolation layer 102 is provided on the upper part of the packaging shell 101, and the lower part of the isolation layer 102 is close to the upper layer of the chip, a pin output layer 105 is provided on the packaging shell 101 on one side of the isolation layer 102, and a plurality of pins 107 are provided on the pin output layer 105, and the pins 107 are electrically connected to the chip circuit, and the packaging shell 101 outside the pin output layer 105 extends downward to the insulating layer or substrate, and the pins 107 are electrically connected to the chip circuit. An external connecting wire 110 is also provided in the packaging shell 101 outside the pin output layer 105. The top of the external connecting wire 110 is electrically connected to the pin output layer 105 through the second external connecting conductive block 109, and the bottom of the external connecting wire 110 is electrically connected to the integrated optical circuit through the first external connecting conductive block 108; an optical interface layer 103 is provided on the packaging shell 101 on one side of the isolation layer 102, and the optical interface layer 103 extends from the top through the packaging shell 101 to the integrated optical circuit, and the optical interface layer 103 is a waveguide material.

[0023] In practice, this application can well handle the optical path interface and electrical signal pin assignment when applied to a monolithic integrated optoelectronic integrated chip, and can achieve stable signal transmission of the optical path as much as possible, such as Figure 2 As shown, first, a package shell 101 is formed on the outer periphery of the chip on the upper layer of the second insulating layer 208 / substrate 209, and an isolation layer 102 is formed in the middle of the integrated circuit silicon layer 201; then, an optical interface layer 103 is formed in the package shell 101 on one side of the isolation layer 102, with one end of the optical interface layer 103 exposed and the other end connected to the integrated optical circuit silicon wafer layer 203 and the integrated optical circuit lithium niobate wafer layer 207; then, a pin output layer 105 is formed on the upper part of the integrated circuit silicon layer 201 on the side of the isolation layer 102, and the pins 107 on the pin output layer 105 are connected to the integrated circuit. The corresponding contacts of the silicon layer 201 are electrically connected; then, an external connection wire 110 is formed in the packaging shell 101 on the side of the pin output layer 105, and a first external connection conductive block 108 is formed at the bottom of the external connection wire 110 and is electrically connected to the integrated optical circuit silicon wafer layer 203 and the integrated optical circuit lithium niobate wafer layer 207. A second external connection conductive block 109 is formed on the top of the external connection wire 110 and is electrically connected to the pin output layer 105; then, an electrical detection and enhancement contact 111 is formed on the packaging shell 101, and the middle part of the external connection wire 110 is electrically connected to the electrical detection and enhancement contact 111.

[0024] In a preferred embodiment, an optical detection and compensation layer 104 is further provided on the isolation layer 102 adjacent to the optical interface layer 103, and a blocking layer 106 is provided on the upper portion of the optical detection and compensation layer 104. The optical detection and compensation layer 104 provides an interface to support optical path detection or optical path compensation. The blocking layer 106 can be removed during detection or when compensating the optical path, and can be refilled after detection or when compensation of the optical path is not required. The optical detection and compensation layer 104 is connected to the optical modulation circuit and the optical signal circuit via an external optical path and determines the stability of the optical path signal based on the mapping detection of the electrical signal output by the pin output layer 105. After determining the optical path parameters that require compensation, the optical detection and compensation layer 104 is further used to connect the optical signal for optical path compensation to enhance the stability of the optical signal.

[0025] In a preferred embodiment, an electrical detection and enhancement contact 111 is also provided on the packaging shell 101 where the external connection wire 110 is located. The electrical detection and enhancement contact 111 is used to detect or enhance internal electrical signals. The electrical detection and enhancement contact 111 provides an electrical interface to support internal electrical signal detection or enhancement. When the electrical detection and enhancement contact 111 detects internal electrical signals, it is determined based on the electrical signal mapping detection of the pin output layer 105 pin, and is also determined based on the optical detection and compensation layer 104 optical path signal mapping detection.

[0026] In addition, in the implementation, the present application can be fixed on the PCB board in a flip-chip manner, such as Figure 3 As shown, the pin output layer 105 is connected to the top frame 301 of the package through the pin adapter board 300, and the top frame 301 has a reserved wire groove 302 above the optical interface layer 103. The two sides of the top frame 301 are fixed by fixed shoulders 303, and the fixed shoulders 303 are fixed on the PCB board. The fixed shoulders 303 are internally provided with leads that are electrically connected to the pin adapter board 300 and the pin output layer 105. The bottom of the fixed shoulder 303 is electrically connected to the electrical contacts on the PCB through electrical contacts, thereby realizing the circuit connection of the entire package.

[0027] In addition, the present application also discloses a chip packaging method, an embodiment of which includes the following initial packaging steps:

[0028] A package shell 101 is formed on the outer periphery of the chip on the second insulating layer 208 / substrate 209, and an isolation layer 102 is formed on the middle of the integrated circuit silicon layer 201;

[0029] An optical interface layer 103 is formed in the packaging shell 101 on one side of the isolation layer 102. One end of the optical interface layer 103 is exposed and the other end is connected to the integrated optical circuit silicon wafer layer 203 and the integrated optical circuit lithium niobate wafer layer 207.

[0030] A pin-out layer 105 is formed on the upper portion of the integrated circuit silicon layer 201 on one side of the isolation layer 102, and pins 107 on the pin-out layer 105 are electrically connected to corresponding contacts of the integrated circuit silicon layer 201;

[0031] An external connection wire 110 is formed in the package shell 101 on one side of the pin-out layer 105. A first external connection conductive block 108 is formed at the bottom of the external connection wire 110 and is electrically connected to the integrated optical circuit silicon wafer layer 203 and the integrated optical circuit lithium niobate wafer layer 207. A second external connection conductive block 109 is formed on the top of the external connection wire 110 and is electrically connected to the pin-out layer 105. An electrical detection and enhancement contact 111 is formed on the package shell 101, and the middle portion of the external connection wire 110 is electrically connected to the electrical detection and enhancement contact 111.

[0032] The chip packaging method, in an embodiment, further comprises detecting and adjusting the packaging:

[0033] The external optical path, the optical modulation circuit, and the optical signal circuit are connected through the optical detection and compensation layer 104, and the stability of the optical path signal is determined based on the mapping detection of the electrical signal output by the pin of the pin output layer 105. After determining the optical path parameters that need to be compensated, the optical detection and compensation layer 104 connects the optical signal to perform optical path compensation to enhance the stability of the optical signal; the internal electrical signal is detected through the electrical detection and enhancement contact 111, and when detecting the internal electrical signal, it is determined based on the mapping detection of the electrical signal output by the pin of the pin output layer 105, and also based on the mapping detection of the optical path signal of the optical detection and compensation layer 104, and the signal is externally connected through the electrical detection and enhancement contact 111.

Claims

1. A chip packaging structure, The invention is characterized in that it comprises: a monolithic integrated optoelectronic chip, wherein the monolithic integrated optoelectronic chip comprises a stacked substrate, a second insulating layer, an integrated optical circuit silicon wafer layer, an integrated optical circuit lithium niobate wafer layer, and an integrated circuit silicon layer; A packaging shell, wherein the packaging shell wraps around the periphery of the chip on the second insulating layer or the upper layer of the substrate, an isolation layer is provided on the upper portion of the packaging shell, and the lower portion of the isolation layer is in close contact with the upper layer of the chip, a pin-out layer is provided on the packaging shell on one side of the isolation layer, a plurality of pins are provided on the pin-out layer, and the pins are electrically connected to corresponding contacts of the integrated circuit silicon layer, the packaging shell outside the pin-out layer extends downward to the second insulating layer or the substrate, and an external connecting wire is further provided in the packaging shell outside the pin-out layer, the top of the external connecting wire is electrically connected to the pin-out layer via a second external connecting conductive block, and the bottom of the external connecting wire is electrically connected to the integrated optical circuit silicon wafer layer and the integrated optical circuit lithium niobate wafer layer via a first external connecting conductive block; An optical interface layer is provided on the packaging shell on the other side of the isolation layer. The optical interface layer extends from the top through the packaging shell to the integrated optical path silicon wafer layer and the integrated optical path lithium niobate wafer layer. The optical interface layer is a waveguide material. The pin output layer can be connected to the top frame of the package through a pin adapter board so that the chip structure can be fixed on the PCB board in a flip-chip manner.

2. The chip packaging structure according to claim 1, characterized in that: An optical detection and compensation layer is also provided on the isolation layer adjacent to the optical interface layer, and a blocking layer is provided on the upper part of the optical detection and compensation layer. The optical detection and compensation layer provides an interface to support optical path detection or optical path compensation. The blocking layer is removed during detection or when compensating the optical path, and the blocking layer is refilled after detection or when compensation of the optical path is not required.

3. The chip packaging structure according to claim 2, characterized in that: The optical detection and compensation layer is connected to the optical modulation circuit and the optical signal circuit through an external optical path and determines the stability of the optical path signal based on the electrical signal mapping detection of the pin output layer pin. After determining the optical path parameters that need to be compensated, the optical detection and compensation layer is also used to connect the optical signal for optical path compensation to enhance the stability of the optical signal.

4. The chip packaging structure according to claim 1, wherein: Electrical detection and enhancement contacts are also provided on the packaging shell where the external connection wires are located. The electrical detection and enhancement contacts are used to detect or enhance internal electrical signals. The electrical detection and enhancement contacts provide an electrical interface to support internal electrical signal detection or enhancement.

5. The chip packaging structure according to claim 4, characterized in that: The electrical detection and enhanced contact detection of internal electrical signals are determined based on the electrical signal mapping detection of the pin output layer pins, and are also determined based on the optical detection and compensation layer optical path signal mapping detection.

6. The chip packaging structure according to claim 1, characterized in that: The pin output layer is connected to the packaged top frame through a pin adapter plate. A reserved wire groove is provided on the top frame above the optical interface layer. Both sides of the top frame are fixed by fixed shoulders, and the fixed shoulders are fixed on the PCB board.

7. A chip packaging method for manufacturing the chip packaging structure according to claim 1, characterized in that: Includes initial packaging steps: Forming a package shell around the chip on the second insulating layer / substrate, and forming an isolation layer in the middle of the integrated circuit silicon layer; An optical interface layer is formed in the packaging shell on one side of the isolation layer, wherein one end of the optical interface layer is exposed and the other end is connected to the integrated optical circuit silicon wafer layer and the integrated optical circuit lithium niobate wafer layer; forming a pin output layer on the upper portion of the integrated circuit silicon layer on the other side of the isolation layer, and electrically connecting the pins on the pin output layer to corresponding contacts on the integrated circuit silicon layer; An external connection wire is formed in the packaging shell on one side of the pin output layer, a first external connection conductive block is formed at the bottom of the external connection wire and is electrically connected to the integrated optical circuit silicon wafer layer and the integrated optical circuit lithium niobate wafer layer, a second external connection conductive block is formed on the top of the external connection wire and is electrically connected to the pin output layer; an electrical detection and enhancement contact is formed on the packaging shell, and the middle part of the external connection wire is electrically connected to the electrical detection and enhancement contact.

8. A chip packaging method according to claim 7, characterized in that: Also includes detection adjustment package: The external optical path, optical modulation circuit and optical signal circuit are connected through the optical detection and compensation layer, and the stability of the optical path signal is determined based on the electrical signal mapping detection of the pin output of the pin output layer. After determining the optical path parameters that need to be compensated, the optical detection and compensation layer connects the optical signal to perform optical path compensation to enhance the stability of the optical signal; the internal electrical signal is detected through electrical detection and enhanced contacts, and when detecting the internal electrical signal, it is determined based on the electrical signal mapping detection of the pin output of the pin output layer, and also based on the optical path signal mapping detection of the optical detection and compensation layer, and the signal is enhanced by external connection through electrical detection and enhanced contacts.

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