Preparation Method of Refrigerated Infrared Detector

Abstract

The present invention provides a method for fabricating a refrigerated infrared detector, which is applied to the field of semiconductor technology. Specifically, indium pillars with a concave or convex shape are formed on a device chip or a readout circuit chip for forming the refrigerated infrared detector. Then, under the condition that the shape of the indium pillars on the chip with concave indium pillars remains unchanged, the indium pillars on the chip with convex indium pillars are heated until they are melted and then flip-chip interconnected with the indium pillars on the chip with concave indium pillars, so as to achieve the purpose of strengthening the stability of the indium pillars, avoiding their lateral sliding and offset, and ensuring that the indium pillars are not easily detached or deformed by adopting a flip-chip method with one cold and one hot (specifically, it can be set as cold on top and hot on the bottom, or hot on top and cold on the bottom, where the temperature of the cold end is generally 0°C to 30°C, and the temperature of the hot end is generally 80°C to 250°C), thereby ensuring that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements and ultimately avoiding problems of the device.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor technology, and particularly to a method for manufacturing a refrigerated infrared detector. Background Art

[0002] With the continuous popularization and development of infrared applications, advanced infrared detection technologies require detectors to have higher spatial resolution and better target recognition capabilities. An infrared detector is an optoelectronic device that converts infrared radiation into an electrical signal. The photoelectric reaction only occurs on the photosensitive element, and the subsequent signal processing process only involves electronics technology. Therefore, an infrared detection chip is the core component of an infrared detector. Since the current CMOS integrated circuit process is mainly based on Si technology, the infrared detection chip needs to be hybrid integrated with the Si readout circuit through an indium pillar flip-chip bonding technology to form an integrated detector module of a photosensitive chip plus a readout circuit. A corresponding metal indium pillar is prepared on each pixel structure. By aligning and pressing the pixels of the readout circuit with the pixels of the photosensitive chip one by one, a reliable electrical connection is formed between the pixels of the readout circuit and the pixels of the photosensitive chip through the van der Waals force between indium pillars or the thermal fusion welding of indium pillars and indium pillars / metal electrodes, realizing hybrid integration. Therefore, the size, morphology, and consistency of the indium pillars directly determine the connectivity rate of the interconnection between the readout circuit chip and the photosensitive chip.

[0003] Currently, infrared detectors are developing towards a center pitch of 15um, a device of 1024X1024, and a chip area reaching 17mmX17mm. Therefore, as infrared detectors develop towards a larger pixel scale and a smaller center pitch, the number of flip-chip bonding points needs to reach more than one million, which makes the flip-chip bonding difficulty increase sharply; considering pixel loss, the flip-chip bonding failure rate needs to be lower than 1%, and the flip-chip bonding alignment of pixels smaller than 10um is extremely difficult. At present, indium material is used as the metal material for flip-chip bonding interconnection, but in the actual manufacturing process, due to the too small size of the indium pillars (6 - 10um), problems such as alignment deviation, side slip, and poor soldering caused by height differences will occur; to solve this problem, the currently common solution is to form metal indium pillars with a "concave" or "convex" shape on the readout circuit and the photosensitive chip to achieve "convex" to "convex" flip-chip bonding.

[0004] However, for some currently designed flip-chip bonding indium pillars with concave-convex structures, due to the low melting point characteristic of metal indium, serious misalignment, side slip, and indium pillar detachment occur during the flip-chip bonding interconnection between the readout circuit and the photosensitive chip, and problems such as indium pillar and metal delamination and fracture occur after flip-chip bonding. Furthermore, the physical connection and electrical connection between the readout circuit and the photosensitive chip cannot meet the process requirements, ultimately resulting in device failure. Summary of the Invention

[0005] The object of the present invention is to provide a preparation method of a refrigerated infrared detector, so as to solve the problem that after the flip-chip bonding of the readout circuit chip and the device chip used for forming the refrigerated infrared detector, indium pillars are misaligned and side-slid, resulting in the physical connection and electrical connection between the readout circuit chip and the device chip not meeting the process requirements, and ultimately causing device failure.

[0006] In a first aspect, to solve the above technical problems, the present invention provides a preparation method of a refrigerated infrared detector. The substrate of the refrigerated infrared detector is a cadmium zinc telluride substrate. Specifically, the preparation method includes the following steps:

[0007] S1, providing a device chip for forming the refrigerated infrared detector and a readout circuit chip for forming the refrigerated infrared detector;

[0008] S2, forming a passivation layer on the surface of the device chip or the readout circuit chip. A first opening is formed in the passivation layer to expose a part of the substrate surface of the chip through the first opening;

[0009] S3, performing metallization treatment on the chip formed with the passivation layer to form a concave-shaped electrode structure on the surface of the chip. The electrode structure at least includes a first metal layer and a second metal layer sequentially deposited in a direction away from the substrate surface of the chip;

[0010] S4, sequentially forming a third metal layer and a metallization layer on the surface of the electrode structure, and making the third metal layer and the electrode structure conduct metal alloy interconnection to form a metal alloy below 200 °C;

[0011] S5, depositing an indium pillar material layer on the surface of the metallization layer to form a concave-shaped indium pillar on the surface of the chip, and simultaneously forming a convex-shaped indium pillar on the other chip for forming the refrigerated infrared detector, so as to ensure that the indium pillars formed on the device chip and the readout circuit chip have one concave shape and one convex shape;

[0012] S6, using a flip-chip interconnection process to interconnect the device chip and the readout circuit chip through the indium pillars to obtain a refrigerated infrared detector.

[0013] Further, the material of the first metal layer in step S3 may include metal chromium, metal tin, metal titanium, metal copper or titanium tungsten alloy, the material of the second metal layer may include metal indium, and the material of the third metal layer may include metal copper, metal platinum or metal gold.

[0014] Further, after step S2 and before step S3, the method may further include the following steps:

[0015] In step S7, a plasma pretreatment process and a wet cleaning process are adopted to treat the surface of the chip formed with the passivation layer, so as to remove the contaminants attached to the surface of the chip.

[0016] Further, the gas used in the plasma pretreatment process in step S7 may include one or more of oxygen, hydrogen, hydrogen-argon, nitrogen, or nitrogen-hydrogen mixed gas.

[0017] Further, in step S3, the process of metallizing the chip formed with the passivation layer to form an electrode structure on the surface of the chip may be a Lift-off stripping process or an etching process.

[0018] Further, the material of the metallization layer formed in step S4 may include at least one metal alloy formed by the material of the first metal layer and / or the second metal layer.

[0019] Further, in step S6, the step of interconnecting the device chip and the readout circuit chip through the indium pillars by using the flip-chip interconnect process may include:

[0020] S6.1, controlling the temperature of the chip formed with concave indium pillars to be the first threshold temperature, and simultaneously heating the temperature of the chip formed with convex indium pillars to the second threshold temperature, so that the indium pillars of the chip formed with convex indium pillars are melted after heating and interconnected with the indium pillars of the chip formed with concave indium pillars while the shape of the indium pillars of the chip formed with concave indium pillars remains unchanged.

[0021] Further, the range of the first threshold temperature in step S6.1 may be less than 80°C, the range of the second threshold temperature may be: 140°C to 210°C, and the value ranges of the first threshold temperature and the second threshold temperature can be interchanged.

[0022] Further, the process temperature of depositing the indium pillar material layer on the surface of the metallization layer in step S5 may be -40°C or -20°C or may be room temperature.

[0023] Further, in step S6, the step of interconnecting the device chip and the readout circuit chip through the indium pillars by using the flip-chip interconnect process may include:

[0024] Heating at least one of the chip formed with concave indium pillars and the chip formed with convex indium pillars to achieve the variable-temperature flip-chip interconnect of the chip formed with concave indium pillars and the chip formed with convex indium pillars.

[0025] Compared with the prior art, the technical solution provided by the present invention has at least one of the following beneficial effects:

[0026] In the method for preparing a refrigerated infrared detector provided by the present invention, an indium column with a concave shape is formed on a device chip or a readout circuit chip for forming the refrigerated infrared detector, and an indium column with a convex shape is formed on a readout circuit chip or a device chip for forming the refrigerated infrared detector. Then, with the shape of the indium column on the chip with the concave indium column remaining unchanged, the indium column on the chip with the convex indium column is heated and melted to be flip-chip interconnected with the indium column on the chip with the concave indium column, so as to achieve the purpose of strengthening the stability of the indium column, avoiding its lateral sliding and offset, and ensuring that the indium column is not easily detached or deformed by adopting a flip-chip method with one cold and one hot (specific implementation can be set as cold on top and hot on the bottom, or hot on top and cold on the bottom, where the temperature of the cold end is generally 0°C to 30°C, and the temperature of the hot end is generally 80°C to 250°C), thereby ensuring that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements and ultimately avoiding problems of the device.

[0027] Moreover, when forming an indium column with a concave shape on a device chip or a readout circuit chip for forming the refrigerated infrared detector, taking advantage of the low melting point of indium material, a layer of indium metal is used to form an alloy eutectic with the underlying electrode before fabricating the concave indium column; on the one hand, after forming the alloy, complete electrical contact can be achieved, and on the other hand, during the process of alloy eutectic, there is a certain shape retention property; it can be made into a set size and special shape to solve the process problem of flip-chip soldering. BRIEF DESCRIPTION OF THE DRAWINGS

[0028] Figure 1 is a schematic flow chart of the method for preparing a refrigerated infrared detector according to an embodiment of the present invention;

[0029] Figures 2a to 2e is a schematic structural diagram of the method for preparing a refrigerated infrared detector according to an embodiment of the present invention during its preparation process.

[0030] Among them, the reference numerals are as follows:

[0031] 100 - device chip; 200 - readout circuit chip;

[0032] 110 - passivation layer; 120 - electrode structure;

[0033] 121 - first metal layer; 122 - second metal layer;

[0034] 101 - first opening; 103 - third opening;

[0035] 130 - third metal layer; 140 - metallization layer;

[0036] 150 - indium column with a concave shape; 250 - indium column with a convex shape. DETAILED DESCRIPTION OF THE EMBODIMENTS

[0037] As described in the background art, currently, infrared detectors are developing towards a center pitch of 15 μm, a device of 1024×1024, and a chip area reaching 17 mm×17 mm. Therefore, as infrared detectors develop towards a larger pixel scale and a smaller center pitch, the number of flip-chip bonding points needs to reach more than one million, which makes the flip-chip bonding difficulty increase sharply; considering pixel loss, the flip-chip bonding failure rate needs to be less than 1%, and the flip-chip bonding alignment of pixels less than 10 μm is extremely difficult. At present, indium materials are used as the metal materials for flip-chip interconnection. However, in the actual manufacturing process, due to the too small size of indium pillars (6-10 μm), problems such as alignment deviation, side slip, and solder joint voids caused by height differences will occur; to solve this problem, the commonly used solution at present is to form indium metal pillars in the shape of "concave" or "convex" on the readout circuit and the photosensitive chip to achieve "convex" to "convex" flip-chip bonding.

[0038] Then, for some currently designed flip-chip indium pillars with concave-convex structures, due to the low melting point of indium metal, serious misalignment, side slip, and indium pillar detachment occur during the flip-chip interconnection of the readout circuit and the photosensitive chip, and problems such as indium pillar and metal delamination and fracture occur after flip-chip bonding. Furthermore, the physical connection and electrical connection between the readout circuit and the photosensitive chip cannot meet the process requirements, ultimately resulting in device failure.

[0039] Therefore, the present invention provides a refrigerated infrared detector and a preparation method thereof to solve the problem that after flip-chip bonding of the readout circuit chip and the device chip used to form the refrigerated infrared detector, indium pillar misalignment and side slip occur, which further leads to the physical connection and electrical connection between the readout circuit chip and the device chip not meeting the process requirements, and ultimately results in device failure.

[0040] Reference Figure 1 , Figure 1 is a schematic flow chart of the preparation method of the refrigerated infrared detector provided in an embodiment of the present invention. The method includes the following steps:

[0041] Step S1, providing a device chip for forming the refrigerated infrared detector and a readout circuit chip for forming the refrigerated infrared detector;

[0042] Step S2, forming a passivation layer on the surface of the device chip or the readout circuit chip, and a first opening is formed in the passivation layer to expose a part of the substrate surface of the chip through the first opening;

[0043] S3. Metallize the chip with a passivation layer formed thereon to form an electrode structure with a concave shape on the surface of the chip. The electrode structure includes at least a first metal layer and a second metal layer sequentially deposited in a direction away from the substrate surface of the chip.

[0044] S4. Sequentially form a third metal layer and a metallization layer on the surface of the electrode structure, and perform metal alloy interconnection between the third metal layer and the electrode structure to form a metal alloy.

[0045] S5. Deposit an indium pillar material layer on the surface of the metallization layer to form an indium pillar with a concave shape on the surface of the chip, and simultaneously form an indium pillar with a convex shape on another chip for forming the refrigerated infrared detector, so as to ensure that the indium pillars formed on the device chip and the readout circuit chip have one concave shape and one convex shape.

[0046] S6. Use the flip-chip interconnection process to interconnect the device chip and the readout circuit chip through the indium pillars to obtain a refrigerated infrared detector.

[0047] That is, in the method for preparing a refrigerated infrared detector provided by the present invention, by forming an indium pillar with a concave shape on the device chip or the readout circuit chip for forming the refrigerated infrared detector, and forming an indium pillar with a convex shape on the readout circuit chip or the device chip for forming the refrigerated infrared detector. Then, with the indium pillar shape of the chip with the concave indium pillar remaining unchanged, heat the indium pillar of the chip with the convex indium pillar until it melts and perform flip-chip interconnection with the indium pillar of the chip with the concave indium pillar, thereby achieving the purpose of strengthening the stability of the indium pillar, avoiding its lateral sliding and offset, and ensuring that the indium pillar is not easily detached or deformed by adopting a flip-chip method with one cold and one hot (specific implementation can be set as cold on top and hot at the bottom, or hot on top and cold at the bottom, where the temperature of the cold end is generally 0°C to 30°C, and the temperature of the hot end is generally 80°C to 250°C), and ensuring that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements, and ultimately avoiding problems of the device.

[0048] The following further describes in detail the refrigerated infrared detector and its preparation method proposed by the present invention in conjunction with the accompanying drawings and specific embodiments. According to the following description, the advantages and features of the present invention will be clearer. It should be noted that the accompanying drawings are all in a very simplified form and use non-precise scales, only for conveniently and clearly assisting in explaining the purpose of the embodiments of the present invention.

[0049] Figures 2a to 2e It is a schematic structural diagram during the preparation process of the method for preparing a refrigerated infrared detector in an embodiment of the present invention.

[0050] In step S1, a chip is provided. The chip can be a device chip of the refrigerated infrared detector or a readout circuit chip of the refrigerated infrared detector. Exemplarily, the chip in the embodiment of the present invention is device chip 100, as Figure 2a shown; wherein, the device chip 100 is a substrate formed with a plurality of device isolation structures and PN junction structures separated by the device isolation structures.

[0051] In this embodiment, in order to solve the problem in the prior art that after the readout circuit chip for forming the refrigerated infrared detector is flip-chip bonded to the device chip, indium pillars are misaligned and slip sideways, resulting in the physical connection and electrical connection between the readout circuit chip and the device chip not meeting the process requirements and ultimately causing device failure, the present invention proposes that a concave indium pillar can be prepared on the device chip for the refrigerated infrared detector or on the readout circuit chip for the refrigerated infrared detector, and a convex indium pillar is prepared on the other chip. Then, by using a flip-chip bonding method with one cold and one hot, the stability of the indium pillar is enhanced, and its side-slip and offset are avoided, and it is ensured that the indium pillar is not easily detached or deformed, so as to ensure that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements and ultimately avoid device problems. Since the formation process of the convex indium pillar is the prior art, the present invention does not specifically describe it. And for the sake of easy understanding, the present invention explains the innovation points of the present invention through the process of forming a concave indium pillar on the device chip. Therefore, the process of forming a concave indium pillar on the readout circuit chip is the same as this, and the present invention will not repeat it.

[0052] In step S2, specifically referring to Figure 2b shown, a passivation layer 110 is formed on the surface of the device chip or the readout circuit chip. A first opening 101 is formed in the passivation layer 110 to expose a part of the substrate surface of this chip (device chip 100) through the first opening 101.

[0053] Among them, the material of the passivation layer can be an organic material such as silicon dioxide or silicon nitride.

[0054] In this embodiment, when the chip 100 is a device chip, its concave indium pillar is formed above the PN junction structure already formed on the device chip. Specifically, a passivation layer can be first formed on the surface of the device chip, and then a photolithography and / or etching process (dry etching or wet etching) is performed on the passivation layer to form the first opening 101. As for how many trenches are specifically formed, it depends on the number of PN junction structures formed on the device chip.

[0055] In step S3, specifically referring to Figure 2cAs shown, the chip 100 formed with the passivation layer 110 is metallized to form a concave-shaped electrode structure 120 on the surface of the chip 100. The electrode structure 120 at least includes a first metal layer 121 and a second metal layer 122 sequentially deposited in a direction away from the substrate surface of the chip 100. Among them, the material of the first metal layer 121 includes metal chromium, metal tin, metal titanium, metal copper, or a titanium-tungsten alloy, and the material of the second metal layer 122 includes metal indium.

[0056] In this embodiment, after the first opening 101 is formed in the passivation layer 110 in step S2, in order to remove some pollution residues caused during the etching process of forming the first opening 101, which adhere to the surface of the remaining passivation layer 110 and the substrate of the chip 100 exposed by the first opening 101. Therefore, before performing step S3 to metallize the chip 100 formed with the passivation layer 110, the present invention can first perform a plasma pretreatment process and a wet cleaning process on the chip 100 processed in step S2, that is, process the surface of the chip 100 formed with the passivation layer 110 to remove the pollutants (positive charges) adhering to the chip surface. Among them, the gas used in the plasma pretreatment process can include one or more of oxygen, hydrogen, hydrogen-argon, nitrogen, or a nitrogen-hydrogen mixed gas; the cleaning solution used in the wet cleaning process can be nitric acid, hydrochloric acid, or an organic solution.

[0057] Furthermore, during the process of forming the concave-shaped electrode structure 120 in step S3, after performing the plasma pretreatment process and the wet cleaning process on the chip 100, it can be metallized by using the Lift-off stripping process or a normal etching process (dry etching or wet etching). Specifically, photoresist (not shown) can be deposited on both sides of the formed passivation layer 110 on the surface of the chip 100. The photoresist covers the substrate surface of the chip 100 exposed on both sides of the passivation layer 110, and the thickness of the photoresist is higher than that of the passivation layer 110. Then, the first metal layer 121 is deposited on the surface of the passivation layer 110 and in the first opening 101, and it is lithographed or etched to form a second opening (not shown) in the first metal layer 121, so as to form a concave-shaped electrode structure 120 together with the subsequently deposited second metal layer 122; thereafter, the second metal layer 122 and the third opening 103 are formed in the same manner; finally, after forming the concave-shaped electrode structure 120, the first metal layer 121, the second metal layer 122, and the photoresist covering the surface of the photoresist are removed together, thereby forming Figure 2c the shown pattern.

[0058] In step S4, specifically refer to Figure 2dAs shown, a third metal layer 130 and a metallization layer 140 are sequentially formed on the surface of the electrode structure 120, and the third metal layer 130 is interconnected with the electrode structure 120 by metal alloying. Among them, the material of the third metal layer 130 includes copper metal, platinum metal or gold metal, and the material of the metallization layer 140 includes at least one metal alloy formed by the material of the first metal layer and / or the second metal layer material. In addition, the material of the metallization layer 140 can also be any other existing material for forming the under bump metallurgy (UBM), and the present invention does not make specific limitations thereon.

[0059] In this embodiment, a third metal layer 130 with a concave shape is formed on the surface of the electrode structure 120 by using a Lift-off stripping process or a normal etching process (dry etching or wet etching). Since at low temperatures, copper metal and indium metal will undergo alloy interconnection, the first metal layer 121, the second metal layer 122 and the third metal layer 130 form a copper-indium-copper low-temperature alloy, thereby ensuring the electrical characteristics of the refrigeration infrared detector. Then, the metallization layer 140 is deposited. Since the melting points of titanium element and copper element are high, after the metallization layer 140 is formed, it can reduce the mutual dissolution and diffusion of the underlying indium metal, thereby increasing the adhesion between the upper and lower film layers; and the grains of aluminum metal are larger, so the upper metal has good growth adhesion. Finally, by forming the metallization layer 140, the lateral slip of the subsequently formed indium column is effectively prevented and its conduction ability is increased.

[0060] Optionally, the process temperature for forming the metal alloy in step S4 is lower than 200 °C.

[0061] It should be noted that in order to better achieve the electrical contact between the device chip and the readout circuit chip of the refrigeration infrared detector, in the present invention, a method of forming an alloy eutectic with a layer of indium metal and the underlying electrode before making the indium column is proposed to ensure forming an integral body with the subsequently formed indium column. Therefore, the electrode structure 120 formed in the present invention should at least include the above-mentioned first metal layer 121 and second metal layer 122. Of course, one or more other metal layers can also be formed between the first metal layer and the chip 100 substrate as the electrode structure, and the present invention does not make specific limitations thereon.

[0062] Obviously, in the preparation method of the refrigeration infrared detector provided by the present invention, when forming an indium column with a concave shape on the device chip or the readout circuit chip of the refrigeration infrared detector, taking advantage of the low melting point of indium material, a layer of indium metal is used to form an alloy eutectic with the underlying electrode before making the concave indium column; on the one hand, after forming the alloy, complete electrical contact can be achieved, and on the other hand, during the process of alloy eutectic, there is a certain shape retention property; it can be made into a set size and special shape to solve the process problem of flip-chip soldering.

[0063] In step S5, continue to refer to Figure 2d as shown, and at the same time refer to Figure 2e as shown, deposit an indium pillar material layer on the surface of the metallization layer 140 to form concave-shaped indium pillars 150 on the surface of the chip, and at the same time form convex-shaped indium pillars 250 on another chip for forming the refrigerated infrared detector, as Figure 2e shown, to ensure that the indium pillars formed on the device chip and the readout circuit chip are one concave-shaped and the other convex-shaped.

[0064] In this embodiment, a vapor deposition process with a process temperature of -40°C or -20°C or normal temperature can be used to deposit an indium pillar material layer on the surface of the metallization layer 140. After that, a photolithography and / or etching process is used to form concave-shaped indium pillars 150. Exemplarily, in the embodiment of the present invention, the chip 100 is a device chip, that is, concave-shaped indium pillars 150 are formed on the device chip, then on the readout circuit chip 200 as Figure 2e shown, convex-shaped indium pillars 250 are formed to ensure that the indium pillars formed on the device chip and the readout circuit chip are one concave-shaped and the other convex-shaped, so that the pressure can be slowly released when the two indium pillars are flip-chip bonded, thereby increasing the contact area.

[0065] In step S6, a flip-chip interconnect process is used to interconnect the device chip and the readout circuit chip through the indium pillars to obtain a refrigerated infrared detector.

[0066] In this embodiment, when flip-chip bonding the device chip and the readout circuit chip through the indium pillars, whether heat treatment is performed on the device chip and cryogenic treatment is performed on the readout circuit chip, or cryogenic treatment is performed on the device chip and heat treatment is performed on the readout circuit chip, the flip-chip bonding method of one cold and one hot proposed by the present invention can be realized, so as to achieve the purpose of strengthening the stability of the indium pillars, avoiding their lateral sliding and offset, and ensuring that the indium pillars are not easily detached and deformed. The present invention does not make specific limitations on this.

[0067] As a preferred embodiment, during flip-chip interconnect, the temperature of the chip 100 with concave indium pillars and made of CZT / MCT can be controlled to be less than 80°C, and at the same time the temperature of the chip 200 with convex indium pillars is heated to between 140°C and 210°C, so that the indium pillars 250 of the chip 200 with convex indium pillars are melted after heating and interconnected with the indium pillars 150 of the chip 100 with concave indium pillars while the shape of the indium pillars 150 of the chip 100 with concave indium pillars remains unchanged.

[0068] In other embodiments, at least one of the chip with concave indium pillars formed thereon and the chip with convex indium pillars formed thereon can be heat-treated to achieve the variable-temperature flip-chip interconnection of the chip with concave indium pillars formed thereon and the chip with convex indium pillars formed thereon. Similarly, the purpose of avoiding their side-slip and offset and ensuring that the indium pillars are not easily detached or deformed is achieved. Furthermore, it ensures that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements and ultimately avoids problems with the device.

[0069] In addition, based on the preparation method of the refrigerated infrared detector as described above, the present invention also provides a refrigerated infrared detector. Among them, the refrigerated infrared detector can be prepared by using the preparation method of the refrigerated infrared detector.

[0070] In summary, in the preparation method of a refrigerated infrared detector provided by the present invention, by forming indium pillars with a concave shape on the device chip or the readout circuit chip for forming the refrigerated infrared detector, and forming indium pillars with a convex shape on the readout circuit chip or the device chip for forming the refrigerated infrared detector. Then, with the shape of the indium pillars on the chip with concave indium pillars remaining unchanged, the indium pillars on the chip with convex indium pillars are heated and melted to perform flip-chip interconnection with the indium pillars on the chip with concave indium pillars, thereby achieving the purpose of strengthening the stability of the indium pillars and avoiding their side-slip and offset and ensuring that the indium pillars are not easily detached or deformed by adopting a flip-chip method with one cold and one hot (specifically, it can be set as cold on top and hot on the bottom, or hot on top and cold on the bottom, where the temperature of the cold end is generally 0°C to 30°C, and the temperature of the hot end is generally 80°C to 250°C), and ensuring that the physical connection and electrical connection between the readout circuit chip and the device chip can meet the process requirements and ultimately avoiding problems with the device.

[0071] Moreover, when forming indium pillars with a concave shape on the device chip or the readout circuit chip for forming the refrigerated infrared detector, taking advantage of the low melting point of indium material, a layer of indium metal is used to form an alloy eutectic with the underlying electrode before fabricating the concave indium pillars; on the one hand, after forming the alloy, complete electrical contact can be achieved, and on the other hand, during the process of alloy eutectic, there is a certain shape retention property; it can be made into a set size and special shape to solve the process problems of flip-chip soldering.

[0072] The above description is only a description of the preferred embodiments of the present invention and does not limit the protection scope of the present invention in any way. Any changes and modifications made by those of ordinary skill in the art of the present invention based on the above disclosure belong to the protection scope of the present invention.

[0073] It should be noted that although the present invention has been disclosed above with the preferred embodiments, the above embodiments are not intended to limit the present invention. For any person skilled in the art, without departing from the scope of the technical solution of the present invention, many possible changes and modifications can be made to the technical solution of the present invention by using the technical content disclosed above, or it can be modified into equivalent embodiments with equivalent changes. Therefore, any simple modification, equivalent change and modification made to the above embodiments according to the technical essence of the present invention without departing from the content of the technical solution of the present invention still fall within the scope of the protection of the technical solution of the present invention.

[0074] In this text, relational terms such as first and second are only used to distinguish one entity or operation from another entity or operation, and do not necessarily require or imply any actual relationship or order between these entities or operations. Moreover, the term "comprising", "including" or any other variant thereof is intended to cover non-exclusive inclusion, so that a process, method, article or device comprising a series of elements not only includes those elements, but also includes other elements not expressly listed, or further includes elements inherent to such process, method, article or device. Without further limitation, an element defined by the phrase "comprising an..." does not exclude the presence of additional identical elements in the process, method, article or device comprising the element.

[0075] The above is only the preferred embodiment of the present invention, and is not used to limit the protection scope of the present invention. Any modification, equivalent replacement, improvement, etc. made within the spirit and principle of the present invention are all included in the protection scope of the present invention.

Claims

1. A method for preparing a cooled infrared detector, wherein the substrate of the cooled infrared detector is a cadmium zinc telluride substrate, characterized in that, it comprises the following steps: S1, providing a device chip for forming the cooled infrared detector and a readout circuit chip for forming the cooled infrared detector; S2, forming a passivation layer on the surface of the device chip or the readout circuit chip, and forming a first opening in the passivation layer to expose a part of the substrate surface of the chip through the first opening; S3, performing metallization on the chip with the passivation layer formed thereon to form a concave-shaped electrode structure on the surface of the chip, and the electrode structure at least includes a first metal layer and a second metal layer sequentially deposited in a direction away from the substrate surface of the chip; S4, sequentially forming a third metal layer and a metallization layer on the surface of the electrode structure, and making the third metal layer and the electrode structure perform metal alloy interconnection to form a metal alloy below 200 °C; S5, depositing an indium column material layer on the surface of the metallization layer to form a concave-shaped indium column on the surface of the chip, and simultaneously forming a convex-shaped indium column on the other chip for forming the cooled infrared detector, so as to ensure that the indium columns formed on the device chip and the readout circuit chip have one concave shape and one convex shape; S6, using a flip-chip interconnection process to interconnect the device chip and the readout circuit chip through the indium columns to obtain a cooled infrared detector; wherein, in step S6, the step of interconnecting the device chip and the readout circuit chip through the indium columns by using the flip-chip interconnection process includes: S6.1, controlling the temperature of the chip with the concave-shaped indium column formed thereon to be a first threshold temperature, and simultaneously heating the temperature of the chip with the convex-shaped indium column formed thereon to a second threshold temperature, so that the indium column of the chip with the convex-shaped indium column formed thereon is melted after heating and interconnected with the indium column of the chip with the concave-shaped indium column formed thereon while the shape of the indium column of the chip with the concave-shaped indium column formed thereon remains unchanged; wherein, the range of the first threshold temperature is less than 80 °C, the range of the second threshold temperature is: 100 °C to 210 °C, and the value ranges of the first threshold temperature and the second threshold temperature can be interchanged.

2. The method for preparing a cooled infrared detector according to claim 1, characterized in that, the material of the first metal layer in step S3 includes metal chromium, metal tin, metal titanium, metal copper or titanium tungsten alloy, the material of the second metal layer includes metal indium, and the material of the third metal layer includes metal copper, metal platinum or metal gold.

3. The method for preparing a cooled infrared detector according to claim 1, characterized in that, after step S2 and before step S3, the method further includes the following steps: S7, using a plasma pretreatment process and a wet cleaning process to treat the surface of the chip with the passivation layer formed thereon to remove the contaminants attached to the surface of the chip.

4. The method for preparing a cooled infrared detector according to claim 3, characterized in that, The gases used in the plasma pretreatment process in step S7 include one or more of oxygen, hydrogen, hydrogen-argon, nitrogen, or nitrogen-hydrogen mixed gas.

5. The method for manufacturing a refrigerated infrared detector according to claim 1, characterized in that in step S3, the process of metallizing the chip with a passivation layer formed thereon to form an electrode structure on the surface of the chip is a Lift-off stripping process or an etching process.

6. The method for manufacturing a refrigerated infrared detector according to claim 2, characterized in that the material of the metallization layer formed in step S4 includes at least one metal alloy formed by the material of the first metal layer and / or the second metal layer.

7. The method for manufacturing a refrigerated infrared detector according to claim 1, characterized in that the process temperature for depositing the indium pillar material layer on the surface of the metallization layer in step S5 is -40 °C or -20 °C or normal temperature.

8. The method for manufacturing a refrigerated infrared detector according to claim 1, characterized in that in step S6, the steps of interconnecting the device chip and the readout circuit chip through the indium pillars using the flip-chip interconnect process include: heating at least one of the chip with concave indium pillars formed thereon and the chip with convex indium pillars formed thereon to achieve temperature-variable flip-chip interconnect of the chip with concave indium pillars formed thereon and the chip with convex indium pillars formed thereon.

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