Preparation method of deep trench isolation for back-illuminated image sensor

Abstract

The present invention discloses a method for preparing deep trench isolation of a back-illuminated image sensor, comprising: step one, providing a semiconductor device, the semiconductor device comprising a front side and a back side, a silicon epitaxial layer being formed on the back side; step two, depositing a composite hard mask layer with a three-layer structure on the silicon epitaxial layer; step three, performing CDTI hard mask etching, stopping the etching to the middle layer of the composite hard mask layer, and obtaining a first hard mask layer with a first trench formed thereon; step four, performing DTI hard mask etching, stopping the etching to the silicon epitaxial layer, and obtaining a second hard mask layer with a first trench and a second trench formed thereon; step five, using the second hard mask layer as a mask, etching the silicon epitaxial layer, and simultaneously forming CDTI and DTI structures in the silicon epitaxial layer.

Description

Technical Field

[0001] The invention relates to an integrated circuit manufacturing process, and in particular to a method for preparing deep trench isolation of a back-illuminated image sensor. Background Art

[0002] Image sensor (CIS) technology has been developing rapidly. For example, the demand for higher resolution and lower power consumption has promoted the further miniaturization and integration of these image sensors. The photoreceptors of current image sensors are mainly divided into front side illumination (FSI) and back side illumination (BSI) according to the position relationship between the light input direction and the substrate and metal connection layer.

[0003] Back-illuminated image sensors avoid the obstruction of metal lines and transistors by irradiating light to the side without wiring layers. Compared with front-illuminated image sensors, they have higher tolerance, faster data throughput and better low-light imaging capabilities.

[0004] With the continuous development of technologies such as security surveillance cameras, the market has higher and higher requirements for CIS products; the depth of DTI (Deep Trench Isolation) in the BSI process is also further deepened, and the trench depth of DTI has developed from 0.4um in normal BSI to 1.5-2um in NIR (near infrared light) BSI, and then to 4um in NIR2 BSI, and is constantly developing towards deeper depths such as 10um. In CIS devices, there is interference between photons and electrons between adjacent photodiodes. Compared with the technical means of using only ion implantation, DTI can effectively reduce the interference between photons and electrons.

[0005] In conventional BSI processes, CDTI (Capacitive Deep Trench Isolation) and DTI are implemented by separate photolithography-etching processes in two photolithography layers. As the DTI trench depth continues to increase, the photoresist's blocking window for etching becomes smaller and smaller, and the phenomenon of insufficient photoresist blocking begins to appear, which will lead to silicon surface loss, such as Figure 1 shown.

[0006] In addition, the DTI ET process time has increased, and the machine capacity is tight. Moreover, the deepening of the DTI trench depth requires increasing the thickness of the DTI PH photoresist, or even changing the type of photoresist, which requires multiple OPCs (optical proximity correction), adding a lot of loading.

[0007] As the DTI trench depth increases, the existing PR mode, a two-step process to achieve CDTI and DTI, gradually cannot meet the demand. Summary of the invention

[0008] The technical problem to be solved by the present invention is to provide a method for preparing deep trench isolation of a back-illuminated image sensor, thereby improving the PR margin problem caused by deepening the DTI trench and avoiding the OPC model correction problem caused by adjusting the PR type and thickness.

[0009] In order to solve the above technical problems, the present invention discloses a method for preparing deep trench isolation of a back-illuminated image sensor, comprising:

[0010] Step 1, providing a semiconductor device, wherein the semiconductor device comprises a front surface and a back surface, and a silicon epitaxial layer is formed on the back surface;

[0011] Step 2, depositing a three-layer composite hard mask layer on the silicon epitaxial layer;

[0012] Step 3, performing CDTI hard mask etching, and stopping the etching to the middle layer of the composite hard mask layer to obtain a first hard mask layer having a first trench formed therein;

[0013] Step 4, performing DTI hard mask etching, and stopping the etching to the silicon epitaxial layer to obtain a second hard mask layer having the first trench and the second trench formed thereon;

[0014] Step five: using the second hard mask layer as a mask, etching the silicon epitaxial layer to simultaneously form CDTI and DTI structures in the silicon epitaxial layer.

[0015] Preferably, the composite hard mask layer comprises, from bottom to top, an oxide layer, a silicon nitride layer, and an oxide layer.

[0016] Preferably, the material of the intermediate layer is a SiN layer.

[0017] Preferably, the method of etching the CDTI hard mask in step 3 is:

[0018] Covering the uppermost layer of the composite hard mask layer with a fourth mask layer and marking the position of CDTI;

[0019] Etching the fourth mask layer to form a first opening at the marked position, thereby obtaining a fourth mask layer having the first opening formed therein;

[0020] Using the fourth mask layer formed with the first opening as a mask, CDTI hard mask etching is performed on the uppermost layer of the hard mask layer, and the etching stops at the middle layer of the hard mask layer of the three-layer structure;

[0021] The remaining portion of the fourth mask layer is removed to obtain a first hard mask layer having a first trench formed therein.

[0022] Preferably, the method of etching the DTI hard mask in step 4 is:

[0023] Covering the top layer of the first hard mask layer with a fifth mask layer and marking the position of the DTI;

[0024] Etching the fifth mask layer to obtain a second opening at the marked position, thereby obtaining a fifth mask layer formed with the second opening;

[0025] Using the fifth mask layer formed with the second opening as a mask, DTI hard mask etching is performed, and the etching stops at the silicon epitaxial layer;

[0026] The remaining portion of the fifth mask layer is removed to obtain a second hard mask layer having the first trench and the second trench formed thereon.

[0027] Preferably, the fifth mask layer includes a BARC layer and a photoresist layer formed on the BARC layer.

[0028] Preferably, in step five, the specific process is:

[0029] After the CDTI and DTI structures are simultaneously formed in the silicon epitaxial layer, the remaining second hard mask layer is removed by a wet method.

[0030] Preferably, the second groove depth is greater than the first groove depth.

[0031] Preferably, in step three, the fourth mask layer is a photoresist layer.

[0032] The present invention adopts a composite structure hard mask to replace the PR hard mask, which can effectively improve the PR margin problem caused by deepening the DTI trench; the depth of the final DTI trench can be freely adjusted by controlling the thickness of the oxide layer and the SiN layer, and the OPC model correction problem caused by adjusting the PR type and thickness can be avoided.

[0033] At the same time, CDTI and DTI realize one-step Si etching, which can effectively improve production capacity and reduce costs. One-step Si etching only requires one-step DTI wet removal, which can reduce the residue of wet removal liquid in the CDTI / DTI groove. BRIEF DESCRIPTION OF THE DRAWINGS

[0034] Figure 1 It is a schematic diagram of the phenomenon of silicon loss due to insufficient photoresist in the prior art.

[0035] Figure 2 is a schematic diagram of a semiconductor device after step 2 of the present invention;

[0036] Figure 3 is a schematic diagram of a semiconductor device after step three of the present invention;

[0037] Figure 4-5 is a schematic diagram of a semiconductor device after step 4 of the present invention;

[0038] Figure 6 It is a schematic diagram of the semiconductor device after step five of the present invention.

[0039] Description of Reference Numerals

[0040] 10 Silicon epitaxial layer 20 Composite hard mask layer

[0041] 30 first hard mask layer 31 first trench

[0042] 40 second hard mask layer 41 second trench

[0043] 50 fifth mask layer 51 Barc layer

[0044] 52 Photoresist layer

[0045] 61 CDTI structure 62 DTI structure DETAILED DESCRIPTION

[0046] In order to facilitate understanding of the present application, the present application will be described more fully below with reference to the relevant drawings. The preferred embodiments of the present application are given in the drawings. However, the present application can be implemented in many different forms and is not limited to the embodiments described herein. On the contrary, the purpose of providing these embodiments is to make the disclosure of the present application more thorough and comprehensive.

[0047] Unless otherwise defined, all technical and scientific terms used herein have the same meaning as those commonly understood by those skilled in the art to which this application belongs. The terms used herein in the specification of this application are only for the purpose of describing specific embodiments and are not intended to limit this application.

[0048] Spatially relative terms such as "under," "beneath," "below," "under," "above," "above," and the like may be used herein to describe the relationship of one element or feature shown in the figures to other elements or features. It should be understood that in addition to the orientations shown in the figures, spatially relative terms also include different orientations of the device in use and operation. For example, if the device in the drawings is turned over, an element or feature described as "under" or "beneath" or "below" the other elements would be oriented "above" the other elements or features. Thus, the exemplary terms "under" and "under" may include both the above and below orientations.

[0049] The present invention discloses a method for preparing deep trench isolation of a back-illuminated image sensor, which is characterized by comprising:

[0050] Step 1: providing a semiconductor device, wherein the semiconductor device comprises a front side and a back side, and a silicon epitaxial layer 10 is formed on the back side.

[0051] Step 2: depositing a three-layer composite hard mask layer 20 on the silicon epitaxial layer 10, such as Figure 1 shown.

[0052] In this embodiment, the composite hard mask layer 20 comprises an oxide layer, a silicon nitride layer, and an oxide layer from bottom to top.

[0053] Step three, CDTI hard mask etching is performed, and the etching stops at the middle layer of the composite hard mask layer to obtain a first hard mask layer 30 with a first trench 31 formed therein, such as Figure 3 shown.

[0054] Specifically, the method of etching the CDTI hard mask in step 3 is:

[0055] Covering the uppermost layer of the composite hard mask layer with a fourth mask layer and marking the position of CDTI;

[0056] Etching the fourth mask layer to form a first opening at the marked position, thereby obtaining a fourth mask layer having the first opening formed therein;

[0057] Using the fourth mask layer formed with the first opening as a mask, CDTI hard mask etching is performed on the uppermost layer of the hard mask layer, and the etching stops at the middle layer of the hard mask layer of the three-layer structure;

[0058] The remaining portion of the fourth mask layer is removed to obtain the first hard mask layer 30 formed with the first trench 31 .

[0059] Preferably, the fourth mask layer may be a photoresist layer.

[0060] Specifically, a photoresist layer may be covered on the uppermost layer of the hard mask layer, and then the photoresist layer may be exposed and developed, and the uppermost layer of the hard mask layer may be patterned based on the exposed and developed photoresist layer.

[0061] Step 4: DTI hard mask etching is performed, and the etching stops at the silicon epitaxial layer to obtain a second hard mask layer 40 having the first trench 31 and the second trench 41 formed thereon. Figure 4-5 shown.

[0062] Specifically, the method of etching the DTI hard mask in step 4 is:

[0063] A fifth mask layer 50 is covered on the uppermost layer of the first hard mask layer 30 and a position of the DTI is marked;

[0064] Etching the fifth mask layer 50 to obtain a second opening at the marked position, thereby obtaining a fifth mask layer 50 formed with the second opening;

[0065] Using the fifth mask layer formed with the second opening as a mask, DTI hard mask etching is performed, and the etching stops at the silicon epitaxial layer 10;

[0066] The remaining portion of the fifth mask layer 50 is removed to obtain the second hard mask layer 40 having the first trench 31 and the second trench 41 formed therein.

[0067] Specifically, the depth of the second groove 41 is greater than the depth of the first groove 31 .

[0068] Specifically, the fifth mask layer 50 includes a BARC layer 51 and a photoresist layer 52 formed on the BARC layer.

[0069] The technical effect of this step is to first deposit a BARC layer (anti-reflective layer) and then apply photoresist, which can achieve the technical effect of increasing the photolithography process window and reducing the CD value deviation.

[0070] Step 5: Using the second hard mask layer as a mask, the silicon epitaxial layer is etched to simultaneously form a CDTI structure 61 and a DTI structure 62 in the silicon epitaxial layer. Figure 6 shown.

[0071] Specifically, dry etching may be used to form the CDTI structure and the DTI structure.

[0072] After the CDTI structure 61 and the DTI structure 62 are simultaneously formed in the silicon epitaxial layer, the remaining second hard mask layer 40 is removed by a wet method.

[0073] The present invention adopts a composite structure hard mask to replace the PR hard mask, which can effectively improve the PR margin problem caused by deepening the DTI trench; the depth of the final DTI trench can be freely adjusted by controlling the thickness of the oxide layer and the SiN layer, and the OPC model correction problem caused by adjusting the PR type and thickness can be avoided.

[0074] At the same time, CDTI and DTI realize one-step Si etching, which can effectively improve production capacity and reduce costs. One-step Si etching only requires one-step DTI wet removal, which can reduce the residue of wet removal liquid in the CDTI / DTI groove.

[0075] The above description is only a preferred embodiment of the present invention, and does not limit the implementation mode and protection scope of the present invention. For those skilled in the art, it should be aware that all solutions obtained by equivalent substitutions and obvious changes made using the description and illustrations of the present invention should be included in the protection scope of the present invention.

Claims

1. A method for preparing deep trench isolation of a back-illuminated image sensor, characterized in that: include: Step 1, providing a semiconductor device, wherein the semiconductor device comprises a front surface and a back surface, and a silicon epitaxial layer is formed on the back surface; Step 2, depositing a three-layer composite hard mask layer on the silicon epitaxial layer; Step three, performing CDTI hard mask etching, and stopping the etching to the middle layer of the composite hard mask layer to obtain a first hard mask layer formed with a first trench; Step 4, performing DTI hard mask etching, and stopping the etching to the silicon epitaxial layer to obtain a second hard mask layer having the first trench and the second trench formed thereon; Step 5, using the second hard mask layer as a mask, etching the silicon epitaxial layer to simultaneously form a CDTI and a DTI structure in the silicon epitaxial layer; The method of etching the DTI hard mask in step 4 is: Covering the top layer of the first hard mask layer with a fifth mask layer and marking the position of the DTI; Etching the fifth mask layer to obtain a second opening at the marked position, thereby obtaining a fifth mask layer formed with the second opening; Using the fifth mask layer formed with the second opening as a mask, DTI hard mask etching is performed, and the etching stops at the silicon epitaxial layer; The remaining portion of the fifth mask layer is removed to obtain a second hard mask layer having the first trench and the second trench formed thereon.

2. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: The composite hard mask layer comprises an oxide layer, a silicon nitride layer and an oxide layer from bottom to top.

3. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: The material of the intermediate layer is SiN layer.

4. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: The method of etching the CDTI hard mask in step 3 is: Covering the uppermost layer of the composite hard mask layer with a fourth mask layer and marking the position of CDTI; Etching the fourth mask layer to form a first opening at the marked position, thereby obtaining a fourth mask layer having the first opening formed therein; Using the fourth mask layer formed with the first opening as a mask, CDTI hard mask etching is performed on the uppermost layer of the hard mask layer, and the etching stops at the middle layer of the hard mask layer of the three-layer structure; The remaining portion of the fourth mask layer is removed to obtain a first hard mask layer having a first trench formed therein.

5. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: The fifth mask layer includes a BARC layer and a photoresist layer formed on the BARC layer.

6. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: In step five, the specific process is: after the CDTI and DTI structures are simultaneously formed in the silicon epitaxial layer, the remaining second hard mask layer is removed by wet method.

7. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 1, characterized in that: The second groove depth is greater than the first groove depth.

8. The method for preparing deep trench isolation of a back-illuminated image sensor according to claim 4, characterized in that: In step three, the fourth mask layer is a photoresist layer.

Images