An insulating spacer, a semiconductor component and a design method of the insulating spacer

By designing insulating pads with grooves and positioning grooves with different depths, the problem that existing insulating pads cannot be designed according to actual working conditions is solved, and the effect of meeting the requirements of discharge gaps and creepage distances in different working conditions is achieved, and the weight of the insulating pads is reduced.

CN114121827BActive Publication Date: 2025-06-13ZHUZHOU CRRC TIMES SEMICON CO LTD
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Patent Information

Application Number
CN202010898630.0
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2020-08-31
Publication Date
2025-06-13
Estimated Expiration
2040-08-31

AI Technical Summary

Technical Problem

The existing insulating pad has a single structure and cannot be designed according to the actual working conditions, resulting in the inability to meet the requirements of discharge gap and creepage distance under different working conditions.

Method used

An insulating pad is designed, with a first groove and a second groove having different depths on the surface. The design of these grooves meets the requirements of discharge gap and creepage distance under different working conditions. A positioning groove for connecting to the force transmission component is provided on the upper surface and a table for connecting to the table contact component is provided on the lower surface.

Benefits of technology

Through groove design with different depths, the creepage distance can be effectively increased, while reducing the weight of the insulating pad, and achieving the standardized structural design of the insulating pad.

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Abstract

One or more embodiments of this specification provide an insulating spacer, a semiconductor component, and a design method for the insulating spacer. The insulating spacer includes: a body, on the surface of the body, there are at least one first groove with a first depth and at least one second groove with a second depth, and the first depth is different from the second depth; through the first groove and the second groove with different depths, the requirements of the discharge gap and the creepage distance can be met, the creepage distance can be effectively increased, and at the same time, the weight of the insulating spacer can be reduced; the design method of the insulating spacer in this specification can realize the standardized structural design of the insulating spacer.
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Description

Technical Field

[0001] One or more embodiments of this specification relate to the technical field of electronic devices, and in particular, to an insulating spacer, a semiconductor component, and a design method of the insulating spacer. Background Art

[0002] Most of the insulating spacers applied in high-power components are made of materials such as epoxy or phenolic laminated cloth boards and phenolic plastics, which can play the roles of high-voltage insulation and force transmission. Due to the differences in the operating conditions of high-power components and considering the influence of the environmental grade on the insulation performance, the discharge gap of the insulating spacer needs to be designed in a standardized manner, and the creepage distance needs to be designed with redundancy. However, the existing insulating spacers have a single structure and cannot be structurally designed according to the actual working conditions. Summary of the Invention

[0003] In view of this, the purpose of one or more embodiments of this specification is to provide an insulating spacer, a semiconductor component, and a design method of the insulating spacer, which can be structurally designed according to the actual working conditions.

[0004] Based on the above purpose, one or more embodiments of this specification provide an insulating spacer, including:

[0005] A body, on the surface of which there are at least one first groove with a first depth and at least one second groove with a second depth, and the first depth is different from the second depth.

[0006] Optionally, the first depth is less than the second depth; the first groove is arranged above the insulating spacer, and the second groove is arranged below the insulating spacer; or, the first groove is arranged below the insulating spacer, and the second groove is arranged above the insulating spacer.

[0007] Optionally, a positioning groove for connecting with a force-transmitting component is provided on the upper surface of the body.

[0008] Optionally, a table surface for connecting with a table surface contact component is provided on the lower surface of the body.

[0009] An embodiment of this specification also provides a semiconductor component including the insulating spacer described above.

[0010] An embodiment of this specification also provides a design method of an insulating spacer. The insulating spacer includes a body, on the surface of which there are at least one first groove with a first depth and at least one second groove with a second depth, and the first depth is different from the second depth; a positioning groove for connecting with a force-transmitting component is provided on the upper surface of the body; a table surface for connecting with a table surface contact component is provided on the lower surface of the body; the design method includes:

[0011] Determine the diameter D2 of the tabletop according to the size of the tabletop contact component;

[0012] Determine the diameter D3 of the bottom surface of the first groove according to the diameter D2 of the tabletop;

[0013] Determine the thickness B of the insulating spacer according to the electrical clearance requirement;

[0014] Determine the diameter D4 of the positioning groove according to the size of the force transmission component;

[0015] Determine the diameter D5 of the bottom surface of the second groove according to the diameter D2 of the tabletop, the diameter D4 of the positioning groove, and the thickness B of the insulating spacer.

[0016] Optionally, the design method further includes:

[0017] Determine the maximum diameter D1 of the insulating spacer according to the size of the crimping part of the semiconductor component.

[0018] Optionally, the step of determining the diameter D5 of the bottom surface of the second groove according to the diameter D2 of the tabletop, the diameter D4 of the positioning groove, and the thickness B of the insulating spacer includes:

[0019] The calculation formula for the diameter D5 of the bottom surface of the second groove is:

[0020] D5 = (-k1×b 2 +k2×b + k3)(D2 - D4) + D4 (6)

[0021] where b is the thickness coefficient, and the calculation formula is:

[0022]

[0023] B 0 is the thickness distance corresponding to the target position selected from the insulating spacer;

[0024] The relationship coefficients k1, k2, and k3 are determined by the method of quadratic curve fitting of stress contour lines according to the ratio of the groove depth to the thickness B. The groove depth is half of the difference between the diameter D4 of the positioning groove and the diameter D2 of the tabletop.

[0025] Optionally, the design method further includes:

[0026] According to the creepage distance requirement and the thickness B, determine the number and width of the first grooves, the number and width of the second grooves, and the width of the first flange corresponding to the first grooves and the width of the second flange corresponding to the second grooves.

[0027] Optionally, the actual creepage distance L of the insulating spacer is:

[0028] L = B + 2N1×(D1 - D3) + (2N2 + 1)×(D1 - D5) (9)

[0029] Wherein, N1 is the number of the first grooves, and N2 is the number of the second grooves.

[0030] As can be seen from the above, for the insulating spacer, semiconductor component, and design method of the insulating spacer provided by one or more embodiments of this specification, the insulating spacer includes a body, and at least one first groove with a first depth and at least one second groove with a second depth different from the first depth are formed on the surface of the body; through the first groove and the second groove with different depths, the requirements of discharge gap and creepage distance can be met, the creepage distance can be effectively increased, and at the same time, the weight of the insulating spacer can be reduced; the design method of the insulating spacer in this specification can realize the standardized structural design of the insulating spacer. Description of the Drawings

[0031] In order to more clearly illustrate the technical solutions in one or more embodiments of this specification or the prior art, the following will briefly introduce the drawings required for the description of the embodiments or the prior art. Obviously, the drawings in the following description are only one or more embodiments of this specification. For those of ordinary skill in the art, other drawings can be obtained based on these drawings without creative efforts.

[0032] Figure 1 It is a partial structural schematic diagram of an existing insulating spacer;

[0033] Figure 2 It is a front view of the insulating spacer according to one or more embodiments of this specification;

[0034] Figure 3 For Figure 2 The top view of the shown insulating spacer;

[0035] Figure 4 For Figure 2 The front view of the partial structure of the shown insulating spacer;

[0036] Figure 5 For Figure 4 The three-dimensional structural schematic diagram of the shown insulating spacer;

[0037] Figure 6 It is a structural schematic diagram of a semiconductor component according to one or more embodiments of this specification;

[0038] Figure 7 It is a schematic flow chart of the design method of the insulating spacer according to one or more embodiments of this specification;

[0039] Figure 8 Schematic diagram of parameters of the insulating spacer for one or more embodiments of this specification;

[0040] Figure 9 Schematic diagram of stress contour lines for one or more embodiments of this specification;

[0041] Figure 10 Schematic diagram of the relationship curve between the groove depth coefficient and the thickness coefficient for one or more embodiments of this specification. Specific embodiments

[0042] To make the objectives, technical solutions, and advantages of the present disclosure clearer and more understandable, the present disclosure will be further described in detail below in conjunction with specific embodiments and with reference to the accompanying drawings.

[0043] It should be noted that, unless otherwise defined, the technical terms or scientific terms used in one or more embodiments of this specification should have the ordinary meaning understood by those of ordinary skill in the art to which the present disclosure pertains. The terms "first", "second", and similar words used in one or more embodiments of this specification do not denote any order, quantity, or importance, but are only used to distinguish different components. Words such as "including" or "comprising" mean that the elements or objects appearing before the word cover the elements or objects listed after the word and their equivalents, without excluding other elements or objects. Words such as "connected" or "coupled" are not limited to physical or mechanical connections, but may include electrical connections, whether direct or indirect. "Upper", "lower", "left", "right", etc. are only used to represent relative positional relationships, and when the absolute position of the object being described changes, the relative positional relationship may also change accordingly.

[0044] As Figure 1 shown, in an application working condition, the body 10 of the insulating spacer 100 is a cylindrical spacer, and a number of grooves 11 with the same depth are provided on the surface to meet the requirements of the discharge gap and the creepage distance. The insulating spacer with such a structure has a single structure and cannot be flexibly designed according to requirements such as the space size and the limited product weight under actual working conditions. Moreover, when applied to different semiconductor components, the overall dimensions of the insulating spacer are various, and even the structural dimensions under the same working conditions are different, making it impossible to achieve the standardized design and production of the insulating spacer; in addition, the insulating spacer 100 is generally centered by a central positioning pin 12, which will be affected by factors such as machining deviation, fit tolerance, and pressure offloading, resulting in the overall center of the semiconductor component being skewed and pressure offloading, affecting the performance of the component.

[0045] To solve the above problems, one or more embodiments of this specification provide an insulating spacer. The insulating spacer can be designed using standard parametric design methods according to actual working conditions, which can meet the requirements of discharge gaps, creepage distances, etc. under different working conditions, and can make full use of the mechanical properties of materials to meet the requirements of space, weight, etc. under different working conditions.

[0046] As Figures 2 - 5 shown, the insulating spacer 200 provided by one or more embodiments of this specification includes a body 20. At least one first groove 21 with a first depth and at least one second groove 22 with a second depth are formed on the surface of the body 20, and the first depth is different from the second depth. The insulating spacer 200 of this embodiment can meet the requirements of discharge gaps and creepage distances through the first groove and the second groove with different depths, effectively increase the creepage distance, and at the same time can reduce the weight of the insulating spacer.

[0047] In some embodiments, the positions of the first groove 21 and the second groove 22 on the insulating spacer 200 are set according to stress requirements. For example, the first depth of the first groove 21 is less than the second depth of the second groove 22. To meet the stress contour distribution under one stress requirement, the first groove 21 is arranged below the insulating spacer, and the second groove 22 is arranged above the insulating spacer; to meet the stress contour distribution under another stress requirement, the first groove 21 is arranged above the insulating spacer, and the second groove 22 is arranged below the insulating spacer. In this way, the insulating spacer of this embodiment can meet different stress requirements.

[0048] In this embodiment, a positioning groove 24 for connecting with a force - transmitting component 30 is provided on the upper surface of the body 20, which can achieve positioning through the annular positioning groove. Compared with the center - positioning method, it can effectively reduce the adverse effects such as positioning deviation and eccentric load caused by dimensional tolerances and press - fitting errors.

[0049] In this embodiment, a table surface 23 for connecting with a table - surface contact component 40 is provided on the lower surface of the body 20, which can meet the stress requirements of the insulating spacer and is beneficial to improving the stress distribution.

[0050] In this embodiment, the surface of the insulating spacer 200 is sprayed with insulating paint to improve the creepage quality and reduce the tracking index. Optionally, the insulating paint can be selected from varnish, flame - retardant paint, etc.

[0051] In this embodiment, the insulating spacer 200 is made of insulating materials. Under the premise of meeting the requirements of electrical and structural strength, the insulating materials can be selected from epoxy resin, phenolic resin, epoxy - phenolic composite material, nylon, polytetrafluoroethylene and other materials.

[0052] As Figure 6As shown in the figure, the embodiments of the present specification also provide a semiconductor component, including the aforementioned insulating spacer 200. The semiconductor component includes a force transmission member 30, an insulating spacer 200, a mesa contact member 40, a semiconductor element 4, a screw 5, and a crimping member 6. The force transmission member 30 is connected to the positioning groove 24 of the insulating spacer 200. The mesa 23 of the insulating spacer 200 is in contact connection with the mesa contact member 40. The semiconductor element 4 is connected to the mesa contact member 40. The screw 5 is used to connect a plurality of insulating spacers 200 and semiconductor elements 4 in series to form a series height h. The crimping member 6 is used to crimp the insulating spacers 200 and semiconductor elements 4 connected in series.

[0053] As Figure 7 shown in the figure, the embodiments of the present specification also provide a design method for an insulating spacer, including:

[0054] Determine the diameter D2 of the mesa 23 according to the size of the mesa contact member;

[0055] Determine the diameter D3 of the bottom surface of the first groove 21 according to the diameter D2 of the mesa 23;

[0056] Determine the thickness B of the insulating spacer 200 according to the electrical clearance requirement;

[0057] Determine the diameter D4 of the positioning groove 24 according to the size of the force transmission member;

[0058] Determine the diameter D5 of the bottom surface of the second groove 22 according to the diameter D2 of the mesa 23, the diameter D4 of the positioning groove 24, and the thickness B of the insulating spacer 200.

[0059] In this embodiment, the standardized and standardized design of the insulating spacer 200 can be realized through parameter design, so as to meet the performance requirements for discharge clearance, creepage distance, mechanical properties, etc. under different working conditions.

[0060] In some embodiments, the design method of the insulating spacer further includes: determining the maximum diameter D1 of the insulating spacer 200 according to the size of the crimping member of the semiconductor component, so that the insulating spacer 200 can be applicable to semiconductor components of different sizes.

[0061] The following will detail the design method of the insulating spacer in this embodiment with specific embodiments.

[0062] As Figure 8As shown, the insulating spacer 200 has parameters that can be standardized, including the maximum diameter D1 of the insulating spacer 200, the diameter D2 of the tabletop 23, the diameter D3 of the bottom surface of the first groove 21, the diameter D4 of the positioning groove 24, the diameter D5 of the bottom surface of the second groove 22, the thickness B of the insulating spacer 200, the groove depth A, the width b1 of the first groove 21, the width b2 of the second groove 22, the width b3 of the first flange 25, the width b4 of the second flange, and the depth H of the positioning groove 24.

[0063] Combined with Figure 6 、 8 As shown, for the maximum diameter D1 of the insulating spacer 200, the maximum diameter D1 of the insulating spacer 200 is determined according to the size of the crimping part of the semiconductor component. In some ways, the maximum diameter D1 is less than the diameter D of the crimping part, and the difference between the maximum diameter D1 and the diameter D of the crimping part is the first value. For example, the value range of the first value is 10 - 25 mm.

[0064] For the diameter D2 of the tabletop 23, the diameter D2 of the tabletop 23 is determined according to the size of the tabletop contact part. In some ways, the diameter D2 of the tabletop 23 is greater than the diameter d of the tabletop contact part, and the difference between the diameter D2 of the tabletop 23 and the diameter d is the second value. For example, the value range of the second value is 2 - 5 mm.

[0065] For the diameter D3 of the bottom surface of the first groove 21, the diameter D3 of the bottom surface of the first groove 21 is determined according to the diameter D2 of the tabletop 23. In some ways, the diameter D3 of the bottom surface of the first groove 21 is greater than or equal to the diameter D2 of the tabletop 23.

[0066] For the groove depth A, the groove depth A is half of the difference between the diameter D4 of the positioning groove 24 and the diameter D2 of the tabletop 23, that is, A = (D2 - D4) / 2.

[0067] For the thickness B of the insulating spacer 200, the thickness B is determined according to the electrical clearance requirement. In some ways, the calculation formula for the thickness B is:

[0068] B = d 1 +F(d 2 -d 1 ) (1)

[0069] Where, d 1 、d 2 are the standard values of the electrical clearance, and the calculation formula for F is:

[0070]

[0071] U m =U w +U t (3)

[0072] Among them, U m is the maximum voltage, U w is the peak operating voltage, and U t is the transient overvoltage.

[0073] When the maximum voltage U m is a voltage composed of only one 1.2×50 μs pulse, the standard value d 1 of the creepage distance is the creepage distance corresponding to this maximum voltage U m ; when the maximum voltage U m is a voltage composed of only the peak operating voltage U w without any transient overvoltage, the standard value d 2 of the creepage distance is the creepage distance corresponding to this maximum voltage U m .

[0074] For the diameter D4 of the positioning groove 24, the diameter D4 of the positioning groove 24 is determined according to the size of the force transmission component. For the depth H of the positioning groove 24, the depth H of the positioning groove 24 is determined according to the thickness of the force transmission component.

[0075] In some embodiments, the size specifications of the force transmission components are mainly of two types: large specifications and small specifications. According to the press-fitting structure of the semiconductor component, combined with the experimental and simulation results, along the critical force transmission path, the specifications of the force transmission component and the parameters of the insulating spacer satisfy the following two situations: For the large-specification force transmission component, the relationship between the diameter D4 of the positioning groove 24 and the diameter D2 of the table 23 is: 0 < D2 - D4 ≤ 10 mm; for the small-specification force transmission component, the relationship between the diameter D4 of the positioning groove 24 and the diameter D2 of the table 23 is: D2 - D4 > 10 mm.

[0076] In some embodiments, the large-specification or small-specification force transmission component can be selected according to the actual working conditions and the series height h of the semiconductor component. In some cases, the large-specification force transmission component is applicable to the situation where the series height h is greater than 4 times the thickness B (h > 4B), and the small-specification force transmission component is applicable to the situation where the series height h is less than or equal to 4 times the thickness B (h ≤ 4B).

[0077] For the diameter D5 of the bottom surface of the second groove 22, the diameter D5 of the bottom surface of the second groove 22 is determined according to the diameter D2 of the table 23, the diameter D4 of the positioning groove 24, and the thickness B of the insulating spacer 200. Specifically:

[0078] The calculation formula for the diameter D5 of the bottom surface of the second groove 22 is:

[0079] D5 = a×(D2 - D4) + D4 (4)

[0080] Combined with Figure 9As shown, following the principle that the stress is within the material strength limit range and is relatively completely distributed within the material stress range from the head end M (the surface where the positioning groove 24 contacts the force transmission component) to the tail end N, stress contour lines are selected and the relationship between the thickness coefficient b and the groove depth coefficient a is obtained through the method of quadratic curve fitting. The formula is:

[0081] a = -k1 × b 2 + k2 × b + k3 (5) From formulas (4) and (5), we get:

[0082] D5 = (-k1 × b 2 + k2 × b + k3)(D2 - D4) + D4 (6)

[0083] Among them, k1, k2, and k3 are all relationship coefficients.

[0084] For the thickness coefficient b, the calculation formula is:

[0085]

[0086] Combined with Figure 9 As shown, taking any point on the head end M as the origin, a coordinate system is established with the thickness direction of the insulating spacer as the X-axis and the groove depth direction as the Y-axis. In this coordinate system, the coordinates of any position on the insulating spacer are O(B 0 , A 0 ), where B 0 is the thickness distance along the thickness direction starting from the origin, and A 0 is the groove depth distance along the groove depth direction starting from the origin.

[0087] For the groove depth coefficient a, the calculation formula is:

[0088]

[0089] For the relationship coefficients k1, k2, and k3, they are determined through the method of quadratic curve fitting of stress contour lines according to the proportional relationship between the specific groove depth A and thickness B.

[0090] Select different target positions from the insulating spacer. According to the thickness distance B corresponding to the target position 0 and the determined thickness B, the thickness coefficient b is calculated according to formula (7). Among them, the method of selecting the target position is to sequentially offset a predetermined distance downward along the thickness direction starting from the origin, and each position after offset is the target position. The predetermined distance is the width b2 of the second groove 22 plus the width b4 of the second flange 26, or the width b1 of the first groove 21 plus the width b3 of the first flange 25.

[0091] Such as Figure 10As shown, in some embodiments, when the proportional relationship A / B = (D2 - D4) / 2B = 0.3, the values of the relationship coefficients in formula (5) can be determined as: k1 = 0.9315, k2 = 1.9184, k3 = 0. It should be noted that the value of the proportional coefficient is not specifically limited, and the specific value is restricted by the electrical clearance and the tabletop size.

[0092] In some embodiments, according to the determined parameters of the insulating spacer 200, the actual creepage distance of the insulating spacer 200 can be determined as:

[0093] L = B + 2N1×(D1 - D3) + (2N2 + 1)×(D1 - D5) (9)

[0094] Wherein, L is the creepage distance, N1 is the number of the first grooves 21, and N2 is the number of the second grooves 22.

[0095] In some ways, according to the creepage distance requirement and the thickness B of the insulating spacer 200, the number N1 of the first grooves 21, the width b1 of the first grooves 21, the number N2 of the second grooves 22, the width b2 of the second grooves 22, and the width b3 of the first flange 25 corresponding to the first grooves 21 and the width b4 of the second flange 26 corresponding to the second grooves 22 are determined.

[0096] The design method of the insulating spacer in this embodiment parameterizes the structure of the insulating spacer, and thus can perform standardized design according to the specific requirements in aspects such as creepage distance, electrical clearance, and the size of semiconductor components under actual working conditions. The designed insulating spacer can be applicable to different actual working conditions, and can realize the standardized design and production of the insulating spacer.

[0097] Those of ordinary skill in the art should understand that: the discussion of any above embodiment is only exemplary, and is not intended to imply that the scope of the present disclosure (including the claims) is limited to these examples; under the concept of the present disclosure, the technical features in the above embodiments or different embodiments can also be combined, the steps can be implemented in any order, and there are many other variations in different aspects of one or more embodiments of the present specification as described above, and they are not provided in detail for the sake of brevity.

[0098] In addition, for simplicity of explanation and discussion, and so as not to make one or more embodiments of this specification difficult to understand, well-known power / ground connections to integrated circuit (IC) chips and other components may or may not be shown in the provided drawings. Further, the devices may be shown in block diagram form in order to avoid making one or more embodiments of this specification difficult to understand, and this also takes into account the fact that details regarding the implementation of these block diagram devices are highly dependent on the platform on which one or more embodiments of this specification are to be implemented (i.e., these details should be entirely within the understanding of those skilled in the art). In cases where specific details (such as circuits) are set forth to describe exemplary embodiments of the present disclosure, it will be apparent to those skilled in the art that one or more embodiments of this specification may be practiced without these specific details or with variations of these specific details. Accordingly, these descriptions should be regarded as illustrative rather than restrictive.

[0099] Although the present disclosure has been described in connection with specific embodiments thereof, many alternatives, modifications, and variations of these embodiments will be apparent to those of ordinary skill in the art in light of the foregoing description. For example, other memory architectures (such as dynamic RAM (DRAM)) may be used with the embodiments discussed.

[0100] One or more embodiments of this specification are intended to cover all such alternatives, modifications, and variations that fall within the broad scope of the appended claims. Accordingly, any omissions, modifications, equivalent substitutions, improvements, etc., made within the spirit and principles of one or more embodiments of this specification shall be included within the scope of protection of the present disclosure.

Claims

1. A design method for an insulating spacer block, characterized in that, the insulating spacer block includes a body, at least one first groove with a first depth and at least one second groove with a second depth are formed on the side surface of the body, and the first depth is different from the second depth; a positioning groove for connecting with a force - transmitting component is provided on the upper surface of the body; a tabletop for connecting with a tabletop - contacting component is provided on the lower surface of the body; the design method includes: determining the diameter D2 of the tabletop according to the size of the tabletop - contacting component; determining the diameter D3 of the bottom surface of the corresponding first groove of the body according to the diameter D2 of the tabletop; determining the thickness B of the insulating spacer block according to the electrical clearance requirement; determining the diameter D4 of the positioning groove according to the size of the force - transmitting component; determining the diameter D5 of the bottom surface of the corresponding second groove of the body according to the diameter D2 of the tabletop, the diameter D4 of the positioning groove and the thickness B of the insulating spacer block; determining the maximum diameter D1 of the insulating spacer block according to the size of the crimping part of the semiconductor component; the value range of the difference between the maximum diameter D1 of the insulating spacer block and the diameter of the crimping part is 10 - 25 mm; the actual creepage distance L of the insulating spacer block is: L = B + 2N1×(D1 - D3)+(2N2 + 1)×(D1 - D5) (9) wherein, N1 is the number of the first grooves, and N2 is the number of the second grooves.

2. The design method according to claim 1, characterized in that, the determining the diameter D5 of the bottom surface of the corresponding second groove of the body according to the diameter D2 of the tabletop, the diameter D4 of the positioning groove and the thickness B of the insulating spacer block includes: the calculation formula for the diameter D5 of the bottom surface of the corresponding second groove of the body is: D5 = (-k1×b 2 +k2×b + k3)(D2 - D4)+D4 (6) wherein, b is a thickness coefficient, and the calculation formula is: B 0 is the thickness distance corresponding to the target position selected from the insulating spacer block; the relationship coefficients k1, k2, k3 are determined by the method of quadratic curve fitting of stress contour lines according to the ratio of the groove depth to the thickness B, and the groove depth is half of the difference between the diameter D4 of the positioning groove and the diameter D2 of the tabletop.

3. The design method according to claim 1, characterized in that, further includes: determining the number and width of the first grooves, the number and width of the second grooves, the width of the first flange corresponding to the first groove, and the width of the second flange corresponding to the second groove according to the creepage distance requirement and the thickness B.

4. The design method according to claim 1, characterized in that, the diameter D2 of the tabletop is greater than the diameter of the tabletop - contacting component, and the value range of the difference between the diameter D2 of the tabletop and the diameter of the tabletop - contacting component is 2 - 5 mm.

5. The design method according to claim 1, characterized in that, the calculation formula for the thickness B of the insulating spacer block is: B = d 1 + F(d 2 - d 1 ) (1) Among them, d 1 and d 2 are the standard values of the creepage distance. The calculation formula of F is as follows: U m = U w + U t (3) Among them, U m is the maximum voltage, U w is the peak operating voltage, U t is the transient overvoltage.

6. The design method according to claim 1, characterized in that, for a large - size force - transmitting component, the relationship between the diameter D4 of the positioning groove and the diameter D2 of the tabletop is: 0 < D2 - D4 ≤ 10 mm; For the small-sized force transmission component, the relationship between the diameter D4 of the positioning groove and the diameter D2 of the tabletop is: D2 - D4 > 10 mm.

Citation Information

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