Display device

Abstract

This application relates to a display device. The display device includes a first display panel and a second display panel adjacent to each other along one direction, wherein: each of the first and second display panels includes a substrate and a display portion on the substrate including a plurality of pixels, the plurality of pixels including a pixel circuit layer and a display element layer, the pixel circuit layer being on the substrate and including at least one transistor, and the display element layer being on the pixel circuit layer and including at least one light-emitting element emitting light; the substrates of the first and second display panels are joined to each other in plan and cross-sectional views; the display portions of the first and second display panels are joined to each other in plan and cross-sectional views; and a first boundary between the substrates of the first and second display panels and a second boundary between the display portions of the first and second display panels are spaced apart from each other.

Description

[0001] Cross-reference to related applications

[0002] This application claims priority and benefit to Korean Patent Application No. 10-2020-0122597, filed on September 22, 2020, with the Korean Intellectual Property Office, the entire contents of which are incorporated herein by reference. Technical Field

[0003] Some aspects of embodiments of the present invention relate to display devices and methods of manufacturing the same. Background Technology

[0004] The growing interest in devices for displaying information in graphics, coupled with the increasing demand for portable information media, has led to increased demand and commercialization of display devices.

[0005] The information disclosed in this background section is only intended to enhance the understanding of the background art, and therefore the information discussed in this background section does not necessarily constitute prior art. Summary of the Invention

[0006] Some aspects of the present invention include a display device and a method of manufacturing the same, which can minimize or reduce the non-display area between multiple display panels.

[0007] Some embodiments of the present invention include a display device comprising a first display panel and a second display panel adjacent to each other in one direction. Each of the first and second display panels may include a substrate and a display portion disposed on the substrate and including a plurality of pixels.

[0008] According to some embodiments, each of the pixels may include a pixel circuit layer on a substrate and including at least one transistor, and a display element layer on the pixel circuit layer and including at least one light-emitting element that emits light.

[0009] According to some embodiments, the substrate of the first display panel and the substrate of the second display panel can be joined to each other in plan view and cross-sectional view, and the display portion of the first display panel and the display portion of the second display panel can be joined to each other in plan view and cross-sectional view.

[0010] According to some embodiments, the first boundary between the substrate of the first display panel and the substrate of the second display panel and the second boundary between the display portion of the first display panel and the display portion of the second display panel may be spaced apart from each other in one direction.

[0011] According to some embodiments, the display device may further include an overlapping portion in which a first display panel and a second display panel overlap. When viewed in a plan view and a sectional view, the overlapping portion may be located between a first boundary and a second boundary.

[0012] According to some embodiments, the substrate may include a first surface and a second surface facing each other. The display portion may also include a flexible substrate disposed between the first surface of the substrate and a plurality of pixels.

[0013] According to some embodiments, at least a portion of the display portion of one of the first display panel and the second display panel may be on the first surface of the substrate of the other of the first display panel and the second display panel in the overlapping portion.

[0014] According to some embodiments, at least a portion of the display portion of the second display panel may be on the first surface of the substrate of the first display panel in the overlapping portion.

[0015] According to some embodiments, the display device may also include an adhesive layer on a first surface of the substrate of the first display panel in the overlapping portion.

[0016] According to some embodiments, at least a portion of the display portion of the second display panel may be on an adhesive layer.

[0017] According to some embodiments, when viewed in plan and sectional views, the first boundary may overlap with the display portion of the second display panel. When viewed in plan and sectional views, the second boundary may overlap with the substrate of the first display panel.

[0018] According to some implementations, when viewed in a cross-sectional view, the first boundary may be below the display portion of the second display panel.

[0019] According to some embodiments, between the first display panel and the second display panel, the edge of the substrate of the first display panel may protrude in the direction toward the second display panel compared to the edge of the display portion of the first display panel.

[0020] According to some embodiments, between the first display panel and the second display panel, the edge of the display portion of the second display panel may protrude in a direction toward the first display panel compared to the edge of the substrate of the second display panel.

[0021] According to some embodiments, at least a portion of the display portion of the first display panel may be on a first surface of the substrate of the second display panel.

[0022] According to some embodiments, when viewed in plan and sectional views, the first boundary may overlap with the display portion of the first display panel. When viewed in plan and sectional views, the second boundary may overlap with the substrate of the second display panel.

[0023] According to some embodiments, between the first display panel and the second display panel, the edge of the substrate of the second display panel may protrude in a direction toward the first display panel compared to the edge of the display portion of the second display panel.

[0024] According to some embodiments, between the first display panel and the second display panel, the edge of the display portion of the first display panel may protrude in a direction toward the second display panel compared to the edge of the substrate of the first display panel.

[0025] According to some implementations, when viewed in a cross-sectional view, the first boundary may be below the display portion of the first display panel.

[0026] According to some embodiments, the display device may further include an additional member between the first display panel and the second display panel, the additional member being flexible and situated between the substrates of the first and second display panels. The additional member may contact the display portion of the first display panel.

[0027] According to some embodiments, each of the first display panel and the second display panel may further include: at least one contact hole that penetrates at least one region of the substrate of the respective display panel; a conductive material in the contact hole; and a driver on a second surface of the substrate and electrically connected to the conductive material.

[0028] According to some implementations, the light-emitting element may include: a first electrode electrically connected to a transistor; an emitting layer on the first electrode; and a second electrode on the emitting layer.

[0029] According to some embodiments, the light-emitting element may include: a first semiconductor layer doped with a first conductive dopant; a second semiconductor layer doped with a second conductive dopant different from the first conductive dopant; and an active layer between the first semiconductor layer and the second semiconductor layer.

[0030] According to some embodiments of the present invention, a method for manufacturing a display device includes: preparing a mother substrate and disposing a first display portion and a second display portion thereon; dividing the mother substrate into a first substrate on which the first display portion is disposed and a second substrate on which the second display portion is disposed by removing a portion of the mother substrate; removing at least a portion of the first display portion to expose a surface of the first substrate; removing at least a portion of the second substrate to expose at least a portion of the second display portion; applying an adhesive resin to the exposed surface of the first substrate; and bonding the first substrate to the second substrate after the exposed portion of the second display portion is disposed on the adhesive resin.

[0031] In display devices and manufacturing methods according to some embodiments of the present invention, adjacent display panels in one direction may at least partially overlap and be combined with each other. Therefore, the non-display area between adjacent display panels is minimized, thereby preventing the boundary area between adjacent display panels from being observed when a display device using multiple display panels is implemented.

[0032] Furthermore, in the display device and manufacturing method of the present invention according to some embodiments, the user's sense of immersion can be increased while providing relatively improved visual information.

[0033] The features and characteristics of the embodiments of the present invention are not limited to those illustrated above, and many more different features are illustrated and described in this specification. Attached Figure Description

[0034] Figure 1 A schematic perspective view of a multi-screen display device according to some embodiments of the present invention is shown.

[0035] Figure 2A Some embodiments of the present invention are shown. Figure 1 A schematic perspective view of the first display device.

[0036] Figure 2B Some embodiments of the present invention are shown. Figure 2A A schematic cross-sectional view of the first display device.

[0037] Figure 3A A schematic top view of a display panel according to some embodiments of the present invention is shown.

[0038] Figure 3B A schematic cross-sectional view of a display panel according to some embodiments of the present invention is shown.

[0039] Figure 4A A schematic top view of a display panel according to some embodiments of the present invention is shown.

[0040] Figure 4B It shows along Figure 4A A sectional view taken by line I-I'.

[0041] Figure 5A and Figure 5B A circuit diagram illustrating the electrical connection relationships between constituent elements included in a pixel according to some embodiments of the present invention is shown.

[0042] Figure 6A and Figure 6B A schematic top view of a display device according to some embodiments of the present invention is shown.

[0043] Figure 7 The following are some embodiments of the invention shown. Figure 6B The sectional view taken from line II-II'.

[0044] Figure 8 Some embodiments of the present invention are shown. Figure 7 A schematic cross-sectional view of the first and second display panels in a separated state.

[0045] Figures 9 to 11 Some embodiments of the present invention are shown. Figure 8 A schematic enlarged view of the region "EA".

[0046] Figures 12A to 12F This is a schematic top view showing a method of manufacturing a display device according to some embodiments of the present invention.

[0047] Figure 13A It shows along Figure 12A The sectional view taken from line III-III'. Figure 13B Show along Figure 12B The sectional view taken from line III-III'. Figure 13C It shows along Figure 12C The sectional view taken from line III-III'. Figure 13D It shows along Figure 12D The sectional view taken from line III-III'. Figure 13E It shows along Figure 12E The sectional view taken by line III-III', and Figure 13F It shows along Figure 12F The sectional view taken from line III-III'.

[0048] Figure 14A A schematic top view of a display device according to some embodiments of the present invention is shown.

[0049] Figure 14B It shows along Figure 14A A sectional view taken from line IV-IV'.

[0050] Figure 14C Some embodiments of the present invention are shown. Figure 14B A schematic cross-sectional view showing the first and second display panels separated.

[0051] Figure 15A It shows along Figure 14A The image shows a cross-sectional view of a display device according to some embodiments of the present invention, taken along line IV-IV'.

[0052] Figure 15B It shows Figure 15A The display device is in a folded state, and it shows the state along the fold. Figure 14A A sectional view taken from line IV-IV'. Detailed Implementation

[0053] Because the present invention can be modified in various ways and has various forms, embodiments will be illustrated and described in detail below. However, this is by no means intended to limit the invention to the specific embodiments, and is to be understood to cover all changes, equivalents, and substitutions included within the spirit and scope of the invention.

[0054] In describing each drawing, the same reference numerals are used for the same constituent elements. In the drawings, for clarity of the invention, the dimensions of the structures are enlarged and shown. Terms such as first, second, etc., will only be used to describe the various constituent elements and should not be construed as limiting these constituent elements. These terms are only used to distinguish one constituent element from others. For example, without departing from the scope of the invention, a first constituent element may be referred to as a second constituent element, and similarly, a second constituent element may be referred to as a first constituent element. Singular forms are intended to include plural forms unless the context clearly indicates otherwise.

[0055] In this application, it should be understood that the terms "comprising," "including," "having," or "configuration" indicate the presence of features, quantities, steps, operations, constituent elements, portions, or combinations thereof described in the specification, but do not preclude the possibility of the presence or addition of one or more other features, quantities, steps, operations, constituent elements, portions, or combinations. It will be understood that when an element such as a layer, film, region, area, or substrate is referred to as being "on" another element, it may be directly on the other element, or an intervening element may be present. Furthermore, in this specification, when a portion of a layer, film, region, area, plate, etc., is referred to as being formed "on" another portion, the direction of formation is not limited to the upward direction, but includes lateral or downward directions. Conversely, when a portion of a layer, film, region, area, plate, etc., is referred to as being "below" another portion, it may be directly below the other portion, or an intervening portion may be present.

[0056] It will be understood that, in this application, when a component (e.g., a first component) is described as being "functionally or communicatively" "connected or linked" to another component (e.g., a second component), the component may be directly connected or linked to the other component, or may be connected or linked to the other component via another component (e.g., a third component). Conversely, it will be understood that when a component (e.g., a first component) is described as being "directly connected or linked" to another component (e.g., a second component), there is no other component (e.g., a third component) between the component and the other component.

[0057] In the following description, some aspects of embodiments of the invention will be described in more detail with reference to the accompanying drawings. In the following description, singular forms will include plural forms unless the context clearly indicates only the singular.

[0058] Figure 1 A schematic perspective view of a multi-screen display device according to some embodiments of the present invention is shown. Figure 2A It shows Figure 1 A schematic perspective view of the first display device, and Figure 2B It shows Figure 2A A schematic cross-sectional view of the first display device.

[0059] Reference Figures 1 to 2BAccording to some embodiments of the present invention, the display device may be a multi-screen display device (TDD) comprising a plurality of display devices DD1 to DD4, wherein the plurality of display devices DD1 to DD4 are arranged adjacent to each other to form a larger display panel that collectively includes display devices DD1 to DD4. Although four display devices DD1 to DD4 are shown for illustrative purposes, the embodiments are not limited thereto, and some embodiments may include additional display devices or fewer display devices without departing from the spirit and scope of the embodiments according to this disclosure.

[0060] When each of the display devices DD1 to DD4 is a display device (such as a smartphone, television, tablet PC, mobile phone, webcam, e-book reader, desktop PC, laptop PC, notebook computer, workstation, server, PDA, portable multimedia player (PMP), MP3 player, medical device, camera, or wearable device) to which a display surface is applied, embodiments of the present invention may be applied.

[0061] A multi-screen display device (TDD, or tiled display) may include multiple display devices DD1 to DD4 arranged in a matrix format along a first direction DR1 and a second direction DR2, as well as a housing HS.

[0062] Multiple display devices DD1 to DD4 can display individual images, or they can divide and display a single image. The multiple display devices DD1 to DD4 may include, for example, a first display device DD1, a second display device DD2, a third display device DD3, and a fourth display device DD4.

[0063] The first display devices DD1 to the fourth display devices DD4 can be arranged side by side, such that each display surface (or image display surface) on which an image is displayed points in one direction (e.g., a third direction DR3). The first display devices DD1 to the fourth display devices DD4 can have the same size (or area) as each other, but the invention is not limited thereto. In some embodiments, the size (or area) of each of the first display devices DD1 to the fourth display devices DD4 can be different from the size (or area) of the adjacent display devices to meet the design requirements of the applied multi-screen display device TDD.

[0064] Each of the first display devices DD1 to the fourth display devices DD4 can be configured in various shapes, and as an example, it can be configured as a rectangular plate shape with two pairs of parallel sides, but the embodiments according to the present invention are not limited thereto. When each of the first display devices DD1 to the fourth display devices DD4 is configured as a rectangular plate shape, one pair of the two pairs of sides can be configured to be longer than the other pair of sides. According to some embodiments of the present invention, for better understanding and ease of description, it is shown that each of the first display devices DD1 to the fourth display devices DD4 is a rectangular shape with a pair of long sides and a pair of short sides, and the extension direction of the long side is indicated as the second direction DR2, the extension direction of the short side is indicated as the first direction DR1, and the direction perpendicular to the extension directions of the long side and the short side is indicated as the third direction DR3. In this case, each of the first display devices DD1 to the fourth display devices DD4 configured as a rectangular plate shape can have a circular shape at the corner where one long side and one short side intersect.

[0065] The first display devices DD1 to the fourth display device DD4 can be arranged in a matrix format. The matrix format may include one or more rows and two or more columns.

[0066] The housing HS can physically assemble the first display devices DD1 to the fourth display devices DD4, such that the first display devices DD1 to the fourth display devices DD4 can form a multi-screen display device (TDD). The housing HS is arranged on one surface (or lower surface) of the first display devices DD1 to the fourth display devices DD4 to control or fix the movement of the first display devices DD1 to the fourth display devices DD4. Each of the first display devices DD1 to the fourth display devices DD4 can be detachably fastened to the housing HS by at least one fastening member. Therefore, because each of the first display devices DD1 to the fourth display devices DD4 can be attached to and detached from the housing HS relatively easily, it can be easily repaired if one of the first display devices DD1 to the fourth display devices DD4 is defective.

[0067] The first display device DD1 to the fourth display device DD4 can have substantially similar or identical structures. Therefore, it is possible to utilize the reference... Figure 2A and Figure 2B The description of the first display device DD1 is used to replace the description of the second display devices DD2 to the fourth display devices DD4.

[0068] According to some embodiments of the present invention, at least a portion of the first display device DD1 may be flexible, and the first display device DD1 may be folded at the flexible portion.

[0069] The first display device DD1 may include a display area DD_DA for displaying an image and a non-display area DD_NDA disposed on at least one side of the display area DD_DA. The non-display area DD_NDA is the area where no image is displayed (e.g., the peripheral area of ​​the display area DD_DA). However, embodiments according to the present invention are not limited thereto. In some embodiments, the shape of the display area DD_DA and the non-display area DD_NDA may be designed accordingly.

[0070] In some embodiments, the first display device DD1 may include a sensing area and a non-sensing area. The first display device DD1 can not only display images through the sensing area, but also detect touch input made on the image display surface (or input surface), or detect light incident from the front. The non-sensing area may surround the sensing area, but this is merely an example and is not limited to this according to embodiments of the invention. In some embodiments, a portion of the display area DD_DA may correspond to the sensing area.

[0071] The first display device DD1 may include a display panel DP and a window WD.

[0072] Display panel DP can display images. As display panel DP, self-emitting display panels can be used, such as organic light-emitting display panels (OLED panels) using organic light-emitting diodes as light-emitting elements, nanoscale LED display panels using ultra-small light-emitting diodes as light-emitting elements, or quantum dot organic light-emitting display panels (QD OLED panels) using quantum dots and organic light-emitting diodes. Alternatively, non-emitting display panels can be used as display panel DP, such as liquid crystal display panels (LCD panels), electrophoretic display panels (EPD panels), or electrowetting display panels (EWD panels). When a non-emitting display panel is used as display panel DP, the first display device DD1 may include a backlight unit that provides light to display panel DP.

[0073] A window WD (Display Window) can be installed on the display panel DP to protect its exposed surfaces. The window WD protects the display panel DP from external impacts and provides an input and / or display surface to the user. The window WD can be combined with the display panel DP using an optically clear adhesive component (OCA).

[0074] Window WDs can have a multilayer structure selected from glass substrates, plastic films, and plastic substrates. This multilayer structure can be formed through a continuous process or an adhesive bonding process using adhesive layers. Window WDs can be fully or partially flexible.

[0075] A touch sensor can be arranged between the display panel (DP) and the window (WD). The touch sensor is directly arranged on the surface of the display panel (DP) on which the image is displayed to receive user touch input. According to some embodiments of the invention, "direct arrangement" can mean that it is formed by a continuous process, rather than by attaching it using a separate adhesive layer.

[0076] Meanwhile, due to the non-display area DD_NDA (e.g., due to the seam area) arranged in the boundary region between the first display device DD1 and the fourth display device DD4, the image displayed on the screen of the multi-screen display device TDD can be cut off. Specifically, when the width (or area) of the non-display area DD_NDA is relatively large, the sense of image cut-off may be increased in the boundary region between the first display device DD1 and the fourth display device DD4.

[0077] Simultaneously, when the width (or area) of the non-display area DD_NDA is reduced, the size of the display area DD_DA of the corresponding display device can be increased without increasing the size of each of the first display devices DD1 to the fourth display devices DD4. Therefore, a larger display area DD_DA can be provided. Furthermore, when a multi-screen display device TDD is implemented using the first display devices DD1 to the fourth display devices DD4, reducing the non-display area DD_NDA minimizes the observable boundaries between the first display devices DD1 to the fourth display devices DD4, resulting in a more natural screen appearance.

[0078] Figure 3A A schematic top view of a display panel according to some embodiments of the present invention is shown, and Figure 3B A schematic cross-sectional view of a display panel according to some embodiments of the present invention is shown.

[0079] Reference Figure 3A and Figure 3B According to some embodiments, a display panel DP may include a substrate SUB and a display portion DPP.

[0080] The substrate SUB can be formed from a region having an approximately rectangular shape. However, the number of regions disposed in the substrate SUB can vary, and the shape of the substrate SUB can vary depending on the regions disposed in the substrate SUB. The substrate SUB may include a first surface SF1 and a second surface SF2 facing each other.

[0081] The substrate SUB can be made of an insulating material such as glass or resin. Furthermore, the substrate SUB can be made of a flexible, bendable or foldable material and can have a single-layer or multi-layer structure. For example, the flexible material may include at least one of polystyrene, polyvinyl alcohol, polymethyl methacrylate, polyethersulfone, polyacrylate, polyetherimide, polyethylene naphthalate, polyethylene terephthalate, polyphenylene sulfide, polyarylate, polyimide, polycarbonate, cellulose triacetate, and cellulose acetate propionate. However, the materials included in the substrate SUB are not limited to the embodiments described above.

[0082] The substrate SUB may include a display area DA and a non-display area NDA. The display area DA may be an area in which pixels PXL are set to display an image, and the non-display area NDA may be an area in which pixels PXL are not set and no image is displayed. For better understanding and ease of description, in Figure 3A Only one pixel PXL is shown, but multiple pixels PXL can be located essentially within the display area DA of the substrate SUB.

[0083] The display area DA of the substrate SUB (or display panel DP) corresponds to the first display device (see [reference]). Figure 2A The display area DD_DA of “DD1” in the figure, and the non-display area NDA of the substrate SUB (or display panel DP) can correspond to the non-display area DD_NDA of the first display device DD1.

[0084] The non-display area NDA can contain a driver for driving pixel PXL, as well as some of the wiring connecting pixel PXL and the driver. The non-display area NDA can correspond to the bezel area of ​​the first display device DD1.

[0085] Pixels PXL can be disposed in the display area DA of the substrate SUB. Each of the pixels PXL can be the smallest unit for displaying an image. Pixels PXL can include light-emitting elements that emit white light and / or colored light. Each of the pixels PXL can emit light of one color among red, green, and blue, but is not limited thereto, and can emit light of colors such as cyan, magenta, or yellow. Each of the pixels PXL can include a pixel circuit layer PCL disposed on the substrate SUB and a display element layer DPL disposed on the pixel circuit layer PCL.

[0086] Pixels PXL can be arranged in a matrix form along rows extending in a first direction DR1 and columns extending in a second direction DR2 intersecting the first direction DR1. However, the arrangement of pixels PXL is not particularly limited to this, and pixels PXL can be arranged in different forms. In the accompanying drawings, pixels PXL are shown as having a rectangular shape, but the invention is not limited to this and can be changed to different shapes. Furthermore, when multiple pixels PXL are provided, they can be configured to have different areas (or sizes). For example, if the light emitted by pixels PXL has different colors, pixels PXL for each color can be configured to have different areas (or sizes) or different shapes.

[0087] The driver provides signals to each pixel PXL via the wiring section and controls the driving of the pixel PXL. Figure 3A For better understanding and ease of description, the wiring details have been omitted and will be explained later. Figure 5A and Figure 5B To describe the wiring section.

[0088] The display portion (DPP) can be disposed on the first surface (SF1) of the substrate (SUB). The display portion (DPP) may include a flexible substrate (FSUB), a pixel circuit layer (PCL), a display element layer (DPL), and a thin-film encapsulation layer (TFE).

[0089] A flexible substrate FSUB can be disposed and / or formed on the first surface SF1 of the substrate SUB. The flexible substrate FSUB can be a base substrate (or base layer) for displaying the DPP portion. The flexible substrate FSUB can be made of flexible polyimide. However, the materials included in the flexible substrate FSUB are not limited to the embodiments described above. In some embodiments, the flexible substrate FSUB may be omitted.

[0090] The pixel circuit layer (PCL) can be located on a flexible substrate (FSUB). Multiple transistors and signal lines connected to the transistors can be located within the pixel circuit layer (PCL). For example, each transistor can have a structure in which a semiconductor layer, a gate electrode, and a source / drain electrode are sequentially stacked, with an insulating layer interposed between them. The semiconductor layer can include amorphous silicon, polycrystalline silicon, low-temperature polycrystalline silicon, and organic semiconductors. The gate electrode and source / drain electrode can comprise one of aluminum (Al), copper (Cu), titanium (Ti), and molybdenum (Mo), but the invention is not limited thereto. Furthermore, the pixel circuit layer (PCL) can include one or more insulating layers.

[0091] The display element layer (DPL) can be located on the pixel circuit layer (PCL). The display element layer (DPL) can include light-emitting elements that emit light. The light-emitting element can be, for example, an organic light-emitting diode (OLED), but the invention is not limited thereto. In some embodiments, the light-emitting element can be an inorganic light-emitting element comprising inorganic light-emitting materials or a light-emitting element that emits light by changing the wavelength of light emitted using quantum dots (quantum dot display element). For example, an organic light-emitting diode can have a structure in which an anode, a hole transport layer (HTL), an organic emission layer, an electron transport layer (ETL), and a cathode are stacked in sequence, but the invention is not limited thereto.

[0092] The thin-film encapsulation layer (TFE) can be located on the display element layer (DPL). The TFE can be an encapsulation substrate or a multilayer encapsulation film. When the TFE is in the form of an encapsulation film, it can include inorganic and / or organic films. For example, the TFE can have a structure of inorganic films, organic films, and inorganic films stacked sequentially. The TFE prevents external air and moisture from penetrating into the display element layer (DPL) and the pixel circuit layer (PCL).

[0093] In addition to the flexible substrate FSUB and the thin-film encapsulation layer TFE, each pixel PXL, including the pixel circuit layer PCL and the display element layer DPL, can be formed on the first surface SF1 of the substrate SUB.

[0094] Figure 4A A schematic top view of a display panel according to some embodiments of the present invention is shown, and Figure 4B It shows along Figure 4A A sectional view taken by line I-I'.

[0095] exist Figure 4A and Figure 4B In this diagram, the horizontal direction is designated as the first direction DR1, the vertical direction intersecting the first direction DR1 is designated as the second direction DR2, and the thickness direction of the substrate SUB is designated as the third direction DR3. The first direction DR1, the second direction DR2, and the third direction DR3 may refer to the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3, respectively.

[0096] Reference Figure 4A and Figure 4B According to some embodiments, a display panel DP may include a substrate SUB, a display portion DPP, and a driver DRP.

[0097] The substrate SUB can be configured to support the display portion DPP and can include a transparent insulating material to transmit light. The substrate SUB can be a rigid substrate or a flexible substrate. The substrate SUB can have a reference [feature / feature]. Figure 3A and Figure 3B The substrate SUB described has the same configuration.

[0098] The substrate SUB may include four edges ED11 to ED14. The four edges ED11 to ED14 may include edge (1-1) ED11, edge (1-2) ED12, edge (1-3) ED13 and edge (1-4) ED14.

[0099] The substrate SUB may include one or more contact holes CH that penetrate at least one region of the substrate SUB. For example, the substrate SUB may include contact holes CH that penetrate through a first surface SF1 and a second surface SF2. A conductive material CM may be located within the contact holes CH. The conductive material CM directly contacts components located on the first surface SF1 and the second surface SF2 of the substrate SUB, respectively, to electrically connect and / or physically connect the components located on the first surface SF1 and the components located on the second surface SF2. As an example, the conductive material CM may directly contact the display portion DPP located on the first surface SF1 of the substrate SUB and the driver DRP located on the second surface SF2 of the substrate SUB to electrically connect and / or physically connect the display portion DPP and the driver DRP.

[0100] The driver DRP can be disposed on the second surface SF2 of the substrate SUB to be electrically connected to the display portion DPP via the aforementioned conductive material CM. The driver DRP can be a printed circuit board that generates the overall drive signals and power signals required to drive the display panel DP and provides them to the display panel DP. According to some embodiments, the driver DRP can be electrically connected to the conductive material CM via a flexible circuit film COF.

[0101] A flexible circuit film (COF) can serve as an intermediate medium for electrically connecting a conductive material (CM) and a driver (DRP). The COF can process various signals input from the driver (DRP) and output them to the display panel (DP). For this purpose, one end of the COF can be electrically connected to the conductive material (CM), and the other end of the COF, facing its opposite end, can be electrically connected to the driver (DRP).

[0102] The display portion (DPP) may include multiple pixels (PXL) disposed on the substrate (SUB). The display portion (DPP) may be an image display area, which has pixels (PXL) and displays an image therein. The image display area may correspond to the display area of ​​the display panel (DP) (see [link to relevant documentation]). Figure 3A (in "DA").

[0103] According to some embodiments, the display portion DPP may include four edges ED21 to ED24. The four edges ED21 to ED24 may include edge (2-1) ED21, edge (2-2) ED22, edge (2-3) ED23, and edge (2-4) ED24. Edges ED21 to ED24 of the display portion DPP may correspond to edges ED11 to ED14 of the substrate SUB. For example, edge (2-1) ED21 may correspond to edge (1-1) ED11, edge (2-2) ED22 may correspond to edge (1-2) ED12, edge (2-3) ED23 may correspond to edge (1-3) ED13, and edge (2-4) ED24 may correspond to edge (1-4) ED14.

[0104] At least one of the four edges ED11 to ED14 of the substrate SUB may protrude further in the first direction DR1 than the four edges ED21 to ED24 of the display portion DPP. For example, the (1-1)th edge ED11 of the substrate SUB may protrude further in the first direction DR1 than the (2-1)th edge ED21 of the display portion DPP. Therefore, the (1-1)th edge ED11 and the (2-1)th edge ED21 may be spaced apart from each other by a distance (e.g., a set or predetermined distance) in the first direction DR1. In this case, the first surface SF1 may be exposed to the outside at the (1-1)th edge ED11 of the substrate SUB.

[0105] At least one of the four edges ED21 to ED24 of the display portion DPP may protrude further in the first direction DR1 compared to the four edges ED11 to ED14 of the substrate SUB. For example, the (2-2)th edge ED22 of the display portion DPP may protrude further in the first direction DR1 compared to the (1-2)th edge ED12 of the substrate SUB. Therefore, the (2-2)th edge ED22 and the (1-2)th edge ED12 may be spaced apart from each other by a distance (e.g., a set or predetermined distance) in the first direction DR1.

[0106] Figure 5A and Figure 5B A circuit diagram illustrating the electrical connection relationships between constituent elements included in a pixel according to some embodiments of the present invention is shown.

[0107] For example, Figure 5A and Figure 5B The diagram illustrates the electrical connections between components included in a pixel PXL applicable to an active display device according to some embodiments. However, the types of components included in a pixel PXL to which embodiments of the present invention can be applied are not limited thereto.

[0108] exist Figure 5A and Figure 5B In this context, not only the constituent elements within a pixel, but also the area in which the constituent elements are set are collectively referred to as pixel PXL.

[0109] exist Figure 5A In this context, the pixel PXL can include an organic light-emitting diode (OLED) as the light-emitting element (LD). Figure 5B In this context, the pixel PXL may include multiple ultra-small inorganic light-emitting diodes, ranging from nanometer to micrometer in size, formed as light-emitting elements (LDs) in the form of a structure in which a nitride-based semiconductor is grown.

[0110] First, refer to Figure 5A The pixel PXL may include a light-emitting element (LD) that generates light with a brightness corresponding to the data signal. Additionally, the pixel PXL may optionally include pixel circuitry PXC for driving the light-emitting element LD.

[0111] The pixel circuit PXC can be connected to the scan line Si and data line Dj of the pixel PXL. For example, when the pixel PXL is located in the i-th row and j-th column of the display area, the pixel circuit PXC of the pixel PXL can be connected to the i-th scan line Si and the j-th data line Dj. Furthermore, the pixel circuit PXC can be connected to the i-th control line CLI and the j-th sensing line SENj of the display area. The display area can be a reference... Figure 3A and Figure 3B The description refers to the display area DA of the substrate SUB or display panel DP.

[0112] The pixel circuit PXC described above may include a first transistor T1 to a third transistor T3 and a storage capacitor Cst.

[0113] The first terminal of the first transistor T1 (driving transistor) can be connected to the first driving power supply VDD via the first power line PL1, and its second terminal can be electrically connected to the first electrode AE ​​of the light-emitting element LD. The gate electrode of the first transistor T1 can be connected to the first node N1. The first transistor T1 can control the amount of driving current supplied to the light-emitting element LD in response to the voltage of the first node N1.

[0114] The first terminal of the second transistor T2 (switching transistor) can be connected to the j-th data line Dj, and its second terminal can be connected to the first node N1. Here, the first and second terminals of the second transistor T2 are different terminals, and for example, when the first terminal is the drain electrode, the second terminal can be the source electrode. Furthermore, the gate electrode of the second transistor T2 can be connected to the i-th scan line Si.

[0115] When a scan signal with a voltage capable of turning on the second transistor T2 is supplied from the i-th scan line Si, the second transistor T2 is turned on to electrically connect the j-th data line Dj and the first node N1. In this case, the data signal of the corresponding frame is supplied to the j-th data line Dj, and therefore, the data signal is transmitted to the first node N1. The data signal transmitted to the first node N1 is charged in the storage capacitor Cst.

[0116] A third transistor T3 can be connected between the first transistor T1 and the j-th sensing line SENj. For example, the first terminal of the third transistor T3 can be connected to the second terminal of the first transistor T1 connected to the first electrode AE, and the second terminal of the third transistor T3 can be connected to the j-th sensing line SENj. The gate electrode of the third transistor T3 can be connected to the i-th control line CLI. During a sensing period (e.g., a set or predetermined sensing period), the third transistor T3 is turned on by a control signal with a gate on-state voltage provided to the i-th control line CLI to electrically connect the j-th sensing line SENj to the first transistor T1.

[0117] The sensing period can be the period used to extract feature information (e.g., the threshold voltage of the first transistor T1) of each of the pixels PXL located in the display area DA.

[0118] One electrode of the storage capacitor Cst can be connected to the first electrode AE ​​of the light-emitting element LD, and its other electrode can be connected to the first node N1. The storage capacitor Cst can be charged with a voltage corresponding to the data signal supplied to the first node N1, and can maintain the charged voltage until the next frame of data signal is provided.

[0119] The light-emitting element (LD) can be an organic light-emitting diode (OLED) comprising a first electrode AE ​​(anode), an emitting layer, and a second electrode CE (cathode). The LD can emit light having one of red, green, and blue hues. However, the invention is not limited thereto. The first electrode AE ​​of the LD can be connected to a first transistor T1, and the second electrode CE can be connected to a second driving power supply VSS via a second power line PL2. The LD can generate light with a certain brightness (e.g., a set or predetermined brightness) in response to the amount of current supplied from the first transistor T1. In this case, the voltage of the first driving power supply VDD can be set higher than the voltage of the second driving power supply VSS, causing current to flow to the LD.

[0120] Meanwhile, the structure of the pixel PXL is not limited to Figure 5A The implementation shown is illustrated. For example, pixel circuits PXC with various currently known structures can be applied to the pixel PXL.

[0121] In the following text, reference will be made to Figure 5B The description includes a pixel PXL having a structure in which multiple light-emitting elements LDs are grown, and in which nitride-based semiconductors are grown.

[0122] Reference Figure 5B The pixel PXL may include a light-emitting unit (EMU) that generates light with a brightness corresponding to the data signal. Additionally, the pixel PXL may optionally include a pixel circuit (PXC) for driving the EMU.

[0123] In some embodiments, the light-emitting unit (EMU) may include a plurality of light-emitting elements (LDs) connected in parallel between a first power line PL1 and a second power line PL2, wherein a first driving power supply VDD is applied to the first power line PL1 and a second driving power supply VSS is applied to the second power line PL2. For example, the EMU may include a first pixel electrode EL1 (also referred to as a "first alignment electrode"), a second pixel electrode EL2 (also referred to as a "second alignment electrode"), and a plurality of light-emitting elements (LDs), wherein the first pixel electrode EL1 is connected to the first driving power supply VDD via a pixel circuit PXC and the first power line PL1, the second pixel electrode EL2 is connected to the second driving power supply VSS via the second power line PL2, and the plurality of light-emitting elements (LDs) are connected in parallel in the same direction between the first pixel electrode EL1 and the second pixel electrode EL2. According to some embodiments, the first pixel electrode EL1 may be an anode, and the second pixel electrode EL2 may be a cathode.

[0124] Each of the light-emitting elements (LDs) may include a first semiconductor layer and a second semiconductor layer formed of different types of semiconductor layers, and an active layer interposed therebetween. For example, each of the light-emitting elements (LDs) may be implemented as a light-emitting stack in which the first semiconductor layer, the active layer, and the second semiconductor layer are sequentially stacked in one direction. Here, one of the first semiconductor layer and the second semiconductor layer may be an N-type semiconductor layer, and the remaining semiconductor layer may be a P-type semiconductor layer.

[0125] Each of the light-emitting elements (LDs) included in the light-emitting unit (EMU) may include one end portion connected to a first driving power supply VDD via a first pixel electrode EL1 and the other end portion connected to a second driving power supply VSS via a second pixel electrode EL2. The first driving power supply VDD and the second driving power supply VSS may have different potentials. For example, the first driving power supply VDD may be set to a high potential power supply, and the second driving power supply VSS may be set to a low potential power supply. In this case, during the light-emitting cycle of pixel PXL, the potential difference between the first driving power supply VDD and the second driving power supply VSS may be set to be equal to or higher than the threshold voltage of the light-emitting element LD.

[0126] As described above, each light-emitting element LD connected in parallel in the same direction (e.g., in the forward direction) between a first pixel electrode EL1 and a second pixel electrode EL2, which are respectively provided with voltages of different potentials, can form each effective light source. These effective light sources can be collected to form the light-emitting unit EMU of pixel PXL.

[0127] The light-emitting element (LD) of the light-emitting unit (EMU) can emit light with a brightness corresponding to the drive current supplied through the corresponding pixel circuit (PXC). For example, during each frame period, the pixel circuit (PXC) can supply the EMU with a drive current corresponding to the grayscale value of the corresponding frame data. The drive current supplied to the EMU can be shunt to flow in each of the light-emitting elements (LDs). Therefore, when each light-emitting element (LD) emits light with a brightness corresponding to the current flowing therein, the EMU can emit light with a brightness corresponding to the drive current.

[0128] In some embodiments, in addition to the light-emitting element LD that forms the corresponding effective light source, the light-emitting unit (EMU) may also include at least one inactive light source, such as a reversed light-emitting element LDr. The reversed light-emitting element LDr is connected in parallel with the light-emitting element LD that forms the effective light source between the first pixel electrode EL1 and the second pixel electrode EL2, but may be connected between the first pixel electrode EL1 and the second pixel electrode EL2 in the opposite direction to the light-emitting element LD. Even when a driving voltage (e.g., a set or predetermined driving voltage) (e.g., a driving voltage in the forward direction) is applied between the first pixel electrode EL1 and the second pixel electrode EL2, the reversed light-emitting element LDr remains inactive, so current does not flow substantially in the reversed light-emitting element LDr.

[0129] Each light-emitting unit (EMU) can be configured to include at least one series stage, which includes multiple light-emitting elements (LDs) connected in parallel with each other. That is, the light-emitting unit (EMU) can be configured to have a hybrid series / parallel structure.

[0130] Because the pixel circuit PXC and the reference Figure 5A The pixel circuit described is the same as that of PXC, so its detailed description will be omitted.

[0131] According to some implementations, the structure of the pixel circuit PXC can be varied. For example, the pixel circuit PXC may additionally include other circuit elements, such as at least one transistor element (e.g., a transistor element for initializing the first node N1 and / or a transistor element for controlling the emission time of the light-emitting element LD), or a boost capacitor for increasing the voltage of the first node N1.

[0132] Figure 6A and Figure 6BA schematic top view of a display device according to some embodiments of the present invention is shown. Figure 7 It shows along Figure 6B The sectional view taken from line II-II', and Figure 8 It shows Figure 7 A schematic cross-sectional view of the first and second display panels in a separated state.

[0133] exist Figures 6A to 8 In this context, the first direction DR1 to the third direction DR3 can refer to the directions indicated by the first direction DR1, the second direction DR2, and the third direction DR3, respectively.

[0134] Reference Figures 6A to 8 According to some embodiments, the display device may include a first display panel DP1 and a second display panel DP2 arranged adjacent to each other in a first direction DR1.

[0135] The first display panel DP1 may include a first substrate SUB1, a first display portion DPP1, and a driver DRP. In the first display panel DP1, the driver DRP can be electrically connected to the first display portion DPP1 through a flexible circuit film COF and a conductive material CM located in a contact hole CH that penetrates the first substrate SUB1.

[0136] The second display panel DP2 may include a second substrate SUB2, a second display portion DPP2, and a driver DRP. In the second display panel DP2, the driver DRP can be electrically connected to the second display portion DPP2 via a flexible circuit film COF and a conductive material CM located in a contact hole CH that penetrates the second substrate SUB2.

[0137] Each of the first substrate SUB1 and the second substrate SUB2 may have a reference... Figures 3A to 4B The substrate SUB described has the same configuration, and each of the first display portion DPP1 and the second display portion DPP2 has the same configuration as the reference. Figures 3A to 4B The configuration of the described display portion DPP is the same. According to some embodiments, each of the first substrate SUB1 and the second substrate SUB2 may include a first surface SF1 and a second surface SF2 facing each other on a third-direction DR3.

[0138] The first substrate SUB1 may include two edges facing each other on the first direction DR1: (1-1) edge ED1_1 and (1-2) edge ED1_2. The first display portion DPP1 may include two edges facing each other on the first direction DR1: (2-1) edge ED2_1 and (2-2) edge ED2_2. When viewed in a plan view, the (1-1) edge ED1_1 and the (2-1) edge ED2_1 may be arranged adjacent to each other, and the (1-2) edge ED1_2 and the (2-2) edge ED2_2 may be arranged adjacent to each other.

[0139] When viewed in plan and sectional views, the (1-1) edge ED1_1 and the (2-1) edge ED2_1 do not coincide with each other and can be spaced apart by a distance (e.g., a set or predetermined distance) d. For example, the (1-1) edge ED1_1 can be arranged to be closer to the central portion of the second display panel DP2 in the first direction DR1 than the (2-1) edge ED2_1. In this case, the first substrate SUB1 can protrude toward the second display panel DP2 in the first direction DR1 relative to the first display portion DPP1. Therefore, the portion of the first surface SF1 of the first substrate SUB1 corresponding to the (1-1) edge ED1_1 can be exposed to the outside.

[0140] When viewed in a planar diagram, edge (1-2) ED1_2 and edge (2-2) ED2_2 do not coincide and can be spaced apart from each other. For example, as Figure 6A As shown, the (1-2)th edge ED1_2 can be arranged further away from the central portion of the second display panel DP2 in the first direction DR1 than the (2-2)th edge ED2_2. However, the invention is not limited thereto. In some embodiments, such as Figure 6B As shown, the (1-2) edge ED1_2 can be arranged to be closer to the central portion of the second display panel DP2 in the first direction DR1 than the (2-2) edge ED2_2. In this case, the (2-2) edge ED2_2 can protrude further outward in the first direction DR1 than the (1-2) edge ED1_2. Therefore, at least one area of ​​the first display portion DPP1 may not overlap with the first substrate SUB1. According to some embodiments, the (1-2) edges ED1_2 and the (2-2) edges ED2_2 may coincide with each other.

[0141] The second substrate SUB2 may include two edges ED3_1 and ED3_2 facing each other in the first direction DR1. The second display portion DPP2 may include two edges ED4_1 and ED4_2 facing each other in the first direction DR1. When viewed in a plan view, the edges ED3_1 and ED4_1 may be arranged adjacent to each other, and the edges ED3_2 and ED4_2 may be arranged adjacent to each other.

[0142] When viewed in plan and sectional views, the (3-1) edge ED3_1 and the (4-1) edge ED4_1 do not coincide with each other and can be spaced apart by a distance (e.g., a set or predetermined distance) d. For example, the (4-1) edge ED4_1 can be arranged to be closer to the central portion of the first display panel DP1 in the first direction DR1 than the (3-1) edge ED3_1. In this case, as Figure 7 and Figure 8 As shown, the second display portion DPP2 may protrude further from the second substrate SUB2 toward the first display panel DP1 in the first direction DR1.

[0143] Furthermore, when viewed in a plan view, edges ED3_2 (3-2) and ED4_2 (4-2) do not overlap and can be spaced apart. For example, edge ED3_2 (3-2) can be arranged further away from the central portion of the first display panel DP1 in the first direction DR1 than edge ED4_2 (4-2). In this case, the second substrate SUB2 can protrude further outward in the first direction DR1 than the second display portion DPP2. Therefore, at least one area of ​​the second substrate SUB2 may not overlap with the second display portion DPP2.

[0144] According to some embodiments, the first boundary line BDL1 and the second boundary line BDL2 extending in the second direction DR2 may be located in the area where the first display panel DP1 and the second display panel DP2 overlap. The first boundary line BDL1 and the second boundary line BDL2 do not coincide with each other and may be spaced apart from each other in the first direction DR1.

[0145] According to some embodiments, the first boundary line BDL1 may correspond to the boundary between the (1-1)th edge ED1_1 and the (3-1)th edge ED3_1. That is, the first boundary line BDL1 may correspond to the boundary (or bonding portion) between the first substrate SUB1 and the second substrate SUB2. In this case, based on the first boundary line BDL1, the first substrate SUB1 and the second substrate SUB2 may be arranged adjacent to each other in the first direction DR1.

[0146] According to some embodiments, the second boundary line BDL2 may correspond to the boundary between the (2-1) edge ED2_1 and the (4-1) edge ED4_1. That is, the second boundary line BDL2 may correspond to the boundary (or joint portion) between the first display portion DPP1 and the second display portion DPP2. In this case, based on the second boundary line BDL2, the first display portion DPP1 and the second display portion DPP2 may be arranged adjacent to each other in the first direction DR1.

[0147] A display device (e.g., a multi-screen display device) can be implemented by combining the first display panel DP1 and the second display panel DP2 described above. In this case, some elements of the second display panel DP2 are located on some elements of the first display panel DP1, allowing the first display panel DP1 and the second display panel DP2 to be combined. As an example, such as Figure 8 As shown, an adhesive material ADH (or bonding material) is applied to the portion of the first surface SF1 of the first substrate SUB1 exposed at the (1-1) edge ED1_1, and a second display portion DPP2 protruding relative to the second substrate SUB2 is located on the adhesive material ADH. A multi-screen display device can then be realized by combining the first display panel DP1 and the second display panel DP2. According to some embodiments, the adhesive material ADH may comprise a transparent and / or opaque resin having adhesive (or bonding) properties, but the invention is not limited thereto.

[0148] A multi-screen display device may include an overlap region OV in which a first display panel DP1 and a second display panel DP2 partially overlap. The overlap region OV may be an area formed between the first display panel DP1 and the second display panel DP2 by arranging a second display portion DPP2 that protrudes relative to a second substrate SUB2 on a first substrate SUB1 that protrudes relative to a first display portion DPP1.

[0149] When viewed in plan and sectional views, the overlapping region OV can be located between the first boundary line BDL1 and the second boundary line BDL2. In the overlapping region OV, the first substrate SUB1 and the second display portion DPP2 can partially overlap. In this case, in the overlapping region OV, the first boundary line BDL1 can be arranged closer to the central portion of the second display panel DP2 in the first direction DR1 than the second boundary line BDL2, and in the overlapping region OV, the second boundary line BDL2 can be arranged closer to the central portion of the first display panel DP1 in the first direction DR1 than the first boundary line BDL1. According to some embodiments, the area (or size) of the overlapping region OV can be equal to or larger than the area (or size) of the pixel region, in which at least one pixel is provided, including each of the first display portion DPP1 and the second display portion DPP2 (see...). Figure 4A The invention is not limited to the "PXL" in the text.

[0150] A first display panel DP1, including a first substrate SUB1 and a first display portion DPP1, can be arranged to be joined (e.g., mechanically connected to the second display panel DP2), including a second substrate SUB2 and a second display portion DPP2, on a first direction DR1, to realize a single multi-screen display device. As described above, when the second display portion DPP2 of the second display panel DP2 is located on at least a portion of the first substrate SUB1 of the first display panel DP1, the first display portion DPP1 and the second display portion DPP2 can be formed continuously on the first direction DR1. In this case, an image can be displayed even in the overlap region OV where the first substrate SUB1 and the second display portion DPP2 overlap. Therefore, the non-display area NDA between the first display panel DP1 and the second display panel DP2 can be minimized or substantially eliminated. Furthermore, for example, because the first boundary line BDL1 is located below the second display portion DPP2, the boundary area between the first display panel DP1 and the second display panel DP2 can be prevented or reduced. Specifically, the seam area corresponding to the bonding portion between the first substrate SUB1 and the second substrate SUB2 can be prevented or reduced from being observed, allowing a more natural image to be displayed uniformly in the boundary area (or an image with relatively reduced visibility of the seam between the display panels). Therefore, according to some embodiments of the present invention, the discontinuity of the image displayed on the screen of a multi-screen display device can be reduced, and a more natural screen can be formed.

[0151] Figures 9 to 11 It shows Figure 8 A schematic enlarged view of the region "EA".

[0152] exist Figures 9 to 11The structure of the first display panel DP1 is simplified and illustrated, such as showing each electrode as a single electrode layer and each insulating layer as a single insulating layer, but the invention is not limited thereto.

[0153] According to some embodiments of the present invention, "formed and / or disposed in the same layer" may mean that it is formed in the same process, and "formed and / or disposed in different layers" may mean that it is formed in different processes.

[0154] Furthermore, according to some embodiments of the present invention, the “connection” between two elements can refer to both electrical connection and physical connection.

[0155] Reference Figures 8 to 11 The first display panel DP1 may include a first substrate SUB1 and a first display portion DPP1.

[0156] The first substrate SUB1 may include a display area DA and a non-display area NDA. The first substrate SUB1 may include a first surface SF1 and a second surface SF2 facing each other on the third-direction DR3.

[0157] The first display portion DPP1 may be disposed in the display area DA of the first substrate SUB1 (or the first display panel DP1). The first display portion DPP1 may include a flexible substrate FSUB disposed and / or formed on the first surface SF1 of the substrate SUB, one or more pixels PXL, and a thin film encapsulation layer TFE. According to some embodiments, the pixel PXL may include a pixel circuit layer PCL and a display element layer DPL disposed on the flexible substrate FSUB.

[0158] The pixel circuit layer (PCL) may include a buffer layer (BFL) and pixel circuits disposed on the buffer layer (BFL) (see [link]). Figure 5A and Figure 5B The “PXC” in the text, and the passivation layer PSV set on the pixel circuit PXC.

[0159] A buffer layer (BFL) can be disposed and / or formed on one surface of a flexible substrate (FSUB). The buffer layer (BFL) prevents impurities from diffusing into the transistors (T) included in the pixel circuitry (PXC). The buffer layer (BFL) may include an inorganic insulating film comprising an inorganic material. It may include materials such as silicon nitride (SiN). x ), silicon oxide (SiO) x ), silicon nitride oxide (SiO) x N y ) and aluminum oxide (AlO) xAt least one of the metal oxides of the substrate SUB. The buffer layer BFL can be a single film, or it can be multiple films having two or more layers. When the buffer layer BFL is multiple films, each layer can be made of the same material or different materials. Depending on the material of the substrate SUB, the process conditions, etc., the buffer layer BFL may be omitted.

[0160] Transistor T may include a driving transistor Tdr for controlling the driving current of the light-emitting element LD and a switching transistor connected to the driving transistor Tdr. However, the invention is not limited thereto, and in addition to the driving transistor Tdr and the switching transistor, the pixel circuit PXC may also include circuit elements performing other functions. According to some embodiments, the driving transistor Tdr and the switching transistor are collectively referred to as one transistor T or multiple transistors T. Here, the driving transistor Tdr may have the same characteristics as referenced... Figure 5A and Figure 5B The first transistor T1 described has the same configuration, and the switching transistor may have the same configuration as the reference transistor. Figure 5A and Figure 5B The second transistor T2 is described with the same configuration. The driving transistor Tdr and the switching transistor can have substantially similar or identical structures. Therefore, the description of the driving transistor Tdr will be used instead of the description of the switching transistor.

[0161] The driving transistor Tdr may include a semiconductor pattern SCL, a gate electrode GE, a first terminal ET1, and a second terminal ET2. The first terminal ET1 may be one of the source electrode and the drain electrode, and the second terminal ET2 may be the remaining electrode. For example, when the first terminal ET1 is the source electrode, the second terminal ET2 may be the drain electrode.

[0162] A semiconductor pattern SCL can be disposed and / or formed on a buffer layer BFL. The semiconductor pattern SCL may include a first contact region contacting a first terminal ET1 and a second contact region contacting a second terminal ET2. The region located between the first and second contact regions and overlapping with the gate electrode GE can be the channel region of the driving transistor Tdr. The semiconductor pattern SCL can be a semiconductor pattern made of polycrystalline silicon, amorphous silicon, oxide semiconductor, etc. For example, the channel region (which is an undoped semiconductor pattern) can be an intrinsic semiconductor. The first and second contact regions can be doped semiconductor patterns.

[0163] The gate electrode GE can be disposed and / or formed on the gate insulating layer GI as a channel region corresponding to the semiconductor pattern SCL. The gate electrode GE can be disposed on the gate insulating layer GI to overlap with the channel region of the semiconductor pattern SCL. The gate electrode GE can be formed as a single film structure having a single or mixture of copper (Cu), molybdenum (Mo), tungsten (W), neodymium (Nd), titanium (Ti), aluminum (Al), silver (Ag) and their alloys (such as aluminum-neodymium (AlNd)), or, in order to reduce wiring resistance, it can be formed as a double or multi-film structure having molybdenum (Mo), titanium (Ti), copper (Cu), aluminum (Al), or silver (Ag) (which are low-resistance materials).

[0164] The gate insulating layer GI can be an inorganic insulating film comprising inorganic materials. For example, the gate insulating layer GI may include silicon nitride (SiN). x ), silicon oxide (SiO) x ), silicon nitride oxide (SiO) x N y ) and aluminum oxide (AlO) x At least one of the metal oxides of ). However, the material of the gate insulating layer GI is not limited to the embodiments described above. In some embodiments, the gate insulating layer GI may be formed as an organic insulating film comprising an organic material. The gate insulating layer GI may be a single film or may be multiple films having two or more layers.

[0165] Each of the first terminal ET1 and the second terminal ET2 may be disposed and / or formed on the interlayer insulating layer ILD, and may contact the first contact region and the second contact region of the semiconductor pattern SCL through contact holes sequentially passing through the gate insulating layer GI and the interlayer insulating layer ILD. For example, the first terminal ET1 may contact the first contact region of the semiconductor pattern SCL, and the second terminal ET2 may contact the second contact region of the semiconductor pattern SCL. Each of the first terminal ET1 and the second terminal ET2 may include the same material as the gate electrode GE, or may include one or more materials selected from the constituent materials exemplified as the gate electrode GE.

[0166] The interlayer insulating layer (ILD) may include the same material as the gate insulating layer (GI), or may include one or more materials selected from the constituent materials exemplified as the gate insulating layer (GI). The interlayer insulating layer (ILD) may be a single film, or may be multiple films having two or more layers.

[0167] According to some embodiments, the first terminal ET1 and the second terminal ET2 of transistor T are described as being electrically connected to separate electrodes of semiconductor pattern SCL through contact holes that sequentially penetrate the gate insulating layer GI and the interlayer insulating layer ILD; however, the invention is not limited thereto. In some embodiments, the first terminal ET1 of transistor T may be a first contact region adjacent to the channel region of the corresponding semiconductor pattern SCL, and the second terminal ET2 of transistor T may be a second contact region adjacent to the channel region of the corresponding semiconductor pattern SCL. In this case, the second terminal ET2 of transistor T may be electrically connected to the light-emitting element LD of the corresponding pixel PXL through a separate connection member (such as a bridging electrode).

[0168] According to some embodiments of the present invention, transistor T can be configured as a low-temperature polycrystalline silicon thin-film transistor (LTPSTFT), but the present invention is not limited thereto. In some embodiments, transistor T can be configured as an oxide semiconductor thin-film transistor. Furthermore, according to some embodiments, the case where transistor T is a thin-film transistor with a top-gate structure is described as an example, but the present invention is not limited thereto, and the structure of transistor T can be varied.

[0169] A passivation layer PSV can be set and / or formed on the pixel circuit PXC, which includes the driving transistor Tdr.

[0170] The passivation layer PSV may include an organic insulating film, an inorganic insulating film, or an organic insulating layer located on an inorganic insulating film. The inorganic insulating film may include, for example, silicon nitride (SiN). x ), silicon oxide (SiO) x ), silicon nitride oxide (SiO) x N y ) and aluminum oxide (AlO) x The organic insulating film may be at least one of the following metal oxides: polyacrylate resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, unsaturated polyester resin, polyphenylene ether resin, polyphenylene sulfide resin, and benzocyclobutene resin.

[0171] The passivation layer PSV can be partially opened to expose a portion of the second terminal ET2 of the driving transistor Tdr.

[0172] Display element layer DPL can be set and / or formed on passivation layer PSV.

[0173] The display element layer (DPL) may include a light-emitting element (LD) disposed on a passivation layer (PSV) and emitting light. The LD may include a first electrode (AE) and a second electrode (CE), and an emission layer (EML) disposed between the two electrodes (AE and CE). In this case, one of the first electrode (AE) and the second electrode (CE) may be an anode, and the other may be a cathode. When the LD is a top-emitting organic light-emitting diode (OLED), the first electrode (AE) may be a reflective electrode, and the second electrode (CE) may be a transmissive electrode. According to some embodiments, the case where the LD is a top-emitting OLED and the first electrode (AE) is an anode will be described as an example.

[0174] The first electrode AE ​​can be electrically connected to the second terminal ET2 of the driving transistor Tdr through a contact hole penetrating the passivation layer PSV. The first electrode AE ​​may include a reflective film capable of reflecting light or a transparent conductive film located above or below the reflective film. For example, the first electrode AE ​​may be formed as multiple films, including a lower transparent conductive film made of indium tin oxide (ITO), a reflective film made of Ag disposed on the lower transparent conductive film, and an upper transparent conductive film made of indium tin oxide (ITO) disposed on the reflective film. At least one of the transparent conductive film and the reflective film can be electrically connected to the second terminal ET2 of the driving transistor Tdr.

[0175] The display element layer DPL may also include a dam BNK having an opening that exposes a portion of the first electrode AE ​​(e.g., the upper surface of the first electrode AE). The dam BNK may have a structure defining a pixel region or light-emitting region (or isolating said pixel region or light-emitting region) for each pixel PXL and adjacent pixels, and may, for example, be a pixel defining film. The dam BNK may comprise an inorganic insulating film containing inorganic materials or an organic insulating film containing organic materials. For example, the dam BNK may be formed as an organic insulating film made of acrylic resin, epoxy resin, phenolic resin, polyamide resin, polyimide resin, etc. However, the material of the dam BNK is not limited to the examples described above.

[0176] The emitter layer EML can be located in the region corresponding to the opening of the embankment BNK. For example, the emitter layer EML can be located on an exposed surface of the first electrode AE. The emitter layer EML can have a multilayer thin film structure including at least a light-generating layer. The emitter layer EML can include: a hole injection layer for injecting holes; a hole transport layer for increasing the recombination chance between holes and electrons by having excellent hole transport and blocking the movement of unbound electrons in the light-generating layer; a light-generating layer for emitting light by recombination of injected electrons and holes; a hole blocking layer for blocking the movement of unbound holes in the light-generating layer; an electron transport layer for smoothly transporting electrons to the light-generating layer; and an electron injection layer for injecting electrons.

[0177] The light generated by the light-generating layer can be one of red, green, blue, and white, but is not limited to these. For example, the light generated by the light-generating layer of the emission layer (EML) can be one of magenta, cyan, and yellow. The hole injection layer, hole transport layer, hole blocking layer, electron transport layer, and electron injection layer can be a common film connected to adjacent light-emitting regions.

[0178] The second electrode CE can be disposed and / or formed on the emitter layer EML.

[0179] The second electrode CE may be a common film disposed in pixel PXL and adjacent pixels, but the present invention is not limited thereto. The second electrode CE is a transmission electrode and may comprise a transparent conductive material (or substance). The transparent conductive material (or substance) may comprise conductive oxides (such as indium tin oxide (ITO), indium zinc oxide (IZO), zinc oxide (ZnO), indium gallium zinc oxide (IGZO), and indium tin zinc oxide (ITZO)) and conductive polymers (such as poly(3,4-ethylenedioxythiophene) (PEDOT)).

[0180] A thin-film encapsulation layer TFE can be disposed and / or formed on the second electrode CE.

[0181] The thin-film encapsulation layer TFE can be formed as a single film, or it can be formed as multiple films. The thin-film encapsulation layer TFE may include multiple insulating films covering the light-emitting element LD. Specifically, the thin-film encapsulation layer TFE may include at least one inorganic film and at least one organic film. For example, the thin-film encapsulation layer TFE may have a structure in which inorganic and organic films are alternately stacked. In some embodiments, the thin-film encapsulation layer TFE may be an encapsulation substrate located on the light-emitting element LD and bonded to the substrate SUB by a sealant.

[0182] The thin-film encapsulation layer (TFE) may include a first encapsulation layer (ENC1) to a third encapsulation layer (ENC3). The first encapsulation layer (ENC1) is disposed on and / or formed on the display element layer (DPL) and may be arranged to overlap at least a portion of the display area (DA) and the non-display area (NDA). The second encapsulation layer (ENC2) is disposed on and / or formed on the first encapsulation layer (ENC1) and may be arranged to overlap at least a portion of the display area (DA) and the non-display area (NDA). The third encapsulation layer (ENC3) is disposed on and / or formed on the second encapsulation layer (ENC2) and may be arranged to overlap at least a portion of the display area (DA) and the non-display area (NDA). In some embodiments, the third encapsulation layer (ENC3) may be arranged to completely overlap the display area (DA) and the non-display area (NDA). According to some embodiments of the invention, the first encapsulation layer (ENC1) and the third encapsulation layer (ENC3) may be formed of an inorganic film comprising inorganic materials, and the second encapsulation layer (ENC2) may be formed of an organic layer comprising organic materials.

[0183] According to some embodiments, the display element layer DPL has been described by way of example as including a light-emitting element LD composed of a top-emitting organic light-emitting diode including a first electrode AE, an emission layer EML, and a second electrode CE, but the present invention is not limited thereto.

[0184] In some implementations, such as Figure 10 As shown, the display element layer DPL may include one or more ultra-small inorganic light-emitting elements (LDs) ranging from nanometer to micrometer scale, formed as a structure in which a nitride-based semiconductor is grown. In this case, the display element layer DPL may include a dam pattern BNKP, a dam BNK, a first pixel electrode EL1 and a second pixel electrode EL2, a first contact electrode CNE1 and a second contact electrode CNE2, and a first insulating layer INS1 and a second insulating layer INS2. Here, the light-emitting element LD may have the same characteristics as the referenced element. Figure 5B Each of the described light-emitting elements (LDs) has the same configuration, and each of the multiple light-emitting elements (LDs) can be replaced.

[0185] The dam pattern BNKP can be disposed and / or formed on the passivation layer PSV and can be located in the light-emitting region from which light is emitted from the pixel PXL. The dam pattern BNKP can support each of the first pixel electrode EL1 and the second pixel electrode EL2 to alter the surface profile (or shape) of each of the first pixel electrode EL1 and the second pixel electrode EL2 to guide light emitted from the light-emitting element LD in the image display direction of the first display panel DP1. The dam pattern BNKP can include an inorganic insulating film comprising inorganic materials or an organic insulating film comprising organic materials. In some embodiments, the dam pattern BNKP can include a single organic insulating film and / or a single inorganic insulating film, but the invention is not limited thereto. In some embodiments, the dam pattern BNKP can be configured as a multilayer structure in which one or more organic insulating films and one or more inorganic insulating films are stacked. However, the material of the dam pattern BNKP is not limited to the examples described above, and in some embodiments, the dam pattern BNKP can include a conductive material. According to some embodiments, the dam pattern BNKP can include a transparent material (or substance). Transparent materials may include, for example, polyamide resins, polyimide resins, etc., but the present invention is not limited thereto.

[0186] A dam-like barrier (BNK) may surround at least one side of the peripheral region of pixel PXL (e.g., a non-light-emitting region in which no light is emitted). The BNK may be a pixel-defining film or dam structure defining a light-emitting region, which the light-emitting element (LD) will be provided to the light-emitting region during the provision of the LD to pixel PXL. For example, when the light-emitting region of pixel PXL is isolated by the BNK, a mixture of light-emitting element LDs of a target amount and / or type (e.g., ink) may be provided to (or injected into) the light-emitting region. The BNK may be configured to include at least one light-blocking material and / or reflective material to prevent light leakage defects between pixel PXL and adjacent pixels. In some embodiments, the BNK may include a transparent material (or substance). Transparent materials may include, for example, polyamide resins, polyimide resins, etc., but the invention is not limited thereto. According to some embodiments, a reflective material layer may be separately disposed and / or formed on the BNK to further improve the efficiency of light emitted from pixel PXL.

[0187] According to some implementation methods, the embankment BNK can have the same characteristics as the reference. Figure 9 The embankment BNK described has the same configuration.

[0188] Each of the first pixel electrode EL1 and the second pixel electrode EL2 may be disposed and / or formed on the embankment pattern BNKP to have a surface profile corresponding to the shape of the embankment pattern BNKP. Each of the first pixel electrode EL1 and the second pixel electrode EL2 may be made of a material with a constant reflectivity to guide light emitted by the light-emitting element LD in the image display direction of the first display panel DP1. For example, each of the first pixel electrode EL1 and the second pixel electrode EL2 may be made of a conductive material (or substance) with a constant reflectivity. The conductive material (or substance) may include an opaque metal that facilitates the reflection of light emitted by the light-emitting element LD in the image display direction of the first display panel DP1. The opaque metal may include, for example, silver (Ag), magnesium (Mg), aluminum (Al), platinum (Pt), palladium (Pd), gold (Au), nickel (Ni), neodymium (Nd), iridium (Ir), chromium (Cr), titanium (Ti), and alloys thereof. In some embodiments, each of the first pixel electrode EL1 and the second pixel electrode EL2 may include a transparent conductive material (or substance). When the first pixel electrode EL1 and the second pixel electrode EL2 contain a transparent conductive material (or substance), a separate conductive layer made of an opaque metal for reflecting light emitted from the light-emitting element LD in the image display direction of the first display panel DP1 can be added. However, the materials of the first pixel electrode EL1 and the second pixel electrode EL2 are not limited to the above materials.

[0189] Furthermore, each of the first pixel electrode EL1 and the second pixel electrode EL2 may be disposed and / or formed as a single film, but the invention is not limited thereto. In some embodiments, each of the first pixel electrode EL1 and the second pixel electrode EL2 may be disposed and / or formed as multiple films, wherein two or more materials selected from metals, alloys, conductive oxides, and conductive polymers are stacked therein. Each of the first pixel electrode EL1 and the second pixel electrode EL2 may be formed of a multilayer film having two or more layers to minimize distortion caused by signal delay when transmitting signals (or voltages) to the corresponding end portions of the light-emitting element LD.

[0190] The first pixel electrode EL1 can be electrically connected to the second terminal ET2 of the driving transistor Tdr through a contact hole penetrating the passivation layer PSV, and the second pixel electrode EL2 can be electrically connected and / or physically connected to the connection electrode E_CNT located in the non-display area NDA. The first pixel electrode EL1 can be an anode, and the second pixel electrode EL2 can be a cathode. According to some embodiments of the present invention, the first pixel electrode EL1 can have the same characteristics as the referenced electrode. Figure 9 The configuration corresponding to the first electrode AE ​​is described, and the second pixel electrode EL2 may have the same configuration as the reference. Figure 9 The configuration corresponding to the second electrode CE is described.

[0191] The light-emitting element (LD) can be located between the first pixel electrode EL1 and the second pixel electrode EL2, and can be electrically connected to the first pixel electrode EL1 and the second pixel electrode EL2, respectively. The LD can emit either colored light or white light. The LD can be provided in the form of being sputtered into a mixed solution to be sprayed into the pixel PXL. The LD can include a light-emitting stack pattern in which a first semiconductor layer 11, an active layer 12, and a second semiconductor layer 13 are sequentially stacked in one direction (e.g., in the first direction DR1). Furthermore, the LD can include an insulating film surrounding the outer circumferential surface of the light-emitting stack pattern.

[0192] According to some embodiments, the first semiconductor layer 11 may include at least one n-type semiconductor layer. For example, the first semiconductor layer 11 may include a semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may be an n-type semiconductor layer doped with a first conductive dopant (or n-type dopant) such as Si, Ge, Sn, etc. The active layer 12 is located on the first semiconductor layer 11 and may be formed as having a single quantum well or multiple quantum well (MQW) structure. The second semiconductor layer 13 is located on the active layer 12 and may include a semiconductor layer of a different type than that of the first semiconductor layer 11. For example, the second semiconductor layer 13 may include at least one p-type semiconductor layer. For example, the second semiconductor layer 13 may include at least one semiconductor material selected from InAlGaN, GaN, AlGaN, InGaN, AlN, and InN, and may include a p-type semiconductor layer doped with a second conductive dopant (or p-type dopant) such as Mg.

[0193] A light-emitting element (LD) can be disposed and / or formed on a first insulating layer INS1. The first insulating layer INS1 can be disposed and / or formed between each of the first pixel electrode EL1 and the second pixel electrode EL2 and the passivation layer PSV. The first insulating layer INS1 can stably support the light-emitting element LD by filling the space between the light-emitting element LD and the passivation layer PSV. The first insulating layer INS1 may comprise an inorganic insulating film made of inorganic materials or an organic insulating film made of organic materials.

[0194] A second insulating layer INS2 may be disposed on and / or formed on the light-emitting element LD. The second insulating layer INS2 may be disposed on and / or formed on the light-emitting element LD to cover a portion of the upper surface of the light-emitting element LD, and the second insulating layer INS2 may expose a corresponding end portion of the light-emitting element LD to the outside. The second insulating layer INS2 may also secure the light-emitting element LD. When a gap (or space) exists between the first insulating layer INS1 and the light-emitting element LD before the formation of the second insulating layer INS2, the second insulating layer INS2 may be used to fill the gap.

[0195] A first contact electrode CNE1 may be disposed and / or formed on the first pixel electrode EL1 for a stable electrical and / or physical connection between one of the corresponding end portions of the first pixel electrode EL1 and the light-emitting element LD. A second contact electrode CNE2 may be disposed and / or formed on the second pixel electrode EL2 for a stable electrical and / or physical connection between the second pixel electrode EL2 and the other of the corresponding end portions of the light-emitting element LD. The first contact electrode CNE1 and the second contact electrode CNE2 may be made of various transparent conductive materials, such that light emitted from the light-emitting element LD and reflected by the first pixel electrode EL1 and the second pixel electrode EL2 travels without loss in the image display direction of the first display panel DP1.

[0196] In some implementations, such as Figure 11 As shown, the display element layer DPL may further include a light conversion pattern layer LCP located on the first contact electrode CNE1 and the second contact electrode CNE2, and a third insulating layer INS3 is inserted between the first contact electrode CNE1, the second contact electrode CNE2 and the light conversion pattern layer LCP.

[0197] The third insulating layer INS3 can be an inorganic insulating film comprising inorganic materials or an organic insulating film comprising organic materials. For example, the third insulating layer INS3 can have a structure in which at least one inorganic insulating film and at least one organic insulating film are alternately stacked. The third insulating layer INS3 can completely cover the display element layer DPL to prevent moisture or oxygen from the outside from being introduced into the display element layer DPL including the light-emitting element LD. According to some embodiments, the third insulating layer INS3 can be omitted.

[0198] The light conversion pattern layer LCP is disposed and / or formed on the third insulating layer INS3, and the light conversion pattern layer LCP may include a color conversion layer CCL and a color filter CF corresponding to a color (e.g., a set or predetermined color).

[0199] The color conversion layer (CCL) may include color conversion particles (QDs) corresponding to a specific color. The CCL may include color conversion particles (QDs) that convert light emitted from a light-emitting element (LD) located in the pixel region of pixel PXL into light of a specific color. For example, when pixel PXL is a red pixel (or red sub-pixel), the CCL may include color conversion particles (QDs) of red quantum dots that convert light emitted from the LD into red light. As another example, when pixel PXL is a green pixel (or green sub-pixel), the CCL may include color conversion particles (QDs) of green quantum dots that convert light emitted from the LD into green light. As another example, when pixel PXL is a blue pixel (or blue sub-pixel), the CCL may include color conversion particles (QDs) of blue quantum dots that convert light emitted from the LD into blue light. In some implementations, when pixel PXL is a blue pixel (or blue sub-pixel), a light scattering layer including light scattering particles may be provided instead of the CCL including color conversion particles (QDs). For example, when the LD emits blue light, pixel PXL may include a light scattering layer containing light scattering particles. According to some embodiments, the light scattering layer described above can be omitted. According to some embodiments, when pixel PXL is a blue pixel (or a blue sub-pixel), a transparent polymer can be provided instead of the color conversion layer CCL.

[0200] A color filter (CF) can selectively transmit light of a specific color. The color filter (CF) may include a filter material that selectively transmits light of a specific color converted by a color conversion layer (CCL). The color filter (CF) may include a red color filter, a green color filter, and a blue color filter. The aforementioned color filter (CF) can be configured in the pixel region of pixel PXL to correspond to the color conversion layer (CCL).

[0201] A light conversion pattern layer (LCP), including a color conversion layer (CCL) and a color filter (CF), can be located in the luminescent region of pixel PXL. Specifically, the light conversion pattern layer (LCP) can be configured to fill the space surrounded by a dam portion (DAM) located in the peripheral region of pixel PXL. This space is a portion of the pixel region of pixel PXL in which the dam portion (DAM) is disposed, and can correspond to the luminescent region in which light is emitted from the pixel region.

[0202] The dam section DAM can be achieved using the embankment BNK and the light blocking pattern LBP.

[0203] A light-blocking pattern (LBP) is disposed on the embankment (BNK) and may include a light-blocking material that prevents light leakage defects between pixel (PXL) and its adjacent pixels. Furthermore, the light-blocking pattern (LBP) can prevent the mixing of light emitted separately from pixel (PXL) and its adjacent pixels. For example, the light-blocking pattern (LBP) may be a black matrix.

[0204] At the same time, such as Figure 11 As shown, some components included in the first display portion DPP1 may be located in the non-display area NDA. For example, some components of the pixel circuit layer PCL, some components of the display element layer DPL, and the thin film encapsulation layer TFE may be located in the non-display area NDA.

[0205] The wiring portion included in the pixel circuit layer PCL can be located in the non-display area NDA. The wiring portion can include a signal line SDV_SL, which electrically connects the driver DRP located on the second surface SF2 of the first substrate SUB1 and the pixel PXL located in the display area DA. According to some embodiments, the signal line SDV_SL can be a fan-out line. Although not directly shown in the figures, the signal line SDV_SL described above can be electrically connected to the conductive material CM located in the contact hole CH penetrating the first substrate SUB1 to electrically connect the driver DRP and the pixel PXL.

[0206] In addition, a power electrode PWE and a connection electrode E_CNT may be provided in the non-display area NDA, located above the first substrate SUB1.

[0207] Although not directly shown in the accompanying drawings, the power electrode PWE can be electrically connected to the conductive material CM located in the contact hole CH penetrating the first substrate SUB1 to receive a second drive power from the driver DRP (see Figure 1). Figure 5A and Figure 5B (VSS in the text).

[0208] The connection electrode E_CNT can be as follows Figure 9 The ground connection shown is between the power electrode PWE and the second electrode CE of the light-emitting element LD, or it can be as follows: Figure 10 and Figure 11 The ground connection shown is to the power electrode PWE and the second pixel electrode EL2.

[0209] As described above, the first display portion DPP1, comprising the flexible substrate FSUB, pixel circuit layer PCL, display element layer DPL, and thin film encapsulation layer TFE, can be partially removed in the non-display area NDA. Therefore, the first surface SF1 of the first substrate SUB1 can be exposed in the non-display area NDA. In this case, the (2-1) edge ED2_1 of the first display portion DPP1 can be located inside the first direction DR1, relative to the (1-1) edge ED1_1 of the first substrate SUB1. That is, the (1-1) edge ED1_1 of the first substrate SUB1 can further protrude towards the second display panel DP2 in the first direction DR1, relative to the (2-1) edge ED2_1 of the first display portion DPP1.

[0210] The adhesive material ADH (or bonding material) may be located on the exposed portion of the first surface SF1 of the first substrate SUB1. The second display portion DPP2, which protrudes from the second substrate SUB2, may be located on the adhesive material ADH.

[0211] When the second display portion DPP2 of the second display panel DP2 is located on the exposed portion of the first surface SF1 of the first substrate SUB1, the first display portion DPP1 and the second display portion DPP2 are arranged continuously in the first direction DR1, thereby reducing the width and / or area of ​​the non-display area NDA between the first display panel DP1 and the second display panel DP2.

[0212] Figures 12A to 12F This is a schematic top view showing a method of manufacturing a display device according to some embodiments of the present invention. Figure 13A It shows along Figure 12A The sectional view taken from line III-III'. Figure 13B Show along Figure 12B The sectional view taken from line III-III'. Figure 13C It shows along Figure 12C The sectional view taken from line III-III'. Figure 13D It shows along Figure 12D The sectional view taken from line III-III'. Figure 13E It shows along Figure 12E The sectional view taken by line III-III', and Figure 13F It shows along Figure 12F The sectional view taken from line III-III'.

[0213] In the following text, reference will be made to Figures 12A to 12F and combined Figures 13A to 13F Sequential description in Figure 6B and Figure 7 The manufacturing method of the display device shown.

[0214] In this specification, although the manufacturing steps of the display device are described as being performed sequentially according to the top view and sectional view, it is obvious that, unless the spirit of the invention is altered, some steps shown as being performed sequentially are performed simultaneously, the order of the steps is changed, some steps are omitted, or another step is added between the steps.

[0215] Reference Figure 6B , Figure 7 , Figure 12A and Figure 13A A first display portion DPP1 and a second display portion DPP2 are formed on the mother substrate MSUB.

[0216] The master substrate MSUB may include one or more unit regions. A unit region corresponds to a portion of a separate display panel or a separate display device, and a substrate for a separate display panel or a separate display device may be formed for each unit region. For example, the master substrate MSUB may include two unit regions, and one of the two unit regions (hereinafter referred to as the "first unit region") may be the first substrate SUB1 of a first display panel DP1, and the other of the two unit regions (hereinafter referred to as the "second unit region") may be the second substrate SUB2 of a second display panel DP2. In the master substrate MSUB, the first unit region and the second unit region have the same size (or area) and may be arranged in a matrix shape, but this is not limited to embodiments according to the invention. According to some embodiments, the first unit region and the second unit region have different sizes (or areas) in the master substrate MSUB and may be arranged in different forms depending on the size (or area) of the master substrate MSUB.

[0217] The first display portion DPP1 can be located on the first cell region of the mother substrate MSUB, and the second display portion DPP2 can be located on the second cell region of the mother substrate MSUB.

[0218] The first display portion DPP1 may include a base layer BSL, a first pixel block PXL_B1 comprising multiple pixels PXL, and a thin-film encapsulation layer TFE. The second display portion DPP2 may include a base layer BSL, a second pixel block PXL_B2 comprising multiple pixels PXL, and a thin-film encapsulation layer TFE. The base layer BSL and the thin-film encapsulation layer TFE may be common layers provided to both the first display portion DPP1 and the second display portion DPP2. The base layer BSL may be formed of flexible polyimide. The thin-film encapsulation layer TFE may be disposed on the first pixel block PXL_B1 and the second pixel block PXL_B2 to protect the pixels PXL included in the respective pixel blocks.

[0219] The base layer BSL and the thin-film encapsulation layer TFE can be located on the mother substrate MSUB in the area between the first display portion DPP1 and the second display portion DPP2.

[0220] Reference Figure 6B , Figure 7 , Figure 12B and Figure 13B Laser cutting and scribing processes are performed to remove a portion of the mother substrate MSUB, thereby forming separate first unit UNT1 and second unit UNT2. Common layers (e.g., base layer BSL and thin-film encapsulation layer TFE) located on the portion of the mother substrate MSUB removed in the above process can be removed together.

[0221] According to some embodiments, the first unit UNT1 may include a first substrate SUB1 and a first display portion DPP1 located on the first substrate SUB1. The first display portion DPP1 may include a flexible substrate FSUB located between the first substrate SUB1 and the first pixel block PXL_B1. The flexible substrate FSUB can be formed by removing a portion of the base layer BSL using the process described above. Figure 12B and Figure 13B The image shows the state before the flexible substrate FSUB is fully formed.

[0222] The second unit UNT2 may include a second substrate SUB2 and a second display portion DPP2 located on the second substrate SUB2. The second display portion DPP2 may include a flexible substrate FSUB located between the second substrate SUB2 and the second pixel block PXL_B2. The flexible substrate FSUB can be formed by removing a portion of the base layer BSL through the process described above.

[0223] Reference Figure 6B , Figure 7 , Figure 12C and Figure 13C A laser-based cutting and peeling process is performed to remove portions of the base layer BSL and the thin-film encapsulation layer TFE that do not overlap with the first pixel block PXL_B1 in the first unit UNT1.

[0224] In the above process, a portion of the first surface SF1 of the first substrate SUB1 can be exposed to the outside. In this case, the (1-1) edge ED1_1 of the first substrate SUB1 can be arranged to be closer to the second unit UNT2 than the (2-1) edge ED2_1 of the first display portion DPP1. Therefore, the first substrate SUB1 can protrude a distance (e.g., a set or predetermined distance) A from the (2-1) edge ED2_1 of the first display portion DPP1 toward the second unit UNT2.

[0225] Reference Figure 6B , Figure 7 , Figure 12D and Figure 13D A portion of the second substrate SUB2 is removed from the second unit UNT2 by performing a stripping and scribing process using a laser. During this process, the lower surface of the second display portion DPP2 may be exposed to the outside. In this case, the (4-1)th edge ED4_1 of the second display portion DPP2 may be arranged closer to the first unit UNT1 than the (3-1)th edge ED3_1 of the second substrate SUB2. Therefore, the second display portion DPP2 may protrude from the (3-1)th edge ED3_1 of the second substrate SUB2 toward the first unit UNT1 by a distance (e.g., a set or predetermined distance) B. According to some embodiments, the distance (e.g., a set or predetermined distance) B may be the same as the distance (e.g., a set or predetermined distance) A by which the first substrate SUB1 protrudes from the first display portion DPP1 toward the second unit UNT2, but the invention is not limited thereto.

[0226] Reference Figure 6B , Figure 7 , Figure 12E and Figure 13E An adhesive material ADH (or bonding material) is applied to an exposed portion of the first surface SF1 of the first substrate SUB1 using methods such as inkjet printing. The adhesive material ADH (or bonding material) may include a transparent and / or opaque resin having adhesive (or bonding properties).

[0227] Reference Figure 6B , Figure 7 , Figure 12F and Figure 13F After the protruding second display portion DPP2 is arranged on the adhesive material ADH, the first unit (see...) is then... Figure 12E (UNT1) and Unit 2 (see Figure 12E The combination of “UNT2” in the text.

[0228] In the above-described assembly process, the (1-1) edge ED1_1 of the first substrate SUB1 and the (3-1) edge ED3_1 of the second substrate SUB2 can be joined together, allowing them to be arranged adjacent to each other, with the first boundary line BDL1 (or the joining portion) interposed between them. Furthermore, in the above-described assembly process, the (2-1) edge ED2_1 of the first display portion DPP1 and the (4-1) edge ED4_1 of the second display portion DPP2 can be joined together, allowing them to be arranged adjacent to each other, with their second boundary line BDL2 (or the joining portion) interposed between them. Therefore, the first display portion DPP1 and the second display portion DPP2 are arranged continuously in the first direction DR1, minimizing the non-display area NDA between the first display panel DP1 and the second display panel DP2.

[0229] The first unit UNT1 described above can be a first display panel DP1, and the second unit UNT2 described above can be a second display panel DP2. The first display panel DP1 and the second display panel DP2 can be combined to realize a display device, such as a multi-screen display device.

[0230] Figure 14A A schematic top view of a display device according to some embodiments of the present invention is shown. Figure 14B It shows along Figure 14A The sectional view taken by line IV-IV', and Figure 14C It shows Figure 14B A schematic cross-sectional view showing the first and second display panels separated.

[0231] about Figures 14A to 14C The display device described herein will primarily differ from the embodiments described above to avoid repetition. Components not specifically described in this invention refer to the embodiments described above; the same reference numerals denote the same component, and similar reference numerals denote similar component.

[0232] Reference Figures 14A to 14C According to some embodiments, the display device may include a first display panel DP1 and a second display panel DP2 arranged adjacent to each other in a first direction DR1.

[0233] The first display panel DP1 may include a first substrate SUB1, a first display portion DPP1, and a driver DRP. The driver DRP may be electrically connected to the first display portion DPP1 via a flexible circuit film COF and a conductive material CM disposed in a contact hole CH penetrating the first substrate SUB1.

[0234] The first substrate SUB1 may include two edges ED1_1 and ED1_2 facing each other on the first direction DR1. Furthermore, the first substrate SUB1 may include a first surface SF1 and a second surface SF2 facing each other on the third direction DR3.

[0235] The first display portion DPP1 may include a (2-1) edge ED2_1 and a (2-2) edge ED2_2 facing each other in the first direction DR1. When viewed in a plan view, the (2-1) edge ED2_1 may be arranged adjacent to the (1-1) edge ED1_1, and the (2-2) edge ED2_2 may be arranged adjacent to the (1-2) edge ED1_2.

[0236] When viewed in plan and sectional views, the (1-1) edge ED1_1 and the (2-1) edge ED2_1 do not coincide with each other and can be spaced apart by a distance (e.g., a set or predetermined distance) d. For example, the (2-1) edge ED2_1 can be arranged to be closer to the central portion of the second display panel DP2 in the first direction DR1 than the (1-1) edge ED1_1. In this case, in the plan view, the first display portion DPP1 can protrude toward the second display panel DP2 in the first direction DR1 relative to the first substrate SUB1.

[0237] When viewed in a plan view, the (1-2) edges ED1_2 and (2-2) edges ED2_2 do not overlap and can be spaced apart from each other. For example, the (1-2) edges ED1_2 can be arranged to be further away from the central portion of the second display panel DP2 in the first direction DR1 than the (2-2) edges ED2_2, but the invention is not limited thereto.

[0238] The second display panel DP2 may include a second substrate SUB2, a second display portion DPP2, and a driver DRP2. The driver DRP2 may be electrically connected to the second display portion DPP2 via a flexible circuit film COF and a conductive material CM disposed in a contact hole CH penetrating the second substrate SUB2.

[0239] The second substrate SUB2 may include two edges ED3_1 and ED3_2 facing each other on the first direction DR1. The second substrate SUB2 may include a first surface SF1 and a second surface SF2 facing each other on the third direction DR3.

[0240] The second display portion DPP2 may include a (4-1) edge ED4_1 and a (4-2) edge ED4_2 facing each other in the first direction DR1. When viewed in a plan view, the (3-1) edge ED3_1 may be arranged adjacent to the (4-1) edge ED4_1, and the (4-2) edge ED4_2 may be arranged adjacent to the (3-2) edge ED3_2.

[0241] When viewed in plan and sectional views, edges ED3_1 (3-1) and ED4_1 (4-1) do not coincide and can be spaced apart by a distance (e.g., a set or predetermined distance) d. As an example, edge ED3_1 (3-1) can be arranged to be closer to the central portion of the first display panel DP1 in the first direction DR1 than edge ED4_1 (4-1). In this case, in the sectional view, the second substrate SUB2 can protrude towards the second display panel DP2 in the first direction DR1 compared to the second display portion DPP2. Therefore, the portion of the first surface SF1 of the second substrate SUB2 corresponding to edge ED3_1 (3-1) can be exposed to the outside.

[0242] When viewed in a plan view, the (3-2) edge ED3_2 and the (4-2) edge ED4_2 do not overlap and can be spaced apart from each other. For example, the (4-2) edge ED4_2 can be arranged to be further away from the central portion of the first display panel DP1 in the first direction DR1 than the (3-2) edge ED3_2, but the invention is not limited thereto.

[0243] The first boundary line BDL1 and the second boundary line BDL2 extending in the second direction DR2 can be arranged in the area where the first display panel DP1 and the second display panel DP2 overlap. The first boundary line BDL1 and the second boundary line BDL2 do not coincide with each other and can be spaced apart from each other in the first direction DR1. For example, the first boundary line BDL1 can be arranged closer to the central portion of the first display panel DP1 than the second boundary line BDL2, and the second boundary line BDL2 can be arranged closer to the central portion of the second display panel DP2 than the first boundary line BDL1.

[0244] The first boundary line BDL1 may correspond to the boundary between edge ED1_1 (1-1) and edge ED3_1 (3-1). That is, the first boundary line BDL1 may correspond to the boundary (or bonding portion) between the first substrate SUB1 and the second substrate SUB2. The second boundary line BDL2 may correspond to the boundary between edge ED2_1 (2-1) and edge ED4_1 (4-1). That is, the second boundary line BDL2 may correspond to the boundary (or bonding portion) between the first display portion DPP1 and the second display portion DPP2. According to some embodiments, when viewed in a cross-sectional view, the first boundary line BDL1 may overlap with some components of the first display panel DP1, for example, with the first display portion DPP1. Furthermore, when viewed in a cross-sectional view, the second boundary line BDL2 may overlap with some components of the second display panel DP2, for example, with the second substrate SUB2.

[0245] The first display panel DP1 and the second display panel DP2 described above can be combined to realize a display device, such as a multi-screen display device. In this case, some elements of the first display panel DP1 are arranged on some elements of the second display panel DP2, so that the first display panel DP1 and the second display panel DP2 can be combined. As an example, such as Figure 14C As shown, an adhesive material ADH (or bonding material) is applied to the portion of the first surface SF1 of the second substrate SUB2 exposed at the (3-1) edge ED3_1, and a first display portion DPP1 protruding from the first substrate SUB1 is arranged on the adhesive material ADH. A multi-screen display device can then be realized by combining the first display panel DP1 and the second display panel DP2.

[0246] A multi-screen display device may include an overlap region OV in which a first display panel DP1 and a second display panel DP2 partially overlap. The overlap region OV may be an area formed between the first display panel DP1 and the second display panel DP2 by arranging a first display portion DPP1, which protrudes relative to a first substrate SUB1, on a second substrate SUB2, which protrudes relative to a second display portion DPP2. In the overlap region OV, a second boundary line BDL2 may be arranged closer to the central portion of the second display panel DP2 in the first direction DR1 than the first boundary line BDL1. Furthermore, in the overlap region OV, the first boundary line BDL1 may be arranged closer to the central portion of the first display panel DP1 in the first direction DR1 than the second boundary line BDL2.

[0247] A first display panel DP1, including a first substrate SUB1 and a first display portion DPP1, can be arranged to bond with a second display panel DP2, including a second substrate SUB2 and a second display portion DPP2, along a first direction DR1 to realize a single multi-screen display device. As described above, when the first display portion DPP1 of the first display panel DP1 is located on the second substrate SUB2 of the second display panel DP2, the first display portion DPP1 and the second display portion DPP2 can be arranged continuously along the first direction DR1. In this case, the non-display area NDA between the first display panel DP1 and the second display panel DP2 can be minimized or substantially eliminated. Furthermore, for example, because the first boundary line BDL1 is arranged below the first display portion DPP1, the seam area corresponding to the bonding portion between the first substrate SUB1 and the second substrate SUB2 can be prevented or reduced from being observed, allowing for a more natural image to be displayed uniformly in the boundary area.

[0248] Figure 15A It shows along Figure 14AA cross-sectional view of a display device according to some embodiments of the present invention, taken along line IV-IV', and Figure 15B It shows Figure 15A The display device is in a folded state, and it shows the state along the fold. Figure 14A A sectional view taken from line IV-IV'.

[0249] In addition to placing the additional material ADM between the first substrate SUB1 and the second substrate SUB2 Figure 15A and Figure 15B The display device shown can have the same Figures 14A to 14C The display devices shown are configured in essentially the same or similar ways.

[0250] Therefore, regarding Figure 15A and Figure 15B The display device will be described in detail in light of the differences from the embodiments described above, in order to avoid repetition.

[0251] Reference Figure 15A and Figure 15B According to some embodiments, the display device may include a first display panel DP1 and a second display panel DP2 arranged adjacent to each other in a first direction DR1.

[0252] The display device described above can be a multi-screen display device that is realized by arranging a first display portion DPP1 of a first display panel DP1 on a second substrate SUB2 of a second display panel DP2, and then combining the first display panel DP1 and the second display panel DP2.

[0253] The first display portion DPP1 of the first display panel DP1 and the second display portion DPP2 of the second display panel DP2 can be arranged continuously in the first direction DR1, and a second boundary line BDL2 is interposed between the first display portion DPP1 and the second display portion DPP2. When viewed in a cross-sectional view, the second boundary line BDL2 can overlap with some components of the second display panel DP2, for example, with the second substrate SUB2.

[0254] According to some embodiments, the (1-1) edge ED1_1 of the first substrate SUB1 of the first display panel DP1 may be spaced apart from the (3-1) edge ED3_1 of the second substrate SUB2 of the second display panel DP2 by a certain distance (e.g., a set or predetermined distance) on the first direction DR1. In some embodiments, an additional material ADM may be disposed and / or formed between the (1-1) edge ED1_1 and the (3-1) edge ED3_1 spaced apart on the first direction DR1.

[0255] The additive material ADM may include a flexible resin. For example, the additive material ADM may be configured as a film containing, but is not limited to, one of polyester-based polymers, silicon-based polymers, acryloyl-based polymers, polyolefin-based polymers, and copolymers thereof. The additive material ADM may be printed between the first substrate SUB1 and the second substrate SUB2 by inkjet printing or the like.

[0256] According to some embodiments, the thickness of the supplementary material ADM on the third-direction DR3 may be the same as the thickness of each of the first substrate SUB1 and the second substrate SUB2 on the third-direction DR3, but the invention is not limited thereto. In some embodiments, the thickness of the supplementary material ADM on the third-direction DR3 may be different from the thickness of the first substrate SUB1 and the second substrate SUB2 on the third-direction DR3. For example, the thickness of the supplementary material ADM on the third-direction DR3 may be thinner or thicker than the thickness of the first substrate SUB1 and the second substrate SUB2 on the third-direction DR3. Furthermore, the area (or size) of the supplementary material ADM may be equal to or larger than the area of ​​at least one pixel disposed therein, including each of the first display portion DPP1 and the second display portion DPP2 (see [link to relevant documentation]). Figure 4A The area (or size) of the pixel region ("PXL") in the text is not limited thereto.

[0257] When the flexible additional material ADM is located between the first substrate SUB1 and the second substrate SUB2, the area where the additional material ADM is located can be folded to realize a foldable display device. In embodiments of the present invention, terms such as "foldable" mean that the shape is not fixed, but that its original shape can be changed into other shapes, and that it may include a structure in which specific areas can be folded, bent, or rolled up. For convenience, Figure 15B The illustration shows a first display portion DPP1 and a second display portion DPP2 folded together facing each other. However, the invention is not limited to this. According to some embodiments, the first display portion DPP1 and the second display portion DPP2 can be folded at a certain angle (e.g., a set or predetermined angle) (e.g., an acute angle, a right angle, or an obtuse angle), and the additional material ADM is placed between the first display portion DPP1 and the second display portion DPP2.

[0258] Although some aspects of certain embodiments of the invention have been shown and described with reference to specific embodiments thereof, those skilled in the art will understand that various changes in form and detail may be made without departing from the spirit and scope of the embodiments of the invention as defined by the appended claims and their equivalents.

[0259] Therefore, the technical scope of the embodiments according to this disclosure can be determined by the appended claims and their equivalents.

Claims

1. A display device, comprising: The first display panel and the second display panel are adjacent to each other along one direction. in: Each of the first display panel and the second display panel includes a substrate and a display portion on the substrate that includes a plurality of pixels; Each of the pixels includes a pixel circuit layer and a display element layer, the pixel circuit layer being on the substrate and including at least one transistor, and the display element layer being on the pixel circuit layer and including at least one light-emitting element that emits light; The substrate of the first display panel and the substrate of the second display panel each include a first surface and a second surface that are opposite each other, and are joined together in plan view and cross-sectional view; The display portions of the first display panel and the display portions of the second display panel are joined together in the plan view and the sectional view; The first surfaces of the substrate of the first display panel and the substrate of the second display panel are coplanar with each other; The second surfaces of the substrate of the first display panel and the substrate of the second display panel are coplanar; and The first boundary between the substrate of the first display panel and the substrate of the second display panel and the second boundary between the display portion of the first display panel and the display portion of the second display panel are spaced apart from each other in one direction.

2. The display device according to claim 1, further comprising: The overlapping portion, in which the first display panel and the second display panel overlap; In the plan view and the sectional view, the overlapping portion is between the first boundary and the second boundary.

3. The display device according to claim 2, wherein, The display portion also includes a flexible substrate between the first surface of the substrate and the plurality of pixels.

4. The display device according to claim 3, wherein, At least a portion of the display portion of one of the first display panels and the second display panel is on the first surface of the substrate of the other of the first display panel and the second display panel in the overlapping portion.

5. The display device according to claim 4, wherein, At least a portion of the display portion of the second display panel is on the first surface of the substrate of the first display panel in the overlapping portion.

6. The display device of claim 5, further comprising an adhesive layer on the first surface of the substrate of the first display panel in the overlapping portion. in, At least a portion of the display portion of the second display panel is on the adhesive layer.

7. The display device according to claim 5, wherein, In the plan view and the sectional view, the first boundary overlaps with the display portion of the second display panel, and In the plan view and the cross-sectional view, the second boundary overlaps with the substrate of the first display panel.

8. The display device according to claim 7, wherein, In the cross-sectional view, the first boundary is below the display portion of the second display panel.

9. The display device according to claim 5, wherein, Between the first display panel and the second display panel, the edge of the substrate of the first display panel protrudes in the direction toward the second display panel compared to the edge of the display portion of the first display panel.

10. The display device according to claim 9, wherein, Between the first display panel and the second display panel, the edge of the display portion of the second display panel protrudes in the direction toward the first display panel compared to the edge of the substrate of the second display panel.

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