A process for processing SiC wafers using a carrier

Abstract

The present invention belongs to the field of semiconductor processing, and discloses a process for processing SiC wafers using a carrier plate, which specifically includes the following steps: S1. After completing the front-end front-side process, the front side is bonded to a glass carrier plate, and after the back side is thinned, ion implantation and metal process on the back side of the SiC substrate are completed; S2. A carrier plate is buckled upside down above the back side of the substrate, and after the whole is flipped, SOG is spin-coated to form a sealing layer, and the glass carrier plate is removed by debonding; S3. After high-temperature tempering is completed, LID window opening and filling of contact holes are performed on the front side after taking out; S4. Polyimide is coated, and after exposure, development, and etching of the polyimide, a metal PAD is coated; S5. After wafer dicing is completed, the polyimide on the outer circle of the wafer is removed; S6. The wafer is attached to a dicing mold frame, and after flipping, the carrier plate is removed to complete wafer dicing. The present invention uses a carrier plate to carry a silicon carbide substrate for high-temperature processes, overcomes the limitation of the temperature on the glass carrier plate in the high-temperature process of the silicon carbide substrate, and can safely and effectively perform high-temperature tempering of the silicon carbide substrate.

Description

Technical Field

[0001] The present invention relates to the field of semiconductor processing, and specifically to a process for processing SiC wafers using a carrier plate. Background Art

[0002] Semiconductor materials can be divided into two categories: elemental semiconductors and compound semiconductors. The former includes semiconductors formed by silicon (Si), germanium (Ge), etc., and the latter is formed by compounds such as gallium arsenide (GaAs), gallium nitride (GaN), and silicon carbide (SiC). Semiconductors have mainly undergone three generations of changes in the past. As a representative of the third-generation semiconductor, silicon carbide (SiC) semiconductor has much better high-frequency and high-temperature performance than the first-generation semiconductor, but the manufacturing cost is higher, so it can be described as a new upstart in the semiconductor field.

[0003] At present, there are many difficulties in the production and manufacturing of silicon carbide semiconductors. First, the temperature required for the high-temperature process of silicon carbide materials is relatively high, and the conventional glass carrier plate process cannot meet the requirements. High-temperature treatment will cause the adhesive to decompose, resulting in the glass carrier plate falling off and unable to effectively support the silicon carbide wafer. Second, in the latter stage of the manufacturing process of silicon carbide power semiconductor products, a back thinning and back metallization process is carried out. However, the thinning process on the production line of current silicon device products is only applicable to the thinning processing of silicon wafers. Due to the relatively high hardness of silicon carbide, it is difficult for the carrier plate to withstand the pressure and torque during grinding and thinning, and there is also a risk of chipping. Summary of the Invention

[0004] To solve the deficiencies mentioned in the above background art, the purpose of the present invention is to provide a process for processing SiC wafers using a carrier plate, which uses the carrier plate to carry the silicon carbide substrate for high-temperature processes, overcomes the temperature limitation of the glass carrier plate in the high-temperature process of the silicon carbide substrate, and can safely and effectively perform high-temperature tempering of the silicon carbide substrate.

[0005] The purpose of the present invention can be achieved through the following technical solutions:

[0006] A process for processing SiC wafers using a carrier plate specifically includes the following steps:

[0007] S1. Bond the front side of the SiC substrate that has completed the front-end front-side process to the glass carrier plate, grind and thin the back side of the SiC substrate through CMP, and complete the ion implantation and metal process on the back side of the SiC substrate;

[0008] S2. Invert the carrier plate above the back side of the SiC substrate with the back-side metal completed, make the back side of the SiC substrate fit seamlessly with the bottom surface of the groove on the surface of the carrier plate, turn over the entire carrier plate, SiC substrate, and glass carrier plate, and then spin-coat SOG on the surface of the carrier plate outside the SiC substrate to form a sealing layer, and debond and remove the glass carrier plate on the front side of the SiC substrate;

[0009] S3. Place the carrier and the SiC substrate into a high-temperature furnace tube for heating to complete high-temperature tempering. After taking them out, perform ILD window opening and filling of contact holes on the front side of the SiC substrate;

[0010] S4. Coat the front side of the wafer with polyimide to form a sealing layer. After exposure, development, and etching of the polyimide, form an opening in the area corresponding to the metal contact holes, and then deposit a metal PAD through coating;

[0011] S5. Expose, develop, and etch the polyimide again to form scribe lanes. Etch the wafer to the back metal layer through fluorine-containing plasma, then cut the back metal through laser, and finally dissolve the polyimide on the outer circle of the wafer through a solvent;

[0012] S6. Attach the front side of the wafer to the cutting die frame, turn it over, and remove the carrier to complete wafer cutting.

[0013] Further preferably, the front-end front-side process includes front-side ion implantation, tempering, trench, gate oxidation, gate, and ILD processes.

[0014] Further preferably, at least one groove is provided on the surface of the carrier, and the carrier is a glass carrier or a graphite carrier.

[0015] Further preferably, in step S3, while performing front-side ILD window opening, the SOG sealing layer at the edge of the wafer is removed together.

[0016] Advantages of the present invention:

[0017] The present invention uses a carrier to carry the silicon carbide substrate for high-temperature processes, overcoming the temperature limitation of the glass carrier plate in the high-temperature process of the silicon carbide substrate, and can safely and effectively perform high-temperature tempering of the silicon carbide substrate. Description of the drawings

[0018] The following further describes the present invention with reference to the drawings.

[0019] Figure 1 is a schematic diagram of the forming in step S1 of the present invention;

[0020] Figure 2 is a schematic diagram of the forming in step S2 of the present invention;

[0021] Figure 3 is a schematic diagram of the forming in step S3 of the present invention;

[0022] Figure 4 is a schematic diagram of the forming in step S4 of the present invention;

[0023] Figure 5 is a process schematic diagram of step S5 of the present invention;

[0024] Figure 6 It is a schematic diagram of the forming process in step S6 of the present invention. Specific Embodiments

[0025] The technical solutions in the embodiments of the present invention will be clearly and completely described below with reference to the accompanying drawings in the embodiments of the present invention. Obviously, the described embodiments are only a part of the embodiments of the present invention, rather than all of the embodiments. All other embodiments obtained by those of ordinary skill in the art based on the embodiments of the present invention without any creative efforts shall fall within the protection scope of the present invention.

[0026] In the description of the present invention, it should be understood that the terms "open hole", "upper", "lower", "thickness", "top", "middle", "length", "inner", "periphery", etc. indicating the orientation or positional relationship are only for the convenience of describing the present invention and simplifying the description, rather than indicating or implying that the components or elements referred to must have a specific orientation, be constructed and operated in a specific orientation, and thus should not be construed as a limitation to the present invention.

[0027] Embodiment 1

[0028] A process for processing SiC wafers using a carrier plate specifically includes the following steps:

[0029] S1. Bond the front side of the SiC substrate that has completed the front-end front-side process to a glass carrier plate. The front-end front-side process includes front-side ion implantation, annealing, trenching, gate oxidation, gate, and ILD processes. Thinning the back side of the SiC substrate by CMP grinding, and completing the back-side ion implantation and metal processes of the SiC substrate;

[0030] S2. Invert a carrier plate above the back side of the SiC substrate with the back-side metal completed. At least one groove is provided on the surface of the carrier plate. The carrier plate is a glass carrier plate. The back side of the SiC substrate is in seamless contact with the bottom surface of the groove on the surface of the carrier plate. Rotate the entire carrier plate, SiC substrate, and glass carrier plate, and then spin-coat SOG on the surface of the carrier plate outside the SiC substrate to form a sealing layer, and debond and remove the glass carrier plate on the front side of the SiC substrate;

[0031] S3. Place the carrier plate and the SiC substrate in a high-temperature furnace tube for heating to complete high-temperature annealing. After taking it out, perform ILD window opening and filling of contact holes on the front side of the SiC substrate. At the same time of ILD window opening, remove the SOG sealing layer at the edge of the wafer;

[0032] S4. Coat polyimide on the front side of the wafer to form a sealing layer. After exposure, development, and etching of the polyimide, form an open hole in the area corresponding to the metal contact hole, and then coat the metal PAD by plating;

[0033] S5. Re-expose, develop, and etch the polyimide to form scribe lanes. Etch the wafer to the back metal layer using a fluorine-containing plasma, then cut the back metal using a laser, and finally remove the polyimide on the outer circle of the wafer by dissolving it with a solvent.

[0034] S6. Attach the front side of the wafer to the dicing mold frame, flip it over, and remove the carrier to complete wafer dicing.

[0035] Example 2

[0036] A process for processing SiC wafers using a carrier, specifically including the following steps:

[0037] S1. Bond the front side of the SiC substrate that has completed the front-end front process to a glass carrier. The front-end front process includes front-side ion implantation, annealing, trenching, gate oxidation, gate, and ILD processes. Thinning the back side of the SiC substrate by CMP grinding, and completing the back-side ion implantation and metal processes of the SiC substrate.

[0038] S2. Invert and place a carrier above the back side of the SiC substrate that has completed the back-side metal. At least one groove is provided on the surface of the carrier, and the carrier is a graphite carrier. The back side of the SiC substrate fits seamlessly with the bottom surface of the groove on the surface of the carrier. Rotate and coat SOG on the surface of the carrier around the SiC substrate to form a sealing layer as a whole, and then debond and remove the glass carrier on the front side of the SiC substrate.

[0039] S3. Place the carrier and the SiC substrate in a high-temperature furnace tube for heating to complete high-temperature annealing. After taking it out, perform ILD window opening and filling of contact holes on the front side of the SiC substrate, and remove the SOG sealing layer at the edge of the wafer while performing ILD window opening.

[0040] S4. Coat the front side of the wafer with polyimide to form a sealing layer. After exposing, developing, and etching the polyimide, form openings in the areas corresponding to the metal contact holes, and then deposit a metal PAD by coating.

[0041] S5. Re-expose, develop, and etch the polyimide to form scribe lanes. Etch the wafer to the back metal layer using a fluorine-containing plasma, then cut the back metal using a laser, and finally remove the polyimide on the outer circle of the wafer by dissolving it with a solvent.

[0042] S6. Attach the front side of the wafer to the dicing mold frame, flip it over, and remove the carrier to complete wafer dicing.

[0043] In the description of this specification, the descriptions referring to terms such as "one embodiment", "example", "specific example", etc. mean that the specific features, structures, materials or characteristics described in connection with the embodiment or example are included in at least one embodiment or example of the present invention. In this specification, the schematic representations of the above terms do not necessarily refer to the same embodiment or example. Moreover, the specific features, structures, materials or characteristics described may be combined in a suitable manner in any one or more embodiments or examples.

[0044] The foregoing has shown and described the basic principles, main features and advantages of the present invention. Those skilled in the art should understand that the present invention is not limited by the above embodiments, and the above embodiments and the descriptions in the specification are only used to illustrate the principles of the present invention. Without departing from the spirit and scope of the present invention, the present invention will have various changes and improvements, and all these changes and improvements fall within the scope of the present invention claimed.

Claims

1. A process for processing SiC wafers using a carrier plate, characterized in that, Specifically, it includes the following steps: S1. Bond the front side of the SiC substrate that has completed the front-end front process to the glass carrier plate, thin the back side of the SiC substrate by CMP grinding, and complete the ion implantation and metal process on the back side of the SiC substrate; S2. Invert the carrier plate above the back side of the SiC substrate with the back-side metal completed, make the back side of the SiC substrate fit seamlessly with the bottom surface of the groove on the surface of the carrier plate, rotate the carrier plate, the SiC substrate, and the glass carrier plate as a whole, and then spin-coat SOG on the surface of the carrier plate outside the SiC substrate to form a sealing layer, and debond to remove the glass carrier plate on the front side of the SiC substrate; S3. Place the carrier plate and the SiC substrate in a high-temperature furnace tube for heating to complete high-temperature tempering, and after taking out, perform ILD window opening and filling of contact holes on the front side of the SiC substrate; S4. Coat the front side of the wafer with polyimide to form a sealing layer, form openings in the area corresponding to the metal contact holes after exposure, development, and etching of the polyimide, and then coat the metal PAD by plating; S5. Expose, develop, and etch the polyimide again to form scribe lanes, etch the wafer to the back-side metal layer by fluorine-containing plasma, then cut the back-side metal by laser, and finally dissolve the polyimide outside the wafer by solvent; S6. Attach the front side of the wafer to the cutting die frame, invert it, and remove the carrier plate to complete wafer cutting; At least one groove is provided on the surface of the carrier plate, and the carrier plate is a glass carrier plate or a graphite carrier plate.

2. The process for SiC wafer processing using a carrier plate according to claim 1, characterized in that, The front-end front process includes front-side ion implantation, tempering, trench, gate oxidation, gate, and ILD processes.

3. The process for SiC wafer processing using a carrier plate according to claim 1, characterized in that, In S3, the SOG sealing layer at the edge of the wafer is removed together while performing front-side ILD window opening.

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