One-bit three-value comparator circuit based on three-value memristor

Abstract

This invention discloses a one-bit ternary comparator circuit based on ternary memristors. The invention includes two sets of voltage-controlled switches, two input ternary memristors, and three output ternary memristors. The negative terminal of the first set of voltage-controlled switches is connected to the positive terminal of one input ternary memristor and the positive terminal of another input ternary memristor after connecting the positive terminal of the first set of voltage-controlled switches. The positive terminal of the first set of voltage-controlled switches is connected to one input ternary memristor and the positive terminal of the operating voltage source, while the negative terminal of the second set of voltage-controlled switches is grounded. The positive terminals of the three output ternary memristors are each connected to a control terminal of the first set of voltage-controlled switches, and their respective control terminals are connected to a control terminal of the second set of voltage-controlled switches. The other control terminal of the second set of voltage-controlled switches is connected to the positive terminal of a voltage source set to 1. This invention has a clear and simple structure, is easy to implement, and can be used in research and applications in many fields such as multi-valued digital logic operations, making it of significant importance.

Description

Technical Field

[0001] The invention belongs to the technical field of circuit design, and relates to a one-bit three-value comparator circuit based on a three-value memristor. Background Art

[0002] In 1971, Professor Cai Shaotang predicted and deduced the existence of memristors for the first time from the perspective of symmetry and completeness of circuit theory. However, this was only a theoretical conjecture without the support of actual devices, so memristors did not receive widespread attention for a long time. In 2008, HP Labs built a nanoscale memristor based on TiO2 materials, which inspired domestic and foreign scholars to study memristors. Today, memristors play an important role in many fields, including chaotic circuits, digital logic circuits, neural networks, non-volatile memory, etc.

[0003] So far, the research on memristor models has mainly focused on binary and continuous memristors. However, compared with these two types of memristors, there is also a great demand for research on ternary memristors, which have broader application prospects in the fields of digital logic circuits and nonlinear circuits. For example, in nonlinear circuits, ternary memristors can increase the nonlinearity of the circuit, make the nonlinear circuit produce richer dynamic characteristics, expand the types of chaotic oscillators, and perform more precise parameter control. In digital logic circuits, ternary memristors have good development prospects in improving information storage, transmission efficiency, and improving existing computer architecture.

[0004] As a multi-value memristor, the ternary memristor can exhibit three different resistance states without using any additional devices, which are used to represent "0", "1" and "2" in the three-value logic. The application of the ternary memristor in digital logic circuits can also further reduce the circuit area, reduce the circuit power consumption and improve the storage density, which creates favorable conditions for the realization of the three-value logic circuit.

[0005] The comparator compares two or more data items to determine whether they are equal, or to determine the size relationship and arrangement order between them. Compared with binary combinational logic circuits, the design of ternary combinational logic circuits is more difficult. Therefore, introducing ternary memristors into the design of combinational logic circuits and studying comparator circuits based on ternary memristors can reduce the usage rate of components and reduce circuit complexity, which has a certain promoting effect on the further development of modern information circuits. Summary of the invention

[0006] The object of the present invention is to provide a one-bit three-value comparator circuit based on a three-value memristor.

[0007] The invention comprises an operating voltage source, two input three-value memristors, three output three-value memristors, six voltage-controlled switches and a set-1 voltage source.

[0008] The first voltage controlled switch S C1 The negative electrode of the second voltage-controlled switch S C2 The negative electrode of the third voltage-controlled switch S C3 The negative electrode of the fourth voltage-controlled switch S C4 The positive electrode of the fifth voltage-controlled switch S C5 The positive electrode of the sixth voltage-controlled switch S C6 After the positive electrode is connected, the first input three-value memristor M in1 The negative electrode and the second input of the three-value memristor M in2 The positive electrode;

[0009] The first voltage controlled switch S C1 The positive electrode, the second voltage-controlled switch S C2 The positive electrode, the third voltage-controlled switch S C3 After the positive electrode is connected, the first input three-value memristor M in1 The positive electrode of the fourth voltage-controlled switch S C4 The negative electrode of the fifth voltage-controlled switch S C5 The negative electrode of the sixth voltage-controlled switch S C6 The negative pole is grounded;

[0010] The first output three-value memristor M out1 The positive electrode is connected to the first voltage-controlled switch S C1 A control terminal of the first voltage-controlled switch S C1 The other control terminal is connected to a fourth voltage-controlled switch S C4 A control terminal;

[0011] The second output ternary memristor M out2 The positive electrode is connected to the second voltage-controlled switch S C2 A control terminal of the second voltage-controlled switch S C2 The other control terminal is connected to the fifth voltage-controlled switch S C5 A control terminal;

[0012] The third output ternary memristor M out3 The positive electrode is connected to the third voltage-controlled switch S C3 A control terminal of the third voltage-controlled switch S C3 The other control terminal is connected to the sixth voltage-controlled switch S C6 A control terminal;

[0013] The fourth voltage controlled switch SC4 The other control terminal of the fifth voltage-controlled switch S C5 The other control terminal of the sixth voltage-controlled switch S C6 The other control terminal is connected to the set 1 voltage source V Set1 The positive electrode;

[0014] The second input three-value memristor M in2 The negative electrode, the first output three-value memristor M out1 The negative electrode, the second output three-value memristor M out2 The negative electrode, the third output ternary memristor M out3 The negative pole of the operating voltage source V, the negative pole of the set voltage source V Set1 The negative pole of the

[0015] Furthermore, the operating voltage source V has two output voltages, namely, the initial voltage V Init = 0.5V and operating voltage V Run =0.9V.

[0016] Furthermore, the first voltage-controlled switch S C1 The threshold voltage of the second voltage-controlled switch S is 0.59V. C2 The threshold voltage of the third voltage-controlled switch S is 0.44V. C3 The threshold voltage of the fourth voltage-controlled switch S is 0.09V. C4 The threshold voltage of the fifth voltage-controlled switch S is 0.09V. C5 The threshold voltage of the sixth voltage-controlled switch S is 0.44V. C6 The threshold voltage is 0.59V.

[0017] The three-valued logic in the present invention is a multi-valued logic with three different logic states, namely: "0", "1" and "2". The 1-line-3-line three-valued decoder circuit designed by the present invention uses the resistance value of the memristor as the logic state variable. The resistance states of the memristor corresponding to the three logic values ​​are R H , R M and R L , where R H Represents logic "0", R M Represents logic "1", R L Indicates logic "2". Input memristor M in1 and M in2 Logic "0", logic "1" and logic "2" can be input according to actual needs. The initial resistance values ​​of the three output memristors are R H .

[0018] The logic variables of the present invention are all represented by the resistance value of the memristor. The one-bit three-value comparator designed in the present invention does not need to cascade the basic three-value logic gates, and the result of comparing two ternary numbers can be directly obtained only through circuit design, and the circuit complexity is low. The present invention has a clear and simple structure, is easy to implement, and can be used for application research in many fields such as multi-value digital logic operations, and has important significance. BRIEF DESCRIPTION OF THE DRAWINGS

[0019] Figure 1 The figure is a circuit diagram of a one-bit three-value comparator of the present invention. DETAILED DESCRIPTION

[0020] The implementation of the present invention is described in detail below with reference to the accompanying drawings.

[0021] A one-bit three-value comparator circuit based on a three-value memristor comprises two input memristors (M in1 , M in2 ), three output memristors (M out1 , M out2 , M out3 ), two voltage sources (V, V Set1 ) and six voltage-controlled switches (S C1 -S C6 ), forming a circuit structure with two input terminals and three output terminals.

[0022] In the three-value comparator circuit, the positive terminal of the voltage source V is connected to the input memristor M in1 The positive electrode of the memristor M in1 The negative terminal is connected to the input memristor M in2 The positive electrode, M in2 The negative electrode is connected to the output memristor M out1 、M out2 、M out3 The negative terminal is finally connected to the ground. Set1 By switching S C1 and S C4 Connect to M out1 The positive pole of the switch S C2 and S C5 Connect to M out2 The positive pole of the switch S C3 and S C6 Connect to M out3 The positive electrode.

[0023] The ternary memristor used in the one-bit ternary comparator based on the ternary memristor is a voltage threshold type ternary memristor constructed in parallel on the basis of the voltage threshold type binary memristor.

[0024] The constructed ternary memristor has a voltage threshold characteristic, and its two threshold voltages are \(v\) th1 = 1V and \(v\) th2 = 1.2V, \(R\) L , \(R\) M and \(R\) H correspond to three different resistance states of the model from low to high, and their magnitudes are 100Ω, 400Ω, and 800Ω respectively. When the voltage \(v\geq1.2V\), the memristor is set to \(R\) L . When \(1V\leq v\lt1.2V\), if the resistance value of the memristor at this time is \(R\) H , it will quickly drop to \(R\) M , otherwise it will remain in its original state. When \(-1V\lt v\lt1V\), the memristor will continue to maintain its original state. When \(-1.2V\lt v\leq -1V\), if the resistance value of the memristor at this time is less than \(R\) M , it will increase to \(R\) M , otherwise it will not change. When \(v\leq -1.2V\), the resistance value of the memristor is set to \(R\) H .

[0025] The truth table of the one-bit ternary comparator based on the ternary memristor of the present invention is shown in the following table:

[0026]

[0027] Among them, \(M\) in1 and \(M\) in2 are two input ternary numbers, and \(M\) out1 , \(M\) out2 and \(M\) out3 represent three output binary numbers. \(M\) out1 , \(M\) out2 and \(M\) out3 are valid when outputting logic "1", and respectively represent \(M\) in1 \(<M\) in2 , \(M\) in1 = \(M\) in2 and \(M\) in1 > \(M\) in2 .

[0028] The two input terminals and three output terminals of the ternary comparator circuit based on the ternary memristor follow the following relationship:

[0029] When the input terminals (\(M\) in1 , \(M\) in2 ) are respectively logic (0,1), (0,2) or (1,2), that is, \(M\) in1 \(<M\) in2 , the output memristor \(M\) out1 outputs logic 1, and the output memristors \(M\) out2 , \(M\) out3 output logic 0;

[0030] When the input terminal (M in1 , M in2 ) are logical (0,0), (1,1) or (2,2), that is, M in1 =M in2 When the output memristor M out2 The output is logic 1, the output memristor M out1 , M out3 The outputs are all logic 0;

[0031] When the input terminal (M in1 , M in2 ) are logical (1,0), (2,0) or (2,1), that is, M in1 >M in2 When the output memristor M out3 The output is logic 1, the output memristor M out1 , M out2 The outputs are all logic 0.

[0032] The specific circuit of the present invention is as follows Figure 1 As shown: it includes an operating voltage source, two input three-value memristors, three output three-value memristors, six voltage-controlled switches, and a set-1 voltage source.

[0033] The first voltage controlled switch S C1 The negative electrode of the second voltage-controlled switch S C2 The negative electrode of the third voltage-controlled switch S C3 The negative electrode of the fourth voltage-controlled switch S C4 The positive electrode of the fifth voltage-controlled switch S C5 The positive electrode of the sixth voltage-controlled switch S C6 After the positive electrode is connected, the first input three-value memristor M in1 The negative electrode and the second input of the three-value memristor M in2 The positive electrode;

[0034] The first voltage controlled switch S C1 The positive electrode, the second voltage-controlled switch S C2 The positive electrode, the third voltage-controlled switch S C3 After the positive electrode is connected, the first input three-value memristor M in1 The positive electrode of the fourth voltage-controlled switch S C4 The negative electrode of the fifth voltage-controlled switch S C5 The negative electrode of the sixth voltage-controlled switch S C6 The negative pole is grounded;

[0035] The first output three-value memristor M out1The positive electrode is connected to the first voltage-controlled switch S C1 A control terminal of the first voltage-controlled switch S C1 The other control terminal is connected to a fourth voltage-controlled switch S C4 A control terminal;

[0036] The second output ternary memristor M out2 The positive electrode is connected to the second voltage-controlled switch S C2 A control terminal of the second voltage-controlled switch S C2 The other control terminal is connected to the fifth voltage-controlled switch S C5 A control terminal;

[0037] The third output ternary memristor M out3 The positive electrode is connected to the third voltage-controlled switch S C3 A control terminal of the third voltage-controlled switch S C3 The other control terminal is connected to the sixth voltage-controlled switch S C6 A control terminal;

[0038] The fourth voltage controlled switch S C4 The other control terminal of the fifth voltage-controlled switch S C5 The other control terminal of the sixth voltage-controlled switch S C6 The other control terminal is connected to the set 1 voltage source V Set1 The positive electrode;

[0039] The second input three-value memristor M in2 The negative electrode, the first output three-value memristor M out1 The negative electrode, the second output three-value memristor M out2 The negative electrode, the third output ternary memristor M out3 The negative pole of the operating voltage source V, the negative pole of the set voltage source V Set1 The negative pole of the

[0040] The logic state of a one-bit three-value comparator circuit based on a three-value memristor is the resistance value of the memristor, where R L Corresponding to logic "2", R M Corresponding to logic "1", R H Corresponding to logic "0". The initial resistance of the three output memristors is R H . Voltage controlled switch S C1 , S C2 and S C3 The control voltage is M in1 The voltage divider V ab , S C4 , S C5 and S C6 The control voltage is M in2The voltage divider V bc . S C1 -S C6 The threshold voltages are set to 0.59V, 0.44V, 0.09V, 0.09V, 0.44V, and 0.59V, respectively.

[0041] According to the input memristor M in1 and M in2 The specific logical state of a three-value comparator in the operation stage can be summarized as follows:

[0042] M in1 <M in2 , at this time M in1 and M in2 There are three input resistance values: (800Ω, 400Ω), (800Ω, 100Ω) and (400Ω, 100Ω), that is, when the logic is (0, 1), (0, 2) and (1, 2), M in1 and M in2 The voltage divider V ab and V bc They are: (0.6V, 0.3V), (0.8V, 0.1V) and (0.72V, 0.18V). In the above three cases, only S C1 and S C4 will be turned on at the same time, so the output memristor M out1 is set to 400Ω, i.e. logic 1, and the three-value comparator outputs "100".

[0043] M in1 =M in2 , at this time M in1 and M in2 The input resistance values ​​are the same, namely (800Ω, 800Ω), (400Ω, 400Ω) and (100Ω, 100Ω), which are logic (0, 0), (1, 1) and (2, 2). in1 and M in2 The voltage divider V ab and V bc The same is true, both are 0.45V. At this time, only S C2 and S C5 will be turned on at the same time, so the output memristor M out2 is set to 400Ω, and the three-value comparator outputs "010".

[0044] M in1 >M in2 , at this time M in1 and M in2There are also three input resistance values: (400Ω, 800Ω), (100Ω, 800Ω) and (100Ω, 400Ω), which are logic (1, 0), (2, 0) and (2, 1). The corresponding M in1 and M in2 The voltage divider V ab and V bc They are: (0.3V, 0.6V), (0.1V, 0.8V) and (0.18V, 0.72V). At this time, only S C3 and S C6 will be turned on at the same time, so the output memristor M out3 is set to 400Ω, and the three-value comparator outputs "001".

[0045] Those skilled in the art should realize that the above embodiments are only used to verify the present invention, and are not intended to limit the present invention. As long as they are within the scope of the present invention, any changes or modifications to the above embodiments will fall within the protection scope of the present invention.

Claims

1. A one-bit three-value comparator circuit based on a three-value memristor, characterized in that: include: An operating voltage source, two input three-value memristors, three output three-value memristors, six voltage-controlled switches, and a set-1 voltage source; The first voltage controlled switch S C1 The negative electrode of the second voltage-controlled switch S C2 The negative electrode of the third voltage-controlled switch S C3 The negative electrode of the fourth voltage-controlled switch S C4 The positive electrode of the fifth voltage-controlled switch S C5 The positive electrode of the sixth voltage-controlled switch S C6 After the positive electrode is connected, the first input three-value memristor M in1 The negative electrode and the second input of the three-value memristor M in2 The positive electrode; The first voltage controlled switch S C1 The positive electrode, the second voltage-controlled switch S C2 The positive electrode, the third voltage-controlled switch S C3 After the positive electrode is connected, the first input three-value memristor M in1 The positive electrode of the fourth voltage-controlled switch S C4 The negative electrode of the fifth voltage-controlled switch S C5 The negative electrode of the sixth voltage-controlled switch S C6 The negative pole is grounded; The first output ternary memristor M out1 The positive electrode is connected to the first voltage-controlled switch S C1 A control terminal of the first voltage-controlled switch S C1 The other control terminal is connected to a fourth voltage-controlled switch S C4 A control terminal; The second output ternary memristor M out2 The positive electrode is connected to the second voltage-controlled switch S C2 A control terminal of the second voltage-controlled switch S C2 The other control terminal is connected to the fifth voltage-controlled switch S C5 A control terminal; The third output ternary memristor M out3 The positive electrode is connected to the third voltage-controlled switch S C3 A control terminal of the third voltage-controlled switch S C3 The other control terminal is connected to the sixth voltage-controlled switch S C6 A control terminal; The fourth voltage controlled switch S C4 The other control terminal of the fifth voltage-controlled switch S C5 The other control terminal of the sixth voltage-controlled switch S C6 The other control terminal is connected to the set 1 voltage source V Set1 The positive electrode; The second input three-value memristor M in2 The negative electrode, the first output three-value memristor M out1 The negative electrode, the second output three-value memristor M out2 The negative electrode, the third output ternary memristor M out3 The negative pole of the operating voltage source V, the negative pole of the set voltage source V Set1 The negative pole of the 2. The one-bit three-value comparator circuit based on a three-value memristor as claimed in claim 1, characterized in that: The operating voltage source V has two output voltages, namely, the initial voltage V Init = 0.5V and operating voltage V Run =0.9V.

3. The one-bit three-value comparator circuit based on a three-value memristor as claimed in claim 1, characterized in that: The first voltage-controlled switch S C1 The threshold voltage of the second voltage-controlled switch S is 0.59V. C2 The threshold voltage of the third voltage-controlled switch S is 0.44V. C3 The threshold voltage of the fourth voltage-controlled switch S is 0.09V. C4 The threshold voltage of the fifth voltage-controlled switch S is 0.09V. C5 The threshold voltage of the sixth voltage-controlled switch S is 0.44V. C6 The threshold voltage is 0.59V.

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