Clock synchronization circuit, control method, printed circuit board, and communication device

Abstract

The application provides a clock synchronization circuit, a control method, a printed circuit board and communication equipment. The clock synchronization circuit comprises a first frequency divider and an external reference signal processing module, a phase detector, a voltage control conversion module and a clock generator connected in sequence. The voltage control conversion module comprises a digital-to-analog converter, a loop filter module and a first switch module. The phase detection output end of the phase detector is connected to the loop filter module. The digital-to-analog converter and the loop filter module are both connected to the first switch module. The output end of the first switch module is connected to the clock generator. The clock generator is connected to the phase detection feedback end of the phase detector through the first frequency divider. The signal from the digital-to-analog converter or the signal from the external reference signal processing module can be used as a reference clock signal by switching the first switch module. The internal and external reference clock can be switched by using fewer clock generator devices, thereby reducing the area of the printed circuit board and saving costs.

Description

TECHNICAL FIELD

[0001] The present application relates to the field of communication circuit, in particular to a clock synchronization circuit, a control method, a printed circuit board and a communication device. BACKGROUND

[0002] In different application scenarios, communication devices such as base stations or radio frequency test instruments need to synchronize internal reference clocks or external reference clocks. In a radio frequency communication device, there is an internal clock reference source, that is, an internal reference clock. When the internal reference clock needs to be synchronized, the clock system will synchronize the internal reference; when the external reference clock needs to be synchronized, the clock system will be synchronized to the external reference through internal switching and software configuration update. Therefore, there are corresponding internal and external reference clock circuits in these devices. The internal and external reference clock circuit scheme of the traditional communication device is simple in principle, but also has some shortcomings, for example, at least two clock generating devices are needed, which occupies a large area of the printed circuit board, resulting in high total cost. SUMMARY

[0003] The following is a summary of the subject matter described in detail herein. This summary is not intended to limit the scope of the claims.

[0004] The embodiment of the present application provides a clock synchronization circuit, a control method, a printed circuit board and a communication device, which can realize the switching of internal and external reference clocks by using fewer clock generating devices, so as to reduce the area of the printed circuit board and save the cost.

[0005] In a first aspect, the embodiment of the present application provides a clock synchronization circuit, comprising an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator and a first frequency divider;

[0006] The external reference signal processing module is provided with a reference signal input end and a reference signal output end;

[0007] The phase detector is provided with a phase detection reference signal input end, a phase detection output end and a phase detection feedback end, and the phase detection reference signal input end is connected with the reference signal output end;

[0008] The voltage control conversion module comprises a digital-to-analog converter, a loop filter module and a first switch module, the first switch module is provided with a first switch input end, a second switch input end and a first switch output end, the digital-to-analog converter is connected with the first switch input end, and the phase detection output end is connected to the second switch input end through the loop filter module;

[0009] The clock generator is provided with a control voltage input end, a clock frequency output end and a clock frequency feedback end, and the first switch output end is connected with the control voltage input end;

[0010] The clock frequency feedback terminal is connected to the phase detection feedback terminal through the first frequency divider.

[0011] Secondly, embodiments of the present invention also provide a control method for a clock synchronization circuit. The clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider. The voltage control conversion module includes a digital-to-analog converter, a loop filter module, and a first switching module. The external reference signal processing module, the phase detector, the loop filter module, the first switching module, and the clock generator are connected sequentially. The digital-to-analog converter is connected to the first switching module, and the clock generator is also connected to the phase detector through the first frequency divider.

[0012] The control method includes:

[0013] The first switch module is controlled to switch so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, so as to realize the synchronization of the internal reference clock or the synchronization of the external reference clock.

[0014] Thirdly, embodiments of the present invention provide a printed circuit board including the clock synchronization circuit described in the first aspect of the present invention.

[0015] Fourthly, embodiments of the present invention provide a communication device, including the clock synchronization circuit described in the first aspect of the present invention or the printed circuit board described in the third aspect of the present invention.

[0016] This invention includes a clock synchronization circuit, a control method for the clock synchronization circuit, a printed circuit board, and a communication device. When it is necessary to synchronize an internal reference clock, the first switching module is controlled to switch to connect the control voltage input terminals of the digital-to-analog converter and the clock generator. The digital-to-analog converter can output the control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator. When it is necessary to synchronize an external reference clock, the first switching module is controlled to switch to connect the loop filter module and the control voltage input terminal of the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal and is transmitted to the phase detector's phase reference from the reference signal output terminal. At the signal input terminal, a phase detector, a loop filter module, a clock generator, and a first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal of the phase detector, and then compared with the external reference clock signal at the phase detection reference signal input terminal. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal. After the AC component is filtered out by the loop filter module, a control voltage is obtained, which is transmitted from the control voltage input terminal to the clock generator to control the output frequency of the clock generator. This allows for the switching of internal and external reference clocks with fewer clock generation devices, thereby reducing the area of ​​the printed circuit board and saving costs. Attached Figure Description

[0017] The accompanying drawings are provided to further understand the technical solutions of the present invention and constitute a part of the specification. They are used together with the embodiments of the present invention to explain the technical solutions of the present invention, and do not constitute a limitation on the technical solutions of the present invention.

[0018] Figure 1 This is a circuit diagram of the clock synchronization circuit provided in Embodiment 1 of the present invention;

[0019] Figure 2 This is a circuit diagram of the clock synchronization circuit provided in Embodiment 2 of the present invention;

[0020] Figure 3 This is a circuit diagram of the clock synchronization circuit provided in Embodiment 3 of the present invention;

[0021] Figure 4 This is a circuit diagram of the clock synchronization circuit provided in Embodiment 4 of the present invention. Detailed Implementation

[0022] To make the objectives, technical solutions, and advantages of this invention clearer, the invention will be further described in detail below with reference to the accompanying drawings and embodiments. It should be understood that the specific embodiments described herein are merely illustrative and not intended to limit the invention.

[0023] It should be noted that although functional modules are divided in the device schematic diagram and a logical order is shown in the flowchart, in some cases, the steps shown or described may be performed in a different order than the module division in the device or the order in the flowchart. The terms "first," "second," etc., in the specification, claims, and the aforementioned drawings are used to distinguish similar objects and are not necessarily used to describe a specific order or sequence.

[0024] This invention provides a clock synchronization circuit, control method, printed circuit board, and communication device, which can achieve switching between internal and external reference clocks using fewer clock generating devices, thereby reducing the area of ​​the printed circuit board and saving costs.

[0025] The embodiments of the present invention will be further described below with reference to the accompanying drawings.

[0026] like Figure 1 As shown, Figure 1 This is a circuit diagram of a clock synchronization circuit provided in one embodiment of the present invention.

[0027] like Figure 1 As shown, the clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider.

[0028] The external reference signal processing module is provided with a reference signal input terminal a and a reference signal output terminal b. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is then output from the reference signal output terminal b.

[0029] The phase detector is equipped with a phase detection reference signal input terminal c, a phase detection output terminal d, and a phase detection feedback terminal e. The phase detection reference signal input terminal c is connected to the reference signal output terminal b.

[0030] The voltage control conversion module includes a digital-to-analog converter, a loop filter module, and a first switch module. In this embodiment, the loop filter module includes a loop filter. The first switch module is provided with a first switch input terminal i, a second switch input terminal j, and a first switch output terminal k. The digital-to-analog converter is connected to the first switch input terminal i, and the phase detection output terminal d is connected to the second switch input terminal j through the loop filter.

[0031] The clock generator is equipped with a control voltage input terminal f, a clock frequency output terminal g, and a clock frequency feedback terminal h. The first switch output terminal k is connected to the control voltage input terminal f. The clock frequency feedback terminal h is connected to the phase detection feedback terminal e through a first frequency divider.

[0032] In this embodiment, when it is necessary to synchronize the internal reference clock, the first switching module is controlled to switch to connect the control voltage input terminal f of the digital-to-analog converter and the clock generator. The digital-to-analog converter can output the control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator. When it is necessary to synchronize the external reference clock, the first switching module is controlled to switch to connect the control voltage input terminal f of the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is transmitted from the reference signal output terminal b to the phase detection reference signal input terminal c of the phase detector. The phase detector, the loop filter module, the clock generator, and the first frequency divider constitute a complete circuit. A phase-locked loop (PLL) is formed, at which point the clock generator functions as a voltage-controlled oscillator (VCO). The output frequency of the clock generator is transmitted from the clock frequency feedback terminal h to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal e of the phase detector. Then, it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal c. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal d. After the AC component is filtered out by the loop filter module, the control voltage is obtained and transmitted from the control voltage input terminal f to the clock generator to control the output frequency of the clock generator. This clock synchronization circuit can achieve the switching of internal and external reference clocks with fewer clock generation devices, thereby reducing the area of ​​the printed circuit board and saving costs.

[0033] like Figure 2 As shown, Figure 2 This is a circuit diagram of a clock synchronization circuit provided in another embodiment of the present invention.

[0034] like Figure 2 As shown, the clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider.

[0035] The external reference signal processing module is provided with a reference signal input terminal a and a reference signal output terminal b. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is then output from the reference signal output terminal b.

[0036] The phase detector is equipped with a phase detection reference signal input terminal c, a phase detection output terminal d, and a phase detection feedback terminal e. The phase detection reference signal input terminal c is connected to the reference signal output terminal b.

[0037] The voltage control conversion module includes a second switching module, a digital-to-analog converter, a loop filter module, and a first switching module. In this embodiment, the loop filter module includes multiple loop filters. The second switching module is provided with a third switch input terminal l and a second switch output terminal m. The third switch input terminal l is connected to the phase detection output terminal d. The number of second switch output terminals m is consistent with the number of loop filters. The first switching module is provided with a first switch input terminal i, a second switch input terminal j, and a first switch output terminal k. The digital-to-analog converter is connected to the first switch input terminal i. The number of second switch input terminals j is consistent with the number of loop filters. Each second switch output terminal m is connected to a second switch input terminal j through a loop filter.

[0038] The clock generator is equipped with a control voltage input terminal f, a clock frequency output terminal g, and a clock frequency feedback terminal h. The first switch output terminal k is connected to the control voltage input terminal f. The clock frequency feedback terminal h is connected to the phase detection feedback terminal e through a first frequency divider.

[0039] In this embodiment, since the voltage control conversion module is equipped with multiple loop filters, when it is necessary to synchronize an external reference clock, different loop filters can be selected through the first switch module and the second switch module to achieve hardware-adjustable loop parameters.

[0040] In addition, such as Figure 2 As shown, in the clock synchronization circuit, the external reference signal processing module includes a shaping and filtering module and a second frequency divider connected in sequence. The reference signal input terminal a is connected to the shaping and filtering module, and the second frequency divider is connected to the reference signal output terminal b. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a, first undergoes shaping and filtering by the shaping and filtering module, then undergoes frequency division by the second frequency divider, and finally is transmitted from the reference signal output terminal b to the phase detection reference signal input terminal c of the phase detector.

[0041] like Figure 3 As shown, Figure 3 This is a circuit diagram of a clock synchronization circuit provided in another embodiment of the present invention.

[0042] like Figure 3 As shown, the clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider.

[0043] The external reference signal processing module is provided with a reference signal input terminal a and a reference signal output terminal b. The external reference signal processing module includes a shaping and filtering module, a third switching module and multiple second frequency dividers. The third switching module is provided with a fourth switch input terminal n and a third switch output terminal o. The reference signal input terminal a is connected to the shaping and filtering module, and the output terminal of the shaping and filtering module is connected to the fourth switch input terminal n. The number of third switch output terminals o is consistent with the number of second frequency dividers. Each third switch output terminal o is connected to the input terminal of a second frequency divider, and the output terminal of each second frequency divider serves as the reference signal output terminal b. That is, the external reference signal processing module is provided with multiple reference signal output terminals b.

[0044] The phase detector is equipped with a phase detection reference signal input terminal c, a phase detection output terminal d, and a phase detection feedback terminal e. There are multiple phase detection reference signal input terminals c, and each reference signal output terminal b is connected to one phase detection reference signal input terminal c.

[0045] The voltage control conversion module includes a digital-to-analog converter, a loop filter module, and a first switch module. In this embodiment, the loop filter module includes a loop filter. The first switch module is provided with a first switch input terminal i, a second switch input terminal j, and a first switch output terminal k. The digital-to-analog converter is connected to the first switch input terminal i, and the phase detection output terminal d is connected to the second switch input terminal j through the loop filter.

[0046] The clock generator is equipped with a control voltage input terminal f, a clock frequency output terminal g, and a clock frequency feedback terminal h. The first switch output terminal k is connected to the control voltage input terminal f. The clock frequency feedback terminal h is connected to the phase detection feedback terminal e through a first frequency divider.

[0047] In this embodiment, by setting multiple second frequency dividers and a third switching module in the external reference signal processing module, the third switching module can be controlled to switch and select the most suitable channel to enter the phase detector reference signal input terminal c of the phase detector, thus enabling synchronization of a wider range of external reference frequencies.

[0048] like Figure 4 As shown, Figure 4 This is a circuit diagram of a clock synchronization circuit provided in another embodiment of the present invention.

[0049] like Figure 4 As shown, the clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider.

[0050] The external reference signal processing module is provided with a reference signal input terminal a and a reference signal output terminal b. The external reference signal processing module includes a shaping and filtering module, a third switching module and multiple second frequency dividers. The third switching module is provided with a fourth switch input terminal n and a third switch output terminal o. The reference signal input terminal a is connected to the shaping and filtering module, and the output terminal of the shaping and filtering module is connected to the fourth switch input terminal n. The number of third switch output terminals o is consistent with the number of second frequency dividers. Each third switch output terminal o is connected to the input terminal of a second frequency divider, and the output terminal of each second frequency divider serves as the reference signal output terminal b. That is, the external reference signal processing module is provided with multiple reference signal output terminals b.

[0051] The phase detector is equipped with a phase detection reference signal input terminal c, a phase detection output terminal d, and a phase detection feedback terminal e. There are multiple phase detection reference signal input terminals c, and each reference signal output terminal b is connected to a phase detection reference signal input terminal.

[0052] The voltage control conversion module includes a second switching module, a digital-to-analog converter, a loop filter module, and a first switching module. In this embodiment, the loop filter module includes multiple loop filters. The second switching module is provided with a third switch input terminal l and a second switch output terminal m. The phase detection output terminal d is connected to the third switch input terminal l. The number of second switch output terminals m is consistent with the number of loop filters. The first switching module is provided with a first switch input terminal i, a second switch input terminal j, and a first switch output terminal k. The digital-to-analog converter is connected to the first switch input terminal i. The number of second switch input terminals j is consistent with the number of loop filters. Each second switch output terminal m is connected to a second switch input terminal j through a loop filter.

[0053] The clock generator is equipped with a control voltage input terminal f, a clock frequency output terminal g, and a clock frequency feedback terminal h. The first switch output terminal k is connected to the control voltage input terminal f. The clock frequency feedback terminal h is connected to the phase detection feedback terminal e through a first frequency divider.

[0054] This clock synchronization circuit also possesses the following features: Figure 2 The clock synchronization circuit shown and as Figure 3 The clock synchronization circuit shown has structural characteristics, therefore it also possesses... Figure 2 and Figure 3 The advantages of the clock synchronization circuit are that when it is necessary to synchronize an external reference clock, different loop filters can be selected through the first and second switching modules to achieve hardware adjustment of the loop parameters; and the third switching module can be controlled to switch to select the most suitable channel to enter the phase detector reference signal input terminal c of the phase detector, thus enabling synchronization of a wider range of external reference frequencies.

[0055] Based on the clock synchronization circuit of the above embodiments, various embodiments of the control method of the clock synchronization circuit are proposed below.

[0056] An embodiment of the present invention provides a control method for a clock synchronization circuit, wherein the clock synchronization circuit is as follows: Figure 1 As shown, the clock synchronization circuit includes an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider. The voltage control conversion module includes a digital-to-analog converter, a loop filter module, and a first switch module. The external reference signal processing module, the phase detector, the loop filter module, the first switch module, and the clock generator are connected in sequence. The digital-to-analog converter is connected to the first switch module, and the clock generator is also connected to the phase detector through the first frequency divider.

[0057] Control methods include:

[0058] The first switch module is controlled to switch, so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, so as to realize the synchronization of the internal reference clock or the synchronization of the external reference clock.

[0059] Specifically, when it is necessary to synchronize the internal reference clock, the control method is as follows:

[0060] The first switch module controls the connection between the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to achieve synchronization of the internal reference clock.

[0061] The first switch module is controlled to switch between the digital-to-analog converter and the clock generator. The digital-to-analog converter can output a control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator and realize the synchronization of the internal reference clock.

[0062] Specifically, when it is necessary to synchronize with an external reference clock, the control method is as follows:

[0063] The first switch module connects the loop filter module and the clock generator, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization with the external reference clock.

[0064] The first switch module is controlled to switch to connect the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is transmitted from the reference signal output terminal b to the phase detection reference signal input terminal c of the phase detector. The phase detector, loop filter module, clock generator and first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal h to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal e of the phase detector. Then it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal c. After passing through the charge pump inside the phase detector, the voltage error signal is output from the phase detection output terminal d. After the AC component is filtered out by the loop filter module, the control voltage is obtained and transmitted from the control voltage input terminal f to the clock generator to control the output frequency of the clock generator and realize the synchronization of the external reference clock.

[0065] In addition, such as Figure 2 As shown, the loop filter module in the clock synchronization circuit can include multiple loop filters. The output of each loop filter is connected to the first switching module, and the phase detector output terminal d is connected to the input of each loop filter through the second switching module.

[0066] The specific control method is as follows:

[0067] The first switch module connects the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to synchronize the internal reference clock; or

[0068] The first and second switch modules are connected to the same loop filter, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization with the external reference clock.

[0069] Since the voltage control conversion module is equipped with multiple loop filters, when it is necessary to synchronize with an external reference clock, different loop filters can be selected through the first switch module and the second switch module to achieve hardware-adjustable loop parameters.

[0070] In addition, such as Figure 3 As shown, the external reference signal processing module in the clock synchronization circuit includes a shaping and filtering module, a third switching module, and multiple second frequency dividers. The reference signal input terminal a of the external reference signal processing module is connected to the shaping and filtering module. The output terminal of the shaping and filtering module is connected to the input terminals of multiple second frequency dividers through the third switching module. The phase detector is provided with multiple phase detection reference signal input terminals c. The output terminal of each second frequency divider is connected to one phase detection reference signal input terminal c.

[0071] The specific control method is as follows:

[0072] The first switch module connects the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to synchronize the internal reference clock; or

[0073] The first switch module connects the loop filter module and the clock generator, and the third switch connects the shaping filter module and a second frequency divider, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization with the external reference clock.

[0074] By setting up multiple second frequency dividers and a third switching module, the third switching module can be controlled to switch and select the most suitable channel to enter the phase detector's phase reference signal input terminal c, thus enabling synchronization of a wider range of external reference frequencies.

[0075] In addition, such as Figure 4 As shown, the loop filter module in the clock synchronization circuit can include multiple loop filters. The output terminals of multiple loop filters are all connected to the first switching module. The phase detector output terminal d is connected to the input terminal of each loop filter through the second switching module. The external reference signal processing module in the clock synchronization circuit includes a shaping filter module, a third switching module, and multiple second frequency dividers. The reference signal input terminal a of the external reference signal processing module is connected to the shaping filter module. The output terminal of the shaping filter module is connected to the input terminal of multiple second frequency dividers through the third switching module. The phase detector is provided with multiple phase detection reference signal input terminals c. The output terminal of each second frequency divider is connected to one phase detection reference signal input terminal c.

[0076] The specific control method is as follows:

[0077] The first switch module connects the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to synchronize the internal reference clock; or

[0078] The first and second switch modules are connected to the same loop filter, and the third switch is connected to a shaping filter module and a second frequency divider, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization with the external reference clock.

[0079] because Figure 4 The clock synchronization circuit in the middle also has the following features: Figure 2 The clock synchronization circuit shown and as Figure 3 The clock synchronization circuit shown has structural characteristics, therefore it also possesses... Figure 2 and Figure 3The advantages of the clock synchronization circuit are that when it is necessary to synchronize an external reference clock, different loop filters can be selected through the first and second switching modules to achieve hardware adjustment of the loop parameters; and the third switching module can be controlled to switch to select the most suitable channel to enter the phase detector reference signal input terminal c of the phase detector, thus enabling synchronization of a wider range of external reference frequencies.

[0080] Another embodiment of the present invention also provides a printed circuit board including the clock synchronization circuit as described in the above embodiment, i.e., including... Figures 1 to 4 The clock synchronization circuit shown in any one of the options.

[0081] In this embodiment, when it is necessary to synchronize the internal reference clock, the first switch module is controlled to switch to connect the control voltage input terminal f of the digital-to-analog converter and the clock generator. The digital-to-analog converter can output the control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator. When it is necessary to synchronize the external reference clock, the first switch module is controlled to switch to connect the control voltage input terminal f of the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is transmitted from the reference signal output terminal b to the phase detection reference signal input terminal c of the phase detector. The phase detector, loop filter module, and clock... The clock generator and the first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal h to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal e of the phase detector. Then, it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal c. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal d. After the AC component is filtered out by the loop filter module, the control voltage is obtained and transmitted from the control voltage input terminal f to the clock generator to control the output frequency of the clock generator. This clock synchronization circuit can achieve the switching of internal and external reference clocks with fewer clock generation devices, thereby reducing the area of ​​the printed circuit board and saving costs.

[0082] Another embodiment of the present invention provides a communication device, including a clock synchronization circuit as described above or a printed circuit board as described above.

[0083] In this embodiment, when it is necessary to synchronize the internal reference clock, the first switch module is controlled to switch to connect the control voltage input terminal f of the digital-to-analog converter and the clock generator. The digital-to-analog converter can output the control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator. When it is necessary to synchronize the external reference clock, the first switch module is controlled to switch to connect the control voltage input terminal f of the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal a and is transmitted from the reference signal output terminal b to the phase detection reference signal input terminal c of the phase detector. The phase detector, loop filter module, and clock... The clock generator and the first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal h to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal e of the phase detector. Then, it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal c. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal d. After the AC component is filtered out by the loop filter module, the control voltage is obtained and transmitted from the control voltage input terminal f to the clock generator to control the output frequency of the clock generator. This clock synchronization circuit can achieve the switching of internal and external reference clocks with fewer clock generation devices, thereby reducing the area of ​​the printed circuit board and saving costs.

[0084] The above is a detailed description of the preferred embodiments of the present invention. However, the present invention is not limited to the above embodiments. Those skilled in the art can make various equivalent modifications or substitutions without departing from the spirit of the present invention. All such equivalent modifications or substitutions are included within the scope defined by the claims of the present invention.

Claims

1. A clock synchronization circuit, characterized in that, include: The external reference signal processing module is equipped with a reference signal input terminal and a reference signal output terminal; A phase detector is provided with a phase detection reference signal input terminal, a phase detection output terminal and a phase detection feedback terminal, wherein the phase detection reference signal input terminal is connected to the reference signal output terminal; The voltage control conversion module includes a digital-to-analog converter, a loop filter module, and a first switch module. The first switch module is provided with a first switch input terminal, a second switch input terminal, and a first switch output terminal. The digital-to-analog converter is connected to the first switch input terminal, and the phase detection output terminal is connected to the second switch input terminal through the loop filter module. A clock generator is provided with a control voltage input terminal, a clock frequency output terminal, and a clock frequency feedback terminal, and the first switch output terminal is connected to the control voltage input terminal; The first frequency divider connects the clock frequency feedback terminal to the phase detection feedback terminal. in, When it is necessary to synchronize the internal reference clock, the first switch module is controlled to switch to connect the digital-to-analog converter and the clock generator. The digital-to-analog converter outputs a control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator and realize the synchronization of the internal reference clock. When it is necessary to synchronize an external reference clock, the first switching module is controlled to switch to connect the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal and is transmitted from the reference signal output terminal to the phase detection reference signal input terminal of the phase detector. The phase detector, the loop filter module, the clock generator, and the first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal of the phase detector. Then, it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal. After the AC component is filtered out by the loop filter module, a control voltage is obtained. The control voltage is transmitted from the control voltage input terminal to the clock generator to control the output frequency of the clock generator, thereby synchronizing the external reference clock.

2. The clock synchronization circuit according to claim 1, characterized in that, The loop filter module includes multiple loop filters, and the number of the second switch input terminals is consistent with the number of the loop filters; the voltage control conversion module also includes a second switch module, which is provided with a third switch input terminal and a second switch output terminal. The third switch input terminal is connected to the phase detection output terminal, and the number of the second switch output terminals is consistent with the number of the loop filters. The second switch output terminals are connected to the second switch input terminals through the loop filters.

3. The clock synchronization circuit according to claim 1 or 2, characterized in that, The external reference signal processing module includes a shaping filter module and a second frequency divider connected in sequence. The reference signal input terminal is connected to the shaping filter module, and the second frequency divider is connected to the reference signal output terminal.

4. The clock synchronization circuit according to claim 3, characterized in that, The external reference signal processing module includes multiple second frequency dividers, and the number of phase detection reference signal input terminals is consistent with the number of second frequency dividers; the external reference signal processing module also includes a third switch module, which is provided with a fourth switch input terminal and a third switch output terminal. The output terminal of the shaping and filtering module is connected to the fourth switch input terminal, and the number of third switch output terminals is consistent with the number of second frequency dividers. The third switch output terminals are connected to the phase detection reference signal input terminals through the second frequency dividers.

5. A control method for a clock synchronization circuit, the clock synchronization circuit comprising an external reference signal processing module, a phase detector, a voltage control conversion module, a clock generator, and a first frequency divider, the voltage control conversion module comprising a digital-to-analog converter, a loop filter module, and a first switching module, the external reference signal processing module having a reference signal input terminal and a reference signal output terminal, the reference signal output terminal, the phase detector, the loop filter module, the first switching module, and the clock generator being connected in sequence, the digital-to-analog converter being connected to the first switching module, and the clock generator being connected to the phase detector via the first frequency divider; The control method includes: The first switch module is controlled to switch, so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, so as to realize the synchronization of the internal reference clock or the synchronization of the external reference clock. in, When it is necessary to synchronize the internal reference clock, the first switch module is controlled to switch to connect the digital-to-analog converter and the clock generator. The digital-to-analog converter outputs a control voltage corresponding to the internal reference clock to the clock generator to control the output frequency of the clock generator and realize the synchronization of the internal reference clock. When it is necessary to synchronize an external reference clock, the first switching module is controlled to switch to connect the loop filter module and the clock generator. The external reference clock signal enters the external reference signal processing module from the reference signal input terminal and is transmitted from the reference signal output terminal to the phase detection reference signal input terminal of the phase detector. The phase detector, the loop filter module, the clock generator, and the first frequency divider form a phase-locked loop. The output frequency of the clock generator is transmitted from the clock frequency feedback terminal to the first frequency divider. After frequency division, it is transmitted to the phase detection feedback terminal of the phase detector. Then, it is phase-detected with the external reference clock signal at the phase detection reference signal input terminal. After passing through the charge pump inside the phase detector, a voltage error signal is output from the phase detection output terminal. After the AC component is filtered out by the loop filter module, a control voltage is obtained. The control voltage is transmitted from the control voltage input terminal to the clock generator to control the output frequency of the clock generator, thereby synchronizing the external reference clock.

6. The control method for the clock synchronization circuit according to claim 5, characterized in that, The loop filter module includes multiple loop filters, and the voltage control conversion module further includes a second switching module. The phase detector is connected to the second switching module, and the second switching module is connected to the first switching module through the multiple loop filters. The control of the first switch module to switch, so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, in order to synchronize the internal reference clock or to synchronize the external reference clock, includes: The first switch module is controlled to connect the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to achieve synchronization of the internal reference clock; or The first switch module and the second switch module are connected to the same loop filter, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization of the external reference clock.

7. The control method for the clock synchronization circuit according to claim 5, characterized in that, The external reference signal processing module includes a shaping and filtering module, a third switching module, and multiple second frequency dividers. The shaping and filtering module is connected to the third switching module, and the third switching module is connected to the phase detector through the multiple second frequency dividers. The control of the first switch module to switch, so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, in order to synchronize the internal reference clock or to synchronize the external reference clock, includes: The first switch module is controlled to connect the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to achieve synchronization of the internal reference clock; or The first switch module is controlled to connect the loop filter module and the clock generator, and the third switch is controlled to connect the shaping filter module and a second frequency divider, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization of the external reference clock.

8. The control method for the clock synchronization circuit according to claim 5, characterized in that, The loop filtering module includes multiple loop filters, and the voltage control conversion module further includes a second switching module. The phase detector is connected to the second switching module, and the second switching module is connected to the first switching module through the multiple loop filters. The external reference signal processing module includes a shaping filtering module, a third switching module, and multiple second frequency dividers. The shaping filtering module is connected to the third switching module, and the third switching module is connected to the phase detector through the multiple second frequency dividers. The control of the first switch module to switch, so that the signal from the digital-to-analog converter or the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module, in order to synchronize the internal reference clock or to synchronize the external reference clock, includes: The first switch module is controlled to connect the digital-to-analog converter and the clock generator, so that the signal from the digital-to-analog converter is transmitted to the clock generator through the first switch module to achieve synchronization of the internal reference clock; or The first switch module and the second switch module are connected to the same loop filter, and the third switch is connected to the shaping filter module and a second frequency divider, so that the signal from the external reference signal processing module is transmitted to the clock generator through the first switch module to achieve synchronization of the external reference clock.

9. A printed circuit board, characterized in that, Includes the clock synchronization circuit as described in any one of claims 1 to 4.

10. A communication device, characterized in that, It includes the clock synchronization circuit as described in any one of claims 1 to 4 or the printed circuit board as described in claim 9.

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