A sorting circuit and a chip

By designing the first and second type sorting chains of parallel sorting, efficient sorting of big data is achieved, and the problem of inefficient sorting in the existing technology is solved, and it is suitable for a wide range of application scenarios.

CN114356278BActive Publication Date: 2025-02-25IFLYTEK CO LTD
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Patent Information

Application Number
CN202111399689.6
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-19
Publication Date
2025-02-25
Estimated Expiration
2041-11-19

AI Technical Summary

Technical Problem

The existing sorting algorithms are inefficient when processing big data, and the software sorting is slow, and cannot meet high-performance needs such as artificial intelligence. The hardware sorting sorting network is only suitable for fixed-length sequences, and the implementation method is large in area.

Method used

A sorting circuit is designed, including multiple sorting chains of the first type and the second type, each sorting chain consisting of a plurality of sorting units connected in sequence. In the input data sorting stage, the first type and the second type sorting chains initially sort the to be processed data in parallel to obtain the initial sorting result; in the data resorting stage, the second type sorting chain sorts the first type and the second type sorting chains in the data resorting stage. The initial sorting results are sorted again to obtain the final sorting results.

Benefits of technology

This sorting circuit is suitable for data sorting with large data volumes, is not limited by data volume, has a wide range of applications, is efficient, and can be effectively applied in high-performance occasions such as artificial intelligence.

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Abstract

The present invention discloses a sorting circuit and a chip, wherein the sorting circuit comprises: a plurality of first-type sorting chains, wherein the first-type sorting chains respectively comprise n sorting units connected in sequence; a second-type sorting chain comprises n sorting units connected in sequence; wherein, in the input data sorting stage, the first-type sorting chain and the second-type sorting chain are configured to respectively receive a group of to-be-processed data, so as to perform initial sorting on the to-be-processed data in parallel, and obtain an initial sorting result; in the data re-sorting stage, the second-type sorting chain is further configured to re-sort the initial sorting results of the first-type sorting chain and the second-type sorting chain, so as to obtain a final sorting result. The sorting circuit is suitable for sorting data with a large amount of data, is not limited by the amount of data, has a wide range of applications, and is highly efficient.
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Description

Technical Field

[0001] The present invention relates to the technical field of digital circuits, and in particular to a sorting circuit and a chip. Background Art

[0002] With the advancement of science and technology, cloud computing, big data and artificial intelligence will become the mainstream of the future market and promote the progress of mankind. The development of these fields will involve the processing of a large amount of data. The quality of data processing performance is directly related to their development. Energy efficiency and throughput are key parts of data processing performance and are particularly important. Heterogeneous systems based on ASIC and FPGA have become one of the research focuses of the industry because of their high energy efficiency and throughput.

[0003] Existing sorting algorithms can be roughly divided into two categories: software sorting and hardware sorting. There are many software sorting algorithms, such as bubble sort, selection sort, insertion sort, shell sort, etc. Hardware sorting has a sorting network, which refers to a comparison network whose output sequence is monotonically increasing for the input sequence. It is composed of comparators and circuits. The comparator is a device with two inputs x and y and two outputs m and n. The circuit is the input and output line connecting the comparator; the comparison network is a collection of comparators connected by circuits.

[0004] Among the existing sorting algorithms, software sorting is slow and cannot be applied in situations such as artificial intelligence that require high-speed data processing; the sorting network of hardware sorting is only suitable for sequences of fixed length and cannot be used for continuous serial input data; and the sorting network of hardware sorting adopts a pipeline implementation method, which has a large area. Summary of the invention

[0005] The present invention provides a sorting circuit and a chip. The sorting circuit is suitable for sorting data with a large amount of data, is not limited by the amount of data, has a wide range of applications, and is highly efficient.

[0006] To solve the above technical problems, the first technical solution provided by the present invention is: providing a sorting circuit, comprising: a plurality of first-type sorting chains, wherein the first-type sorting chains respectively include n sequentially connected sorting units; a second-type sorting chain, comprising n sequentially connected sorting units; wherein, in the input data sorting stage, the first-type sorting chain and the second-type sorting chain are configured to respectively receive a group of to-be-processed data, so as to perform initial sorting on the to-be-processed data in parallel, and obtain an initial sorting result; in the data re-sorting stage, the second-type sorting chain is further configured to re-sort the initial sorting results of the first-type sorting chain and the second-type sorting chain, so as to obtain a final sorting result.

[0007] Among them, the sorting unit includes: a data input end and a data output end; a signal input end and a signal output end; a storage module; a comparison module, wherein the first input end of the comparison module is connected to the data input end of the sorting unit to receive the current data to be processed, the second input end of the comparison module is connected to the storage module to read the stored data in the storage module, and the comparison module compares the current data to be processed and the stored data; wherein, in the input data sorting stage, the input end of the storage module is configured to connect to the first output end of the comparison module, and the first type of the current data to be processed and the stored data is stored in the storage module; the second output end of the comparison module is connected to the data output end, so as to output the second type of the current data to be processed and the stored data to the next level sorting unit through the data output end.

[0008] Among them, the data input end of the non-first sorting unit in the first type sorting chain or the second type sorting chain is connected to the data output end of the previous level sorting unit; the data output end of the last sorting unit in the first type sorting chain or the second type sorting chain serves as the data output end of the first type sorting chain or the second type sorting chain, the data input end of the first sorting unit in the first type sorting chain receives a group of the to-be-processed data in the input data sorting stage, and the data input end of the first sorting unit in the second type sorting chain is configured to receive a group of the to-be-processed data in the input data sorting stage, so that in the input data sorting stage, the sorting unit in the first type sorting chain or the second type sorting chain is used to sort the group of to-be-processed data, so that the first n to-be-processed data in the group of to-be-processed data sorted according to the sorting requirements are sequentially stored in the storage modules of the sorting units of the first type sorting chain or the second type sorting chain to obtain the initial sorting result.

[0009] The signal input end of the non-first sorting unit in the first type sorting chain or the second type sorting chain is connected to the signal output end of the sorting unit at the previous level; the signal input end of the first sorting unit in the non-first first type sorting chain is connected to the signal output end of the sorting unit at the end of the first type sorting chain at the previous level; the signal input end of the first sorting unit in the first type sorting chain or the second type sorting chain is used as an initial data receiving end to receive initial data; in the data re-sorting stage, the input end of the register module in the sorting unit in the first type sorting chain is configured to connect to the signal input end, thereby forming a beat control unit to sequentially output the initial sorting result stored in the first type sorting chain at the signal output end of the sorting unit at the end of the last first type sorting chain; the input end of the register module in the sorting unit in the second type sorting chain is configured to connect to the first output end of the comparison module, and the data input end of the first sorting unit in the second type sorting chain is configured to connect to the signal output end of the sorting unit at the end of the last first type sorting chain, so as to re-sort the initial sorting results of the first type sorting chain and the second type sorting chain, and register them in the register module of the sorting unit of the second type sorting chain to obtain the final sorting result.

[0010] The sorting unit further comprises: a first temporary storage module, which is arranged between the second output terminal of the comparison module and the data output terminal, so as to output the second type to the next level sorting unit through the data output terminal in the next working pulse.

[0011] The sorting unit further includes: a first switch, which is arranged between the input end of the register module, the first output end of the comparison module and the signal input end, so that the input end of the register module can be selectively connected to the first output end or the signal input end of the comparison module.

[0012] The sorting unit further includes: a control signal input end and a control signal output end; a second temporary storage module, connecting the control signal input end and the control signal output end, wherein the control signal input end of the sorting unit in the first type sorting chain or the second type sorting chain is connected to the control signal output end of the next level sorting unit to receive the control signal transmitted from the next level sorting unit, thereby controlling the first switch of the sorting unit at this level; the control signal output end of the first sorting unit of the first type sorting chain is connected to the control signal input end of the sorting unit at the end of the previous first type sorting chain, and the control signal input end of the sorting unit at the end of the last first type sorting chain is used to receive the first control signal to transmit the first control signal step by step in the first type sorting chain; the control signal input end of the sorting unit at the end of the second type sorting chain is used to receive the second control signal to transmit the second control signal step by step in the second type sorting chain.

[0013] Among them, it further includes: a second switch, which is set between the data input end of the first sorting unit of the second type sorting chain, the signal output end of the sorting unit at the end of the first type sorting chain, and the data port of the second type sorting chain receiving the data to be processed, and receives a third control signal to configure the data input end of the first sorting unit of the second type sorting chain to be connected to the signal output end of the sorting unit at the end of the first type sorting chain or the data interface receiving the data to be processed based on the third control signal.

[0014] The first type is the larger of the current data to be processed and the stored data, and the second type is the smaller of the current data to be processed and the stored data.

[0015] In order to solve the above technical problem, the second technical solution provided by the present invention is: to provide a chip, including the above sorting circuit.

[0016] The beneficial effect of the present invention is different from the prior art. In the input data sorting stage, multiple sorting chains in parallel perform initial sorting on the data to be processed to obtain an initial sorting result; then the second type sorting chain is further configured to sort the initial sorting results of the first type sorting chain and the second type sorting chain again to obtain a final sorting result. The sorting circuit is suitable for sorting data with a large amount of data, is not limited by the amount of data, has a wide range of applications, and is highly efficient. BRIEF DESCRIPTION OF THE DRAWINGS

[0017] In order to more clearly illustrate the technical solutions in the embodiments of the present invention, the following briefly introduces the drawings required for describing the embodiments. Obviously, the drawings described below are only some embodiments of the present invention. For those skilled in the art, other drawings can be obtained based on these drawings without creative work, among which:

[0018] Figure 1 A schematic diagram of the structure of an embodiment of a sorting circuit of the present invention;

[0019] Figure 2 for Figure 1 A schematic structural diagram of an embodiment of a sorting unit;

[0020] Figure 3 FIG. 1 is a schematic structural diagram of a chip according to an embodiment of the present invention. DETAILED DESCRIPTION

[0021] The following will be combined with the drawings in the embodiments of the present application to clearly and completely describe the technical solutions in the embodiments of the present application. Obviously, the described embodiments are only part of the embodiments of the present application, not all of the embodiments. Based on the embodiments in the present application, all other embodiments obtained by ordinary technicians in this field without creative work are within the scope of protection of this application.

[0022] See also Figure 1 , is a schematic diagram of the structure of an embodiment of the sorting circuit of the present invention, specifically comprising: a plurality of first type sorting chains (such as Figure 1 L1-La), wherein the first type of sorting chain includes n sequentially connected sorting units 11. The second type of sorting chain (such as Figure 1 La+1), including n sorting units 11 connected in sequence.

[0023] Among them, in the input data sorting stage, the first type sorting chain and the second type sorting chain are configured to respectively receive a group of data to be processed, so as to perform initial sorting on the data to be processed in parallel to obtain an initial sorting result; in the data re-sorting stage, the second type sorting chain is further configured to re-sort the initial sorting results of the first type sorting chain and the second type sorting chain to obtain a final sorting result.

[0024] Specifically, in the input data sorting stage, L1-La and La+1 receive a set of data to be processed respectively, and perform initial sorting on the data to be processed in parallel to obtain the initial sorting result. In the data re-sorting stage, La+1 re-sorts the initial sorting results of L1-La and La+1 to obtain the final sorting result.

[0025] It can be understood that when sorting data, the data to be sorted is divided into n+1 groups of data to be processed, and L1-La and La+1 receive a group of data to be processed respectively, such as L1 receives the first group of data to be processed, L2 receives the second group of data to be processed, La receives the nth group of data to be processed, and La+1 receives the n+1th group of data to be processed. L1-La and La+1 sort the n+1 groups of data to be processed in parallel, which can improve the sorting efficiency and save the time required for sorting. After completing the initial sorting, the initial sorting result of L1-La is imported into La+1 for re-sorting, and La+1 re-sorts the initial sorting result obtained by La+1 itself and the initial sorting result of L1-La to obtain the final sorting result.

[0026] The present application groups data with a large amount of data to be sorted to obtain several groups of data with a small amount of data to be processed. The application can be applied to sorting of data with a large amount of data, is not limited by the amount of data, and has a wide range of applications.

[0027] Further, please combine Figure 2 The sorting unit 11 includes: a data input terminal n1 and a data output terminal n2; a signal input terminal m1 and a signal output terminal m2; a register module R and a comparison module P.

[0028] The first input terminal x1 of the comparison module P is connected to the data input terminal n1 of the sorting unit 11 to receive the current data to be processed, the second input terminal x2 of the comparison module P is connected to the register module R to read the registered data in the register module R, and the comparison module P compares the current data to be processed with the registered data. The input terminal y1 of the register module R is selectively connected to the first output terminal x3 of the comparison module P or the signal input terminal m1, so that in the input data sorting stage, the input terminal y1 of the register module R is configured to connect to the first output terminal x3 of the comparison module P, and the first type of the current data to be processed and the registered data is stored in the register module R. The second output terminal x4 of the comparison module P is connected to the data output terminal n2, so that the second type of the current data to be processed and the registered data is output to the next-level sorting unit 11 through the data output terminal n2.

[0029] Understandable, such as Figure 1 As shown, in the same sorting chain, the data output terminal n2 of the previous sorting unit 11 is connected to the data input terminal n1 of the next sorting unit 11, and the signal output terminal m2 of the previous sorting unit 11 is connected to the signal input terminal m1 of the next sorting unit 11.

[0030] Specifically, the data input terminal n1 of the non-first sorting unit 11 in the first type sorting chain or the second type sorting chain is connected to the data output terminal n2 of the previous level sorting unit 11. For example, in the first type sorting chain L1, the data input terminal n1 of the second sorting unit 11 is connected to the data output terminal n2 of the first sorting unit 11; the data input terminal n1 of the nth sorting unit 11 is connected to the data output terminal n2 of the n-1th sorting unit 11.

[0031] The data output terminal n2 of the last sorting unit 11 in the first type sorting chain or the second type sorting chain serves as the data output terminal of the first type sorting chain or the second type sorting chain. For example, in the first type sorting chain L1, the data output terminal n2 of the nth sorting unit 11 serves as the data output terminal of the first type sorting chain L1.

[0032] The data input end n1 of the first sorting unit 11 in the first type sorting chain receives a group of data to be processed respectively in the input data sorting stage; the data input end of the first sorting unit 11 of the second type sorting chain is configured to receive a group of data to be processed in the input data sorting stage, so that in the input data sorting stage, the first type sorting chain and the second type sorting chain receive a group of data to be processed respectively, and use the sorting unit 11 in the first type sorting chain or the second type sorting chain to sort the group of data to be processed, so that the first n data to be processed in the group of data to be processed sorted according to the sorting requirements are sequentially stored in the storage module of the sorting unit of the first type sorting chain or the second type sorting chain to obtain an initial sorting result.

[0033] Specifically, the data input terminal n1 of the first sorting unit 11 of the first type sorting chain L1 is connected to the first data input terminal to be processed; the data input terminal n1 of the first sorting unit 11 of the first type sorting chain La is connected to the nth data input terminal to be processed; the data input terminal n1 of the first sorting unit 11 of the second type sorting chain La+1 is connected to the n+1th data input terminal to be processed. In the input data sorting stage, the first sorting unit 11 of the first type sorting chain L1 receives the first group of data to be processed and sorts the first group of data to be processed, and temporarily stores the first n data to be processed sorted according to the sorting requirements in the register module R of the sorting unit 11 of the first type sorting chain L1 in sequence to obtain an initial sorting result. The first sorting unit 11 of the first type sorting chain La receives the nth group of data to be processed and sorts the nth group of data to be processed, and temporarily stores the first n data to be processed sorted according to the sorting requirements in the register module R of the sorting unit 11 of the first type sorting chain La in sequence to obtain an initial sorting result. The first sorting unit 11 of the second type sorting chain La+1 receives the n+1th group of data to be processed and sorts the n+1th group of data to be processed, and temporarily stores the first n data to be processed sorted according to the sorting requirements in sequence in the storage module R of the sorting unit 11 of the second type sorting chain La+1 to obtain an initial sorting result.

[0034] In one embodiment, the signal input end of the non-first sorting unit in the first type sorting chain or the second type sorting chain is connected to the signal output end of the previous level sorting unit. For example, in the first type sorting chain L1, the signal input end m1 of the second sorting unit 11 is connected to the signal output end m2 of the first sorting unit 11; for another example, in the second type sorting chain La+1, the signal input end m1 of the second sorting unit 11 is connected to the signal output end m2 of the first sorting unit 11.

[0035] The signal input end of the first sorting unit of the non-first first type sorting chain is connected to the signal output end of the last sorting unit of the previous level first type sorting chain. Figure 1As shown, L1 is at the end of the data stream of all first-type sorting chains, and La is at the beginning of the data stream of all first-type sorting chains, that is, La is the first first-type sorting chain, and L1 is not the first first-type sorting chain. Specifically, in one embodiment, if a=2, the signal input terminal m1 of the first sorting unit 11 of the first-type sorting chain L1 is connected to the signal output terminal m2 of the last sorting unit 11 of the first-type sorting chain La. If a>5, the signal input terminal m1 of the first sorting unit 11 of the first-type sorting chain L1 is connected to the signal output terminal m2 of the last sorting unit 11 of the first-type sorting chain L2. Figure 1 The embodiment shown takes a=2 as an example.

[0036] The signal input terminal of the first sorting unit in the first first type sorting chain or the second type sorting chain is used as the initial data receiving terminal to receive the initial data. Specifically, the signal input terminal m1 of the first sorting unit 11 of the first type sorting chain La is the initial data receiving terminal to receive the initial data Min, and the signal input terminal m1 of the first sorting unit 11 of the second type sorting chain La+1 is the initial data receiving terminal to receive the initial data Min.

[0037] Specifically, in the data re-sorting stage, the input end y1 of the register module R in the sorting unit 11 in the first type sorting chain is configured to be connected to the signal input end m1, thereby forming a beat control unit, so as to sequentially output the initial sorting result stored in the first type sorting chain at the signal output end m2 of the sorting unit 11 at the end of the first type sorting chain. The input end y1 of the register module R in the sorting unit 11 in the second type sorting chain is configured to be connected to the first output end x3 of the comparison module P, and the data input end n1 of the first sorting unit 11 in the second type sorting chain is configured to be connected to the signal output end m2 of the sorting unit 11 at the end of the first type sorting chain, so as to re-sort the initial sorting results of the first type sorting chain and the second type sorting chain, and store them in the register module R of the sorting unit 11 of the second type sorting chain, so as to obtain the final sorting result.

[0038] Specifically, Figure 1As shown, in the data re-sorting stage, the input end y1 of the register module R in the sorting unit 11 in the first type sorting chain L1 and the first type sorting chain La is connected to the signal input end m1, thereby forming a beat control unit. The signal output end m2 of the sorting unit 11 at the end of the last first type sorting chain (that is, the first type sorting chain L1) (that is, the last sorting unit 11 of the first type sorting chain L1) sequentially outputs the initial sorting results stored in the first type sorting chain (including the first type sorting chain L1 to the first type sorting chain La). The input end y1 of the register module R in the sorting unit 11 in the second type sorting chain La+1 is configured to be connected to the first output end x3 of the comparison module P, and the data input end n1 of the first sorting unit 11 in the second type sorting chain La+1 is configured to be connected to the signal output end m2 of the last sorting unit 11 of the first type sorting chain L1, receive the initial sorting results of the first type sorting chain L1 to the first type sorting chain La, and re-sort the initial sorting results of the first type sorting chain L1 to the first type sorting chain La and the initial sorting results of the second type sorting chain La+1, and store them in the register module R of the sorting unit 11 of the second type sorting chain La+1 to obtain the final sorting result.

[0039] In one embodiment, the sorting unit 11 further includes: a first temporary storage module Q1, which is arranged between the second output terminal x4 of the comparison module P and the data output terminal n2, so as to output the second type of persons to the next level sorting unit 11 through the data output terminal n2 at the next working pulse. That is, in the first type sorting chain L1, after the first sorting unit 11 temporarily stores the first type of persons in the register module R, it further outputs the second type of persons to the second sorting unit 11 through the data output terminal n2 at the first working pulse; further, after the second sorting unit 11 temporarily stores the first type of persons in the register module R, it further outputs the second type of persons to the third sorting unit 11 through the data output terminal n2 at the second working pulse.

[0040] In one embodiment, the sorting unit 11 further includes: a first switch T1, which is arranged between the input terminal y1 of the register module R, the first output terminal x3 of the comparison module P and the signal input terminal m1, so that the input terminal y1 of the register module R can be selectively connected to the first output terminal x3 of the comparison module P or the signal input terminal m1.

[0041] In one embodiment, the sorting unit 11 further includes: a control signal input terminal V1 and a control signal output terminal V2, and a second temporary storage module Q2; the second temporary storage module Q2 is connected to the control signal input terminal V1 and the control signal output terminal V2. The control signal input terminal V1 of the sorting unit 11 in the first type sorting chain or the second type sorting chain is connected to the control signal output terminal V2 of the next level sorting unit 11 to receive the control signal transmitted from the next level sorting unit 11, thereby controlling the first switch T1 of the current level sorting unit 11. For example, in the first type sorting chain L1, the control signal input terminal V1 of the first sorting unit 11 is connected to the control signal output terminal V2 of the second sorting unit 11, receives the control signal transmitted from the second sorting unit 11, and then controls the first switch T1 in the first sorting unit 11.

[0042] The control signal output terminal of the first sorting unit of the first type sorting chain is connected to the control signal input terminal of the sorting unit at the end of the previous first type sorting chain, and the control signal input terminal of the sorting unit at the end of the last first type sorting chain is used to receive the first control signal S1, so as to transmit the first control signal S1 step by step in the first type sorting chain. For example, the control signal output terminal V2 of the first sorting unit 11 of the first type sorting chain L1 is connected to the control signal input terminal V1 of the last sorting unit 11 of the first type sorting chain La. The control signal input terminal V1 of the sorting unit at the end of the last first type sorting chain (that is, the first type sorting chain L1) (that is, the last sorting unit 11 of the first type sorting chain L1) receives the first control signal S1, and transmits the first control signal S1 step by step in the first type sorting chain L1 to the first type sorting chain La.

[0043] The control signal input terminal V1 of the sorting unit 11 at the end of the second type sorting chain La+1 is used to receive the second control signal S2 so as to transmit the second control signal S2 stage by stage in the second type sorting chain La+1.

[0044] In one embodiment, the sorting circuit further includes: a second switch T2, which is arranged between the data input terminal n1 of the first sorting unit 11 of the second type sorting chain La+1, the signal output terminal m2 of the sorting unit 11 at the end of the first type sorting chain L1, and the data port of the second type sorting chain receiving the data to be processed (that is, the data port of the second type sorting chain La+1 receiving the data to be processed), and receives a third control signal S3, so as to configure the data input terminal n1 of the first sorting unit 11 of the second type sorting chain La+1 to be connected to the signal output terminal m2 of the sorting unit 11 at the end of the first type sorting chain L1 or the data interface receiving the data to be processed (that is, the data port of the second type sorting chain La+1 receiving the data to be processed) based on the third control signal S3.

[0045] Specifically, in the sorting circuit of this embodiment, in the initialization stage, the first control signal S1 controls the first switch T1 in all sorting units 11 to connect the signal input terminal m1 and the initial data Min, thereby restoring to the initialization state. It should be noted that the n×a sorting units 11 in L1 and La are initialized by 2n×a beats. The n sorting units 11 in La+1 are initialized by 2n beats.

[0046] In the input data sorting stage, the third control signal S3 controls the second switch T2 to connect the to-be-processed data input terminal of the second type sorting chain La+1; at this time, the to-be-processed data input terminals of the first type sorting chain L1-La and the second type sorting chain La+1 receive the to-be-processed data and sort them to obtain the initial sorting result. Assuming that there are O to-be-processed data, the O to-be-processed data are sorted through a+1 parallel paths, and after O÷(a+1)+n beats, n×(a+1) initial sorting results are generated and distributed in the register modules R of each sorting unit.

[0047] In the re-sorting stage, the third control signal S3 controls the second switch T2 to connect the data output terminal m2 of the sorting unit 11 at the end of the first type sorting chain L1, and the first control signal S1 controls the initial sorting data to be input to the second type sorting chain La+1, so that the second type sorting chain La+1 re-sorts the initial sorting results of the first type sorting chain L1-La and the initial sorting results of the second type sorting chain La+1. Specifically, after 2n×((a+1)-1)+n beats, n final sorting results are generated and distributed in the register modules R of the n sorting units 11 in the second type sorting chain La+1. At the same time, the register module R values ​​of the n×((a+1)-1) sorting units 11 in the first type sorting chain L1-La are initialized again.

[0048] After the re-sorting is completed, the second control signal S2 controls the first switch T1 to connect the signal input terminal m1, and after 2n beats, the final sorting result is output from the signal output terminal m2. At the same time, the register module R values ​​of the n sorting units 11 in the second type sorting chain La+1 are initialized again.

[0049] It should be noted that the first type of the present application is the larger of the current data to be processed and the stored data, and the second type is the smaller of the current data to be processed and the stored data. That is, the final sorting result is the sorting output from the minimum value to the maximum value, that is, the minimum value is output first, and the maximum value is output last.

[0050] The sorting circuit of the present application utilizes a series of combinational circuit designs to quickly obtain sorting results for any number of input data. The input data only needs to flow into the circuit once, which has an acceleration advantage in deep learning networks that need to sort and search for final results. In the case of more hardware resources, one combination circuit can be copied into multiple circuits, and the multiple circuits are designed to be connected end to end to ensure that the results of concurrent accelerated sorting complete the final sorting output. In the case of one or more circuits, there is no need to use any external storage medium to cache intermediate results, saving storage resources. Except for the first initialization of the initial value in the comparator, the remaining initialization actions are hidden during the export of the previous round of sorting data, thereby improving sorting efficiency.

[0051] See also Figure 3 , is a schematic diagram of the structure of an embodiment of a chip of the present invention, the chip includes a chip body 31 and a sorting circuit 32 integrated on the chip body 31. The sorting circuit 32 is the above Figure 1 to Figure 2 The specific structure of the sorting circuit 32 is as described above and will not be repeated here.

[0052] The above are only implementation modes of the present invention, and are not intended to limit the patent scope of the present invention. Any equivalent structure or equivalent process transformation made using the contents of the present invention specification and drawings, or directly or indirectly applied in other related technical fields, are also included in the patent protection scope of the present invention.

Claims

1. A sorting circuit, characterized in that: include: A plurality of first-type sorting chains, wherein the first-type sorting chains include n sequentially connected sorting units; The second type of sorting chain includes n sorting units connected in sequence; Wherein, in the input data sorting stage, the first type sorting chain and the second type sorting chain are configured to respectively receive a group of to-be-processed data, so as to perform initial sorting on the to-be-processed data in parallel, and obtain initial sorting results; in the data re-sorting stage, the second type sorting chain is further configured to re-sort the initial sorting results of the first type sorting chain and the second type sorting chain, so as to obtain n final sorting results; The sorting unit comprises: a data input terminal and a data output terminal; a signal input terminal and a signal output terminal; a register module; and a comparison module, wherein a first input terminal of the comparison module is connected to a data input terminal of the sorting unit to receive current data to be processed, a second input terminal of the comparison module is connected to the register module to read the register data in the register module, and the comparison module compares the current data to be processed with the register data; Among them, in the input data sorting stage, the input end of the storage module is configured to be connected to the first output end of the comparison module, and the first type of the current data to be processed and the stored data are stored in the storage module; the second output end of the comparison module is connected to the data output end, so as to output the current data to be processed and the second type of the stored data to the next level sorting unit through the data output end.

2. The sorting circuit according to claim 1, characterized in that: The data input end of the non-first sorting unit in the first type sorting chain or the second type sorting chain is connected to the data output end of the previous level sorting unit; The data output end of the last sorting unit in the first type sorting chain or the second type sorting chain is used as the data output end of the first type sorting chain or the second type sorting chain. The data input end of the first sorting unit in the first type sorting chain receives a group of the to-be-processed data respectively in the input data sorting stage, and the data input end of the first sorting unit in the second type sorting chain is configured to receive a group of the to-be-processed data in the input data sorting stage, so that in the input data sorting stage, the group of to-be-processed data is sorted by the sorting unit in the first type sorting chain or the second type sorting chain, so that the first n to-be-processed data in the group of to-be-processed data sorted according to the sorting requirements are respectively stored in sequence in the storage modules of the sorting units in the first type sorting chain or the second type sorting chain to obtain the initial sorting result.

3. The sorting circuit according to claim 2, characterized in that: The signal input end of the non-first sorting unit in the first type sorting chain or the second type sorting chain is connected to the signal output end of the previous level sorting unit; The signal input end of the first sorting unit of the non-first first type sorting chain is connected to the signal output end of the sorting unit at the end of the previous level first type sorting chain; The signal input terminal of the first sorting unit in the first sorting chain of the first type or the first sorting unit in the second sorting chain of the second type serves as an initial data receiving terminal to receive the initial data; In the data re-sorting stage, the input end of the register module in the sorting unit in the first type sorting chain is configured to be connected to the signal input end, so as to form a beat control unit, so as to sequentially output the initial sorting result stored in the first type sorting chain at the signal output end of the sorting unit at the end of the first type sorting chain; the input end of the register module in the sorting unit in the second type sorting chain is configured to be connected to the first output end of the comparison module, and the data input end of the first sorting unit in the second type sorting chain is configured to be connected to the signal output end of the sorting unit at the end of the first type sorting chain at the end, so as to re-sort the initial sorting results of the first type sorting chain and the second type sorting chain, and store them in the register module of the sorting unit in the second type sorting chain, so as to obtain the final sorting result.

4. The sorting circuit according to claim 3, characterized in that: The sorting unit further comprises: The first temporary storage module is arranged between the second output terminal of the comparison module and the data output terminal, so as to output the second type to the next level sorting unit through the data output terminal in the next working pulse.

5. The sorting circuit according to claim 4, characterized in that: The sorting unit further comprises: The first switch is arranged between the input end of the register module, the first output end of the comparison module and the signal input end, so that the input end of the register module can be selectively connected to the first output end of the comparison module or the signal input end.

6. The sorting circuit according to claim 5, characterized in that: The sorting unit further comprises: A control signal input terminal and a control signal output terminal; a second temporary storage module, connected to the control signal input end and the control signal output end, wherein the control signal input end of the sorting unit in the first type sorting chain or the second type sorting chain is connected to the control signal output end of the next level sorting unit to receive the control signal transmitted from the next level sorting unit, thereby controlling the first switch of the sorting unit at this level; The control signal output terminal of the first sorting unit of the first type sorting chain is connected to the control signal input terminal of the last sorting unit of the previous first type sorting chain, and the control signal input terminal of the last sorting unit of the last first type sorting chain is used to receive the first control signal, so as to transmit the first control signal step by step in the first type sorting chain; The control signal input terminal of the sorting unit at the end of the second type sorting chain is used to receive a second control signal so as to transmit the second control signal stage by stage in the second type sorting chain.

7. The sorting circuit according to claim 6, characterized in that: Further including: The second switch is arranged between the data input end of the first sorting unit of the second type sorting chain, the signal output end of the sorting unit at the end of the first type sorting chain, and the data interface of the second type sorting chain receiving the data to be processed, and receives a third control signal to configure the data input end of the first sorting unit of the second type sorting chain to be connected to the signal output end of the sorting unit at the end of the first type sorting chain or the data interface receiving the data to be processed based on the third control signal.

8. The sorting circuit according to claim 1, characterized in that: The first type is the larger of the current data to be processed and the stored data, and the second type is the smaller of the current data to be processed and the stored data; The data to be processed are obtained after sorting the data groups.

9. A chip, characterized in that: Comprising a sorting circuit as described in any one of claims 1-8.

Citation Information

Patent Citations

  • Cascade structure circuit and method for realizing data sorting

    CN104317549A