PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes

By using a bridge circuit with P-channel and N-channel MOSFET tubes in the PWM power amplifier circuit, the existing circuit design is complex and the output cannot be kept constant is solved, and circuit simplification and output stability are improved.

CN114362612BActive Publication Date: 2025-05-16HEBEI HANGUANG HEAVY IND
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Patent Information

Application Number
CN202111440073.9
Authority / Receiving Office
CN · China
Patent Type
Patents(China)
Current Assignee / Owner
Filing Date
2021-11-30
Publication Date
2025-05-16
Estimated Expiration
2041-11-30

AI Technical Summary

Technical Problem

The existing PWM power amplifier circuit is designed in complex ways, and a pump-up circuit is required to drive a dual N-channel MOSFET tube bridge circuit, and the output cannot be kept at a high level.

Method used

The PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes is adopted, and there is no need for a pump-up circuit. The bridge circuit is formed by the MOSFET tube gate driving module, fast recovery diode and voltage regulator tube to ensure that the output is always maintained at a high level.

Benefits of technology

The circuit design is simplified, the requirements for the gate drive module are reduced, and the pump-up circuit is not required, and the output can be kept at a high level, improving the stability and efficiency of the circuit.

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Abstract

The present invention proposes a PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes, which does not require a pump-up circuit to conduct the bridge arm of the bridge circuit, and the circuit output can be constantly maintained at a high level. The circuit structure of the present invention is simple, the requirements for the gate drive module are low, and a pump-up circuit is not required to conduct the bridge arm of the bridge circuit; the circuit output can be constantly maintained at a high level.
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Description

Technical Field

[0001] The invention relates to the technical field of PWM power amplification, and in particular to a PWM power amplification circuit based on P-channel and N-channel MOSFET tubes. Background Art

[0002] The prior art basically uses dual N-channel MOSFET tubes to form a power amplifier circuit, which has the following defects: the circuit design is complex, and dedicated driver chips are often used. The driver chip needs to be equipped with a pump-up circuit to drive the upper arm of the dual N-channel MOSFET tube bridge circuit; the output of the power amplifier cannot be maintained at a constant high level, that is, when the duty cycle of the PWM control signal is 100%, the output of the power amplifier circuit cannot be maintained. Summary of the invention

[0003] In view of this, the present invention proposes a PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes, which does not require a pump-up circuit to conduct the upper arm of the bridge circuit, and the circuit output can be constantly maintained at a high level.

[0004] To achieve the above object, the technical solution of the present invention is:

[0005] The present invention discloses a PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes, comprising a MOSFET tube gate drive module, a resistor R1, a resistor R2, a fast recovery diode V1, a fast recovery diode V2, a P-channel enhancement type MOSFET tube, an N-channel enhancement type MOSFET tube, a voltage regulator tube V3 and a voltage regulator tube V4; wherein the power supply end of the gate drive module is respectively connected to the positive and negative electrodes Va and VTa of the power supply, the input end is connected to the PWM signal of the MCU, and the output end is connected to the V1. The positive electrode, the negative electrode of V2, one end of R1 and one end of R2 are connected; V1 and R1 are connected in parallel, the negative electrode of V1 is connected to the positive electrode of V3 and the G electrode of P-MOS; the negative electrode of V3 is connected to the S electrode of P-MOS and connected to Va; V2 and R2 are connected in parallel, the positive electrode of V2 is connected to the positive electrode of V4 and the G electrode of N-MOS; the negative electrode of V4 is connected to the D electrode of N-MOS and connected to VTa; the D electrode of P-MOS is connected to the S electrode of N-MOS as the output of the bridge circuit.

[0006] Among them, the gate drive module selects a mature gate drive circuit or integrated circuit.

[0007] Among them, it forms a driving circuit of a brushless DC torque motor with the MCU and the isolation module; the driving circuit is used to drive the U phase in the motor.

[0008] Wherein, the MCU is selected from a single chip microcomputer, a DSP or a FPGA.

[0009] Wherein, the isolation module uses optical isolation or digital isolation.

[0010] Among them, the isolation module and the gate drive module use isolated gate drivers, which integrate the digital isolation module and the gate drive module.

[0011] Among them, it is used for brushless motor drive, landing gear retraction and extension, and optoelectronic pod.

[0012] Beneficial effects:

[0013] The circuit structure of the present invention is simple, the requirements for the gate drive module are low, and a pump-up circuit is not required to conduct the bridge arm of the bridge circuit; the circuit output can be constantly maintained at a high level. BRIEF DESCRIPTION OF THE DRAWINGS

[0014] Figure 1 The present invention is a schematic diagram of a power amplifier circuit based on a P-channel enhancement type MOSFET tube and an N-channel enhancement type MOSFET tube.

[0015] Figure 2 The present invention is a schematic diagram of a PWM signal power amplifier circuit used to drive a brushless DC torque motor.

[0016] Figure 3 The figure is a schematic diagram of a U-phase power amplifier circuit of a brushless motor when the present invention is applied to drive a brushless DC torque motor. DETAILED DESCRIPTION

[0017] The present invention is described in detail below with reference to the accompanying drawings and embodiments.

[0018] The present invention solves the problem of realizing power amplification of PWM signals. Based on the conduction characteristics of P-channel enhancement type MOSFET tubes and N-channel enhancement type MOSFET tubes, a bridge circuit based on P-channel enhancement type MOSFET tubes and N-channel enhancement type MOSFET tubes is proposed to achieve the purpose of power amplification of PWM signals. The circuit structure is as follows Figure 1 As shown in the figure, D1 is a MOSFET gate drive module, which can be a mature circuit combination or integrated circuit. The module is powered by connecting the positive and negative electrodes of the voltage Va and VTa. The input is a PWM signal, and the output is a gate drive signal with high and low levels of Va and VTa respectively; R1 and R2 are resistors of appropriate resistance values; V1 and V2 are fast recovery diodes; P-MOS is a P-channel enhancement MOSFET tube, N-MOS is an N-channel enhancement MOSFET tube, V3 and V4 are voltage regulators, and the voltage regulator values ​​should not be greater than the gate withstand voltage values ​​of P-MOS and N-MOS, respectively, which are set as Vp and Vn.

[0019] Specifically, the power supply end of the gate drive module D1 is connected to the positive and negative poles Va and VTa of the power supply respectively, the input end of D1 is connected to the PWM signal of the MCU, and the output end of D1 (the position is marked as A here) is connected to the positive pole of V1, the negative pole of V2, one end of R1, and one end of R2. V1 is connected in parallel with R1, and the negative pole of V1 (the position is marked as B here) is connected to the positive pole of V3 and the G pole of P-MOS; the negative pole of V3 is connected to the S pole of P-MOS and connected to Va. V2 is connected in parallel with R2, and the positive pole of V2 (the position is marked as C here) is connected to the positive pole of V4 and the G pole of N-MOS; the negative pole of V4 is connected to the D pole of N-MOS and connected to VTa. The D pole of P-MOS is connected to the S pole of N-MOS as the output Vout of the bridge circuit.

[0020] Circuit working principle:

[0021] (1) The gate drive module outputs a high level, that is, when the voltage at point A is equal to Va, the voltage at point B is the same as the voltage at point A, which is Va. At this time, due to the conduction characteristics of the P-channel enhancement MOSFET tube, the P-MOS is cut off. Due to the existence of the voltage regulator tube V4, the voltage at point C is Vn. At this time, due to the conduction characteristics of the N-channel enhancement MOSFET tube, the N-MOS is turned on. The circuit outputs Vout = VTa;

[0022] (2) The gate drive module outputs a low level, that is, when the voltage at point A is equal to VTa, the voltage at point C is the same as the voltage at point A, which is VTa. At this time, due to the conduction characteristics of the N-channel enhancement MOSFET tube, the N-MOS is cut off. Due to the existence of the voltage regulator tube V3, the voltage at point B is Vp. At this time, due to the conduction characteristics of the P-channel enhancement MOSFET tube, the P-MOS is turned on. The circuit outputs Vout = Va.

[0023] (3) When point A changes from Va to VTa, V1 is turned off. Due to the existence of R1, the P-MOS is turned on with a delay. V2 is turned on, R2 does not pass current, and the N-MOS is turned off immediately. That is, the N-MOS is turned off immediately and the P-MOS is turned on with a delay, which prevents the P-MOS and N-MOS from being turned on at the same time.

[0024] (4) When point A changes from VTa to Va, V2 is turned off. Due to the existence of R2, N-MOS is turned on with delay. V1 is turned on, R1 does not pass current, and P-MOS is turned off immediately. That is, P-MOS is turned off immediately and N-MOS is turned on with delay, which prevents P-MOS and N-MOS from being turned on at the same time.

[0025] The power amplifier circuit of PWM signal is often used to drive DC motor. Application examples include Figure 2 As shown, it is used to drive a brushless DC torque motor. It is known that the rated voltage of the motor is 28V and the peak stall current is 6A.

[0026] The MCU in the example can be a single chip microcomputer, a DSP or an FPGA, etc. The isolation module can be optical isolation or digital isolation, and the gate drive module can be a mature gate drive circuit or integrated circuit.

[0027] The circuit structure of this example is as follows Figure 3 As shown in the figure, this circuit is used to drive the U phase in the motor. The isolation module and gate drive module use ADUM4120 isolated gate driver from AD, which integrates digital isolation module and gate drive module, supports 2.5V-6.5V low-level signal input and 4.5V to 35V high-level gate drive output, and the peak current can reach 2.3A.

[0028] The P-channel MOSFET tube selected is the IRFH9310PdF chip from Infineon, with a drain voltage VDS of -30V, a maximum output current ID of -21A, and a gate voltage VGS of ±20V.

[0029] The N-channel MOSFET tube selected is the IRF40H210 chip of Infineon, with a drain voltage VDSS of 40V, a maximum output current ID of 201A, and a gate voltage of ±20V.

[0030] The voltage regulator tubes V3 and V4 are 1SMB5927B from DIODES, with a voltage regulation value of 12V. The fast recovery diodes V1 and V2 are 1N4148 from DIODES.

[0031] Resistors R1 and R2 are 300 ohm and 1 W power resistors. When U1 outputs 28V, the voltage regulator V3 has a voltage regulator value of 12V, so the voltage difference across R1 is 16V. The current through R1 is about 0.053A, and the power of R1 is 0.848W, so a 1W power resistor is selected.

[0032] In the circuit process, when PWM1 is high level, D1 outputs a high level of 28V, the voltage difference between the gate and source of P1 is 0V, and the P1 tube is cut off; due to the voltage stabilization of V4, the voltage difference between the source and gate of N1 is 12V, and the N1 tube is turned on. The output of U1 is 28VGND.

[0033] When PWM1 is low, D1 outputs a low level 28VGND. Due to the presence of the V3 voltage regulator, the gate-source voltage difference of P1 is 12V, and P1 is turned on. The gate-source voltage difference of N1 is 0V, and N1 is turned off. U1 outputs 28V.

[0034] Since the current that can pass through P1 is 21A and the current that can pass through N1 is 201A, the motor stall peak current requirement of 6A is met.

[0035] The present invention can be applied to brushless motor driving, landing gear retraction and extension, optoelectronic pods, etc., with innovative content and mature technology.

[0036] In summary, the above are only preferred embodiments of the present invention and are not intended to limit the protection scope of the present invention. Any modifications, equivalent substitutions, improvements, etc. made within the spirit and principles of the present invention should be included in the protection scope of the present invention.

Claims

1. A PWM power amplifier circuit based on P-channel and N-channel MOSFET tubes, characterized in that: It includes a MOSFET gate drive module, a resistor R1, a resistor R2, a fast recovery diode V1, a fast recovery diode V2, a P-channel enhancement type MOSFET tube, an N-channel enhancement type MOSFET tube, a voltage regulator V3 and a voltage regulator V4; wherein, the power supply end of the gate drive module is respectively connected to the positive and negative electrodes Va and VTa of the power supply, the input end is connected to the PWM signal of the MCU, and the output end is connected to the positive electrode of V1, the negative electrode of V2, one end of R1 and one end of R2; V1 is connected in parallel with R1, the negative electrode of V1 is connected to the positive electrode of V3 and the P-MO The G pole of S is connected; the negative pole of V3 is connected to the S pole of P-MOS and connected to Va; V2 is connected in parallel with R2, the positive pole of V2 is connected to the positive pole of V4 and the G pole of N-MOS; the negative pole of V4 is connected to the D pole of N-MOS and connected to VTa; the D pole of P-MOS is connected to the S pole of N-MOS as the output of the bridge circuit; the gate drive module selects a mature gate drive circuit or integrated circuit; it forms a drive circuit of a brushless DC torque motor with MCU and an isolation module; the drive circuit is used to drive the U phase in the motor.

2. The circuit according to claim 1, characterized in that The MCU is selected from a single chip microcomputer, a DSP or a FPGA.

3. The circuit according to claim 1, characterized in that The isolation module uses optical isolation or digital isolation.

4. The circuit according to claim 1, characterized in that The isolation module and the gate drive module use an isolated gate driver, which integrates a digital isolation module and a gate drive module.

5. The circuit according to claim 1, characterized in that Used for brushless motor drive, landing gear retraction and optoelectronic pod.

Citation Information

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