Compilation method and device, electronic device and storage medium

Abstract

The present disclosure relates to a compilation method and device, an electronic device and a storage medium, the method comprising: obtaining a simulation function unit corresponding to a compilation process according to the compilation requirements of a task to be processed; obtaining a simulation evaluation result according to the simulation function unit and the compilation process; obtaining a compilation result of the task to be processed according to the simulation evaluation result and the compilation process; and obtaining an execution result by executing the compilation result through a hardware device. According to the compilation method of an embodiment of the present disclosure, the functions of the simulation device can be decomposed into a plurality of simulation function units. During the simulation process, the execution process of the corresponding hardware unit can be simulated separately without simulating the entire hardware. Furthermore, the plurality of compilation processes can be evaluated and optimized separately in a targeted manner to improve the flexibility and efficiency of the optimization, and the efficiency and accuracy of the compilation can be improved.

Description

Technical Field

[0001] The present disclosure relates to the field of computer technology, and in particular to a compiling method and device, an electronic device, and a storage medium. Background Art

[0002] In a complete computer system, compilation is the bridge between the top-level applications and programs and the underlying hardware. Compilation can convert high-level representations into representations closer to the hardware level, for example, converting high-level programming languages ​​into machine executable code.

[0003] In the related art, compilation can be implemented by a compiler, and the compiler architecture can be based on the architecture of the compilation process (pass) and the process scheduler. The compilation process generally refers to an optimization process or an information acquisition process in the compiler. A compilation process will change the program structure or collect program information. The compilation process library is responsible for storing all the compilation processes involved in the compiler. When executing a specific compilation task, the process scheduler will generate a process list according to the compilation requirements, that is, the compilation process that needs to be executed for this compilation. When the compilation is executed, the initial program can be compiled through all the compilation processes in the process list to obtain the final compilation result, for example, machine executable code.

[0004] Furthermore, during the compilation process, optimization can also be performed based on the compilation results. For example, when the compilation results do not meet the requirements, the initial program can be adjusted. However, when the compilation process is relatively complex, especially when iterative optimization is required based on a certain evaluation result, the compilation and optimization process does not present the various iterative optimization evaluation environments separately and flexibly. On the other hand, with the increasing complexity of hardware design, directly using this method requires compiling the initial program as a whole, and also requires simulating the complex hardware as a whole. The execution process of compilation and simulation can consume a lot of time and resources, reducing compilation efficiency. Summary of the invention

[0005] The present disclosure proposes a compilation method and device, an electronic device and a storage medium.

[0006] According to one aspect of the present disclosure, a compilation method is provided, comprising: according to the compilation requirements of a task to be processed, obtaining simulation function units corresponding to each compilation process of the task to be processed, the simulation function units corresponding to the functions of a simulation device, the simulation device being used to simulate a hardware device that executes the task to be processed, each of the simulation function units being used to implement its own specific simulation function, the simulation function units corresponding to hardware units of the hardware device; according to the simulation function units and the compilation process, obtaining a simulation evaluation result of the compilation process; according to the simulation evaluation result and the compilation process, obtaining a compilation result of the task to be processed; and obtaining an execution result of the task to be processed by executing the compilation result on the hardware device corresponding to the task to be processed.

[0007] In a possible implementation, the method further includes: obtaining a simulation function unit library according to the function of the simulation device and the execution state of the hardware device, wherein the simulation function unit library includes simulation function units corresponding to function units of multiple functions of the simulation device.

[0008] In one possible implementation, according to the compilation requirements of the task to be processed, the simulation function units corresponding to the compilation processes of the task to be processed are obtained, including: according to the compilation requirements of the task to be processed, obtaining from the simulation function unit library a list of simulation function units for simulating the compilation processes of the task to be processed; and in the simulation function unit list, determining the simulation function units corresponding to the compilation processes of the task to be processed.

[0009] In one possible implementation, based on the compilation requirements of the task to be processed, a simulation functional unit corresponding to each compilation process of the task to be processed is obtained, including: based on the compilation requirements of the task to be processed, the simulation functional unit library and each compilation process of the task to be processed, an optimization pair list including at least one optimization pair is obtained, wherein the optimization pair includes a functional pair consisting of the compilation process and the corresponding simulation functional unit.

[0010] In one possible implementation, based on the simulation function unit and the compilation process, a simulation evaluation result of the compilation process is obtained, including: obtaining an intermediate compilation result of the compilation process; executing the intermediate compilation result through the simulation function unit to obtain an intermediate execution result; and evaluating the intermediate execution result through the simulation function unit to obtain the simulation evaluation result.

[0011] In a possible implementation, obtaining a compilation result of the task to be processed according to the simulation evaluation result and the compilation process includes: obtaining the compilation result according to the compilation intermediate result when the simulation evaluation result meets a preset evaluation condition.

[0012] In a possible implementation, a compilation result of the task to be processed is obtained based on the simulation evaluation result and the compilation process, including: when the simulation evaluation result does not meet the preset evaluation condition, adjusting the compilation process and obtaining an adjusted compilation intermediate result; when the simulation evaluation result of the adjusted compilation intermediate result meets the preset evaluation condition, obtaining the compilation result based on the adjusted compilation intermediate result.

[0013] According to one aspect of the present disclosure, a compilation device is provided, comprising: a memory for storing simulation function units and compilation processes, the simulation function units corresponding to the functions of the simulation device, the simulation device for simulating hardware devices, each of the simulation function units for realizing its own specific simulation function, and the simulation function units corresponding to the hardware units of the hardware device; a compilation process scheduler for calling the compilation process in the memory; a simulation function unit scheduler for calling the simulation function units corresponding to the compilation process in the memory; a compilation process runner for executing the compilation process; a simulation function unit runner for obtaining a simulation evaluation result of the compilation process according to the simulation function units and the compilation process; the compilation device is used to determine the compilation process and the simulation function units to be called according to the compilation requirements of the task to be processed, and obtain the compilation result of the task to be processed according to the simulation evaluation result and the compilation process, so that the hardware device corresponding to the task to be processed can execute the compilation result and obtain the execution result of the task to be processed.

[0014] In one possible implementation, the apparatus is further used to obtain a simulation function unit library according to the function of the simulation device and the execution status of the hardware device, and store the library in the memory, wherein the simulation function unit library includes simulation function units corresponding to function units of multiple functions of the simulation device.

[0015] In one possible implementation, the device is further used to: obtain, from the simulation function unit library, a list of simulation function units for simulating the compilation process of the task to be processed according to the compilation requirements of the task to be processed; and determine, in the simulation function unit list, the simulation function units corresponding to each compilation process of the task to be processed.

[0016] In one possible implementation, the device is further used to obtain an optimization pair list including at least one optimization pair based on the compilation requirements of the task to be processed, the simulation function unit library and the compilation processes of the task to be processed, wherein the optimization pair includes a functional pair consisting of the compilation process and the corresponding simulation function unit.

[0017] In a possible implementation, the simulation function unit runner is further used to: obtain an intermediate compilation result of the compilation process; execute the intermediate compilation result through the simulation function unit to obtain an intermediate execution result; evaluate the intermediate execution result through the simulation function unit to obtain the simulation evaluation result.

[0018] In a possible implementation, the device is further configured to: obtain the compilation result according to the compilation intermediate result when the simulation evaluation result satisfies a preset evaluation condition.

[0019] In a possible implementation, the device is further used to: when the simulation evaluation result does not meet the preset evaluation conditions, adjust the compilation process and obtain an adjusted compilation intermediate result; when the simulation evaluation result of the adjusted compilation intermediate result meets the preset evaluation conditions, obtain the compilation result according to the adjusted compilation intermediate result.

[0020] According to one aspect of the present disclosure, an electronic device is provided, comprising: a processor; and a memory for storing processor-executable instructions; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0021] According to one aspect of the present disclosure, a computer-readable storage medium is provided, on which computer program instructions are stored, and the computer program instructions implement the above method when executed by a processor.

[0022] According to the compilation method of the embodiment of the present invention, the functions of the simulation device can be decomposed into multiple simulation functional units. During the simulation process, the execution process of the corresponding hardware unit can be simulated separately without simulating the entire hardware. Furthermore, targeted evaluation and optimization can be carried out separately with multiple compilation processes to improve the flexibility and efficiency of optimization, and the efficiency and accuracy of compilation can be improved.

[0023] It should be understood that the above general description and the following detailed description are exemplary and explanatory only and do not limit the present disclosure. Other features and aspects of the present disclosure will become clear from the following detailed description of exemplary embodiments with reference to the accompanying drawings. BRIEF DESCRIPTION OF THE DRAWINGS

[0024] The drawings herein are incorporated into the specification and constitute a part of the specification. These drawings illustrate embodiments consistent with the present disclosure and are used to illustrate the technical solutions of the present disclosure together with the specification.

[0025] Figure 1 A flowchart showing a compiling method according to an embodiment of the present disclosure is shown;

[0026] Figure 2 A schematic diagram showing an acquisition simulation function unit according to an embodiment of the present disclosure;

[0027] Figure 3 A schematic diagram showing an interaction and optimization process according to an embodiment of the present disclosure;

[0028] Figure 4 A schematic diagram showing an interaction and optimization process according to an embodiment of the present disclosure;

[0029] Figure 5 A schematic diagram showing a simulation function unit according to an embodiment of the present disclosure;

[0030] Figure 6 A block diagram showing a compiling device according to an embodiment of the present disclosure is shown;

[0031] Figure 7 A block diagram of an electronic device according to an embodiment of the present disclosure is shown. DETAILED DESCRIPTION

[0032] Various exemplary embodiments, features and aspects of the present disclosure will be described in detail below with reference to the accompanying drawings. The same reference numerals in the accompanying drawings represent elements with the same or similar functions. Although various aspects of the embodiments are shown in the accompanying drawings, the drawings are not necessarily drawn to scale unless otherwise specified.

[0033] The word “exemplary” is used exclusively herein to mean “serving as an example, example, or illustration.” Any embodiment described herein as “exemplary” is not necessarily to be construed as preferred or advantageous over other embodiments.

[0034] The term "and / or" herein is only a description of the association relationship of the associated objects, indicating that there may be three relationships. For example, A and / or B can represent: A exists alone, A and B exist at the same time, and B exists alone. In addition, the term "at least one" herein represents any combination of at least two of any one or more of a plurality of. For example, including at least one of A, B, and C can represent including any one or more elements selected from the set consisting of A, B, and C.

[0035] In addition, in order to better illustrate the present disclosure, numerous specific details are given in the following specific embodiments. It should be understood by those skilled in the art that the present disclosure can also be implemented without certain specific details. In some examples, methods, means, components and circuits well known to those skilled in the art are not described in detail in order to highlight the subject matter of the present disclosure.

[0036] Figure 1 A flowchart of a compiling method according to an embodiment of the present disclosure is shown. Figure 1 As shown, the method includes:

[0037] In step S11, according to the compilation requirements of the task to be processed, the simulation function units corresponding to the compilation processes of the task to be processed are obtained, the simulation function units correspond to the functions of the simulation device, the simulation device is used to simulate the hardware device that executes the task to be processed, each of the simulation function units is used to realize its own specific simulation function, and the simulation function units correspond to the hardware units of the hardware device;

[0038] In step S12, according to the simulation function unit and the compilation process, a simulation evaluation result of the compilation process is obtained;

[0039] In step S13, a compilation result of the task to be processed is obtained according to the simulation evaluation result and the compilation process;

[0040] In step S14, the compilation result is executed by a hardware device corresponding to the task to be processed to obtain an execution result of the task to be processed.

[0041] According to the compilation method of the embodiment of the present invention, the functions of the simulation device can be decomposed into multiple simulation functional units. During the simulation process, the execution process of the corresponding hardware unit can be simulated separately without simulating the entire hardware. Furthermore, targeted evaluation and optimization can be carried out separately with multiple compilation processes to improve the flexibility and efficiency of optimization, and the efficiency and accuracy of compilation can be improved.

[0042] In one possible implementation, the task to be processed may include processing or executing tasks in a high-level programming language. During the processing, the high-level programming language can be converted into machine executable code through compilation. For example, a computer can execute a code composed of 0 and 1. Therefore, the high-level programming language can be converted into a machine executable code composed of 0 and 1 through compilation, so that the computer can complete the processing of the task to be processed by executing the machine executable code.

[0043] In a possible implementation, as described above, during the compilation process, all compilation processes that the compiler can execute can be saved in a compilation process library for calling, and the process scheduler can call the compilation process from the compilation process library according to the compilation requirements. For example, the called compilation process can be formed into a compilation process list, so that according to the compilation process and the order in the list, the compilation process is called to compile the task to be processed and obtain the compilation result, for example, a machine executable code. The compilation requirements can be obtained based on the tasks to be processed. For example, if the tasks to be processed include communication tasks, there may be a corresponding requirement to compile the high-level programming language of the communication task. For another example, if the tasks to be processed include tasks for reading and writing memory, there may be a corresponding requirement to compile the high-level programming language for reading and writing memory. The present disclosure does not limit the specific compilation requirements. The above-mentioned compiler and process scheduler can be physical devices or virtual devices (for example, virtual functional modules), and the present disclosure does not limit this.

[0044] In a possible implementation, the simulation function unit may be obtained by decomposing the function of the simulation device, which is a device for simulating a hardware device. The simulation device may be implemented by computer software. For example, the software may simulate the process of the hardware device performing a certain task based on the performance and function of the hardware device to be simulated. For example, the software may simulate the process of the hardware device performing a certain task on a computer based on the structure, performance and other parameters of the hardware device, and obtain the result of performing the task, which is consistent with or similar to the result obtained by directly performing the task through the hardware device. The simulation device may be used in the development and design process of the hardware device, and the information such as the structure and parameters of the hardware may be developed and adjusted based on the simulation results.

[0045] In a possible implementation, in the compilation process, the hardware device can also be simulated by a simulation device, and the machine executable code obtained by the compilation can be executed by the simulation device to obtain the execution result of the machine executable code, which is consistent or similar to the result obtained by directly executing the machine executable code by the hardware device itself. Using the simulation device in the compilation process, the compilation process and the high-level program language corresponding to the machine executable code can be adjusted and improved by the execution result of the simulation device. For example, if the execution result obtained by the simulation device does not meet the requirements, it may be that there is a problem with the high-level program language. The high-level program language can be adjusted based on the aspects of the execution result that do not meet the requirements, for example, a certain aspect is modified, and recompiled and executed by the simulation device to determine whether the execution result meets the requirements. Alternatively, there may be problems in the compilation process. For example, a certain compilation process of the compilation process may fail to obtain qualified machine executable code, making it difficult for the simulation device to obtain an execution result that meets the requirements. In this case, the compilation process can be adjusted, for example, the compiler can be adjusted, etc., and the present disclosure does not limit this.

[0046] However, the above method of using simulation devices may have problems such as slow operation and difficulty in interaction. For example, the simulation device usually simulates the hardware device as a whole, and each simulation process must simulate the execution process of the hardware device as a whole, which runs relatively slowly. In addition, if a problem occurs, it may reflect that there is a problem with the execution result of the hardware device as a whole, and it is difficult to determine which specific link has a problem, that is, it is difficult to interact with each compilation process separately to determine whether there is a problem in each compilation process.

[0047] In a possible implementation, in order to solve the above problem, multiple simulation function units can be obtained based on the functions of the simulation device, so that each simulation function unit can interact with each compilation process separately, and the compilation process with problems can be accurately located. Each simulation function unit only performs individual functions of the simulation device, which can improve the running speed of each interactive process and improve the compilation efficiency. The method also includes: according to the functions of the simulation device and the execution status of the hardware device, obtaining a simulation function unit library, wherein the simulation function unit library includes simulation function units corresponding to the function units of multiple functions of the simulation device.

[0048] In a possible implementation, the functions of multiple aspects of the simulation device can be decomposed, for example, the functions can be decomposed according to the compilation requirements, or decomposed according to the hardware units of the hardware device, and the simulation function units are obtained based on the execution state of the hardware device. The present disclosure does not limit the decomposition method.

[0049] In the example, the hardware device can be decomposed according to the hardware units of the hardware device. For example, the hardware device may include a memory, a communication unit (for example, a router), a power module (for example, capable of powering the hardware device and monitoring energy consumption), a controller, a processor, etc. The simulation device can simulate the functions of the above hardware units of the hardware device through software operation. Therefore, the functions of the hardware device simulated by the simulation device can be decomposed into multiple functional units, each of which corresponds to the hardware unit of the hardware device, and obtains a simulation functional unit corresponding to the memory, a simulation functional unit corresponding to the communication unit, a simulation functional unit corresponding to the power supply, a simulation functional unit corresponding to the controller, a simulation functional unit corresponding to the processor, etc. The present disclosure does not limit the specific types of the simulation functional units.

[0050] In the example, as described above, the simulation device can simulate the functions of the hardware device. When the hardware device is running, each hardware unit can run a specific function in a specific execution state. For example, the controller needs to run a specific function in a state where the power module provides power, and the processor needs to run a specific function in a state where the power module provides power and is scheduled by the controller. Therefore, the simulation function unit corresponding to each hardware unit can save a specific execution state, so that when the simulation is performed by any simulation function unit alone, the specific function can be run immediately based on the execution state alone. There is no need to call each hardware unit for overall operation like the hardware device. Therefore, there is no need to simulate the overall operation of the hardware device like the simulation device, thereby improving the efficiency of the simulation and the interaction efficiency with the compilation process.

[0051] Figure 2 A schematic diagram of obtaining a simulation function unit according to an embodiment of the present disclosure is shown, Figure 2 As shown, the simulation device can be decomposed according to the functional units, that is, multiple functional units of the simulation device can be extracted. In the example, the simulation device includes computer-executable simulation software, and the functions of the simulation software can be decomposed to obtain multiple functional units with single functions or specific functions, such as Figure 2 Functional unit 1…functional unit n (n is a positive integer).

[0052] In the example, the execution state of each functional unit may be obtained, and the execution state may include the environment state and interaction state of the corresponding hardware unit when executing a specific function, and the environment state may include the external conditions for the operation of the hardware unit, such as potential, timing, etc. The interaction state may include the interaction state between the hardware unit and other hardware units or the outside world, for example, the processor may execute a specific function when receiving a call from the controller, and the controller may execute a specific function when receiving an instruction from the outside world (e.g., an instruction from the user).

[0053] In the example, after obtaining the functional unit and the execution state, the functional unit and the execution state can be assembled and packaged, for example, the execution state can be set as a state parameter and saved, the functional unit can be set as a code package, etc., and the present disclosure does not limit this. After assembling and packaging, the simulation functional unit can be obtained.

[0054] In an example, multiple simulation function units of a simulation device can be obtained in the above manner, and a simulation function unit library can be obtained, so that simulation function units in the simulation function unit library can be called during the compilation process.

[0055] In a possible implementation, in step S11, in the compilation process, the corresponding simulation function unit may be called based on each compilation process to realize the interaction with each compilation process, so as to realize the targeted interaction and optimization process. The interaction and optimization process may be, in each compilation process, the compilation result obtained by running the compilation process through the corresponding simulation function unit, for example, the machine executable code, that is, the compilation result obtained by running the compilation process through the simulation function unit simulating a specific hardware unit, and the source program (for example, a high-level programming language) and / or the compilation process may be adjusted in a targeted manner based on whether the compilation result meets the requirements.

[0056] In a possible implementation, in order to realize the above-mentioned optimization and interaction process, the corresponding simulation function unit can be called for the compilation process of the task to be processed. Step S11 may include: according to the compilation requirements of the task to be processed, obtaining a list of simulation function units for simulating the compilation process of the task to be processed from the simulation function unit library; in the simulation function unit list, determining the simulation function units corresponding to each compilation process of the task to be processed.

[0057] In the example, the compilation process library can save all the compilation processes involved in the compiler, and when compiling a specific task to be processed, based on the compilation requirements of the task to be processed (for example, based on the functions involved in the task to be processed), the corresponding compilation process is called in the compilation process library, and the called compilation processes can also be composed into a compilation process list, so that according to the compilation processes and the order in the list, the compilation process is called to compile the task to be processed and obtain the compilation result. Correspondingly, based on the compilation requirements, the corresponding simulation function unit can be called from the simulation function unit library, and the called simulation function unit can also be composed into a simulation function unit list, so that according to the simulation function units and the order in the list, the compilation result obtained by each compilation process is simulated and run, that is, the compilation result is run through the simulation function unit corresponding to the compilation process. In the example, the compilation process and the simulation function unit can be a one-to-one correspondence, or one simulation function unit can correspond to one or more compilation processes, or one compilation process can correspond to one or more simulation function units, and the present disclosure does not limit this.

[0058] In the example, the simulation function unit can evaluate the operation result and provide feedback based on the evaluation result to complete the process of interaction and optimization. For example, the simulation function unit can run the compilation result of a certain compilation process, obtain the operation result, and evaluate the operation result. If the evaluation result is qualified, the next compilation process can be continued. If the evaluation result is unqualified, the high-level program language and / or compilation process of the compilation can be adjusted. For example, the accuracy of the operation result can be evaluated, the operation effect can be evaluated, etc. For example, the hardware unit is a processor, which can process the input information and obtain the processing result. In the simulation process, the processing process can be simulated to obtain the processing result. If the accuracy of the processing result is insufficient, it can be determined that the evaluation result is unqualified, otherwise, the evaluation result is qualified. For another example, the hardware unit is a router, which can communicate information, that is, send it to other hardware units. In the simulation process, the communication process can be simulated. If other hardware units can receive the above information, it is determined that the evaluation result is qualified, otherwise, it is unqualified. If the evaluation result is unqualified, the high-level programming language and / or the compilation process may be adjusted, for example, the program may be modified or the compilation process may be modified. In the example, the algorithms involved in the program may be modified to improve processing accuracy, or the communication protocol may be modified to improve the communication success rate, or the compilation process may be modified, for example, to determine whether the machine-executable binary code is incorrect, and if so, to modify it. The present disclosure does not limit this.

[0059] Figure 3 A schematic diagram of the interaction and optimization process according to an embodiment of the present disclosure is shown. During the compilation process of a high-level programming language, an intermediate representation (IR) thereof may be first obtained, for example, a relationship diagram consisting of elements such as function nodes and connection relationships. Each function node may represent a specific function performed by the high-level programming language, for example, a computing node may represent a computing function, a convolution node may represent a convolution function, etc., and the present disclosure does not impose any restrictions on this. The connection relationship may represent the logical order of the high-level programming language. For example, function node 1 is connected to function node 2, and function node 1 is before function node 2, which may mean that function node 2 is executed after the function of function node 1 is executed, or function node 2 needs to be executed based on the execution result of function node 1. The intermediate representation may also include other elements, for example, a conditional trigger area, etc., and the present disclosure does not impose any restrictions on this.

[0060] In the example, Figure 3As shown, based on the compilation requirements of the high-level program language, the compilation process list and the simulation function unit list can be scheduled to obtain, and the corresponding relationship is that the simulation function unit 1 corresponds to the compilation process 1 and the compilation process 2, and the simulation function unit 2 corresponds to the compilation process 3. Each compilation process can compile a certain function or a certain aspect of the high-level program language, and the simulation function unit runs and evaluates the compilation result, and adjusts the compilation process and / or the corresponding function or aspect in the high-level program language based on the evaluation result. For example, before the compilation process starts, the intermediate representation corresponding to the high-level program language is the initial IR. After the interaction process of the compilation process 1, the compilation process 2 and the simulation function unit 1, it can be adjusted based on the evaluation result. For example, the intermediate representation corresponding to the adjusted high-level program language is IR2. Further, after the interaction process of the compilation process 3 and the simulation function unit 2, it can be adjusted based on the evaluation result. For example, the intermediate representation corresponding to the adjusted high-level program language is the final IR. The compilation result of this IR is the final compilation result, that is, the compilation result that can be used for execution by the hardware device.

[0061] In a possible implementation, the compilation process and the corresponding simulation function unit can also be directly combined to perform optimization in a more targeted manner. Step S11 may include: according to the compilation requirements of the task to be processed, the simulation function unit library and the compilation processes of the task to be processed, obtaining an optimization pair list including at least one optimization pair, wherein the optimization pair includes a function pair consisting of the compilation process and the corresponding simulation function unit.

[0062] Figure 4 A schematic diagram showing the interaction and optimization process according to an embodiment of the present disclosure is shown as follows: Figure 4As shown, based on the compilation requirements of the high-level programming language, it can be determined that the simulation function unit 1 corresponds to the compilation process 1 and the compilation process 2, and the simulation function unit 2 corresponds to the compilation process 3. Based on this, the above compilation processes and simulation function units can be scheduled, and an optimization pair list can be formed, that is, the simulation function unit 1 and the compilation process 1 form an optimization pair 1, the simulation function unit 1 and the compilation process 2 form an optimization pair 2, and the simulation function unit 2 and the compilation process 3 form an optimization pair 3. During the optimization process of the optimization pair, the compilation process can compile a certain function or aspect of the high-level program language, and the simulation function unit runs and evaluates the compilation result, and adjusts the compilation process and / or the corresponding function or aspect in the high-level program language based on the evaluation result. For example, before the compilation process starts, the intermediate representation corresponding to the high-level program language is the initial IR. After the optimization process of optimization pair 1 and optimization pair 2, it can be adjusted based on the evaluation result, for example, the intermediate representation corresponding to the adjusted high-level program language is IR2. Further, after the optimization process of optimization pair 3, it can be adjusted based on the evaluation result, for example, the intermediate representation corresponding to the adjusted high-level program language is the final IR. The compilation result of this IR is the final compilation result, that is, the compilation result that can be used for execution by hardware devices.

[0063] In a possible implementation, in step S12, as described above, the interaction and optimization process may include the simulation function unit running the compilation process to compile a certain aspect or part of the high-level programming language, and evaluating the result obtained by the operation. Step S12 may include: obtaining the compilation intermediate result of the compilation process; executing the compilation intermediate result by the simulation function unit to obtain the intermediate execution result; evaluating the intermediate execution result by the simulation function unit to obtain the simulation evaluation result.

[0064] In one possible implementation, regardless of the use Figure 3 or Figure 4 Regardless of the interaction with the optimization method, the simulation functional unit has the function of evaluating the execution results.

[0065] Figure 5 A schematic diagram of a simulation function unit according to an embodiment of the present disclosure is shown. In the compilation process, the corresponding simulation function unit can be called by calling an interface to execute the compilation result of a certain part or aspect of the high-level program language, that is, the compilation intermediate result. Figure 5As shown, the compilation intermediate result obtained by executing the compilation process based on the execution state by the functional unit, for example, the machine executable code corresponding to a certain high-level program language. After obtaining the execution result of the compilation intermediate result (i.e., the intermediate execution result), the execution result can be evaluated, for example, the effect produced by the high-level program language can be evaluated, and / or the compilation process can be evaluated (for example, the accuracy of the compilation, etc.), and the simulation evaluation result can be obtained. Further, the compilation process and / or the high-level program language can be optimized in a targeted manner through the simulation evaluation result.

[0066] In a possible implementation, in step S13, based on the simulation evaluation result and the compilation process, a compilation result of the task to be processed can be obtained, that is, the final compilation result after optimization, which is also a compilation result that can be executed by the hardware device. Step S13 may include: when the simulation evaluation result meets the preset evaluation condition, obtaining the compilation result according to the compilation intermediate result.

[0067] In the example, Figure 3 or Figure 4 As shown, if the simulation function unit can run the intermediate result of the compilation, obtain the intermediate execution result, and evaluate the intermediate execution result to obtain the simulation evaluation result, then, an interaction and optimization process can be performed based on the simulation evaluation result. If the simulation evaluation result meets the preset evaluation conditions, that is, the simulation evaluation result is qualified, then there is no need to adjust the compilation process and / or the high-level program language, and the next compilation process and the interaction process of the simulation function unit can be performed. For example, if the evaluation results of the simulation function unit 1 are all qualified, there is no need to adjust the initial IR, that is, IR2 is consistent with the initial IR, or there is no need to adjust the compilation process 1 and the compilation process 2. Furthermore, based on each interaction and optimization process, a final IR can be obtained, and the compilation result of the final IR is the compilation result of the task to be processed, that is, the compilation result that can be executed by the hardware device.

[0068] In a possible implementation, step S13 may include: when the simulation evaluation result does not meet the preset evaluation condition, adjusting the compilation process and obtaining an adjusted compilation intermediate result; when the simulation evaluation result of the adjusted compilation intermediate result meets the preset evaluation condition, obtaining the compilation result according to the adjusted compilation intermediate result.

[0069] In the example, if the simulation evaluation result does not meet the preset evaluation conditions, that is, the simulation evaluation result is unqualified, the compilation process can be adjusted, and the adjusted compilation process can be used for recompilation to obtain the adjusted compilation intermediate result, and then the adjusted compilation intermediate result is run through the corresponding simulation function unit, and then the run result is re-evaluated to obtain the simulation evaluation result of the adjusted compilation intermediate result. If the simulation evaluation result of the adjusted compilation intermediate result meets the preset evaluation conditions, that is, the simulation evaluation result is qualified, the next compilation process can continue to interact with the simulation function unit until all interaction processes are completed to obtain the final compilation result.

[0070] In the example, when the simulation evaluation result does not meet the preset evaluation condition, the corresponding part or aspect of the high-level programming language can be adjusted, such as Figure 3 or Figure 4 As shown, if the evaluation result of the simulation function unit 1 is unqualified, the corresponding part or aspect of the high-level program language can be adjusted to obtain the adjusted high-level program language. If the compiled intermediate result of the adjusted high-level program language is executed, and the simulation evaluation result of the intermediate execution result is qualified, the next interactive process is continued. For example, IR2 is the intermediate representation of the adjusted high-level program language, and IR2 is inconsistent with the initial IR. Through the above process, multiple compilation processes and simulation function units are interacted and optimized to obtain the final compilation result.

[0071] In a possible implementation, in step S14, the final compilation result can be executed by a hardware device to obtain the execution result of the task to be processed, that is, the compiled and optimized machine executable code can be executed by the hardware device to obtain the expected execution result.

[0072] According to the compilation method of the embodiment of the present disclosure, the functions of the simulation device can be decomposed into multiple simulation function units, and the execution status can be saved, so that the simulation function units can be quickly called and executed, and the operation efficiency of the simulation function units can be improved. In addition, during the simulation process, the execution process of the corresponding hardware unit can be simulated separately, without simulating the entire hardware, so that the simulation function unit and the compilation process can be interacted and optimized respectively in a targeted manner, and the corresponding parts of the compilation process and / or the high-level program language can be adjusted in a targeted manner to improve the flexibility and efficiency of the optimization, and the efficiency and accuracy of the compilation can be improved.

[0073] Figure 6 A block diagram of a compiling device according to an embodiment of the present disclosure is shown as follows: Figure 6As shown, the device may include: a memory for storing simulation function units and compilation processes, the simulation function units corresponding to the functions of the simulation device, the simulation device for simulating the hardware device, each of the simulation function units for realizing its own specific simulation function, and the simulation function units corresponding to the hardware units of the hardware device; a compilation process scheduler for calling the compilation process in the memory; a simulation function unit scheduler for calling the simulation function units corresponding to the compilation process in the memory; a compilation process runner for executing the compilation process; a simulation function unit runner for obtaining a simulation evaluation result of the compilation process according to the simulation function units and the compilation process; the compilation device is used to determine the compilation process and the simulation function unit to be called according to the compilation requirements of the task to be processed, and obtain the compilation result of the task to be processed according to the simulation evaluation result and the compilation process, so that the hardware device corresponding to the task to be processed can execute the compilation result and obtain the execution result of the task to be processed.

[0074] In one possible implementation, the apparatus is further used to obtain a simulation function unit library according to the function of the simulation device and the execution status of the hardware device, and store the library in the memory, wherein the simulation function unit library includes simulation function units corresponding to function units of multiple functions of the simulation device.

[0075] In one possible implementation, the device is further used to: obtain, from the simulation function unit library, a list of simulation function units for simulating the compilation process of the task to be processed according to the compilation requirements of the task to be processed; and determine, in the simulation function unit list, the simulation function units corresponding to each compilation process of the task to be processed.

[0076] In one possible implementation, the device is further used to obtain an optimization pair list including at least one optimization pair based on the compilation requirements of the task to be processed, the simulation function unit library and the compilation processes of the task to be processed, wherein the optimization pair includes a functional pair consisting of the compilation process and the corresponding simulation function unit.

[0077] In a possible implementation, the simulation function unit runner is further used to: obtain an intermediate compilation result of the compilation process; execute the intermediate compilation result through the simulation function unit to obtain an intermediate execution result; evaluate the intermediate execution result through the simulation function unit to obtain the simulation evaluation result.

[0078] In a possible implementation, the device is further configured to: obtain the compilation result according to the compilation intermediate result when the simulation evaluation result satisfies a preset evaluation condition.

[0079] In a possible implementation, the device is further used to: when the simulation evaluation result does not meet the preset evaluation conditions, adjust the compilation process and obtain an adjusted compilation intermediate result; when the simulation evaluation result of the adjusted compilation intermediate result meets the preset evaluation conditions, obtain the compilation result according to the adjusted compilation intermediate result.

[0080] It can be understood that the above-mentioned various method embodiments mentioned in the present disclosure can be combined with each other to form a combined embodiment without violating the principle logic. Due to space limitations, the present disclosure will not repeat them. It can be understood by those skilled in the art that in the above-mentioned method of the specific implementation method, the specific execution order of each step should be determined according to its function and possible internal logic.

[0081] In addition, the present disclosure also provides a compilation device, an electronic device, a computer-readable storage medium, and a program, all of which can be used to implement any compilation method provided by the present disclosure. The corresponding technical solutions and descriptions are referred to in the corresponding records of the method part and will not be repeated here.

[0082] In some embodiments, the functions or modules included in the device provided by the embodiments of the present disclosure can be used to execute the method described in the above method embodiments. The specific implementation can refer to the description of the above method embodiments, and for the sake of brevity, it will not be repeated here.

[0083] The embodiment of the present disclosure also provides a computer-readable storage medium, on which computer program instructions are stored, and when the computer program instructions are executed by a processor, the above method is implemented. The computer-readable storage medium may be a non-volatile computer-readable storage medium.

[0084] An embodiment of the present disclosure further proposes an electronic device, comprising: a processor; and a memory for storing instructions executable by the processor; wherein the processor is configured to call the instructions stored in the memory to execute the above method.

[0085] The embodiments of the present disclosure also provide a computer program product, including a computer-readable code. When the computer-readable code is executed on a device, a processor in the device executes instructions for implementing the compilation method provided in any of the above embodiments.

[0086] The embodiments of the present disclosure also provide another computer program product for storing computer-readable instructions, which, when executed, enable a computer to perform the operations of the compilation method provided in any of the above embodiments.

[0087] The electronic device may be provided as a terminal, a server, or a device in other forms.

[0088] Figure 71 is a block diagram of an electronic device 1900 according to an embodiment of the present disclosure. For example, the electronic device 1900 may be provided as a terminal device or a server. Figure 7 The electronic device 1900 includes a processing component 1922, such as a compilation process scheduler, a simulation function unit scheduler, a compilation process runner and / or a simulation function unit runner, which further includes one or more processors, and a memory resource represented by a memory 1932 for storing instructions that can be executed by the processing component 1922, such as an application. The application stored in the memory 1932 may include one or more modules, each corresponding to a set of instructions. In addition, the processing component 1922 is configured to execute instructions to perform the above method.

[0089] The electronic device 1900 may also include a power supply component 1926 configured to perform power management of the electronic device 1900, a wired or wireless network interface 1950 configured to connect the electronic device 1900 to a network, and an input / output (I / O) interface 1958. The electronic device 1900 may operate based on an operating system stored in the memory 1932, such as Windows Server 2000. TM , Mac OS X TM , Unix TM ,Linux TM , FreeBSD TM or similar.

[0090] In an exemplary embodiment, a non-volatile computer-readable storage medium is also provided, such as a memory 1932 including computer program instructions, which can be executed by the processing component 1922 of the electronic device 1900 to perform the above method.

[0091] The present disclosure may be a system, a method and / or a computer program product. The computer program product may include a computer-readable storage medium carrying computer-readable program instructions for causing a processor to implement various aspects of the present disclosure.

[0092] A computer-readable storage medium may be a tangible device that can hold and store instructions used by an instruction execution device. A computer-readable storage medium may be, for example, but not limited to, an electrical storage device, a magnetic storage device, an optical storage device, an electromagnetic storage device, a semiconductor storage device, or any suitable combination of the foregoing. More specific examples of computer-readable storage media (a non-exhaustive list) include: a portable computer disk, a hard disk, a random access memory (RAM), a read-only memory (ROM), an erasable programmable read-only memory (EPROM or flash memory), a static random access memory (SRAM), a portable compact disk read-only memory (CD-ROM), a digital versatile disk (DVD), a memory stick, a floppy disk, a mechanical encoding device, such as a punch card or a raised structure in a groove on which instructions are stored, and any suitable combination of the foregoing. As used herein, a computer-readable storage medium is not to be interpreted as a transient signal per se, such as a radio wave or other freely propagating electromagnetic wave, an electromagnetic wave propagating through a waveguide or other transmission medium (e.g., a light pulse through a fiber optic cable), or an electrical signal transmitted through a wire.

[0093] The computer-readable program instructions described herein can be downloaded from a computer-readable storage medium to each computing / processing device, or downloaded to an external computer or external storage device via a network, such as the Internet, a local area network, a wide area network, and / or a wireless network. The network can include copper transmission cables, optical fiber transmissions, wireless transmissions, routers, firewalls, switches, gateway computers, and / or edge servers. The network adapter card or network interface in each computing / processing device receives the computer-readable program instructions from the network and forwards the computer-readable program instructions for storage in the computer-readable storage medium in each computing / processing device.

[0094] The computer program instructions for performing the operation of the present disclosure may be assembly instructions, instruction set architecture (ISA) instructions, machine instructions, machine-related instructions, microcode, firmware instructions, state setting data, or source code or object code written in any combination of one or more programming languages, including object-oriented programming languages, such as Smalltalk, C++, etc., and conventional procedural programming languages, such as "C" language or similar programming languages. Computer-readable program instructions may be executed completely on a user's computer, partially on a user's computer, as an independent software package, partially on a user's computer, partially on a remote computer, or completely on a remote computer or server. In the case of a remote computer, the remote computer may be connected to the user's computer via any type of network, including a local area network (LAN) or a wide area network (WAN), or may be connected to an external computer (e.g., using an Internet service provider to connect via the Internet). In some embodiments, an electronic circuit, such as a programmable logic circuit, a field programmable gate array (FPGA), or a programmable logic array (PLA), may be personalized by utilizing the state information of the computer-readable program instructions, and the electronic circuit may execute the computer-readable program instructions, thereby realizing various aspects of the present disclosure.

[0095] Various aspects of the present disclosure are described herein with reference to the flowcharts and / or block diagrams of the methods, devices (systems) and computer program products according to the embodiments of the present disclosure. It should be understood that each box in the flowchart and / or block diagram and the combination of each box in the flowchart and / or block diagram can be implemented by computer-readable program instructions.

[0096] These computer-readable program instructions can be provided to a processor of a general-purpose computer, a special-purpose computer, or other programmable data processing device, thereby producing a machine, so that when these instructions are executed by the processor of the computer or other programmable data processing device, a device that implements the functions / actions specified in one or more boxes in the flowchart and / or block diagram is generated. These computer-readable program instructions can also be stored in a computer-readable storage medium, and these instructions cause the computer, programmable data processing device, and / or other equipment to work in a specific manner, so that the computer-readable medium storing the instructions includes a manufactured product, which includes instructions for implementing various aspects of the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0097] Computer-readable program instructions may also be loaded onto a computer, other programmable data processing apparatus, or other device so that a series of operating steps are performed on the computer, other programmable data processing apparatus, or other device to produce a computer-implemented process, thereby causing the instructions executed on the computer, other programmable data processing apparatus, or other device to implement the functions / actions specified in one or more boxes in the flowchart and / or block diagram.

[0098] The flow chart and block diagram in the accompanying drawings show the possible architecture, function and operation of the system, method and computer program product according to multiple embodiments of the present disclosure. In this regard, each square box in the flow chart or block diagram can represent a part of a module, program segment or instruction, and a part of the module, program segment or instruction includes one or more executable instructions for realizing the specified logical function. In some alternative implementations, the function marked in the square box can also occur in a sequence different from that marked in the accompanying drawings. For example, two continuous square boxes can actually be executed substantially in parallel, and they can sometimes be executed in reverse order, depending on the functions involved. It should also be noted that each square box in the block diagram and / or flow chart, and the combination of the square boxes in the block diagram and / or flow chart can be implemented with a dedicated hardware-based system that performs the specified function or action, or can be implemented with a combination of special hardware and computer instructions.

[0099] The computer program product may be implemented in hardware, software or a combination thereof. In one optional embodiment, the computer program product is embodied as a computer storage medium, and in another optional embodiment, the computer program product is embodied as a software product, such as a software development kit (SDK) and the like.

[0100] The embodiments of the present disclosure have been described above, and the above description is exemplary, not exhaustive, and is not limited to the disclosed embodiments. Many modifications and changes will be apparent to those of ordinary skill in the art without departing from the scope and spirit of the described embodiments. The selection of terms used herein is intended to best explain the principles of the embodiments, practical applications, or improvements to the technology in the market, or to enable other persons of ordinary skill in the art to understand the embodiments disclosed herein.

Claims

1. A compiling method, characterized in that: include: According to the compilation requirements of the task to be processed, obtaining simulation function units corresponding to the compilation processes of the task to be processed, wherein the simulation function units correspond to the functions of the simulation device, the simulation device is used to simulate the hardware device that executes the task to be processed, each of the simulation function units is used to realize its own specific simulation function, and the simulation function units correspond to the hardware units of the hardware device; According to the simulation function unit and the compilation process, obtaining a simulation evaluation result of the compilation process; Obtaining a compilation result of the task to be processed according to the simulation evaluation result and the compilation process; The compilation result is executed by a hardware device corresponding to the task to be processed to obtain an execution result of the task to be processed.

2. The compiling method according to claim 1, characterized in that: The method further comprises: According to the functions of the simulation device and the execution state of the hardware device, a simulation function unit library is obtained, wherein the simulation function unit library includes simulation function units corresponding to function units of multiple functions of the simulation device.

3. The compiling method according to claim 2, characterized in that: According to the compilation requirements of the task to be processed, obtaining the simulation function unit corresponding to each compilation process of the task to be processed includes: According to the compilation requirements of the task to be processed, obtaining from the simulation function unit library a list of simulation function units for simulating the compilation process of the task to be processed; In the simulation function unit list, the simulation function units corresponding to the compilation processes of the tasks to be processed are determined.

4. The compiling method according to claim 2, characterized in that: According to the compilation requirements of the task to be processed, obtaining the simulation function unit corresponding to each compilation process of the task to be processed includes: According to the compilation requirements of the task to be processed, the simulation function unit library and the compilation processes of the task to be processed, an optimization pair list including at least one optimization pair is obtained, wherein the optimization pair includes a function pair consisting of the compilation process and the corresponding simulation function unit.

5. The compiling method according to claim 2, characterized in that: According to the simulation function unit and the compilation process, obtaining a simulation evaluation result of the compilation process includes: Obtaining an intermediate compilation result of the compilation process; Execute the compiled intermediate result through the simulation function unit to obtain an intermediate execution result; The intermediate execution result is evaluated by the simulation function unit to obtain the simulation evaluation result.

6. The compiling method according to claim 5, characterized in that: Obtaining a compilation result of the task to be processed according to the simulation evaluation result and the compilation process, including: In the case where the simulation evaluation result meets the preset evaluation condition, the compilation result is obtained according to the compilation intermediate result.

7. The compiling method according to claim 5, characterized in that: Obtaining a compilation result of the task to be processed according to the simulation evaluation result and the compilation process, including: If the simulation evaluation result does not meet the preset evaluation condition, adjusting the compilation process and obtaining an adjusted compilation intermediate result; In the case where the simulation evaluation result of the adjusted compilation intermediate result meets a preset evaluation condition, the compilation result is obtained according to the adjusted compilation intermediate result.

8. A compiling device, characterized in that: include: A memory, used for storing simulation function units and compiling processes, wherein the simulation function units correspond to functions of simulation devices, the simulation devices are used for simulating hardware devices, each of the simulation function units is used for realizing its own specific simulation function, and the simulation function units correspond to hardware units of the hardware devices; A compilation process scheduler, used for calling the compilation process in the memory; A simulation function unit scheduler, used for calling the simulation function unit corresponding to the compilation process in the memory; A compilation process runner, used to execute the compilation process; A simulation function unit runner, used for obtaining a simulation evaluation result of the compilation process according to the simulation function unit and the compilation process; The compilation device is used to determine the compilation process and simulation function unit to be called according to the compilation requirements of the task to be processed, and obtain the compilation result of the task to be processed according to the simulation evaluation result and the compilation process, so that the hardware device corresponding to the task to be processed can execute the compilation result and obtain the execution result of the task to be processed.

9. An electronic device, characterized in that: include: processor; a memory for storing processor-executable instructions; The processor is configured to call the instructions stored in the memory to execute the method described in any one of claims 1 to 7.

10. A computer-readable storage medium having computer program instructions stored thereon, characterized in that: When the computer program instructions are executed by a processor, the method according to any one of claims 1 to 7 is implemented.

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